In this paper, we explore the use of a 180 nm CMOS single-poly technology platform for realizing analog Deep Neural Network integrated circuits. The analysis focuses on analog vector–matrix multiplier architectures, one of the main building blocks of a neural network, implementing in-memory computat...

In this paper novel AB class neuron structures that set foundations for low power VLSI neural networks and other applications are proposed. The analog AB class circuits for activation function and programmable weight synaptic connections are presented and discussed. A qualitative comparison is made ...

The paper presents a prototype of a perceptron network working in the current mode, with a digital interface for applications in analog-to-digital systems. The presented implementation makes it possible to create a network using the standard nanometer CMOS technology, to use a row strategy for desig...