COE/EE 243 Session 44; Page 1/5

Digital Logic Spring 2003

COE/EE 243 Sample Final Exam From Fall 98

Solutions

Show your work. Do NOT use a calculator!

1. (9 pts) Complete the following table of equivalent values.

Binary Octal Decimal Hexadecimal

1011.0011 13.14 11.1875 B.3
11101.11111101 35.77 29.99 1D.FD
11011.010011 33.23 27 19
64 1B.4C

2. (12 pts) Calculate the following

a) 11001
2 plus 101
2  11110
b) 11010
2 minus 10101
2 using 1’s complement representation  000101
c) 1101
2 times 1001
2  1110101
d) 101101
2 divided by 110
2  111 1

3. (9 pts) Complete the following table of equivalent values. Use binary numbers with a sign bit and
5 bits for the value

Decimal Signed Magnitude Two’s Complement One’s Complement

11 101011 110101 110100
2 100010 111110 111101
1 100001 111111 111110

4. (8 pts) Give the Characteristic equations and the Excitation tables for the SR and JK flip-flops.

SR flip-flop JK flip-flop

Q  S  R ¼ Q Q  JQ¼  K ¼ Q

S R Q Q+ J K Q Q+
0 0 0 0 0 0 0 0
0 0 1 1 0 0 1 1
0 1 0 0 0 1 0 0
0 1 1 0 0 1 1 0
1 0 0 1 1 0 0 1
1 0 1 1 1 0 1 1
1 1 0 - 1 1 0 1
1 1 1 - 1 1 1 0
COE/EE 243 Session 44; Page 2/5
Digital Logic Spring 2003

5. (10 pts) (a) Explain the difference between a Moore machine and a Mealy machine.
Sol The outputs in a Moore machine depend only on the present state. The outputs in a Mealy
machine depend on both the present state and the present input.
(b) What is the same about both kinds of state machines?
Sol Both have present state dependent on past inputs.
(c) Draw a block diagram indicating the structure of a general state machine. Indicate on the
diagram where one can find the present state and next state.

Next Flip Ouput Z

X State Flops Logic
Logic y
Y

6. (5 pts) Give a truth table and a standard sum of products expression that describes
F  A  B C

A B C F
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 0 F  AB¼C ¼  A¼ B¼C  A¼ BC ¼  ABC
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
7. (8 pts) Indicate how a Nand gate can be used to implement:
5V
X’ or could do X X’
(a) An Inverter: X

A X’
X
(b) An And Gate: B

A
X=A+B X
= (A’B’)’
B
(c) An Or Gate:

(d) Because a Nand gate can be used to implement all three basic Boolean functions, how would
we describe it? Functionally Complete
COE/EE 243 Session 44; Page 3/5
Digital Logic Spring 2003

8. (8 pts) Using the 74ALS163 counter shown below and logic gates design a counter that counts in
the sequence 3,4, 5, 6, 7, 8, 9, 10, 11, 12, 3, ... Connect all unused inputs. The counter may cycle
through several unwanted states before settling into the final count sequence. Q d is the MSB of the
counter output.

1 0 0 1 1

P DD DC DB DA

T
CLR 74S163 RCO
LD

CLK CLK QD QC QB QA

9. (6 pts) Find a minimum sum of products expresssion for F  abc ¼  bc¼ d ¼  cd  a¼ b

f
cd
ab 00 01 11 10

00 0 0 1 0
01 1 1 1 1
F = a’b + cd + bc’
11 1 1 1 0
10 0 0 1 0
COE/EE 243 Session 44; Page 4/5
Digital Logic Spring 2003

10. (10 pts) Create a state diagram for a sequence detector that outputs a 1 when it detects the final bit
in the serial data stream 1101.

Mealy Machine Moore Machine

X/Z X=0
0/0 S0
Z=0
X=0
S0 1/0 S1 1/0 S2 0/0 S3
X=0 X=1
0/0 1/0
0/0 X=1 S1
1/1 Z=0
S4 X=0
Z=1 X=1
X=1
S2
Z=0

X=0
X=1
S3
Z=0
COE/EE 243 Session 44; Page 5/5
Digital Logic Spring 2003

11. (10 pts) Determine the D flip-flop excitation equations for the system represented with in the state-
transition table below. Assign states: S0  00, S1  01, S2  10 and S3  11.
Da
AB
X 00 01 11 10

0 0 0 1 1

1 1 1 0 1
Present Present Next State Output
AB S X=0 X=1 Z AB’
Da = X’A + XA’ + {
00 S0 S1 S2 0 XB’
01 S1 S1 S2 1
10 S2 S2 S3 1 Db
11 S3 S3 S0 0 AB
X 00 01 11 10

0 1 1 1 0

1 0 0 0 1

Db = XAB’ + X’A’ + X’B

12. (5 pts) Give the output expression for the 8-to-1 MUX shown below.

I0
8 to 1
I1 MUX
I2
I3
I4 Z
I5
I6
I7

A B C

Z  A¼ B¼C¼ I0  A¼ B¼CI1  A¼BC¼ I2  A¼ BCI3  AB¼C¼ I4  AB¼CI5  ABC¼I6  ABCI7