LM1203 RGB Video Amplifier System

January 1996

LM1203 RGB Video Amplifier System

General Description Features
The LM1203 is a wideband video amplifier system intended Y Three wideband video amplifiers (70 MHz @ b3dB)
for high resolution RGB color monitor applications. In addi- Y Inherently matched ( g 0.1 dB or 1.2%) attenuators for
tion to three matched video amplifiers, the LM1203 contains contrast control
three gated differential input black level clamp comparators Y Three externally gated comparators for brightness con-
for brightness control and three matched attenuator circuits trol
for contrast control. Each video amplifier contains a gain set Y Provisions for independent gain control (Drive) of each
or ‘‘Drive’’ node for setting maximum system gain (Av e 4 video amplifier
to 10) as well as providing trim capability. The LM1203 also Y Video input voltage reference
contains a voltage reference for the video inputs. For high Y Low impedance output driver
resolution monochrome monitor applications see the
LM1201 Video Amplifier System datasheet.

Block and Connection Diagram

TL/H/9178 – 1
FIGURE 1
Order Number LM1203N
See NS Package Number NA28F

C1996 National Semiconductor Corporation TL/H/9178 RRD-B30M56/Printed in U. S. A.

 Absolute Maximum Ratings
If Military/Aerospace specified devices are required, Storage Temperature Range, TSTG b 65§ C to a 150§ C
please contact the National Semiconductor Sales Lead Temperature, (Soldering, 10 sec.) 265§ C
Office/Distributors for availability and specifications.
ESD susceptibility 1 kV
Supply Voltage, VCC Pins 1, 13, 23, 28
Human body model: 100 pF discharged through a 1.5 kX
(Note 1) 13.5V
resistor
Voltage at Any Input Pin, VIN VCC t VIN t GND
Video Output Current, I16, 20 or 25 28 mA Operating Ratings (Note 9)
Power Dissipation, PD 2.5W Temperature Range 0§ C to 70§ C
(Above 25§ C) Derate Based on iJA and TJ
Supply Voltage (VCC) 10.8V s VCC s 13.2V
Thermal Resistance, iJA 50§ C/W
Junction Temperature, TJ 150§ C

Electrical Characteristics See Test Circuit (Figure 2) , TA e 25§ C; VCC1 e VCC2 e 12V
DC Static Tests S17, 21, 26 Open; V12 e 6V; V14 e 0V; V15 e 2.0V unless otherwise stated
Tested Design Units
Label Parameter Conditions Typ
Limit (Note 2) Limit (Note 3) (Limits)
Is Supply Current VCC 1 only 73 90.0 mA(max)
V11 Video Input Reference Voltage 2.2 V(min)
2.4
2.6 V(max)
lb Video Input Bias Current Any One Amplifier 5.0 20 mA(max)
V14 l Clamp Gate Low Input Voltage Clamp Comparators On 1.2 0.8 V(max)
V14 h Clamp Gate High Input Voltage Clamp Comparators Off 1.6 2.0 V(min)
I14 l Clamp Gate Low Input Current V14 e 0V b 0.5 b 5.0 mA(max)
I14 h Clamp Gate High Input Current V14 e 12V 0.005 1 mA(max)
lclamp a Clamp Cap Charge Current V5, 8 or 10 e 0V 850 500 mA(min)
lclampb Clamp Cap Discharge Current V5, 8 or 10 e 5V b 850 b 500 mA(min)
Vol Video Output Low Voltage V5, 8 or 10 e 0V 0.9 1.25 V(max)
Voh Video Output High Voltage V5, 8 or 10 e 5V 8.9 8.2 V(min)
DVo(2V) Video Output Offset Voltage Between Any Two Amplifiers
g 0.5 g 50 mV(max)
V15 e 2V
DVo(4V) Video Output Offset Voltage Between Any Two Amplifiers
g 0.5 g 50 mV(max)
V15 e 4V

AC Dynamic Tests S17, 21, 26 Closed; V14 e 0V; V15 e 4V; unless otherwise stated
Tested Design Units
Symbol Parameter Conditions Typ
Limit (Note 2) Limit (Note 3) (Limits)
Av max Video Amplifier Gain V12 e 12V, VIN e 560 mVp-p 6.0 4.5 V/V(min)
DAv 5V Attenuation @ 5V Ref: Av max, V12 e 5V b 10 dB
DAv 2V Attenuation @ 2V Ref: Av max, V12 e 2V b 40 dB
Av match Absolute gain match @ Av max V12 e 12V (Note 5) g 0.5 dB
DAv track1 Gain change between amplifiers V12 e 5V (Notes 5, 8) g 0.1 g 0.5 dB(max)
DAv track2 Gain change between amplifiers V12 e 2V (Notes 5, 8) g 0.3 g 0.7 dB(max)
THD Video Amplifier Distortion V12 e 3V, VO e 1 Vp-p 0.5 %
f (b3 dB) Video Amplifier Bandwidth V12 e 12V,
70 MHz
(Notes 4, 6) VO e 100 mVrms
tr Output Rise Time (Note 4) VO e 4 Vp-p 5 ns
tf Output Fall Time (Note 4) VO e 4 Vp-p 7 ns

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AC Dynamic Tests S17, 21, 26 Closed; V14 e 0V; V15 e 4V; unless otherwise stated (Continued)
Tested Design
Symbol Parameter Conditions Typ Units
Limit (Note 2) Limit (Note 3)
Vsep Video Amplifier 10 kHz Isolation V12 e 12V (Note 7)
b 65 dB
10 kHz
Vsep Video Amplifier 10 MHz Isolation V12 e 12V (Notes 4, 7)
b 46 dB
10 MHz
Note 1: VCC supply pins 1, 13, 23, 28 must be externally wired together to prevent internal damage during VCC power on/off cycles.
Note 2: These parameters are guaranteed and 100% production tested.
Note 3: Design limits are guaranteed (but not 100% production tested). These limits are not used to calculate outgoing quality levels.
Note 4: When measuring video amplifier bandwidth or pulse rise and fall times, a double sided full ground plane printed circuit board without socket is recommend-
ed. Video Amplifier 10 MHz isolation test also requires this printed circuit board.
Note 5: Measure gain difference between any two amplifiers. VIN e 1 Vp-p.
Note 6: Adjust input frequency from 10 kHz (Avmax ref level) to the b 3 dB corner frequency (f b 3 dB).
Note 7: Measure output levels of the other two undriven amplifiers relative to driven amplifier to determine channel separation. Terminate the undriven amplifier
inputs to simulate generator loading. Repeat test at fIN e 10 MHz for Vsep e 10 MHz.
Note 8: DAv track is a measure of the ability of any two amplifiers to track each other and quantifies the matching of the three attenuators. It is the difference in
gain change between any two amplifiers with the Contrast Voltage V12 at either 5V or 2V measured relative to an Av max condition V12 e 12V. For example, at
Av max the three amplifiers gains might be 17.4 dB, 16.9 dB, and 16.4 dB and change to 7.3 dB, 6.9 dB, and 6.5 dB respectively for V12 e 5V. This yields the
measured typical g 0.1 dB channel tracking.
Note 9: Operating Ratings indicate conditions for which the device is functional. See Electrical Specifications for guaranteed performance limits.

*Peaking capacitors. See Frequency Response

using various peaking cups graph on next page.
TL/H/9178 – 2
FIGURE 2. LM1203 Test Circuit

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 Typical Performance Characteristics

Contrast vs Frequency Crosstalk vs Frequency

TL/H/9178 – 11 TL/H/9178 – 12

Frequency Response Using Attenuation vs Contrast Voltage

Various Peaking Caps

TL/H/9178 – 14
TL/H/9178 – 13

Pulse Response

Rise & Fall Times

Vert. e 1V/Div.
Horiz. e 10 ns/Div.

– – GND
TL/H/9178 – 15

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 TL/H/9178 – 3
FIGURE 3. LM1203 Typical Application
* 30X resistors are added to the input pins for protection against current surges coming through the 10 mF input capacitors. By increasing these resistors to well
over 100X the rise and fall times of the LM1203 can be increased for EMI considerations.

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 Applications Information
Figure 4 shows the block diagram of a typical analog RGB pled to the video amplifiers. These input signals are approxi-
color monitor. The RGB monitor is used with CAD/CAM mately 1 volt peak to peak in amplitude and at the input of
work stations, PC’s, arcade games and in a wide range of the high voltage video section, approximately 6V peak to
other applications that benefit from the use of color display peak. At the cathode of the CRT the video signals can be as
terminals. The RGB color monitor characteristics may differ high as 60V peak to peak. One important requirement of the
in such ways as sweep rates, screen size, CRT color trio three video amplifiers is that they match and track each
spacing (dot pitch), or in video amplifier bandwidths but will other over the contrast and brightness control range. The
still be generally configured as shown in Figure 4 . Separate Figure 4 block labeled ‘‘VIDEO AMPLIFICATION WITH
horizontal and vertical sync signals may be required or they GAIN AND DC CONTROL’’ describes the function of the
may be contained in the green video input signal. The video LM1203 which contains the three matched video amplifiers,
input signals are usually supplied by coax cable which is contrast control and brightness control.
terminated in 75X at the monitor input and internally ac cou-

TL/H/9178 – 4
FIGURE 4. Typical RGB Color Monitor Block Diagram

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Circuit Description
Figure 5 is a block diagram of one of the video amplifiers to the video input is through the 10 kX resistor which is
along with the contrast and brightness controls. The con- connected to the 2.4V reference at pin 11. The low frequen-
trast control is a dc-operated attenuator which varies the ac cy roll-off of the amplifier is set by these two components.
gain of all three amplifiers simultaneously while not introduc- Transistor Q1 buffers the video signal to the base of Q2.
ing any signal distortions or tracking errors. The brightness The Q2 collector current is then directed to the VCC 1 sup-
control function requires a ‘‘sample and hold’’ circuit (black ply directly or through the 1k load resistor depending upon
level clamp) which holds the dc bias of the video amplifiers the differential DC voltage at the bases of Q3 and Q4. The
and CRT cathodes constant during the black level reference Q3 and Q4 differential base voltage is determined by the
portion of the video waveform. The clamp comparator, contrast control circuit which is described below. RF decou-
when gated on during this reference period, will charge or pling capacitors are required at pins 2 and 3 to insure high
discharge the clamp capacitor until the plus input of the frequency isolation between the three video amplifiers
clamp comparator matches that of the minus input voltage which share these common connections. The black level dc
which was set by the brightness control. voltage at the collector of Q4 is maintained by Q5 and Q6
Figure 6 is a simplified schematic of one of the three video which are part of the black level clamp circuit also described
amplifiers along with the recommended external compo- below. The video signal appearing at the collector of Q4 is
nents. The IC pin numbers are circled with all external com- then buffered by Q7 and level shifted down by Z1 and Q8 to
ponents shown outside of the dashed line. The video input the base of Q9 which will then provide additional system
is applied to pin 6 via the 10 mF coupling capacitor. DC bias gain.

TL/H/9178 – 5
FIGURE 5. Block Diagram of LM1203 Video Amplifier with Contrast and Black Level Control

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Circuit Description (Continued)

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TL/H/9178 – 6
FIGURE 6. Simplified LM1203 Video Amplifier Section with Recommended External Components
Circuit Description (Continued)
The ‘‘Drive’’ pin will allow the user to trim the Q9 gain of 10 mA. The system gain will also increase slightly because
each amplifier to correct for differences in the CRT and high less signal will be lost across the internal 40X resistor. Pre-
voltage cathode driver gain stages. A small capacitor cautions must be taken to prevent the video output pin from
(33 pF) at this pin will extend the high frequency gain of the going below ground because IC substrate currents may
video amplifier by compensating for some of the internal cause erratic operation. The collector currents from the vid-
high frequency roll off. To use this capacitor and still provide eo output transistors are returned to the power supply at
variable gain adjustment, the 51X and series 100X pot VCC 2 pin 23. When making power dissipation calculations
should be used with the red and green drive pins. The 91X note that the data sheet specifies only the VCC 1 supply
resistor used with the blue drive pin will set the system gain current at 12V. The IC power dissipation contribution of
to approximately 6.2 and allow adjustment of the red and VCC 2 is dependent upon the video output emitter pull down
green gains to 6.2 plus or minus 25%. The video signal at load.
the collector of Q9 is buffered and level shifted down by In applications that require video amplifier shut down be-
Q10 and Q11 to the base of the output emitter follower Q12. cause of fault conditions detected by monitor protection cir-
Between the emitter of Q12 and the video output pin is a cuits, pin 11 and the wiper arms of the contrast and bright-
40X resistor which was included to prevent spurious oscilla- ness controls can be grounded without harming the IC. This
tions when driving capacitive loads. An external emitter re- assumes some series resistance between the top of the
sistor must be added between the video output pin and control pots and VCC.
ground. The value of this resistor should not be less than
Figure 7 shows the internal construction of the pin 11 2.4V
390X or package power limitations may be exceeded when
reference circuit which is used to provide temperature and
worst case (high supply, max supply current, max temp) cal-
supply voltage tracking compensation for the video amplifier
culations are made. If negative going pulse slewing is a
inputs. The value of the external DC biasing resistors should
problem because of high capacitive loads (l10 pF), a more
not be larger than 10 kX because minor differences in input
efficient method of emitter pull down would be to connect a
bias currents to the individual video amplifiers may cause
suitable resistor to a negative supply voltage. This has the
offsets in gain.
effect of a current source pull down when the minus supply
voltage is b12V and the emitter current is approximately

TL/H/9178 – 7
FIGURE 7. LM1203 Video Input Voltage Reference and Contrast Control Circuits

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 Circuit Description (Continued)
Figure 7 also shows how the contrast control circuit is con- the I1 850 mA current to ground. When pin 14 is low ( k1.3V)
figured. Resistors R23, 24, diodes D3, 4 and transistor Q13 the Q21 switch is off and the I1 850 mA current source is
are used to establish a low impedance zero TC half supply mirrored or ‘‘turned around’’ by reference diode D5 and Q26
voltage reference at the base of Q14. The differential ampli- to provide a 850 mA current source for the clamp compara-
fier formed by Q15, 16 and feedback transistor Q17 along tor(s). The inputs to the comparator are similar to the clamp
with resistors R27, 28 establish a diferential base voltage gate input except that an NPN emitter coupled pair is used
for Q3 and Q4 in Figure 6 . When externally adding or sub- to control the current which will charge or discharge the
tracting current from the collector of Q16, a new differential clamp capacitors at pins 5, 8, or 10. PNP transistors are
voltage is generated that reflects the change in the ratio of used at the inputs because they offer a number of advan-
currents in Q15 and Q16. To provide voltage control of the tages over NPNs. PNPs will operate with base voltages at or
Q16 current, resistor R29 is added between the Q16 collec- near ground and will usually have a greater reverse emitter
tor and pin 12. A capacitor should be added from pin 12 to base breakdown voltage (BVebo). Because the differential
ground to prevent noise from the contrast control pot from input voltage to the clamp comparator during the video scan
entering the IC. period could be greater than the BVebo of NPN transistors a
Figure 8 is a simplified schematic of the clamp gate and resistor (R34) with a value one half that of R33 or R35 is
clamp comparator sections of the LM1203. The clamp gate connected between the bases of Q23 and Q27. This resis-
circuit consists of a PNP input buffer transistor (Q18), a PNP tor will limit the maximum differential input to Q24, 25 to
emitter coupled pair referenced on one side to 2.1V (Q19, approximately 350 mV. The clamp comparator common
20) and an output switch (Q21). When the clamp gate input mode range is from ground to approximately 9V and the
at pin 14 is high (l1.5V) the Q21 switch is on and shunts maximum differential input voltage is VCC and ground.

TL/H/9178 – 8
FIGURE 8. Simplified Schematic of LM1203 Clamp Gate and Clamp Comparator Circuits

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Additional Applications of the LM1203
Figure 9 shows how the LM1203 can be set up as a video contrast control (Pin 12) will provide the necessary gain or
buffer which could be used in low cost video switcher appli- attenuation required for channel balancing. Changing the
cations. Pin 14 is tied high to turn off the clamp compara- contrast control setting will cause minor DC shifts at the
tors. The comparator input pins should be grounded as amplifier output which will not be objectionable as the out-
shown. Sync tip (black level if sync is not included) clamping put is AC coupled to the load. The dual NPN/PNP emitter
is provided by diodes at the amplifier inputs. Note that the follower will provide a low impedance output drive to the AC
clamp cap pins are tied to the Pin 11 2.4V reference. This coupled 75X output impedance setting resistor. The dual
was done, along with the choice of 200X for the drive pin 500 mF capacitors will set the low frequency response to
resistor, to establish an optimum DC output voltage. The approximately 4 Hz.

TL/H/9178 – 9
FIGURE 9. RGB Video Buffer with Diode Sync Tip Clamps and 75X Cable Driver

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 Additional Applications of the LM1203 (Continued)
When diode D4 at Pin 11 is switched to ground the input Figure 10 shows the configuration for a three channel high
video signals will be DC shifted down and clamped at a frequency amplifier with non gated DC feedback. Pin 14 is
voltage near ground (approximately 250 mV). This will dis- tied low to turn on the clamp comparators (feedback amplifi-
able the video amplifiers and force the output DC level low. ers). The inverting inputs (Pins 17, 21, 26) are connected to
The DC outputs from other similarly configured LM1203s the amplifier outputs from a low pass filter. Additional low
could overide this lower DC level and provide the output frequency filtering is provided by the clamp caps. The drive
signals to the 75X cable drivers. In this case any additional resistors can be made variable or fixed at values between 0
LM1203s would share the same 390X output resistor. The and 300X. Maximum output swings are achieved when the
maximum DC plus peak white output voltage should not be DC output is set to approximately 4V. The high frequency
allowed to exceed 7V because the ‘‘off’’ amplifier output response will be dependent upon external peaking at the
stage could suffer internal zener damage. See Figure 3 and drive pins.
text for a description of the internal configuration of the vid-
eo amplifier.

TL/H/9178 – 10
FIGURE 10. Three Channel High Frequency Amplifier with Non-gated DC Feedback (Non-video Applications)

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 TL/H/9178 – 16
FIGURE 11. LM1203/LM1881 Application Circuit for PC Board

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PC Board with Components

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TL/H/9178 – 17
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LM1203 RGB Video Amplifier System
Physical Dimensions inches (millimeters) unless otherwise noted Lit. Ý 107315

28-Lead Molded Dual-In-Line Package (N)

Order Number LM1203N
NS Package Number NA28F

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