Floating Point Arithmetic

• Topics
ƒ Numbers in general
ƒ IEEE Floating Point Standard
ƒ Rounding
ƒ Floating Point Operations
ƒ Mathematical properties
ƒ Puzzles test basic understanding
ƒ Bizarre FP factoids

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Numbers
• Many types
ƒ Integers
» decimal in a binary world is an interesting subclass
• consider rounding issues for the financial community
ƒ Fixed point
» still integers but with an assumed decimal point
» advantage – still get to use the integer circuits you know
ƒ Weird numbers
» interval – represented by a pair of values
» log – multiply and divide become easy
• computing the log or retrieving it from a table is messy though
» mixed radix – yy:dd:hh:mm:ss
» many forms of redundant systems – we’ve seen some examples
ƒ Floating point
» inherently has 3 components: sign, exponent, significand
» lots of representation choices can and have been made
• Only two in common use to date: int’s and float’s
ƒ you know int’s - hence time to look at float’s

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 Floating Point
• Macho scientific applications require it
ƒ require lots of range
ƒ compromise: exact is less important than close enough
» enter numeric stability problems
• In the beginning
ƒ each manufacturer had a different representation
» code had no portability
ƒ chaos in macho numeric stability land
• Now we have standards
ƒ life is better but there are still some portability issues
» primarily caused by details “left to the discretion of the
implementer”
» fortunately these differences are not commonly encountered

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Fractional Binary Numbers

2i
2i–1

4
••• 2
1
bi bi–1 ••• b2 b1 b0 . b–1 b–2 b–3 ••• b–j
1/2
1/4 •••
1/8

2–j

• Representation
ƒ Bits to right of “binary point” represent fractional powers of 2
i
ƒ Represents rational number:
∑
b ⋅2 k k
k =− j

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 Fractional Binary Numbers
• Value Representation
5-3/4 101.112
2-7/8 10.1112
63/64 0.1111112
• Observations
ƒ Divide by 2 by shifting right
ƒ Multiply by 2 by shifting left
ƒ Numbers of form 0.111111…2 just below 1.0
» 1/2 + 1/4 + 1/8 + … + 1/2i + … → 1.0
» We’ll use notation 1.0 – ε

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Representable Numbers
• Limitation
ƒ Can only exactly represent numbers of the form x/2k
ƒ Other numbers have repeating bit representations
• Value Representation
1/3 0.0101010101[01]…2
1/5 0.001100110011[0011]…2
1/10 0.0001100110011[0011]…2

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 Early Differences: Format
• IBM 360 and 370
7 bits 24 bits

S E exponent F fraction/mantissa

Value = (-1)S x 0.F x 16E-64

excess notation – why?

• DEC PDP and VAX

8 bits 23 bits

S E exponent F fraction/mantissa

Value = (-1)S x 0.1F x 2E-128

hidden bit

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Early Floating Point Problems

• Non-unique representation
ƒ .345 x 1019 = 34.5 x 1017 Î need a normal form
ƒ often implies first bit of mantissa is non-zero
» except for hex oriented IBM Î first hex digit had to be non-zero
• Value significance
ƒ close enough mentality leads to a too small to matter category
• Portability
ƒ clearly important – more so today
ƒ vendor Tower of Floating Babel wasn’t going to cut it
• Enter IEEE 754
ƒ huge step forward
ƒ portability problems do remain unfortunately
» however they have become subtle
» this is both a good and bad news story

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 Floating Point Representation
• Numerical Form
ƒ –1s M 2E
» Sign bit s determines whether number is negative or positive
» Significand S normally a fractional value in some range e.g.
[1.0,2.0] or [0.0:1.0].
• built from a mantissa M and a default normalized representation
» Exponent E weights value by power of two
• Encoding
s exp frac

ƒ MSB is sign bit

ƒ exp field encodes E
ƒ frac field encodes M

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Problems with Early FP

• Representation differences
ƒ exponent base
ƒ exponent and mantissa field sizes
ƒ normalized form differences
ƒ some examples shortly
• Rounding Modes
• Exceptions
ƒ this is probably the key motivator of the standard
ƒ underflow and overflow are common in FP calculations
» taking exceptions has lots of issues
• OS’s deal with them differently
• huge delays incurred due to context switches or value checks
• e.g. check for -1 before doing a sqrt operation

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 IEEE Floating Point
• IEEE Standard 754-1985 (also IEC 559)
ƒ Established in 1985 as uniform standard for floating point arithmetic
» Before that, many idiosyncratic formats
ƒ Supported by all major CPUs
• Driven by numerical concerns
ƒ Nice standards for rounding, overflow, underflow
ƒ Hard to make go fast
» Numerical analysts predominated over hardware types in
defining standard
• you want the wrong answer – we can do that real fast!!
» Standards are inherently a “design by committee”
• including a substantial “our company wants to do it our way” factor
» If you ever get a chance to be on a standards committee
• call in sick in advance

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• Encoding
Floating Point Precisions
s exp frac

ƒ MSB is sign bit

ƒ exp field encodes E
ƒ frac field encodes M
• IEEE 754 Sizes
ƒ Single precision: 8 exp bits, 23 frac bits
» 32 bits total
ƒ Double precision: 11 exp bits, 52 frac bits
» 64 bits total
ƒ Extended precision: 15 exp bits, 63 frac bits
» Only found in Intel-compatible machines
• legacy from the 8087 FP coprocessor
» Stored in 80 bits
• 1 bit wasted in a world where bytes are the currency of the realm

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IEEE 754 (similar to DEC, very much Intel)
8 bits 23 bits

S E exponent F fraction/mantissa

For “Normal #’s”: Value = (-1)S x 1.F x 2E-127

• Plus some conventions
ƒ definitions for + and – infinity
» symmetric number system so two flavors of 0 as well
ƒ denormals
» lots of values very close to zero
» note hidden bit is not used: V = (-1)S x 0.F x 21-127
» this 1-bias model provides uniform number spacing near 0
ƒ NaN’s (2 semi-non-standard flavors SNaN & QNaN)
» specific patterns but they aren’t numbers
» a way of keeping things running under errors (e.g. sqrt (-1))

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More Precision
• 64 bit form (double)
11 bits 52 bits

S E exponent F fraction/mantissa

“Normalized”
Value = (-1)S x 1.F x 2E-1023

» NOTE: 3 bits more of E but 29 more bits of F

• also definitions for 128 bit and extended temporaries

ƒ temps live inside the FPU so not programmer visible
» note: this is particularly important for x86 architectures
» allows internal representation to work for both single and
doubles
• any guess why Intel wanted this in the standard?

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 From a Number Line Perspective
represented as: +/- 1.0 x {20, 21, 22, 23} – e.g. the E field

-8 -4 -2 -1 0 1 2 4 8

How many numbers are there in each gap??

2n for an n-bit F field

Distance between representable numbers??

same intra-gap
different inter-gap

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Floating Point Operations

• Multiply/Divide
ƒ similar to what you learned in school
» add/sub the exponents
» multiply/divide the mantissas
» normalize and round the result
ƒ tricks exist of course
• Add/Sub
ƒ find largest
ƒ make smallest exponent = largest and shift mantissa
ƒ add the mantissa’s (smaller one may have gone to 0)
• Problems?
ƒ consider all the types: numbers, NaN’s, 0’s, infinities, and denormals
ƒ what sort of exceptions exist

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 IEEE Standard Differences
• 4 rounding modes
ƒ round to nearest is the default
» others selectable
• via library, system, or embedded assembly instruction however
» rounding a halfway result always picks the even number side
» why?
• Defines special values
ƒ NaN – not a number
» 2 subtypes
• quiet Î qNaN
• signalling Î sNaN
» +∞ and –∞
ƒ Denormals
» for values < |1.0 x 2Emin| Î gradual underflow
• Sophisticated facilities for handling exceptions
ƒ sophisticated Î designer headache

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Benefits of Special Values

• Denormals and gradual underflow
ƒ once a value is < |1.0 x 2Emin| it could snap to 0
ƒ however certain usual properties would be lost from the system
» e.g. x==y ÍÎ x-y == 0
ƒ with denormals the mantissa gradually reduces in magnitude until all
significance is lost and the next smaller representable number is
really 0
• NaN’s
ƒ allows a non-value to be generated rather than an exception
» allows computation to proceed
» usual scheme is to post-check results for NaN’s
• keeps control in the programmer’s rather than OS’s domain
» rule
• any operation with a NaN operand produces a NaN
• hence code doesn’t need to check for NaN input values and special case then
• sqrt(-1) ::= NaN

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 Benefits (cont’d)
• Infinities
ƒ converts overflow into a representable value
» once again the idea is to avoid exceptions
» also takes advantage of the close but not exact nature of floating
point calculation styles
ƒ e.g. 1/0 Î +∞
• A more interesting example
ƒ identity: arccos(x) = 2*arctan(sqrt(1-x)/(1+x))
» arctan x assymptotically approaches π/2 as x approaches ∞
» natural to define arctan(∞) = π/2
• in which case arccos(-1) = 2arctan(∞) = π

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Special Value Rules

Operations Result
n / ±∞ ?
±∞ x ±∞
nonzero / 0
+∞ + +∞
±0 / ±0
+∞ - +∞
±∞ / ±∞
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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 Special Value Rules
Operations Result
n / ±∞ ±0
±∞ x ±∞ ?
nonzero / 0
+∞ + +∞
±0 / ±0
+∞ - +∞
±∞ / ±∞
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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Special Value Rules

Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ?
+∞ + +∞
±0 / ±0
+∞ - +∞
±∞ / ±∞
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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 Special Value Rules
Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ±∞
+∞ + +∞ ?
±0 / ±0
+∞ - +∞
±∞ / ±∞
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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Special Value Rules

Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ±∞
+∞ + +∞ +∞ (similar for -∞)
±0 / ±0 ?
+∞ - +∞
±∞ / ±∞
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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 Special Value Rules
Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ±∞
+∞ + +∞ +∞ (similar for -∞)
±0 / ±0 NaN
+∞ - +∞ ?
±∞ / ±∞
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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Special Value Rules

Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ±∞
+∞ + +∞ +∞ (similar for -∞)
±0 / ±0 NaN
+∞ - +∞ NaN (similar for -∞)
±∞ / ±∞ ?
±∞ X ±0
NaN any-op anything NaN (similar for [any op NaN])

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 Special Value Rules
Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ±∞
+∞ + +∞ +∞ (similar for -∞)
±0 / ±0 NaN
+∞ - +∞ NaN (similar for -∞)
±∞ / ±∞ NaN
±∞ X ±0 ?
NaN any-op anything NaN (similar for [any op NaN])

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Special Value Rules

Operations Result
n / ±∞ ±0
±∞ x ±∞ ±∞
nonzero / 0 ±∞
+∞ + +∞ +∞ (similar for -∞)
±0 / ±0 NaN
+∞ - +∞ NaN (similar for -∞)
±∞ / ±∞ NaN
±∞ X ±0 NaN
NaN any-op anything NaN (similar for [any op NaN])

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• Encoding
Floating Point Precisions
s exp frac
ƒ MSB is sign bit
ƒ exp field encodes E
ƒ frac field encodes M
• IEEE 754 Sizes
ƒ Single precision: 8 exp bits, 23 frac bits
» 32 bits total
ƒ Double precision: 11 exp bits, 52 frac bits
» 64 bits total
ƒ Extended precision: 15 exp bits, 63 frac bits
» Only found in Intel-compatible machines
• legacy from the 8087 FP coprocessor
» Stored in 80 bits
• 1 bit wasted in a world where bytes are the currency of the realm

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s exp frac

IEEE 754 Format Definitions

S Emin Emax Fmin Fmax IEEE Meaning
1 all 1’s all 1’s 000...001 111...111 Not a Number

1 all 1’s all 1’s all 0’s all 0’s Negative Infinity

1 000...001 111...110 anything anything Negative Numbers

1 all 0’s all 0’s 000...001 111...111 Negative Denormals

1 all 0’s all 0’s all 0’s all 0’s Negative Zero

0 all 0’s all 0’s all 0’s all 0’s Positive Zero

0 all 0’s all 0’s 000...001 111...111 Positive Denormals

0 000...001 111...110 anything anything Positive Numbers
0 all 1’s all 1’s all 0’s all 0’s Positive Infinity

0 all 1’s all 1’s 000...001 111...111 Not a Number

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 “Normalized” Numeric Values
• Condition
ƒ exp ≠ 000…0 and exp ≠ 111…1
• Exponent coded as biased value
E = Exp – Bias
» Exp : unsigned value denoted by exp
» Bias : Bias value
• Single precision: 127 (Exp: 1…254, E: -126…127)
• Double precision: 1023 (Exp: 1…2046, E: -1022…1023)
• in general: Bias = 2e-1 - 1, where e is number of exponent bits

• Significand coded with implied leading 1

S = 1.xxx…x2
» xxx…x: bits of frac
» Minimum when 000…0 (M = 1.0)
» Maximum when 111…1 (M = 2.0 – ε)
» Get extra leading bit for “free”
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Normalized Encoding Example

• Value
Float F = 15213.0;
ƒ 1521310 = 111011011011012 = 1.11011011011012 X 213
• Significand
S = 1.11011011011012
M = frac = 110110110110100000000002
• Exponent
E = 13
Bias = 127
Exp = 140 = 100011002

Floating Point Representation:

Hex: 4 6 6 D B 4 0 0
Binary: 0100 0110 0110 1101 1011 0100 0000 0000
140: 100 0110 0
15213: 1110 1101 1011 01

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 Denormal Values
• Condition
ƒ exp = 000…0
• Value
ƒ Exponent value E = 1–Bias
» E= 0 – Bias provides a poor denormal to normal transition
» since denormals don’t have an implied leading 1.xxxx….
ƒ Significand value M = 0.xxx…x2
» xxx…x: bits of frac
• Cases
ƒ exp = 000…0, frac = 000…0
» Represents value 0 (denormal role #1)
» Note that have distinct values +0 and –0
ƒ exp = 000…0, frac ≠ 000…0
» 2n numbers very close to 0.0
» Lose precision as get smaller
» “Gradual underflow” (denormal role #2)

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Special Values
• Condition
ƒ exp = 111…1
• Cases
ƒ exp = 111…1, frac = 000…0
» Represents value ∞ (infinity)
» Operation that overflows
» Both positive and negative
» E.g., 1.0/0.0 = −1.0/−0.0 = +∞, 1.0/−0.0 = −∞
ƒ exp = 111…1, frac ≠ 000…0
» Not-a-Number (NaN)
» Represents case when no numeric value can be determined
• E.g., sqrt(–1), ∞ − ∞

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 NaN Issues
• Esoterica which we’ll subsequently ignore
• qNaN’s
ƒ F = .1u…u (where u can be 1 or 0)
ƒ propagate freely through calculations
» all operations which generate NaN’s are supposed to generate
qNaN’s
» EXCEPT sNaN in can generate sNaN out
• 754 spec leaves this “can” issue vague

• sNaN’s
ƒ F = .0u…u (where at least one u must be a 1)
» hence representation options
» can encode different exceptions based on encoding
ƒ typical use is to mark uninitialized variables
» trap prior to use is common model

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Summary of Floating Point

Encodings

−∞ -Normalized -Denorm +Denorm +Normalized +∞

NaN NaN
−0 +0

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 Tiny Floating Point Example
• 8-bit Floating Point Representation
ƒ the sign bit is in the most significant bit.
ƒ the next four bits are the exponent, with a bias of 7.
ƒ the last three bits are the frac
• Same General Form as IEEE Format
ƒ normalized, denormalized
ƒ representation of 0, NaN, infinity
7 6 3 2 0
s exp frac

ƒ Remember in this representation

» VN = -1S x 1.F x 2E-7
» VDN = -1S x 0.F x 2-6

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Values Related to the Exponent

Exp exp E 2E

0 0000 -6 1/64 (denorms)

1 0001 -6 1/64 (same as denorms = smooth)
2 0010 -5 1/32
3 0011 -4 1/16
4 0100 -3 1/8
5 0101 -2 1/4
6 0110 -1 1/2
7 0111 0 1
8 1000 +1 2
9 1001 +2 4
10 1010 +3 8
11 1011 +4 16
12 1100 +5 32
13 1101 +6 64
14 1110 +7 128
15 1111 n/a (inf or NaN)

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 s exp frac E Value
Dynamic Range
0 0000 000 -6 0
0 0000 001 -6 1/8*1/64 = 1/512 closest to zero
Denormalized 0 0000 010 -6 2/8*1/64 = 2/512
numbers …
0 0000 110 -6 6/8*1/64 = 6/512
0 0000 111 -6 7/8*1/64 = 7/512 largest denorm
0 0001 000 -6 8/8*1/64 = 8/512 smallest norm
0 0001 001 -6 9/8*1/64 = 9/512
…
0 0110 110 -1 14/8*1/2 = 14/16
0 0110 111 -1 15/8*1/2 = 15/16 closest to 1 below
Normalized 0 0111 000 0 8/8*1 = 1
numbers 0 0111 001 0 9/8*1 = 9/8 closest to 1 above
0 0111 010 0 10/8*1 = 10/8
…
0 1110 110 7 14/8*128 = 224
0 1110 111 7 15/8*128 = 240 largest norm
0 1111 000 n/a inf

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Distribution of Values
• 6-bit IEEE-like format
ƒ e = 3 exponent bits
ƒ f = 2 fraction bits
ƒ Bias is 3

• Notice how the distribution gets denser toward zero.

-15 -10 -5 0 5 10 15
Denormalized Normalized Infinity

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 Distribution of Values
(close-up view)
• 6-bit IEEE-like format
ƒ e = 3 exponent bits
ƒ f = 2 fraction bits
ƒ Bias is 3

-1 -0.5 0 0.5 1
Denormalized Normalized Infinity

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Interesting Numbers
• Description exp frac Numeric Value
• Zero 00…00 00…00 0.0
• Smallest Pos. Denorm. 00…00 00…01 2– {23,52} X 2– {126,1022}
ƒ Single ≈ 1.4 X 10–45
ƒ Double ≈ 4.9 X 10–324
• Largest Denormalized 00…00 11…11 (1.0 – ε) X 2– {126,1022}
ƒ Single ≈ 1.18 X 10–38
ƒ Double ≈ 2.2 X 10–308
• Smallest Pos. Normalized 00…01 00…00 1.0 X 2– {126,1022}
ƒ Just larger than largest denormalized
• One 01…11 00…00 1.0
• Largest Normalized 11…10 11…11 (2.0 – ε) X 2{127,1023}
ƒ Single ≈ 3.4 X 1038
ƒ Double ≈ 1.8 X 10308

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 Special Encoding Properties
• FP Zero Same as Integer Zero
ƒ All bits = 0
» note anomaly with negative zero
» fix is to ignore the sign bit on a zero compare
• Can (Almost) Use Unsigned Integer Comparison
ƒ Must first compare sign bits
ƒ Must consider -0 = 0
ƒ NaNs problematic
» Will be greater than any other values
» What should comparison yield?
ƒ Otherwise OK
» Denorm vs. normalized
» Normalized vs. infinity
» due to monotonicity property of floats

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Rounding
• IEEE 754 provides 4 modes
ƒ application/user choice
» mode bits indicate choice in some register
• from C - library support is needed
» control of numeric stability is the goal here
ƒ modes
» unbiased: round towards nearest
• if in middle then round towards the even representation
» truncation: round towards 0 (+0 for pos, -0 for neg)
» round up: towards +inifinity
» round down: towards – infinity
ƒ underflow
» rounding from a non-zero value to 0 Î underflow
» denormals minimize this case
ƒ overflow
» rounding from non-infinite to infinite value

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 Floating Point Operations
• Conceptual View
ƒ First compute exact result
ƒ Make it fit into desired precision
» Possibly overflow if exponent too large
» Possibly round to fit into frac
• Rounding Modes (illustrate with $ rounding)
• $1.40 $1.60 $1.50 $2.50 –$1.50
ƒ Zero $1 $1 $1 $2 –$1
ƒ Round down (-∞) $1 $1 $1 $2 –$2
ƒ Round up (+∞) $2 $2 $2 $3 –$1
ƒ Nearest Even (default) $1 $2 $2 $2 –$2

Note:
1. Round down: rounded result is close to but no greater than true result.
2. Round up: rounded result is close to but no less than true result.
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Closer Look at Round-To-Even

• Default Rounding Mode
ƒ Hard to get any other kind without dropping into assembly
ƒ All others are statistically biased
» Sum of set of positive numbers will consistently be over- or under-
estimated
• Applying to Other Decimal Places / Bit Positions
ƒ When exactly halfway between two possible values
» Round so that least significant digit is even
ƒ E.g., round to nearest hundredth
1.2349999 1.23 (Less than half way)
1.2350001 1.24 (Greater than half way)
1.2350000 1.24 (Half way—round up)
1.2450000 1.24 (Half way—round down)

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 Rounding Binary Numbers
• Binary Fractional Numbers
ƒ “Even” when least significant bit is 0
ƒ Half way when bits to right of rounding position = 100…2
• Examples
ƒ Round to nearest 1/4 (2 bits right of binary point)
Value Binary Rounded Action Rounded Value
2 3/32 10.000112 10.002 (<1/2—down) 2
2 3/16 10.001102 10.012 (>1/2—up) 2 1/4
2 7/8 10.111002 11.002 (1/2—up) 3
2 5/8 10.101002 10.102 (1/2—down) 2 1/2

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Guard Bits and Rounding

• Clearly extra fraction bits are required to support
rounding modes
ƒ e.g. given a 23 bit representation of the mantissa in single precision
ƒ you round to 23 bits for the answer but you’ll need extra bits in order
to know what to do
• Question: How many do you really need?
ƒ why?

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 Rounding in the Worst Case
• Basic algorithm for add
ƒ subtract exponents to see which one is bigger d=Ex - Ey
ƒ usually swapped if necessary so biggest one is in a fixed register
ƒ alignment step
» shift smallest significand d positions to the right
» copy largest exponent into exponent field of the smallest
ƒ add or subtract signifcands
» add if signs equal – subtract if they aren’t
ƒ normalize result
» details next slide
ƒ round according to the specified mode
» more details soon
» note this might generate an overflow Î shift right and increment the
exponent
ƒ exceptions
» exponent overflow Î ∞
» exponent underflow Î denormal
» inexact Î rounding was done
» special value 0 may also result Î need to avoid wrap around

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Normalization Cases
• Result already normalized
ƒ no action needed
• On an add
ƒ you may end up with 2 leading bits before the “.”
ƒ hence significand shift right one & increment exponent
• On a subtract
ƒ the significand may have n leading zero’s
ƒ hence shift significand left by n and decrement exponent by n
ƒ note: common circuit is a L0D ::= leading 0 detector

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 Alignment and Normalization Issues
• During alignment
ƒ smaller exponent arg gets significand right shifted
» Î need for extra precision in the FPU
• the question is again how much extra do you need?
• Intel maintains 80 bits inside their FPU’s – an 8087 legacy

• During normalization
ƒ a left shift of the significand may occur
• During the rounding step
ƒ extra internal precision bits (guard bits) get dropped

• Time to consider how many guard bits we need

ƒ to do rounding properly
ƒ to compensate for what happens during alignment and normalization

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For Effective Addition

• Result
ƒ either normalized
ƒ or generates 1 additional integer bit
» hence right shift of 1
» Î need for f+1 bits
» extra bit is called the rounding bit
• Alignment throws a bunch of bits to the right
ƒ need to know whether they were all 0 or not
ƒ Î hence 1 more bit called the sticky bit
» sticky bit value is the OR of the discarded bits

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 For Effective Subtraction
• There are 2 subcases
ƒ if the difference in the two exponents is larger than 1
» alignment produces a mantissa with more than 1 leading 0
» hence result is either normalized or has one leading 0
• in this case a left shift will be required in normalization
• Î an extra bit is needed for the fraction plus you still need the rounding bit
• this extra bit is called the guard bit
» also during subtraction a borrow may happen at position f+2
• this borrow is determined by the sticky bit
ƒ the difference of the two exponents is 0 or 1
» in this case the result may have many more than 1 leading 0
» but at most one nonzero bit was shifted during normalization
• hence only one additional bit is needed for the subtraction result
• but the borrow to the extra bit may still happen

School of Computing 53 CS5830

Answer to the Guard Bit Puzzle

• You need at least 3 extra bits
ƒ Guard, Round, Sticky
• Hence minimal internal representation is

s exp frac G R S

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 Round to Nearest
• Add 1 to low order fraction bit L
ƒ if G=1 and R and S are NOT both zero
• However a halfway result gets rounded to even
ƒ e.g. if G=1 and R and S are both zero
• Hence
ƒ let rnd be the value added to L
ƒ then
» rnd = G(R+S) + G(R+S)’ = G(L+R+S)
• OR
ƒ always add 1 to position G which effectively rounds to nearest
» but doesn’t account for the halfway result case
ƒ and then
» zero the L bit if G(R+S)’=1

School of Computing 55 CS5830

The Other Rounding Modes

• Round towards Zero
ƒ this is simple truncation
» so ignore G, R, and S bits
• Rounding towards ± ∞
ƒ in both cases add 1 to L if G, R, and S are not all 0
ƒ if sgn is the sign of the result then
» rnd = sgn’(G+R+T) for the + ∞ case
» rnd = sgn(G+R+T) for the - ∞ case

• Finished
ƒ you know how to round

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 Floating Point Operations
• Multiply/Divide
ƒ similar to what you learned in school
» add/sub the exponents
» multiply/divide the mantissas
» normalize and round the result
ƒ tricks exist of course
• Add/Sub
ƒ find largest
ƒ make smallest exponent = largest and shift mantissa
ƒ add the mantissa’s (smaller one may have gone to 0)
• Problems?
ƒ consider all the types: numbers, NaN’s, 0’s, infinities, and denormals
ƒ what sort of exceptions exist

School of Computing 57 CS5830

FP Multiplication
• Operands
(–1)s1 S1 2E1 * (–1)s2 S2 2E2
• Exact Result
(–1)s S 2E
ƒ Sign s: s1 XOR s2
ƒ Significand S: S1 * S2
ƒ Exponent E: E1 + E2
• Fixing: Post operation normalization
ƒ If M ≥ 2, shift S right, increment E
ƒ If E out of range, overflow
ƒ Round S to fit frac precision
• Implementation
ƒ Biggest chore is multiplying significands
» same as unsigned integer multiply which you know all about

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 FP Addition
• Operands
(–1)s1 M1 2E1 E1–E2
(–1)s2 M2 2E2 (–1)s1 S1
ƒ Assume E1 > E2 Î sort
(–1)s2 S2
• Exact Result +
(–1)s M 2E
ƒ Sign s, significand S: (–1)s S
» Result of signed align & add
ƒ Exponent E: E1
• Fixing
ƒ If S ≥ 2, shift S right, increment E
ƒ if S < 1, shift S left k positions, decrement E by k
ƒ Overflow if E out of range
ƒ Round S to fit frac precision

School of Computing 59 CS5830

Mathematical Properties of FP Add

• Compare to those of Abelian Group
(i.e. commutative group)
ƒ Closed under addition? YES
» But may generate infinity or NaN
ƒ Commutative? YES
ƒ Associative? NO
» Overflow and inexactness of rounding
ƒ 0 is additive identity? YES
ƒ Every element has additive inverse ALMOST
» Except for infinities & NaNs
• Monotonicity
ƒ a ≥ b ⇒ a+c ≥ b+c? ALMOST
» Except for infinities & NaNs

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 Math Properties of FP Mult
• Compare to Commutative Ring
ƒ Closed under multiplication? YES
» But may generate infinity or NaN
ƒ Multiplication Commutative? YES
ƒ Multiplication is Associative? NO
» Possibility of overflow, inexactness of rounding
ƒ 1 is multiplicative identity? YES
ƒ Multiplication distributes over addition? NO
» Possibility of overflow, inexactness of rounding
• Monotonicity
ƒ a ≥ b & c ≥ 0 ⇒ a *c ≥ b *c? ALMOST
» Except for infinities & NaNs

School of Computing 61 CS5830

The 5 Exceptions
• Overflow
ƒ generated when an infinite result is generated
• Underflow
ƒ generated when a 0 is generated after rounding a non-zero result
• Divide by 0
• Inexact
ƒ set when overflow or rounded value
ƒ DOH! the common case so why is an exception??
» some nitwit wanted it so it’s there
» there is a way to mask it as an exception of course
• Invalid
ƒ result of bizarre stuff which generates a NaN result
» sqrt(-1)
» 0/0
» inf - inf

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 Floating Point in C
• C Guarantees Two Levels
float single precision
double double precision
• Conversions
ƒ Casting between int, float, and double changes numeric values
ƒ Double or float to int
» Truncates fractional part
» Like rounding toward zero
» Not defined when out of range
• Generally saturates to TMin or TMax
ƒ int to double
» Exact conversion, as long as int has ≤ 53 bit word size
ƒ int to float
» Will round according to rounding mode

School of Computing 63 CS5830

int x = …; Floating Point Puzzles

float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x ?
• x == (int)(double) x
• f == (float)(double) f
• d == (float) d
• f == -(-f);
• 2/3 == 2/3.0
• d < 0.0 ⇒ ((d*2) < 0.0)
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

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int x = …; Floating Point Puzzles
float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x ?
• f == (float)(double) f
• d == (float) d
• f == -(-f);
• 2/3 == 2/3.0
• d < 0.0 ⇒ ((d*2) < 0.0)
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

School of Computing 65 CS5830

int x = …; Floating Point Puzzles

float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f ?
• d == (float) d
• f == -(-f);
• 2/3 == 2/3.0
• d < 0.0 ⇒ ((d*2) < 0.0)
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

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int x = …; Floating Point Puzzles
float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d ?
• f == -(-f);
• 2/3 == 2/3.0
• d < 0.0 ⇒ ((d*2) < 0.0)
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

School of Computing 67 CS5830

int x = …; Floating Point Puzzles

float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); ?
• 2/3 == 2/3.0
• d < 0.0 ⇒ ((d*2) < 0.0)
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

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int x = …; Floating Point Puzzles
float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); YES – sign bit inverts twice
• 2/3 == 2/3.0 ?
• d < 0.0 ⇒ ((d*2) < 0.0)
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

School of Computing 69 CS5830

int x = …; Floating Point Puzzles

float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); YES – sign bit inverts twice
• 2/3 == 2/3.0 NO – 2/3 = 0
• d < 0.0 ⇒ ((d*2) < 0.0) ?
• d > f ⇒ -f < -d
• d * d >= 0.0
• (d+f)-d == f

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int x = …; Floating Point Puzzles
float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); YES – sign bit inverts twice
• 2/3 == 2/3.0 NO – 2/3 = 0
• d < 0.0 ⇒ ((d*2) < 0.0) YES - monotonicity
• d > f ⇒ -f < -d ?
• d * d >= 0.0
• (d+f)-d == f

School of Computing 71 CS5830

int x = …; Floating Point Puzzles

float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); YES – sign bit inverts twice
• 2/3 == 2/3.0 NO – 2/3 = 0
• d < 0.0 ⇒ ((d*2) < 0.0) YES - monotonicity
• d > f ⇒ -f < -d YES - monotonicity
• d * d >= 0.0 ?
• (d+f)-d == f

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int x = …; Floating Point Puzzles
float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); YES – sign bit inverts twice
• 2/3 == 2/3.0 NO – 2/3 = 0
• d < 0.0 ⇒ ((d*2) < 0.0) YES - monotonicity
• d > f ⇒ -f < -d YES - monotonicity
• d * d >= 0.0 YES - monotonicity
• (d+f)-d == f ?

School of Computing 73 CS5830

int x = …; Floating Point Puzzles

float f = …; Assume neither
d nor f is NAN
double d = …;
• x == (int)(float) x NO – 24 bit significand
• x == (int)(double) x YES – 53 bit significand
• f == (float)(double) f YES – increases precision
• d == (float) d NO – loses precision
• f == -(-f); YES – sign bit inverts twice
• 2/3 == 2/3.0 NO – 2/3 = 0
• d < 0.0 ⇒ ((d*2) < 0.0) YES - monotonicity
• d > f ⇒ -f < -d YES - monotonicity
• d * d >= 0.0 YES - monotonicity
• (d+f)-d == f NO – not associative

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Page 37
 Gulf War: Patriot misses Scud
• By 687 meters
ƒ Why?
» clock ticks at 1/10 second – can’t be represented exactly in
binary
» clock was running for 100 hours
• hence clock was off by .3433 sec.
» Scud missile travels at 2000 m/sec
• 687 meter error = .3433 second
ƒ Result
» SCUD hits Army barracks
» 28 soldiers die
• Accuracy counts
ƒ floating point has many sources of inaccuracy - BEWARE
• Real problem
ƒ software updated but not fully deployed

School of Computing 75 CS5830

Ariane 5
ƒ Exploded 37 seconds after
liftoff
ƒ Cargo worth $500 million
• Why
ƒ Computed horizontal
velocity as floating point
number
ƒ Converted to 16-bit integer
ƒ Worked OK for Ariane 4
ƒ Overflowed for Ariane 5
» Used same software

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 Ariane 5
• From Wikipedia
Ariane 5's first test flight on 4 June 1996 failed, with the
rocket self-destructing 37 seconds after launch
because of a malfunction in the control software,
which was arguably one of the most expensive
computer bugs in history. A data conversion from 64-
bit floating point to 16-bit signed integer value had
caused a processor trap (operand error). The floating
point number had a value too large to be represented
by a 16-bit signed integer. Efficiency considerations
had led to the disabling of the software handler (in
Ada code) for this trap, although other conversions of
comparable variables in the code remained protected.

School of Computing 77 CS5830

Remaining Problems?
• Of course
• NaN’s
ƒ 2 types defined Q and S
ƒ standard doesn’t say exactly how they are represented
ƒ standard is also vague about SNaN’s results
ƒ SNaN’s cause exceptions QNaN’s don’t
» hence program behavior is different and there’s a porting
problem
• Exceptions
ƒ standard says what they are
ƒ but forgets to say WHEN you will see them
» Weitek chips Î only see the exception when you start the next
op Î GRR!!

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Page 39
 More Problems
• IA32 specific
ƒ FP registers are 80 bits
» similar to IEEE but with e=15 bits, f=63-bits, + sign
» 79 bits but stored in 80 bit field
• 10 bytes
• BUT modern x86 use 12 bytes to improve memory performance
• e.g. 4 byte alignment model
ƒ the problem
» FP reg to memory Î conversion to IEEE 64 or 32 bit formats
• loss of precision and a potential rounding step
ƒ C problem
» no control over where values are – register or memory
» hence hidden conversion
• -ffloat-store gcc flag is supposed to not register floats
• after all the x86 isn’t a RISC machine
• unfortunately there are exceptions so this doesn’t work
» stuck with specifying long doubles if you need to avoid the
hidden conversions

School of Computing 79 CS5830

From the Programmer’s Perspective

• Computer arithmetic is a huge field
ƒ lots of places to learn more
» your text is specialized for implementers
» but it’s still the gold standard even for programmers
• also contains lots of references for further study
ƒ from a machine designer perspective
» it takes a lifetime to get really good at it
» lots of specialized tricks have been employed
ƒ from the programmer perspective
» you need to know the representations
» and the basics of the operations
» they are visible to you
» understanding Î efficiency
• Floating point is always
ƒ slow and big when compared to integer circuits

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Page 40
 Summary
• IEEE Floating Point Has Clear Mathematical
Properties
ƒ Represents numbers of form M X 2E
ƒ Can reason about operations independent of implementation
» As if computed with perfect precision and then rounded
ƒ Not the same as real arithmetic
» Violates associativity/distributivity
» Makes life difficult for compilers & serious numerical
applications programmers

• Next time we move to FP circuits

ƒ arcane but interesting in nerd-land

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