9.5.

5 Common-Mode Gain and CMRR

Although the output is single ended, the current-mirror-loaded differential amplifier has a low
common-mode gain (ideally zero) and, correspondingly, a high CMRR (ideally infinite). This
is due to the action of the current mirror, whose output current, for common-mode inputs,
cancels the current of Q2 of the differential pair. We have, in fact, seen this in our initial
qualitative description of circuit operation.
The current transfer ratio of the mirror, however, will never be exactly unity, and thus the
current cancellation at the output node will never be perfect. As a result, the common-mode
gain will be finite. We wish to derive an expression for Acm.
Figure 9.39(a) shows the circuit with vicm applied and with the power supplies eliminated
except, of course, for the output resistance RSS of the bias-current source I. Although the circuit
is not symmetrical and hence we cannot use the common-mode half-circuit, we can split RSS
equally between Q1 and Q2 as shown in Fig. 9.39(b). It can now be seen that each of Q1 and
Q2 is a CS transistor with a large source-degeneration resistance 2RSS.
Each of Q1 and Q2 together with their degeneration resistances can be replaced by
equivalent circuits composed of a controlled source Gmcmvicm and an output resistance Ro1,2,
as shown in Fig. 9.39(c). To determine Gmcm we short-circuit the drain to ground, as shown
in Fig. 9.39(d) for Q1. Observe that 2RSS and ro1 appear in parallel. Thus the voltage at the
source terminal can be found from the voltage divider consisting of 1/gm1 and (2RSS
ro1) as
vs
= vicm
(2RSS
ro1)
(2RSS
ro1)+(1/gm1)
_ vicm
The short-circuit drain current io can be seen to be equal to the current through 2RSS; thus,
io
= vs
2RSS
_ vicm
2RSS
which leads to
Gmcm
≡ io
vicm
=1
2RSS
(9.148)
The output resistance Ro1 can be determined using the expression for Ro of a CS transistor
with an emitter-degeneration resistance (Eq. 8.60) to obtain
Ro1
= 2RSS
+ro1
+(gm1ro1)(2RSS) (9.149)
Similar results can be obtained for Q2, namely, the same Gmcm and an output resistance Ro2
given by
Ro2
= 2RSS
+ro2
+(gm2ro2)(2RSS) (9.150)
Returning to the circuit in Fig. 9.39(c), we see that the current mirror is represented by its
input resistance Rim, current gain Am, and output resistance Rom. This is a general representation
that applies for any current mirror. As current mirrors have relatively low input resistances,
Rim will be much lower than Ro1 with the result that the input current of the mirror i1 will be
ii
9.6 Multistage Amplifiers
Practical transistor amplifiers usually consist of a number of stages connected in cascade. In
addition to providing gain, the first (or input) stage is usually required to provide a high input
resistance in order to avoid loss of signal level when the amplifier is fed from a high-resistance
source. In a differential amplifier the input stage must also provide large common-mode
rejection. The function of the middle stages of an amplifier cascade is to provide the bulk of
the voltage gain. In addition, the middle stages provide such other functions as the conversion
of the signal from differential mode to single-ended mode (unless, of course, the amplifier
output also is differential) and the shifting of the dc level of the signal in order to allow the
output signal to swing both positive and negative. These two functions and others will be
illustrated later in this section and in greater detail in Chapter 13.
Finally, the main function of the last (or output) stage of an amplifier is to provide a low
output resistance in order to avoid loss of gain when a low-valued load resistance is connected
to the amplifier. Also, the output stage should be able to supply the current required by the
load in an efficient manner—that is, without dissipating an unduly large amount of power in
the output transistors. We have already studied one type of amplifier configuration suitable
for implementing output stages, namely, the source follower and the emitter follower. It will
be shown in Chapter 12 that the source and emitter followers are not optimum from the point
of view of power efficiency and that other, more appropriate circuit configurations exist for
output stages that are required to supply large amounts of output power. In fact, we will
encounter some such output stages in the op-amp circuit examples studied in Chapter 13.
To illustrate the circuit structure and the method of analysis of multistage amplifiers, we
will present two examples: a two-stage CMOS op amp and a four-stage bipolar op amp.
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9.6.1 A Two-Stage CMOS Op Amp
Figure 9.40 shows a popular structure for CMOS op amps known as the two-stage
configuration. The circuit