AIR UNIVERSITY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

EXPERIMENT NO 9

Lab Title: COMMON EMITTER AMPLIFIER

Student Name: feeroze butt Reg. No: 220612

Objective: To study and analyze the common emitter amplifier configuration by finding the
voltage gain, current gain, input impedance, and output impedance.
1. To simulate the circuit on Proteus.
2. To implement the common emitter amplifier circuit on Hardware.

LAB ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory

Attributes
(5) (4) (3) (2) (1)
Ability to Conduct
Experiment
Ability to assimilate the
results
Effective use of lab
equipment and follows
the lab safety rules

Total Marks: Obtained Marks:

LAB REPORT ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory
Attributes
(5) (4) (3) (2) (1)

Data presentation

Experimental results

Conclusion

Total Marks: Obtained Marks:

Date: Signature:
 LABORATORY
EXPERIMENT
NO. 9

COMMON EMITTER
AMPLIFIER

OBJECTIVE
3. To study and analyze the common emitter amplifier configuration by finding the voltage
gain, current gain, input impedance, and output impedance.
4. To simulate the circuit on Proteus.
5. To implement the common emitter amplifier circuit on Hardware.

DISCUSSION
One of the earliest and important applications of bipolar transistors is in small-signal amplifiers. These are
systems that accept input signal of small amplitudes (on the order of 100 mV) and deliver larger replicas.
We emphasize the use of the bipolar transistor in linear amplifier applications. Linear amplifiers imply that,
for the most part, we are dealing with analog signals. The magnitude of an analog signal may have any
value, within limits, and may vary continuously with respect to time. A linear amplifier then means that the
output signal is equal to the input signal multiplied by a constant, where the magnitude of the constant of
proportionality is, in general, greater than unity.

Common Emitter Amplifier Configuration:

Common Emitter Configuration

All types of Transistor Amplifiers operate using AC signal inputs which alternate between a positive value
and a negative value so some way of “presetting” the amplifier circuit to operate between these two
maximum or peak values is required. This is achieved using a process known as Biasing. Biasing is very
important in amplifier design as it establishes the correct operating point of the transistor amplifier ready
to receive signals, thereby reducing any distortion to the output signal.
Static or DC load line can be drawn onto the output characteristics curves to show all the possible operating
points of the transistor from fully “ON” to fully “OFF”, and to which the quiescent operating point or Q-
point of the amplifier can be found.
The aim of any small signal amplifier is to amplify all of the input signal with the minimum amount of
distortion possible to the output signal, in other words, the output signal must be an exact reproduction of
the input signal but only bigger (amplified).
To obtain low distortion when used as an amplifier, the operating quiescent point needs to be correctly
selected. This is in fact the DC operating point of the amplifier and its position may be established at any
point along the load line by a suitable biasing arrangement. The best possible position for this Q-point is as
close to the center position of the load line as reasonably possible, thereby producing a Class A type
amplifier operation, i.e. Vce = 1/2Vcc. Consider the Common Emitter Amplifier circuit shown below.

Common Emitter Amplifier Circuit

The single stage common emitter amplifier circuit shown above uses the biasing scheme commonly called
“Voltage Divider Biasing”. This type of biasing arrangement uses two resistors as a potential divider
network across the supply with their center point supplying the required Base bias voltage to the transistor.
Voltage divider biasing is commonly used in the design of bipolar transistor amplifier circuits.
 Voltage Divider Network
This method of biasing the transistor greatly reduces the effects of varying Beta, (β) by holding the Base
bias at a constant steady voltage level allowing for best stability. The quiescent Base voltage (V b) is
determined by the potential divider network formed by the two resistors, R1, R2 and the power supply
voltage Vcc as shown with the current flowing through both resistors.
Then the total resistance RT will be equal to R1 + R2 giving the current as i = Vcc/RT. The voltage level
generated at the junction of resistors R1 and R2 holds the Base voltage (Vb) constant at a value below the
supply voltage.
Then the potential divider network used in the common emitter amplifier circuit divides the input signal in
proportion to the resistance. This bias reference voltage can be easily calculated using the simple voltage
divider formula below:

Beta Value:

Beta is the transistor’s forward current gain in the common emitter configuration. Beta has no units as it is
a fixed ratio of the two currents, Ic and Ib. So a small change in the Base current will cause a large change
in the Collector current. One final point about Beta is that transistors of the same type and part number will
have large variations in their Beta value. For example, the BC107 NPN Bipolar transistor has a DC current
gain Beta value of between 110 and 450 (data sheet value) this is because Beta is a characteristic of their
construction and not their operation.
As the Base/Emitter junction is forward-biased, the Emitter voltage, Ve will be one junction voltage drop
different to the Base voltage. If the voltage across the Emitter resistor is known then the Emitter current, I e
can be easily calculated using Ohm’s Law. The Collector current, Ic can be approximated, since it is almost
the same value as the Emitter current.
Coupling Capacitors:

In Common Emitter Amplifier circuits, capacitors C1 and C2 are used as Coupling Capacitors to separate
the AC signals from the DC biasing voltage. This ensures that the bias condition set up for the circuit to
operate correctly is not affected by any additional amplifier stages, as the capacitors will only pass AC
signals and block any DC component. The output AC signal is then superimposed on the biasing of the
following stages.
A bypass capacitor, CE is also included in the Emitter leg circuit. This capacitor is an open circuit
component for DC bias meaning that the biasing currents and voltages are not affected by the addition of
the capacitor maintaining a good Q-point stability. However, this bypass capacitor short circuits the Emitter
resistor at high frequency signals and only RL plus a very small internal resistance acts as the transistors
load increasing the voltage gain to its maximum. Generally, the value of the bypass capacitor, C E is chosen
to provide a reactance of at most, 1/10th the value of RE at the lowest operating signal frequency.
A single stage Common Emitter Amplifier is also an “Inverting Amplifier” as an increase in Base voltage
causes a decrease in Vout and a decrease in Base voltage produces an increase in Vout. In other words, the
output signal is 180 degree out-of-phase with the input signal.

Common Emitter Voltage Gain:

The Voltage Gain of the common emitter amplifier is equal to the ratio of the change in the input voltage
to the change in the amplifier’s output voltage. Then ΔV L is Vout and ΔVB is Vin. But voltage gain is also
equal to the ratio of the signal resistance in the Collector to the signal resistance in the Emitter and is given
as:

As the signal frequency increases, the bypass capacitor, CE starts to short out the Emitter resistor. Then at
high frequencies RE = 0, making the gain infinite.
However, bipolar transistors have a small internal resistance built into their Emitter region called as R e. The
transistors semiconductor material offers an internal resistance to the flow of current through it and is
generally represented by a small resistor symbol shown inside the main transistor symbol.
Transistor data sheets tell us that for small signal bipolar transistors this internal resistance is equal to 25mV
÷ IE (25mV being the internal volt drop across the Base/Emitter junction depletion layer).
This internal Emitter leg resistance will be in series with the external Emitter resistor, R E. Then the equation
for the transistors actual gain will be modified to include this internal resistance so will be:

At low frequency signals, the total resistance in the Emitter leg is equal to R E + Re. At high frequency, the
bypass capacitor shorts out the Emitter resistor leaving only the internal resistance Re in the Emitter leg
resulting in a high gain. Then for our common emitter amplifier circuit above, the gain of the circuit at both
low and high signal frequencies is given as:

At Low Frequencies:

At High Frequencies:

The voltage gain is dependent only on the values of the Collector resistor, RL and the Emitter resistance,
(RE + Re). It is not affected by the current gain Beta, β of the transistor.
 LAB TASK 1
 Calculate the values of Voltage Gain, Current Gain, Input Impedance, and Output Impedance for
the circuit given for Common Emitter Amplifier.







CALCULATIONS
LAB TASK 2
 Implement the given circuit on Proteus as well as on Hardware by setting an input of 0.5V p-p (f = 1
kHz).
 Observe the output at Oscilloscope.
 Record the readings in the table.
 Draw the input and output waveforms.

RESULTS

Calculated Values Measured Values

Input Output
Voltage Gain Current Gain Voltage Gain Current Gain
Impedance Impedance

Input Waveform

 CONCLUSION:
In this lab we are going to implement the common emmiter circuit .We patch the circuit on the bread board
hardware as well as software.We see the voltage gain in this common emitter circuit we give ac signal at input
and find the out put wave on The load resistor we patch at the end of capacitor who is attach to the ground
.we see the output voltage is exceed sometime from the input voltage and gain become greate. Than 1.in
common emitter we judge the circuit by seeing the emitter is directly ground with out any resistors. This is in
fact the DC operating point of the amplifier and its position may be established at any point along the load line
by a suitable biasing arrangement. The best possible position for this Q-point is as close to the center position
of the load line as reasonably possible.

(END)