A1150, A1152, A1153, A1155, A1156, A1157, and A1158

Chopper-Stabilized, Two-Wire Hall-Effect Switches

FEATURES AND BENEFITS DESCRIPTION
• AEC-Q100 automotive qualified The A1150, A1152, A1153, A1155, A1156, A1157, and A1158
• High-speed, 4-phase chopper stabilization comprise a family of two-wire, unipolar, Hall-effect switches,
• Low switchpoint drift throughout temperature range which are factory-trimmed to optimize magnetic switchpoint
• Low sensitivity to thermal and mechanical stresses accuracy. These devices are produced on the Allegro™ advanced
• On-chip protection BiCMOS wafer fabrication process, which implements a
□□ Supply transient protection high-frequency, 4-phase, chopper-stabilization technique. This
□□ Reverse-battery protection technique achieves magnetic stability over the full operating
□□ On-board voltage regulator temperature range, and eliminates offsets inherent in devices
□□ 3 to 24 V operation with a single Hall element that are exposed to harsh application
• Solid-state reliability environments.
• Robust EMC and ESD performance
The A115x family has a number of automotive applications.
• Industry-leading ISO 7637-2 performance through use of
These include sensing seat track position, seat belt buckle
proprietary, 40 V clamping structures
presence, hood/trunk latching, and shift selector position.
Continued on the next page…
Two-wire unipolar switches are particularly advantageous in
Packages cost-sensitive applications because they require one less wire
3-pin SOT23-W 3-pin ultramini SIP 2-pin ultramini SIP for operation versus the more traditional open-collector output
2 mm × 3 mm × 1 1.5 mm × 4 mm × 3 1.5 mm × 4 mm × 4 switches. Additionally, the system designer inherently gains
mm (suffix LH) mm (suffix UA) mm (suffix UB)
diagnostics because there is always output current flowing,
which should be in either of two narrow ranges. Any current
level not within these ranges indicates a fault condition.
All family members are offered in three package styles. The
LH is a SOT-23W style, miniature, low profile package for
surface-mount applications. The UA is a 3-pin, ultra-mini, single
inline package (SIP) for through-hole mounting. The UB is a
2-pin, ultra-mini, single inline package (SIP) for through-hole
mounting. All three packages are lead (Pb) free, with 100%
Approximate footprint matte-tin leadframe plating.
UB package only

0.1 µF
V+ VCC

Regulator

To all subcircuits

LH & UA Clock/Logic
package
only 0.01 µF Low-Pass Schmitt
Sample and Hold
Dynamic Offset

Filter Trigger
Cancellation

Amp Polarity

GND GND

UA package only

Functional Block Diagram

A1152-DS, Rev. 10
A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

Features and Benefits (continued)

• Extended Operating Ambient temperature range,
–40°C to 150°C
• UB package with integrated 0.1 µF bypass capacitor

Selection Guide
Output (ICC) in Supply Current Magnetic Operate
Part Number Packing Package South Polarity at ICC(L) Point, BOP
Field (mA) (G)
A1150LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
Low 2 to 5
A1150LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole
A1152LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
A1152LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole Low 5 to 6.9
50 to 110
A1152LUBTN-T 13-in. reel, 4 000 pieces/reel 2-pin SIP through hole
A1153LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
A1153LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole High 5 to 6.9
A1153LUBTN-T 13-in. reel, 4 000 pieces/reel 2-pin SIP through hole
A1155LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
A1155LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole Low 5 to 6.9
A1155LUBTN-T 13-in. reel, 4 000 pieces/reel 2-pin SIP through hole
20 to 60
A1156LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
A1156LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole High 5 to 6.9
A1156LUBTN-T 13-in. reel, 4 000 pieces/reel 2-pin SIP through hole
A1157LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
A1157LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount Low
A1157LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole
2 to 5 20 to 80
A1158LLHLX-T 13-in. reel, 10 000 pieces/reel 3-pin SOT23W surface mount
A1158LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount High
A1158LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole

Allegro MicroSystems, LLC 2

115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

SPECIFICATIONS

Absolute Maximum Ratings

Characteristic Symbol Notes Rating Unit
Forward Supply Voltage VCC 28 V
Reverse Supply Voltage VRCC –18 V
Magnetic Flux Density B Unlimited G
Operating Ambient Temperature TA Range L –40 to 150 ºC
Maximum Junction Temperature TJ(max) 165 ºC
Storage Temperature Tstg –65 to 170 ºC

Pin-Out Diagrams and Terminal List Table

LH and UA Terminal List Table

Name
Number Function
LH package UA package

NC
1 VCC VCC Input power supply
1 2 LH package: no connection,
1 2 3 it is highly recommended that
2 NC GND this pin be tied to GND

LH Package UA Package UA package: ground terminal

3 GND GND Ground terminal

UB Terminal List Table

Number Name Function
1 VCC Input power supply

2 GND Ground terminal

1 2

UB Package

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1.508.853.5000; www.allegromicro.com
A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

ELECTRICAL CHARACTERISTICS: valid at TA = –40°C to 150°C, TJ < TJ(max), CBYP = 0.01 µF, through operating supply
voltage range, unless otherwise noted
Characteristics Symbol Test Conditions Min. Typ. Max. Unit
Supply Voltage1,2 VCC Operating, TJ ≤ 165 °C 3.0 – 24 V
A1150, A1157 B > BOP
2.0 – 5.0 mA
A1158 B < BRP
ICC(L)
A1152, A1155 B > BOP
5 – 6.9 mA
Supply Current A1153, A1156 B < BRP
A1150, A1152,
B < BRP
A1155, A1157
ICC(H) 12 – 17 mA
A1153, A1156,
B > BOP
A1158
Supply Zener Clamp Voltage VZ(sup) ICC(L)(max) + 3 mA, TA = 25°C 28 – – V
ICC(L)(max)
Supply Zener Clamp Current IZ(sup) VZ(sup) = 28 V – – mA
+ 3 mA
Reverse Supply Current IRCC VRCC = –18 V – – –1.6 mA
LH
No bypass capacitor, capacitance of
and – 90 – mA / µs
probe CS = 20 pF
Output Slew Rate3 di/dt UA
Integrated bypass capacitor,
UB – 0.22 – mA / µs
capacitance of probe CS = 20 pF
Chopping Frequency fc – 700 – kHz
A1150, A1152, B > BOP + 10 G
A1155, A1157
Power-Up Time4,5 ton – – 25 µs
A1153, A1156,
B < BRP – 10 G
A1158
Power-Up State2,4,6,7 POS ton < ton(max) , VCC slew rate > 25 mV / µs – ICC(H) – –
1V
CC represents the generated voltage between the VCC pin and the GND pin.
2The V
CC slew rate must exceed 600 mV/ms from 0 to 3 V. A slower slew rate through this range can affect device performance.
3Measured without bypass capacitor between VCC and GND. Use of a bypass capacitor results in slower current change.
4Power-Up Time is measured without and with bypass capacitor of 0.01 µF. Adding a larger bypass capacitor would cause longer Power-Up Time.
5Guaranteed by characterization and design.
6Power-Up State as defined is true only with a V
CC slew rate of 25 mV / µs or greater.
7For t > t
on and BRP < B < BOP , Power-Up State is not defined.

MAGNETIC CHARACTERISTICS1: Valid at TA = –40°C to 150°C, TJ < TJ (max), unless otherwise noted
Characteristics Symbol Min. Typ. Max. Unit2
A1150, A1152, A1153 50 – 110 G
Magnetic Operating Point BOP A1155, A1156 20 – 60 G
A1157, A1158 20 – 80 G
A1150, A1152, A1153 45 – 105 G
Magnetic Release Point BRP A1155, A1156 10 – 55 G
A1157, A1158 10 – 60 G
Hysteresis BHYS 5 – 30 G
1Relative values of B use the algebraic convention, where positive values indicate south magnetic polarity, and negative values indicate north magnetic polarity; therefore
greater B values indicate a stronger south polarity field (or a weaker north polarity field, if present).
21 G (gauss) = 0.1 mT (millitesla).

Allegro MicroSystems, LLC 4

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Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

THERMAL CHARACTERISTICS: may require derating at maximum conditions; see application information
Characteristic Symbol Test Conditions* Value Unit
Package LH, on 1-layer PCB with copper limited to solder pads 228 ºC/W

Package LH, on 2-layer PCB with 0.463 in.2 of copper area each side 110 ºC/W
Package Thermal Resistance RθJA
Package UA, on 1-layer PCB with copper limited to solder pads 165 ºC/W

Package UB, on 1-layer PCB with copper limited to solder pads 213 ºC/W

*Additional thermal information available on the Allegro website

Power
LH and UADerating Curve Curve
Power Derating UB Power Derating Curve

25
24 VCC(max)
23
22
Maximum Allowable VCC (V)

21
20
19
18
17
16
15
14
13
12
2-layer PCB, Package LH
11 (RθJA = 110 ºC/W)
10
9 1-layer PCB, Package UA
8 (RθJA = 165 ºC/W)
7
6 1-layer PCB, Package LH
5 (RθJA = 228 ºC/W)
4 VCC(min)
3
2
20 40 60 80 100 120 140 160 180

Temperature (ºC)

LH and UAPower
PowerDissipation
Dissipationversus
versus Ambient Temperature
Ambient Temperature UB Power Dissipation versus Ambient Temperature
1900
1800
1700
1600
1500
1400
1300
Power Dissipation, PD (m W)

1200 2-
l
1100 (R aye
θJ rP
A = C
1000 11 B, P
1-la 0 º ac
900 y C/ ka
(R er PC W
) ge L
800 θJA = B H
165 , Pac
700 ºC/ k a
W) ge U
600 A
500 1-lay
400 er P
(R CB,
300 θJA =
228 Packag
ºC/W e LH
200 )
100
0
20 40 60 80 100 120 140 160 180
Temperature (°C)

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

CHARACTERISTIC PERFORMANCE

A1152/A1153/A1155/A1156 A1152/A1153/A1155/A1156
Average Supply Current (Low) versus Temperature Average Supply Current (Low) versus Supply Voltage
7.0 7.0

Supply Current, ICC(L) (mA)

Supply Current, ICC(L) (mA)

6.5 6.5
TA = 150°C
VCC = 24 V
TA = –40°C
6.0 6.0
TA = 25°C
VCC = 3.0 V

5.5 5.5

5.0 5.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26

Ambient Temperature, TA (°C) Supply Voltage, VCC (V)

A1150/A1157/A1158 A1150/A1157/A1158
Average Supply Current (Low) versus Temperature Average Supply Current (Low) versus Supply Voltage
5.0 5.0
Supply Current, ICC(L) (mA)

Supply Current, ICC(L) (mA)

4.5 4.5

4.0 4.0
VCC = 24 V TA = 150°C
TA = 25°C
3.5 3.5
TA = –40°C
VCC = 3.0 V
3.0 3.0

2.5 2.5

2.0 2.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26

Ambient Temperature, TA (°C) Supply Voltage, VCC (V)

A1150/A1152/A1153/A1155/A1156/A1157/A1158 A1150/A1152/A1153/A1155/A1156/A1157/A1158
Average Supply Current (High) versus Temperature Average Supply Current (High) versus Supply Voltage
17 17
Supply Current, ICC(H) (mA)
Supply Current, ICC(H) (mA)

16 16

VCC = 24 V TA = –40°C
15 15
TA = 150°C
VCC = 3.0 V
TA = 25°C
14 14

13 13

12 12
-60 -40 -20 0 20 40 60 80 100 120 140 160 2 6 10 14 18 22 26

Ambient Temperature, TA (°C) Supply Voltage, VCC (V)

Allegro MicroSystems, LLC 6

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

A1150/A1152/A1153 A1155/A1156
Average Operate Point versus Temperature Average Operate Point versus Temperature
110 60

55
100
Operate Point, BOP (G)
Applied Flux Density at

Operate Point, BOP (G)

50

Applied Flux Density at

90
45
VCC = 24 V VCC = 3.0 V
80 40
VCC = 3.0 V
VCC = 24 V
35
70
30
60
25

50 20
-60 -40 -20 0 20 40 60 80 100 120 140 160 -60 -40 -20 0 20 40 60 80 100 120 140 160

Ambient Temperature, TA (°C) Ambient Temperature, TA (°C)

A1150/A1152/A1153 A1155/A1156
Average Release Point versus Temperature Average Release Point versus Temperature
105 55

50
95
Release Point, BRP (G)
Applied Flux Density at

45
Release Point, BRP (G)
Applied Flux Density at

85 40

35
75
VCC = 3.0 V 30 VCC = 3.0 V

65 25 VCC = 24 V
VCC = 24 V
20
55
15

45 10
-60 -40 -20 0 20 40 60 80 100 120 140 160 -60 -40 -20 0 20 40 60 80 100 120 140 160

Ambient Temperature, TA (°C) Ambient Temperature, TA (°C)

A1150/A1152/A1153
A1150/A1152/A1153/A1155/A1156/A1157/A1158 A1155/A1156
A1150/A1152/A1153/A1155/A1156/A1157/A1158
Average Switchpoint Hysteresis versus Temperature Average Switchpoint Hysteresis versus Temperature
30 30
Switchpoint Hysteresis, BHYS (G)

Switchpoint Hysteresis, BHYS (G)

Applied Flux Density at

Applied Flux Density at

25 25

20 20

15 15
VCC = 24 V VCC = 3.0 V

VCC = 3.0 V VCC = 24 V

10 10

5 5
-60 -40 -20 0 20 40 60 80 100 120 140 160 -60 -40 -20 0 20 40 60 80 100 120 140 160

Ambient Temperature, TA (°C) Ambient Temperature, TA (°C)

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

FUNCTIONAL DESCRIPTION
The A1150, A1152, A1155, and A1157 output, ICC, switches low field at the Hall sensor IC exceeds the operate point threshold,
after the magnetic field at the Hall sensor IC exceeds the oper- BOP . When the magnetic field is reduced to below the release
ate point threshold, BOP . When the magnetic field is reduced to point threshold, BRP, the device output goes low (panel B).
below the release point threshold, BRP , the device output goes
The difference between the magnetic operate and release points
high. This is shown in Figure 1, panel A.
is called the hysteresis of the device, BHYS . This built-in hyster-
In the case of the reverse output polarity, as in the A1153, A1156, esis allows clean switching of the output even in the presence of
and A1158, the device output switches high after the magnetic external mechanical vibration and electrical noise.

I+ I+
ICC(H) ICC(H)
Switch to High

Switch to High
Switch to Low

Switch to Low
ICC

ICC
ICC(L) ICC(L)
0 0
B– B+ B– B+

BOP
BRP
BOP
BRP

BHYS BHYS

(A) Hysteresis curve for A1150, A1152, A1155, and A1157 (B) Hysteresis curve for A1153, A1156, and A1158

Figure 1: Alternative Switching Behaviors Available in the A115x Device Family.

On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B– direction indicates decreasing
south polarity field strength (including the case of increasing north polarity).

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

V+ VCC RSENSE
A115x

V+ VCC
CBYP
0.1 µF 0.01 µF A115x
B C
CBYP
GND GND 0.1 µF 0.01 µF
B C
A
GND GND
ECU A Package UA Only
RSENSE A
B Package UB Only

C Package LH & UA Only

(A) Low side sensing (B) High side sensing

Figure 2: Typical Application Circuits

Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for at base band, while the DC offset becomes a high-frequency sig-
switchpoint accuracy is the small signal voltage developed nal. The magnetic-sourced signal then can pass through a low-
across the Hall element. This voltage is disproportionally small pass filter, while the modulated DC offset is suppressed. The
relative to the offset that can be produced at the output of the chopper stabilization technique uses a 350 kHz high frequency
Hall sensor IC. This makes it difficult to process the signal while clock. For demodulation process, a sample and hold technique is
maintaining an accurate, reliable output over the specified oper- used, where the sampling is performed at twice the chopper fre-
ating temperature and voltage ranges. Chopper stabilization is
quency. This high-frequency operation allows a greater sampling
a unique approach used to minimize Hall offset on the chip. The
rate, which results in higher accuracy and faster signal-process-
Allegro technique, namely Dynamic Quadrature Offset Cancella-
ing capability. This approach desensitizes the chip to the effects
tion, removes key sources of the output drift induced by thermal
and mechanical stresses. This offset reduction technique is based of thermal and mechanical stresses, and produces devices that
on a signal modulation-demodulation process. The undesired have extremely stable quiescent Hall output voltages and precise
offset signal is separated from the magnetic field-induced signal recoverability after temperature cycling. This technique is made
in the frequency domain, through modulation. The subsequent possible through the use of a BiCMOS process, which allows
demodulation acts as a modulation process for the offset, causing the use of low-offset, low-noise amplifiers in combination with
the magnetic field-induced signal to recover its original spectrum high-density logic integration and sample-and-hold circuits.

Regulator

Clock/Logic
Low-Pass
Hall Element Filter
Sample and
Hold

Amp

Figure 3: Chopper Stabilization Circuit (Dynamic Quadrature Offset Cancellation)

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

Power Derating
The device must be operated below the maximum junction tem- TJ = TA + ΔT = 25°C + 7°C = 32°C
perature of the device, TJ(max). Under certain combinations of A worst-case estimate, PD(max), represents the maximum allow-
peak conditions, reliable operation may require derating supplied able power level (VCC(max), ICC(max)), without exceeding
power or improving the heat dissipation properties of the appli- TJ(max), at a selected RθJA and TA.
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the Example: Reliability for VCC at TA = 150°C, package UA, using a
Allegro MicroSystems Web site.) low-K PCB.
The Package Thermal Resistance, RθJA, is a figure of merit sum- Observe the worst-case ratings for the device, specifically:
marizing the ability of the application and the device to dissipate RθJA = 165 °C/W, TJ(max)  = 165°C, VCC(max) = 24 V, and
heat from the junction (die), through all paths to the ambient air. ICC(max)  = 17 mA.
Its primary component is the Effective Thermal Conductivity, K, Calculate the maximum allowable power level, PD(max). First,
of the printed circuit board, including adjacent devices and traces. invert equation 3:
Radiation from the die through the device case, RθJC, is relatively
small component of RθJA. Ambient air temperature, TA, and air ΔTmax = TJ(max) – TA = 165 °C – 150 °C = 15 °C
motion are significant external factors, damped by overmolding.
This provides the allowable increase to TJ resulting from internal
The effect of varying power levels (Power Dissipation, PD), can power dissipation. Then, invert equation 2:
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.  PD(max) = ΔTmax ÷ RθJA = 15°C ÷ 165 °C/W = 91 mW
Finally, invert equation 1 with respect to voltage:
PD = VIN × IIN (1)
VCC(est) = PD(max) ÷  ICC(max) = 91 mW ÷ 17 mA = 5 V
ΔT = PD × RθJA (2)

TJ = TA + ΔT (3) The result indicates that, at TA, the application and device can
For example, given common conditions such as: TA= 25°C, dissipate adequate amounts of heat at voltages ≤VCC(est).
VCC = 12 V, ICC = 4 mA, and RθJA = 140 °C/W, then: Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
PD = VCC × ICC = 12 V × 4 mA = 48 mW RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est)
and VCC(max) is reliable under these conditions.
ΔT = PD × RθJA = 48 mW × 140 °C/W = 7°C

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

PACKAGE OUTLINE DRAWINGS

For Reference Only – Not for Tooling Use

(Reference DWG-2840)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

+0.12
2.98 –0.08

D
1.49
4° ±4°
A
3
+0.020
0.180 –0.053

0.96 D

+0.19
+0.10 1.91 –0.06 2.40
2.90 –0.20

0.70
D

1.00
0.25 MIN

1 2
0.55 REF
0.25 BSC 0.95
Seating Plane
Branded Face Gauge Plane B PCB Layout Reference View
8X 10°
REF

1.00 ±0.13
NNN

+0.10
0.05 –0.05
0.95 BSC
0.40 ±0.10 C Standard Branding Reference View
N = Last three digits of device part number

A Active Area Depth, 0.28 mm

B Reference land pattern layout; all pads a minimum of 0.20 mm from all adjacent pads;
adjust as necessary to meet application process requirements and PCB layout tolerances

C Branding scale and appearance at supplier discretion

D Hall elements, not to scale

Figure 4: Package LH, 3-Pin SOT23W

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1.508.853.5000; www.allegromicro.com
A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

For Reference Only – Not for Tooling Use

(Reference DWG-9013)
Dimensions in millimeters – NOT TO SCALE
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

45°

+0.08
4.09
–0.05 1.52 ±0.05

E C
2.04

2 X 10°
1.44 E E Mold Ejector
+0.08 Pin Indent
3.02
–0.05
Branded 45°
Face

A
1.02 MAX
0.79 REF

1 2 3

+0.05 +0.03
0.43 0.41
–0.07 –0.06

1.27 NOM

NNN

14.99 ±0.25

D Standard Branding Reference View

= Supplier emblem
N = Last three digits of device part number

A Dambar removal protrusion (6X)

B Gate and tie bar burr area

C Active Area Depth, 0.50 mm REF

D Branding scale and appearance at supplier discretion

E Hall element, not to scale

Figure 5: Package UA, 3-Pin SIP

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A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

For Reference Only – Not for Tooling Use

(Reference DWG-9070)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown

+0.06
4.00 –0.05

4 X 10°
1.50 ±0.05
E
2.00 C

1.75 E
Mold Ejector
+0.06 Pin Indent
4.00
–0.07 E
NNN
Branded 45° YYWW
Face LLLL
A
0.85 ±0.07
4 X 2.50 REF 0.25 REF 0.42 ±0.10 D Standard Branding Reference View
0.30 REF
2.54 REF = Supplier emblem
N = Last three digits of device part number
4 X 0.85 REF Y = Last 2 digits of year of manufacture
W = Week of manufacture
L = Lot number
1 2

A Dambar removal protrusion (8X)

1.00 ±0.10
12.20 ±0.10 B Gate and tie bar burr area
+0.07 C Active Area Depth, 0.38 mm REF
4 X 7.37 REF 0.25
–0.03
1.80 D Branding scale and appearance at supplier discretion
±0.10
E Hall element; not to scale

F Thermoplastic Molded Lead Bar for alignment during shipment

0.38 REF
0.25 REF
4 X 0.85 REF

0.85 ±0.07

+0.06
1.80
–0.07
F

+0.06
4.00 1.50 ±0.05
–0.05

Figure 6: Package UB, 2-Pin SIP

Allegro MicroSystems, LLC 13

115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A1150, A1152, A1153, A1155, Chopper-Stabilized, Two-Wire
A1156, A1157, and A1158
Hall-Effect Switches

Revision History
Revision Revision Date Description of Revision
7 May 22, 2014 Added UB Package
8 October 2, 2014 Revised UB packge drawing and reformatted document.
9 March 2, 2015 Updated branding info on package drawing
10 September 21, 2015 Corrected LH package Active Area Depth value; added AEC-Q100 qualification under Features and
Benefits

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Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
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use; nor for any infringement of patents or other rights of third parties which may result from its use.

For the latest version of this document, visit our website:

www.allegromicro.com
Allegro MicroSystems, LLC 14
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com