3-Axis Compass IC for Smartphones
3-Axis Compass IC for Smartphones
AK09918
                                                      3-axis Electronic Compass
                                         1. General Description
AK09918 is 3-axis electronic compass IC with high sensitive Hall sensor technology.
Small package of AK09918 incorporates magnetic sensors for detecting terrestrial magnetism in the X-axis,
Y-axis, and Z-axis, a sensor driving circuit, signal amplifier chain, and an arithmetic circuit for processing
the signal from each sensor. Self-test function is also incorporated. From its compact foot print and thin
package feature, it is suitable for map heading up purpose in Smart phone to realize pedestrian navigation
function.
                                                2. Features
   Functions:
         3-axis magnetometer device suitable for compass application
         Built-in A to D Converter for magnetometer data out
         16-bit data out for each 3-axis magnetic component
            Sensitivity: 0.15 µT/LSB (typ.)
         Serial interface
            I2C bus interface
                 Standard and Fast modes compliant with Philips I2C specification Ver.2.1
         Operation mode
            Power-down, Single measurement, Continuous measurement and Self-test
         DRDY function for measurement data ready
         Magnetic sensor overflow monitor function
         Built-in oscillator for internal clock source
         Power on Reset circuit
         Self-test function with internal magnetic source
         Built-in magnetic sensitivity adjustment circuit
   Operating temperatures:
                                         -30˚C to +85˚C
   Operating supply voltage:
                                         +1.65V to +1.95V
   Current consumption:
         Power-down:                     1 µA (typ.)
         Measurement:
             Average current consumption at 100 Hz repetition rate: 1.1mA (typ.)
   Package:
         AK09918C          4-pin WL-CSP (BGA):           0.8 mm  0.8 mm  0.5mm
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                                                          3. Table of Contents
     1. General Description .................................................................................................................. 1
     2. Features ..................................................................................................................................... 1
     3. Table of Contents ...................................................................................................................... 2
     4. Block Diagram and Functions ................................................................................................... 3
     5. Pin Configurations and Functions ............................................................................................. 4
     6. Absolute Maximum Ratings ...................................................................................................... 4
     7. Recommended Operating Conditions ....................................................................................... 4
     8. Electrical Characteristics ........................................................................................................... 5
        8.1. DC Characteristics.............................................................................................................. 5
        8.2. AC Characteristics .............................................................................................................. 6
        8.3. Analog Circuit Characteristics............................................................................................ 6
        8.4. I2C Bus Interface ................................................................................................................ 7
     9. Function Descriptions ............................................................................................................... 8
        9.1. Power States ....................................................................................................................... 8
        9.2. Reset Functions .................................................................................................................. 8
        9.3. Operation Modes ................................................................................................................ 9
        9.4. Description of Each Operation Mode ............................................................................... 10
          9.4.1. Power-down Mode .................................................................................................... 10
          9.4.2. Single Measurement Mode ........................................................................................ 10
          9.4.3. Continuous Measurement Mode 1, 2, 3 and 4 ........................................................... 11
          9.4.4. Self-test Mode............................................................................................................ 15
     10. Serial Interface ...................................................................................................................... 16
        10.1. I2C Bus Interface ............................................................................................................ 16
          10.1.1. Data Transfer ........................................................................................................... 16
          10.1.2. WRITE Instruction .................................................................................................. 18
          10.1.3. READ Instruction .................................................................................................... 19
     11. Registers ................................................................................................................................ 20
        11.1. Description of Registers ................................................................................................. 20
        11.2. Register Map .................................................................................................................. 21
        11.3. Detailed Description of Register .................................................................................... 22
          11.3.1. WIA: Who I Am ...................................................................................................... 22
          11.3.2. RSV: Reserved register ............................................................................................ 22
          11.3.3. ST1: Status 1 ............................................................................................................ 22
          11.3.4. HXL to HZH: Measurement data ............................................................................ 23
          11.3.5. TMPS: Dummy register ........................................................................................... 23
          11.3.6. ST2: Status 2 ............................................................................................................ 24
          11.3.7. CNTL1: Dummy register ......................................................................................... 24
          11.3.8. CNTL2: Control 2.................................................................................................... 24
          11.3.9. CNTL3: Control 3.................................................................................................... 25
          11.3.10. TS1, TS2: Test register........................................................................................... 25
     12. Example of Recommended External Connection ................................................................. 26
     13. Package ................................................................................................................................. 27
        13.1. Marking .......................................................................................................................... 27
        13.2. Pin Assignment ............................................................................................................... 27
        13.3. Outline Dimensions ........................................................................................................ 28
        13.4. Recommended Foot Print Pattern................................................................................... 28
     14. Relationship between the Magnetic Field and Output Code ................................................. 29
     IMPORTANT NOTICE .............................................................................................................. 30
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   3-axis
   Hall                      Chopper        Pre-
                               SW             AMP                                       Integrator&ADC
   sensor
                    MUX
                                                                        OSC
                              HE-Drive                                                                           SCL
POR
VSS VDD
              Block                                             Function
      3-axis Hall sensor   Monolithic Hall elements.
      MUX                  Multiplexer for selecting Hall elements.
      Chopper SW           Performs chopping.
      HE-Drive             Magnetic sensor drive circuit.
      Pre-AMP              Fixed-gain differential amplifier used to amplify the magnetic sensor signal.
      Integrator & ADC     Integrates and amplifies Pre-AMP output and performs analog-to-digital
                           conversion.
      OSC                  Generates an operating clock for sensor measurement.
      POR                  Power On Reset circuit. Generates reset signal on rising edge of VDD.
      VREF                 Generates reference voltage and current.
      Interface Logic      Exchanges data with an external CPU.
      &                    I2C bus interface using two pins, namely, SCL and SDA. Standard and Fast modes
      Register             are supported.
      Timing Control       Generates a timing signal required for internal operation from a clock generated by
                           the OSC.
      Magnetic Source      Generates magnetic field for Self-test of magnetic sensor.
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                                     8. Electrical Characteristics
The following conditions apply unless otherwise noted:
Vdd = 1.65V to 1.95V, Temperature range = -30˚C to +85˚C.
8.1. DC Characteristics
       Parameter            Symbol    Pin           Condition           Min.      Typ.     Max.      Unit
 High level input voltage    VIH      SCL                             70%Vdd                          V
                                      SDA
 Low level input voltage     VIL      SCL                               -0.3              30%Vdd         V
                                      SDA
      Input current          IIN      SCL        VIN = Vss or Vdd       -10                 +10      µA
                                      SDA
 Hysteresis input voltage    VHS      SCL                             10%Vdd                             V
        (Note 1)                      SDA
 Low level output voltage    VOL      SDA          IOL ≤ +3mA                             20%Vdd         V
        (Note 2)
  Current consumption       IDD1      VDD       Power-down mode                    1         3       µA
        (Note 3)                                  Vdd = 1.95V
                            IDD2               When magnetic sensor               1.5        3       mA
                                                     is driven
                            IDD3                  Self-test mode                  2.5        4       mA
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8.2. AC Characteristics
       Parameter            Symbol     Pin                  Condition               Min.         Typ.     Max.     Unit
 Power supply rise time      PSUP     VDD       Period of time that VDD changes                            50       ms
        (Note 4)                                       from 0.2V to Vdd.
 POR completion time         PORT                 Period of time after PSUP to                            100       µs
        (Note 4)                                   Power-down mode (Note 5)
 Power supply turn off       SDV      VDD       Turn off voltage to enable POR to                          0.2      V
    voltage (Note 4)                                     restart (Note 5)
  Power supply turn on       PSINT    VDD       Period of time that voltage lower       100                         µs
    interval (Note 4)                            than SDV needed to be kept to
                                                 enable POR to restart (Note 5)
 Wait time before mode       Twait                                                      100                         µs
         setting
(Note 4)     Reference value for design.
(Note 5)     When POR circuit detects the rise of VDD voltage, it resets internal circuits and initializes the
             registers. After reset, AK09918 transits to Power-down mode.
VDD
                                          PORT
                    SDV
        0V
                                  PSUP
                                                                PSINT
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   Standard mode
       fSCL ≤ 100kHz
         Symbol                        Parameter                      Min.   Typ.         Max.          Unit
           fSCL                   SCL clock frequency                                     100           kHz
         tHIGH                   SCL clock “High” time                4.0                                s
          tLOW                   SCL clock “Low” time                 4.7                                s
             tR                  SDA and SCL rise time                                    1.0            s
             tF                  SDA and SCL fall time                                    0.3            s
       tHD:STA                  Start Condition hold time             4.0                                s
        tSU:STA                Start Condition setup time             4.7                                s
       tHD:DAT             SDA hold time (vs. SCL falling edge)        0                                 s
       tSU:DAT             SDA setup time (vs. SCL rising edge)       250                                ns
        tSU:STO                Stop Condition setup time              4.0                                s
           tBUF                       Bus free time                   4.7                                s
   Fast mode
      100kHz ≤ fSCL ≤ 400kHz
         Symbol                        Parameter                      Min.   Typ.         Max.          Unit
           fSCL                   SCL clock frequency                                     400           kHz
         tHIGH                   SCL clock “High” time                0.6                                s
          tLOW                   SCL clock “Low” time                 1.3                                s
             tR                  SDA and SCL rise time                                    0.3            s
             tF                  SDA and SCL fall time                                    0.3            s
       tHD:STA                  Start Condition hold time             0.6                                s
        tSU:STA                Start Condition setup time             0.6                                s
       tHD:DAT             SDA hold time (vs. SCL falling edge)        0                                 s
       tSU:DAT             SDA setup time (vs. SCL rising edge)       100                                ns
        tSU:STO                Stop Condition setup time              0.6                                s
           tBUF                       Bus free time                   1.3                                s
            tSP              Noise suppression pulse width                                 50            ns
                                                                                    VIH
                           SCL
                                                                                    VIL
                                                                                                  VIH
      SDA
                                                                                                  VIL
              tBUF          tLOW   tR        tHIGH   tF
                                                                                    tSP
                                                                                                  VIH
      SCL
                                                                                                  VIL
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                                       9. Function Descriptions
9.1. Power States
When VDD is turned on from Vdd = OFF (0V), all registers in AK09918 are initialized by POR circuit and
AK09918 transits to Power-down mode.
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By setting CNTL2 register MODE[4:0] bits, the operation set for each mode is started.
A transition from one mode to another is shown below.
When power is turned ON, AK09918 is in Power-down mode. When a specified value is set to MODE[4:0]
bits, AK09918 transits to the specified mode and starts operation. When user wants to change operation
mode, transit to Power-down mode first and then transit to other modes. After Power-down mode is set, at
least 100 s (Twait) is needed before setting another mode
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                         Measurement period
       Internal Buffer
       Last Data                      Measurement Data (1)              Data(2)           Data(3)
DRDY
                         Measurement period
       Internal Buffer
       Last Data                      Measurement Data (1)              Data(2)           Data(3)
DRDY
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10Hz,20Hz,50Hz or 100Hz
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       Internal Buffer
       (N-1)th                 Nth                                            (N+1)th
DRDY
       Internal Buffer
       (N-1)th                 Nth                                            (N+1)th
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Internal Buffer
(N-1)th                     Nth                                               (N+1)th
DRDY
DOR
          Internal Buffer
          (N-1)th                 Nth                             (N+1)th                               (N+2)th
Figure 9.8. Data Skip: When data read has not been finished before the next measurement end
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Although Nth data is read out when it is performed during (N+1)th measurement period, (N+1)th data is obtained by
reading out again before completion of (N+2)th measurement.
       Internal Buffer
       (N-1)th                 Nth                            (N+1)th                           (N+2)th
DOR
Figure 9.9. Read-out is performed before completion of the next measurement after data protection.
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SCL
SDA
SCL
SDA
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10.1.1.3. Acknowledge
The IC that is transmitting data releases the SDA line (in the “High” state) after sending 1-byte data.
The IC that receives the data drives the SDA line to “Low” on the next clock pulse. This operation is referred
as acknowledge. With this operation, whether data has been transferred successfully can be checked.
AK09918 generates an acknowledge after reception of a start condition and slave address.
When a WRITE instruction is executed, AK09918 generates an acknowledge after every byte is received.
When a READ instruction is executed, AK09918 generates an acknowledge then transfers the data stored at
the specified address. Next, AK09918 releases the SDA line then monitors the SDA line. If a master IC
generates an acknowledge instead of a stop condition, AK09918 transmits the 8bit data stored at the next
address. If no acknowledge is generated, AK09918 stops data transmission.
                                                                                           Clock pulse
                                                                                           for acknowledge
       SCL FROM
       MASTER                           1                                        8              9
       DATA
       OUTPUT BY
       TRANSMITTER
not acknowledge
        DATA
        OUTPUT BY
        RECEIVER
                      START
                                                                                          acknowledge
                    CONDITION
MSB LSB
0 0 0 1 1 0 0 R/W
The first byte including a slave address is transmitted after a start condition, and an IC to be accessed is
selected from the ICs on the bus according to the slave address.
When a slave address is transferred, the IC whose device address matches the transferred slave address
generates an acknowledge then executes an instruction. The 8th bit (least significant bit) of the first byte is a
R/W bit.
When the R/W bit is set to “1”, READ instruction is executed. When the R/W bit is set to “0”, WRITE
instruction is executed.
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MSB LSB
A7 A6 A5 A4 A3 A2 A1 A0
After receiving the second byte (register address), AK09918 generates an acknowledge then receives the
third byte.
The third and the following bytes represent control data. Control data consists of 8 bits and is based on the
MSB-first configuration. AK09918 generates an acknowledge after every byte is received. Data transfer
always stops with a stop condition generated by the master.
MSB LSB
D7 D6 D5 D4 D3 D2 D1 D0
                       S
                       T                                                                                             S
                       A             R/W="0"                                                                         T
                       R                                                                                             O
                       T                                                                                             P
                                       A                A               A               A        A               A
                                       C                C               C               C        C               C
                                       K                K               K               K        K               K
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                          S
                          T                                                                                                      S
                          A              R/W="1"                                                                                 T
                          R                                                                                                      O
                          T                                                                                                      P
                                           A                   A                 A                  A         A
                                           C                   C                 C                  C         C
                                           K                   K                 K                  K         K
                 S                                     S
                 T                                     T                                                                             S
                 A             R/W="0"                 A              R/W="1"                                                        T
                 R                                     R                                                                             O
                 T                                     T                                                                             P
                                 A                 A                    A                 A               A          A
                                 C                 C                    C                 C               C          C
                                 K                 K                    K                 K               K          K
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                                               11. Registers
11.1. Description of Registers
AK09918 has registers of 18 addresses as indicated in Table 11.1. . Every address consists of 8 bits data.
Data is transferred to or received from the external CPU via the serial interface described previously.
Addresses 00h to 18h, 30h to 32h are compliant with automatic increment function of serial interface
respectively. In other modes, read data is not correct. When the address is in 00h to 18h, the address is
incremented 00h  01h  02h  03h  10h  11h ...  18h, and the address goes back to 00h after
18h. When the address is in 30h to 32h, the address goes back to 30h after 32h.
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When VDD is turned ON, POR function works and all registers of AK09918 are initialized.
TS1 and TS2 are test registers for shipment test. Do not access these registers.
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                Register
      Addr.                   D7        D6       D5            D4     D3      D2       D1      D0
                 name
                                             Read-only register
       00h       WIA1          0        1         0          0         1       0       0        0
       01h       WIA2          0        0         0          0         1       1       0        0
WIA1[7:0] bits: Company ID of AKM. It is described in one byte and fixed value.
    48h: fixed
WIA2[7:0] bits: Device ID of AK09918. It is described in one byte and fixed value.
    0Ch: fixed
               Register
      Addr.                  D7       D6        D5            D4     D3      D2       D1       D0
                name
                                          Read-only register
       02h       RSV1      RSV17    RSV16 RSV15 RSV14               RSV13   RSV12    RSV11   RSV10
       03h       RSV2      RSV27    RSV26 RSV25 RSV24               RSV23   RSV22    RSV21   RSV20
                Register
      Addr.                   D7        D6       D5            D4     D3      D2       D1       D0
                 name
                                             Read-only register
       10h        ST1          0        0         0          0         0       0      DOR     DRDY
              Reset            0        0         0          0         0       0       0        0
DRDY bit turns to “1” when data is ready in Single measurement mode, Continuous measurement mode 1, 2,
3, 4 or Self-test mode. It returns to “0” when any one of ST2 register or measurement data register (HXL to
TMPS) is read.
DOR bit turns to “1” when data has been skipped in Continuous measurement mode 1, 2, 3, 4. It returns to “0”
when any one of ST2 register or measurement data register (HXL to TMPS) is read.
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               Register
     Addr.                   D7       D6        D5            D4    D3      D2        D1      D0
                name
                                            Read-only register
      11h        HXL       HX7       HX6      HX5        HX4       HX3     HX2       HX1     HX0
      12h        HXH       HX15      HX14     HX13      HX12       HX11    HX10      HX9     HX8
      13h        HYL       HY7       HY6      HY5        HY4       HY3     HY2       HY1     HY0
      14h        HYH       HY15      HY14     HY13      HY12       HY11    HY10      HY9     HY8
      15h        HZL       HZ7       HZ6       HZ5       HZ4       HZ3     HZ2       HZ1     HZ0
      16h        HZH       HZ15      HZ14     HZ13      HZ12       HZ11    HZ10      HZ9     HZ8
             Reset          0         0         0          0        0       0         0       0
Measurement data is stored in two’s complement and Little Endian format. Measurement range of each axis
is -32752 to 32752 in 16-bit output.
                               Table 11.3. Measurement magnetic data format
                        Measurement data (each axis) [15:0] bits            Magnetic flux
                  Two’s complement           Hex             Decimal        density [µT]
                 0111 1111 1111 0000         7FF0              32752         4912(max.)
                          |                    |                  |                |
                 0000 0000 0000 0001         0001                1               0.15
                 0000 0000 0000 0000         0000                0                0
                 1111 1111 1111 1111         FFFF                -1             -0.15
                          |                    |                  |                |
                 1000 0000 0001 0000         8010             -32752         -4912(min.)
               Register
     Addr.                   D7       D6        D5            D4    D3      D2        D1     D0
                name
                                            Read-only register
      17h       TMPS          0        0        0          0        0        0         0      0
             Reset            0        0        0          0        0        0         0      0
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              Register
      Addr.               D7        D6         D5         D4        D3       D2        D1         D0
               name
                                              Read-only register
       18h       ST2       0       RSV31     RSV30     RSV29       HOFL    RSV28        0          0
             Reset         0         0         0          0         0        1          0          0
In Single measurement mode, Continuous measurement mode 1, 2, 3, 4, and Self-test mode, magnetic sensor
may overflow even though measurement data register is not saturated. In this case, measurement data is not
correct and HOFL bit turns to “1”. When measurement data register is updated, HOFL bit is updated. Refer
to 9.4.3.6 for detailed information.
ST2 register has a role as data reading end register, also. When any of measurement data register (HXL to
TMPS) is read in Continuous measurement mode 1, 2, 3, 4, it means data reading start and taken as data
reading until ST2 register is read. Therefore, when any of measurement data is read, be sure to read ST2
register at the end.
              Register
      Addr.               D7        D6         D5         D4        D3       D2        D1         D0
               name
                                             Read/Write register
       30h     CNTL1       0         0         0          0         0         0         0          0
             Reset         0         0         0          0         0         0         0          0
              Register
      Addr.               D7        D6        D5          D4        D3       D2        D1         D0
               name
                                             Read/Write register
       31h     CNTL2       0         0         0     MODE4 MODE3          MODE2      MODE1 MODE0
             Reset         0         0         0          0      0          0          0     0
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              Register
      Addr.                 D7         D6        D5         D4         D3        D2         D1      D0
               name
                                                Read/Write register
       32h     CNTL3         0         0          0          0          0         0          0      SRST
             Reset           0         0          0          0          0         0          0        0
When “1” is set, all registers are initialized. After reset, SRST bit turns to “0” automatically.
              Register
      Addr.                 D7         D6        D5         D4         D3        D2         D1      D0
               name
                                                Read/Write register
       33h       TS1         -         -          -          -          -         -          -       -
       34h       TS2         -         -          -          -          -         -          -       -
             Reset           0         0          0          0          0         0          0       0
TS1 and TS2 registers are AKM internal test register. Do not access these registers.
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                                                                VDD
                                                      POWER 1.65V to 1.95V
         Host CPU
                                                           B
                                              SDA   VDD
            I2C I/F                                                  0.1µF
                                                           A
                                              SCL    VSS
                                                2     1
                                              AK09918C
                                              (Top view)
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                                     13. Package
13.1. Marking
                                                  X1X2X3
                                                  X4X5
                                2        1
                        B      SDA      VDD
                        A      SCL      VSS
                                      <Top view>
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                             0.760.03
                                                                             0.4
2 1 1 2
                       B                                                                 B
           0.760.03
                                                               0.4
                       A                                                                 A
<Bottom view>
<Side view>
                                                                                                  [mm]
                                                         0.4
                                                     2           1
                                             B
                                                                               0.4
                                             A
0.21
<Top view>
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The measurement data increases as the magnetic flux density increases in the arrow directions.
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IMPORTANT NOTICE
0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information contained in
   this document without notice. When you consider any use or application of AKM product stipulated in this
   document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status
   of the Products.
1. All information included in this document are provided only to illustrate the operation and application examples of
   AKM Products. AKM neither makes warranties or representations with respect to the accuracy or completeness of
   the information contained in this document nor grants any license to any intellectual property rights or any other
   rights of AKM or any third party with respect to the information in this document. You are fully responsible for use
   of such information contained in this document in your product design or applications. AKM ASSUMES NO
   LIABILITY FOR ANY LOSSES INCURRED BY YOU OR THIRD PARTIES ARISING FROM THE USE OF
   SUCH INFORMATION IN YOUR PRODUCT DESIGN OR APPLICATIONS.
2. The Product is neither intended nor warranted for use in equipment or systems that require extraordinarily high
   levels of quality and/or reliability and/or a malfunction or failure of which may cause loss of human life, bodily
   injury, serious property damage or serious public impact, including but not limited to, equipment used in nuclear
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   fields. Do not use Product for the above use unless specifically agreed by AKM in writing.
3. Though AKM works continually to improve the Product’s quality and reliability, you are responsible for complying
   with safety standards and for providing adequate designs and safeguards for your hardware, software and systems
   which minimize risk and avoid situations in which a malfunction or failure of the Product could cause loss of human
   life, bodily injury or damage to property, including data loss or corruption.
4. Do not use or otherwise make available the Product or related technology or any information contained in this
   document for any military purposes, including without limitation, for the design, development, use, stockpiling or
   manufacturing of nuclear, chemical, or biological weapons or missile technology products (mass destruction
   weapons). When exporting the Products or related technology or any information contained in this document, you
   should comply with the applicable export control laws and regulations and follow the procedures required by such
   laws and regulations. The Products and related technology may not be used for or incorporated into any products or
   systems whose manufacture, use, or sale is prohibited under any applicable domestic or foreign laws or regulations.
5. Please contact AKM sales representative for details as to environmental matters such as the RoHS compatibility of
   the Product. Please use the Product in compliance with all applicable laws and regulations that regulate the inclusion
   or use of controlled substances, including without limitation, the EU RoHS Directive. AKM assumes no liability for
   damages or losses occurring as a result of noncompliance with applicable laws and regulations.
6. Resale of the Product with provisions different from the statement and/or technical features set forth in this
   document shall immediately void any warranty granted by AKM for the Product and shall not create or extend in
   any manner whatsoever, any liability of AKM.
7. This document may not be reproduced or duplicated, in any form, in whole or in part, without prior written consent
   of AKM.
                                                                                                    Rev.1
016014242-E-00                                                                                                 2016/11
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