UNIT-2
Part A
1. What is an ac load line? [N/D– 16]
A dc load line gives the relationship between the q-point and the transistor characteristics. When
capacitors are included in a CE transistor circuit, a new effective load line called an ac load line.
The ac load line gives the relationship between the small signal response and the transistor
characteristics.
2. Draw the small-signal ac equivalent circuit of the BJT. [N/D– 16]
B C
Vce
Vbe rπ
E gm Vπ ro E
Small signal ac equivalent circuit of BJT
3. What is the need of a load line? [M/J– 16]
In order to produce distortion free output in amplifier circuits, the operating point should be selected
at the centre of the DC load line.
4. How amplifiers are classified according o the transistor configuration? [N/D-15]
According to the transistor configuration, amplifiers are classified as
Common base amplifier
Common emitter amplifier
Common collector amplifier
5. State Millers Theorem. [N/D-15]
Miller’s theorem states that, if an impedance Z is connected between the input and output terminals
of a network which provides a voltage gain A, an equivalent circuit that gives the same effect can
be drawn by removing Z and connecting impedance across the input and
across the output.
6. Define CMRR of BJT differential amplifier. How to improve it? [A/M – 15]
It is defined as the ratio of the differential mode voltage gain, A d to common mode voltage gain Ac.
| |
To improve the CMRR, the common mode gain Ac must be reduced, and the differential mode gain
must be increased.
7. A small signal source VI(t) = 20cos20t + 30 sin 106 t is applied to a transistor amplifier as shown in
Figure 3. The transistor has hfe = 150, r0 = ∞ and r π = 3kΩ.. Determine V0(t). [A/M – 15]
Solution:
Given
VCC = 5V, R1 = 100kΩ, R2 = 20kΩ ,RC = 3kΩ, RE = 900Ω, Vi(t) = 20cos20t + 30 sin 106 t, hfe = β =
150, rπ = 3 k Ω.
Step 1
= 5 = 0.833 V
= = 16.66 kΩ
( )
= ( )
= 0.87µA
= 150 = 130.52 µA =
Step 2:
= 5.01 mA / V
=∞
( ) ( ‖ )
‖ ‖
( because ‖ ‖
)
( ) ( ‖ ) where =0
( )
( ) ( )
8. Draw the ac equivalent circuit of figure4. [N/D– 14]
IC
Ib
R1 RC
hie RL
Vi hfe Ib
Ri R0
ac equivalent circuit of the above figure
9. Find CMRR of differential amplifier with differential gain of 300 and common mode gain of 0.2.
[N/D– 14]
=
b
10. Draw a cascade amplifier and its ac equivalent circuit. [M/J– 16]
Part B
1. Analyze a basic common-base amplifier circuit and derive the expressions for its small-signals
voltage gain, current gain, input impedance and output impedance. (16) [N/D-16]
Figure a- Common Base Amplifier Circuit
Figure –a shows the common base amplifier circuit. In common base, the input signal is applied to the
emitter, the output load is connected to the collector terminal through a coupling capacitor C C2 and the base
is at signal ground.
Figure – b- small signal hybrid-Pi model equivalent circuit of common
base amplifier, with the output resistance ro assumed to be infinite.
Voltage gain (AV)
It is the ratio of output voltage to the input voltage
From small signal equivalent circuit, the output voltage is
( ‖ ) -------------------(1)
Applying KCL to the emitter node:
[ ]
If
β=
[ ]
[ ]
[ ‖ ‖ ]
Now,
( ‖ )
( )[ ‖ ‖ ]( ‖ )
( ‖ )
( )[ ‖ ‖ ] ----(2)
If
( ‖ ) -----------------(3)
Current gain (Ai):
It is the ratio of output current to the input current.
-------------(4)
Apply KCL at the emitter node
=0
[ ]= ( here β = )
[ ]=
[ ‖( ] --------------------(5)
)
Apply current division rule at is
( )[ ] -------------------(6)
Substitute equation (5) in equation (6)
[ ( ‖( )] [ ]
)
[( ‖ )] [ ]
( )
If ,
= = (because )
Where is the common base current gain of the transistor.
Input impedance ( Ri):
It is the ratio of input voltage to the input current.
(Because )
Apply KCL at the input node,
[ ]
[ ]
[ ]
Output impedance (Ro):
It is the ratio of output voltage to output current.
( ‖ )
( ‖ ) if
Then
2. What are the changes in the a.c. characteristics of a common emitter amplifier when an emitter
resistor and an emitter bypass capacitor are incorporated in the design? Explain with necessary
equations. (16)
[M/J– 16]
Figure a.- Common Emitter Amplifier with voltage divider biasing
AC load line analysis:
A dc load line gives the relationship between the operating point and the transistor characteristics.
When capacitors are included in a common emitter amplifier circuit, a new effective load line, called
an ac load line. The ac load line gives the relationship between the small signal response and the
transistor characteristics. The ac operating region is on the ac load line.
Figure b. - The DC and AC load lines
The slope of ac load line is given as
Slope =
The slope of the ac load line differs from that of the dc load line because the emitter bypass
Resistor is not included in the small signal equivalent circuit as shown below in figure c
Figure c- Equivalent Circuit of CE
amplifier
figure (b) shows the dc and ac load line. When , we are at the Q-point. When ac
signals are present, we deviate about the Q-point on the ac load line.
The conditions are
‖
Voltage swing Limitations:
When symmetrical sinusoidal signals are applied to the input of the transistor amplifier circuit,
amplified symmetrical sinusoidal signals are generated at the output, as long as the amplifier
operation remains linear. Now we use the ac load line to determine the maximum output
symmetrical swing. If the output signal exceeds this limit, a portion of the output signal get clipped
resulting signal distortion.
The maximum symmetrical peak-to-peak ac collector current is
The maximum symmetrical peak-to-peak output voltage is
| | | |[ ‖ ]
Small signal analysis of common emitter amplifier
Figure a shows the common emitter amplifier with voltage divider biasing. In common emitter,
base is the input terminal, collector is the output terminal and emitter is the common terminal-
hence the name common emitter. Here R1 and R2 are biasing resistance or voltage divider. The
coupling capacitors CC1 and CC2 which blocks dc signal and allow ac signal.
Figure d Small signal hybid –Pi model of common emitter amplifier
The small signal hybrid-Pi model equivalent circuit of common emitter amplifier in which the
coupling capacitor is assumed to be a short circuit as shown in figure d.
Input resistance:
It is the ratio of input voltage to the input current.
( ‖ ‖ )
( ‖ ‖ ) -------------------(1)
Voltage gain (Av)
It is the ratio of output voltage to the input voltage
( ‖ )
‖ ‖
{ ‖ ‖
}
( ‖ )
‖ ‖
{ } ( ‖ )
‖ ‖
( )( ‖ ) ----------------------- (2)
( ‖ ‖ )
Current gain (Ai):
It is the ratio of output current to the input current.
( because )
-------------(3)
Where and
Output resistance ( RO):
It is the ratio of output voltage to the output current.
|
When
( ‖ )
( ‖ ) -------------------(4)
3. Calculate the small signal voltage gain of an emitter follower circuit. Given β = 100,
VBE(on) = 0.7V,VA = 80V,I CQ = 0.793mA,VCEQ = 3.4V. (8) [M/J– 16]
4. With neat diagrams, explain the operation and advantages of Darlington pair circuit.(16) [N/D-16]
5. Draw and explain the operation of a Darlington amplifier. (8) [M/J– 16]
In CB, CE and CC configurations, the common collector or emitter follower circuit has high input
impedance upto 500 kΩ. however, the input impedance considering biasing resistors is significantly
less. Because ( ‖ ‖ ). The input impedance can be increased by direct coupling of two
stages of emitter follower.
The methods of improving input impedance are:
Darlington connection or direct coupling
Boot strap technique
Figure – a – Darlington amplifier
Figure shows the Darlington emitter follower or direct coupling of two stages of emitter follower
amplifier. The cascade connection of two emitter followers is called Darlington connection. The
output of the first stage is given to the input of the second stage. It improves high input impedance
and current gain.
Current gain ( )
It is the ratio of output current to the input current.
-----------------(1)
-------------------(2)
therefore
then
( ) --------------- (3)
The output current is given as
( ) ( because )
( ) -------------------(4)
( ( ))
The overall current gain is
=( ( )) --------------------- (5)
----------------------- (6)
Input resistance (Ri)
It is the ratio of input voltage to the input current.
[ ( ) ]
[ ( ) ] ------------------(7)
= = =
= =
Now
= =
Therefore,
[ ( ) ]
[ ( ) ]
------------------------(8)
( ) the overall gain of the Darlington pair is large and also the input resistance
tends to be large, because of the multiplication.
Output resistance ( RO):
It is the ratio of output voltage to the output current.
=
--------------------(9)
Advantages:
The overall gain is large.
Higher input impedance
Disadvantages:
The input resistance of the amplifier is decreased because of the shunting effect of the biasing
resistors.
High leakage current.
6. Enumerate in detail and derive expression for voltage gain of CS and CD amplifier under small
signal low frequency condition. (16) [N/D – 15]
Common Source JFET amplifier with fixed bias
Figure shows common source JFET amplifier with fixed bias. In common source amplifier, input is applied
between gate and source terminal and the output is taken between drain and source terminal.
Small signal ac equivalent circuit of CS JFET amplifier with fixed bias
the fixed bias configuration of JFET CS amplifier has coupling capacitors C1 and C2. Which isolate the dc
biasing from the applied ac input signal and load act as short circuits for the ac analysis. The gate and
source terminal always work in reverse biased which indicates –VGG.
Input impedance (Zi):
From small signal equivalent circuit,
--------------------- (1)
Output impedance ( Zo):
The output impedance is the impedance measured at the output terminal with the input voltage.
When
, , ,
The output impedance is
‖
If
Then
Voltage gain:
It is the ratio of output voltage to the input voltage.
=
Where ( ‖ )
( ‖ )
( ‖ )
( ‖ )
Small signal analysis of Common Drain (Source follower) JFET amplifier
The figure shown below is the common drain (source follower) JFET amplifier. In common drain amplifier,
the input terminal is the gate and output terminal is the source and drain terminal is common to both input
and output. Hence it is called common drain (source follower) configuration. In these circuits, the coupling
capacitors C1 and C2 which isolate the dc biasing from the applied ac input signal and load act as short
circuit for the ac analysis.
Common Drain (source Follower) JFET amplifier
Figure b shows the small signal ac equivalent circuit of common drain JFET amplifier. By replacing the
coupling capacitors and DC power supply with short circuits to get low frequency equivalent circuit.
Input impedance (Zi):
From small signal equivalent circuit,
The output impedance is the impedance measured at the output terminal with the input voltage.
When
, ,
Apply KVL at the output node,
=
= (because V0 = - )
=
[ ]
=
[ ]
[ ]
‖ ‖
Voltage gain:
It is the ratio of output voltage to the input voltage.
Where ( ‖ )
Apply KVL to the input
( ‖ )
Now
( ‖ ) ( ‖ )
= ( ‖ )
= [ ( ‖ )]
( ‖ )
[ ( ‖ )]
If
7. Explain in detail the transfer characteristics of differential amplifier. Explain the methods used to
improve CMRR. (16) [N/D – 15]
8. Derive CMRR of differential amplifier with its equivalent circuit. (16) [ N/ D 14]
Small signal ac analysis of differential amplifier:
Figure shows the small signal equivalent circuit of differential amplifier.
From the equivalent circuit:
Now consider a one- sided output at the collector of Q2 we get
Substitute equation 5 in equation 6
Solving and rearranging the terms in equation (11) we get
9. Consider the circuit shown in Figure9 with the parameters are β=120 and VA=∞. (1)Determine the
current gain, voltage gain, input impedance and output impedance. (2) Find the maximum
undistorted output voltage swing. (12) [A/M – 15]
10. The parameters for each transistor in the circuit in Figure-10 are hfe=100, VA= and VBE(on)=0.7V.
Determine the input and output impedances. (4) [A/M – 15]
1. Apply KVL to the input of Q2
11. For the circuit shown in Figure11, the transistor parameters are hfe=125, VA= ,Vcc=18V,R =4Ω
RE=3k Ω, Rc=4k Ω, R1=25.6k Ω, andR2=10.4k Ω. The input signal is a current source. Determine
its small signal Voltage gain, current gain, current gain, maximum voltage gain and input
impedance. (10) [A/M – 15]
Given:
2) Apply KVL to the input
( )
( because
, so )
( )
Where RB = =
) = = (because )
= 833Ω
) = 0.3 mA
5) = =∞
6) ( )
7)
( ‖ )
8) [ ‖ ‖ ]
( ‖ )
[ ‖ ‖ ]
( )
9) [ ‖ ]
( )
[ ‖ ]
