SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

D Complete PWM Power-Control Function D OR N PACKAGE

(TOP VIEW)
D Totem-Pole Outputs for 200-mA Sink or
Source Current ERROR 1IN+ 2IN+ ERROR
1 16
D Output Control Selects Parallel or AMP 1 1IN− 2 15 2IN− AMP 2
Push-Pull Operation FEEDBACK 3 14 REF
D Internal Circuitry Prohibits Double Pulse at DTC 4 13 OUTPUT CTRL
Either Output CT 5 12 VCC
D Variable Dead-Time Provides Control Over RT 6 11 VC
Total Range SIGNAL GND 7 10 POWER GND

D Internal Regulator Provides a Stable 5-V

OUT1 8 9 OUT2

Reference Supply, Trimmed to 1%

Tolerance
D On-Board Output Current-Limiting
Protection
D Undervoltage Lockout for Low-VCC
Conditions
D Separate Power and Signal Grounds

description/ordering information
The TL598 incorporates all the functions required in the construction of pulse-width-modulated (PWM)
controlled systems on a single chip. Designed primarily for power-supply control, the TL598 provides the
systems engineer with the flexibility to tailor the power-supply control circuits to a specific application.
The TL598 contains two error amplifiers, an internal oscillator (externally adjustable), a dead-time control (DTC)
comparator, a pulse-steering flip-flop, a 5-V precision reference, undervoltage lockout control, and output
control circuits. Two totem-pole outputs provide exceptional rise- and fall-time performance for power FET
control. The outputs share a common source supply and common power ground terminals, which allow system
designers to eliminate errors caused by high current-induced voltage drops and common-mode noise.
The error amplifier has a common-mode voltage range of 0 V to VCC − 2 V. The DTC comparator has a fixed
offset that prevents overlap of the outputs during push-pull operation. A synchronous multiple supply operation
can be achieved by connecting RT to the reference output and providing a sawtooth input to CT.
The TL598 device provides an output control function to select either push-pull or parallel operation. Circuit
architecture prevents either output from being pulsed twice during push-pull operation. The output frequency
for push-pull applications is one-half the oscillator frequency f O + 1
2 RT CT
ǒ
. For single-ended applications: Ǔ
fO + 1 .
RT CT

ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
PDIP (N) Tube of 25 TL598CN TL598CN
0°C
0 C to 70
70°C
C Tube of 40 TL598CD
SOIC (D) TL598C
Reel of 2500 TL598CDR
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

 
 
   !"   #!$% &"' Copyright  2003, Texas Instruments Incorporated
&!   #" #" (" " 
") !"
&& *+' &! #", &"  ""%+ %!&"
",  %% #""'

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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

FUNCTION TABLE
INPUT/OUTPUT
OUTPUT FUNCTION
CTRL
VI = GND Single-ended or parallel output
VI = REF Normal push-pull operation

functional block diagram

OUTPUT CTRL
(see Function Table)
13
6
RT Oscillator 11
5 1D VC
CT
DTC
≈0.1 V Comparator 8
OUT1
4
DTC C1

Error Amplifier
1 PWM
1IN+ + Comparator
2 1
1IN− −
9
Error Amplifier OUT2
16 Pulse-Steering
2IN+ + Flip-Flop
2 10 POWER
15 −
2IN− GND
12 V
3 CC
FEEDBACK Undervoltage
Reference Lockout Control
Regulator 14
REF
7 SIGNAL
GND
0.7 mA

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Amplifier input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3 V
Collector voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Output current (each output), sink or source, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mA
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the signal ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.

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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

recommended operating conditions

MIN MAX UNIT
VCC Supply voltage 7 40 V
VI Amplifier input voltage 0 VCC−2 V
IO Collector voltage 40 V
IIL Output current (each output), sink or source 200 mA
Current into feedback terminal 0.3 mA
CT Timing capacitor 0.00047 10 µF
RT Timing resistor 1.8 500 kΩ
fosc Oscillator frequency 1 300 kHz
TA Operating free-air temperature 0 70 °C

electrical characteristics over recommended operating free-air temperature range, VCC = 15 V

(unless otherwise noted)
reference section (see Note 4)
PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT
TA = 25°C 4.95 5 5.05
Output voltage (REF) IO = 1 mA V
TA = full range 4.9 5.1
Input regulation VCC = 7 V to 40 V TA = 25°C 2 25 mV
TA = 25°C 1 15
Output regulation IO = 1 mA to 10 mA mV
TA = full range 50
Output voltage change with temperature ∆TA = MIN to MAX 2 10 mV/V
Short-circuit output current§ REF = 0 V −10 −48 mA
† Full range is 0°C to 70°C.
‡ All typical values, except for parameter changes with temperature, are at TA = 25°C.
§ Duration of the short circuit should not exceed one second.
NOTE 4: Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used.

oscillator section, CT = 0.001 µF, RT = 12 kΩ (see Figure 1) (see Note 4)

PARAMETER TEST CONDITIONS† MIN TYP‡ MAX UNIT
Frequency 100 kHz
Standard deviation of frequency¶ All values of VCC, CT, RT, TA constant 100 Hz/kHz
Frequency change with voltage VCC = 7 V to 40 V, TA = 25°C 1 10 Hz/kHz
∆TA = full range 70 120
Frequency change with temperature# Hz/kHz
∆TA = full range, CT = 0.01 µF 50 80
† Full range is 0°C to 70°C.
‡ All typical values, except for parameter changes with temperature, are at TA = 25°C.
¶ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:

s +
Ǹ N
ȍ (xn * X)2
n+1
N*1
# Effects of temperature on external RT and CT are not taken into account.
NOTE 4. Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used.

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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

electrical characteristics over recommended operating free-air temperature range, VCC = 15 V

(unless otherwise noted) (continued)
error amplifier section (see Note 4)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
Input offset voltage FEEDBACK = 2.5 V 2 10 mV
Input offset current FEEDBACK = 2.5 V 25 250 nA
Input bias current FEEDBACK = 2.5 V 0.2 1 µA
0 to
Common-mode input voltage range VCC = 7 V to 40 V V
VCC−2
Open-loop voltage amplification ∆VO (FEEDBACK) = 3 V, VO (FEEDBACK) = 0.5 V to 3.5 V 70 95 dB
Unity-gain bandwidth 800 kHz
Common-mode rejection ratio VCC = 40 V, ∆VIC = 6.5 V, TA = 25°C 65 80 dB
Output sink current (FEEDBACK) FEEDBACK = 0.5 V 0.3 0.7 mA
Output source current (FEEDBACK) FEEDBACK = 3.5 V −2 mA
Phase margin at unity gain FEEDBACK = 0.5 V to 3.5 V, RL = 2 kΩ 65°
Supply-voltage rejection ratio FEEDBACK = 2.5 V, ∆VCC = 33 V, RL = 2 kΩ 100 dB
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE 4. Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used.

electrical characteristics over recommended operating free-air temperature range, VCC = 15 V

(unless otherwise noted)
undervoltage lockout section (see Note 4)
PARAMETER TEST CONDITIONS‡ MIN MAX UNIT
TA = 25°C 4 6
Threshold voltage V
∆TA = full range 3.5 6.9
TA = 25°C 100
Hysteresis§ mV
TA = full range 50
‡ Full range is 0°C to 70°C.
§ Hysteresis is the difference between the positive-going input threshold voltage and the negative-going input threshold voltage.
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

output section (see Note 4)

PARAMETER TEST CONDITIONS MIN MAX UNIT
VCC = 15 V, IO = −200 mA 12
High-level output voltage V
VC = 15 V IO = −20 mA 13
VCC = 15 V, IO = 200 mA 2
Low-level output voltage V
VC = 15 V IO = 20 mA 0.4
VI = Vref 3.5 mA
Output-control input current
VI = 0.4 V 100 µA
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

electrical characteristics over recommended operating free-air temperature range, VCC = 15 V

(unless otherwise noted) (continued)
dead-time control section (see Figure 1) (see Note 4)
PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
Input bias current (DTC) VI = 0 to 5.25 V −2 −10 µA
Maximum duty cycle, each output DTC = 0 V 0.45
Zero duty cycle 3 3.3
Input threshold voltage (DTC) V
Maximum duty cycle 0
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

pwm comparator section (see Note 4)

PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
Input threshold voltage (FEEDBACK) DTC = 0 V 3.75 4.5 V
Input sink current (FEEDBACK) V(FEEDBACK) = 0.5 V 0.3 0.7 mA
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

total device (see Figure 1) (see Note 4)

PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT
RT = Vref, VCC = 15 V 15 21
Standby supply current All other inputs and outputs open mA
VCC = 40 V 20 26
Average supply current DTC = 2 V 15 mA
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

switching characteristics, TA = 25°C (see Note 4)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output-voltage rise time CL = 1500 pF, VC = 15 V, VCC = 15 V, 60 150
ns
Output-voltage fall time See Figure 2 35 75
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.

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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

PARAMETER MEASUREMENT INFORMATION

15 V Output
VC
12
VCC
1 16
IN+ ERROR ERROR IN+
2 AMP 1 AMP 2 15
IN− IN−
50 kΩ
3
Test FEEDBACK
4 14 POWER GND
Inputs DTC REF
5 13
CT OUTPUT CTRL OUTPUT CONFIGURATION
6 11
RT VC 15 V
0.001 µF 8
OUT1 OUTPUT 1
12 kΩ −
9 VI
7 OUT2 OUTPUT 2
SIGNAL GND + FEEDBACK
10
POWER GND
REF −
+
MAIN DEVICE TEST CIRCUIT

ERROR-AMPLIFIER TEST CIRCUIT

Figure 1. Test Circuits

VC

90% 90%

Output

CL = 1500 pF 10% 10%

0V
tr tf
POWER GND

OUTPUT CONFIGURATION OUTPUT-VOLTAGE WAVEFORM

Figure 2. Switching Output Configuration and Voltage Waveform

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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS
OSCILLATOR FREQUENCY AND
FREQUENCY VARIATION † AMPLIFIER VOLTAGE AMPLIFICATION
vs vs
TIMING RESISTANCE FREQUENCY
100 k 80
VCC = 15 V
VCC = 15 V
40 k
∆VO = 3 V

Amplifier Voltage Amplification − dB

−2% TA = 25°C
fosc − Oscillator Frequency − Hz

10 k −1% 0.001 µF 60

4k 0.01 µF
0%

1k 0.1 µF 40

400
†
Df = 1%
100 20
CT = 1 µF
40

10 0
1k 4k 10 k 40 k 100 k 400 k 1M 1k 10 k 100 k 1M
RT − Timing Resistance − Ω f − Frequency − Hz
† Frequency variation (∆f) is the change in predicted oscillator
Figure 4
frequency that occurs over the full temperature range.

Figure 3

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 PACKAGE OPTION ADDENDUM
www.ti.com 18-Jul-2006

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-9166801QEA OBSOLETE CDIP J 16 TBD Call TI Call TI
TL598CD ACTIVE SOIC D 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL598CDE4 ACTIVE SOIC D 16 40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL598CDR ACTIVE SOIC D 16 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL598CDRE4 ACTIVE SOIC D 16 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL598CN ACTIVE PDIP N 16 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TL598CNE4 ACTIVE PDIP N 16 25 Pb-Free CU NIPDAU N / A for Pkg Type
(RoHS)
TL598MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
TL598MJB OBSOLETE CDIP J 16 TBD Call TI Call TI
TL598QD OBSOLETE SOIC D 16 TBD Call TI Call TI
TL598QDR OBSOLETE SOIC D 16 TBD Call TI Call TI
TL598QN OBSOLETE PDIP N 16 TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1
 MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX

0.342 0.358 0.307 0.358

19 11 20
(8,69) (9,09) (7,80) (9,09)
20 10 0.442 0.458 0.406 0.458
28
(11,23) (11,63) (10,31) (11,63)
21 9
B SQ 0.640 0.660 0.495 0.560
22 8 44
(16,26) (16,76) (12,58) (14,22)
A SQ
23 7 0.739 0.761 0.495 0.560
52
(18,78) (19,32) (12,58) (14,22)
24 6
0.938 0.962 0.850 0.858
68
(23,83) (24,43) (21,6) (21,8)
25 5
1.141 1.165 1.047 1.063
84
(28,99) (29,59) (26,6) (27,0)
26 27 28 1 2 3 4

0.020 (0,51) 0.080 (2,03)

0.010 (0,25) 0.064 (1,63)

0.020 (0,51)
0.010 (0,25)

0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)

0.028 (0,71) 0.045 (1,14)

0.022 (0,54) 0.035 (0,89)
0.050 (1,27)

4040140 / D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

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