W 251 HPQ
Uploaded by
Viktor SteinþórssonW 251 HPQ
Uploaded by
Viktor SteinþórssonW251HPQ/W251HPQ-C/W251HNQ/W251HNQ-C/W255HP/W255HN/W258HPQ/W258HPQ-C/W258HNQ
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Preface
Notebook Computer
W251HPQ/W251HPQ-C/W251HNQ/W251HNQ-C/W255HP/
W255HN/W258HPQ/W258HPQ-C/W258HNQ
Service Manual
Preface
I
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Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
May 2011
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.
II
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Preface
About this Manual
This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the W251HPQ/
W251HPQ-C/W251HNQ/W251HNQ-C/W255HP/W255HN/W258HPQ/W258HPQ-C/W258HNQ series notebook
PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Preface
Appendix A, Part Lists
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
III
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Preface
IMPORTANT SAFETY INSTRUCTIONS
Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit with an AC Input of 100 - 240V, 50 - 60Hz, DC Output
of 19V, 474A (90W) minimum AC/DC Adapter.
Preface
CAUTION
This Computer’s Optical Device is a Laser Class 1 Product
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.
IV
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Preface
Instructions for Care and Operation
The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
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Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Use only approved brands of Unplug the power cord before
peripherals. attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:
• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines). It is
advisable to also re-
move your battery in
order to prevent acci-
dentally turning the
machine on.
VI
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Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.
Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
VII
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Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD/DVD
This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the computer
(e.g. keyboard and mouse) to their ports.
Preface
5. Attach the AC/DC adapter to the DC-In jack at the rear of the
computer, then plug the AC power cord into an outlet, and connect
the AC power cord to the AC/DC adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle (do
not exceed 130 degrees); use the other hand (as illustrated in Figure
1) to support the base of the computer (Note: Never lift the computer
by the lid/LCD).
Shut Down
7. Press the power button to turn the computer “on”.
Note that you should al-
ways shut your com-
puter down by
choosing Shut Down
130 ﾟ from the Start Menu.
Figure 1 This will help prevent
Opening the Lid/LCD/ hard disk or system
Computer with AC/DC problems.
Adapter Plugged-In
VIII
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Preface
Contents
Introduction ..............................................1-1 Top (W258HPQ,W258HNQ) ........................................................ A-5
Bottom ........................................................................................... A-6
Overview .........................................................................................1-1 SATA BLU RAY COMBO ........................................................... A-7
Specifications ..................................................................................1-2 DVD DUAL ................................................................................... A-8
External Locator - Top View with LCD Panel Open ......................1-4 LCD ............................................................................................... A-9
External Locator - Front & Right Side Views .................................1-5 ..................................................................................................... A-10
External Locator - Left Side & Rear View .....................................1-6
External Locator - Bottom View .....................................................1-7 Schematic Diagrams................................. B-1
Mainboard Overview - Top (Key Parts) .........................................1-8 System Block Diagram ...................................................................B-2
Mainboard Overview - Bottom (Key Parts) ....................................1-9 Processor 1/7-DMI, FDI, PEG ........................................................B-3
Mainboard Overview - Top (Connectors) .....................................1-10 Processor 2/7- CLK, MISC .............................................................B-4
Mainboard Overview - Bottom (Connectors) ...............................1-11 Processor 3/7- (DDR3) ...................................................................B-5
Disassembly ...............................................2-1 Processor 4/7- Power ......................................................................B-6
Preface
Processor 5/7- GFX PWR ...............................................................B-7
Overview .........................................................................................2-1
Processor 6/7- GND ........................................................................B-8
Maintenance Tools ..........................................................................2-2
Processor 7/7- RSVD ......................................................................B-9
Connections .....................................................................................2-2
DDR3 SO-DIMM_0 .....................................................................B-10
Maintenance Precautions .................................................................2-3
DDR3 SO-DIMM_1 .....................................................................B-11
Disassembly Steps ...........................................................................2-4
PANEL, INVERTER, CRT ..........................................................B-12
Removing the Battery ......................................................................2-5
VGA PCI-E Interace .....................................................................B-13
Removing the Hard Disk Drive .......................................................2-6
VGA Frame Buffer Interface ........................................................B-14
Removing the Optical (CD/DVD) Device ......................................2-8
VGA Frame Buffer A ...................................................................B-15
Removing the System Memory (RAM) ..........................................2-9
VGA Frame Buffer C ...................................................................B-16
Removing and Installing a Processor ............................................2-11
VGA I/O .......................................................................................B-17
Removing the 3.75G Module ........................................................2-14
VGA NVVDD Cecoupling ...........................................................B-18
Removing the Wireless LAN Module ...........................................2-15
PCH 1/9- RTC, HDA, SATA .......................................................B-19
Removing the Keyboard ................................................................2-16
PCH 2/9- PCIE, SMBUS, CLK ....................................................B-20
Part Lists ..................................................A-1 PCH 3/9- DMI, FDI, PWRGD .....................................................B-21
Part List Illustration Location ........................................................ A-2 PCH 4/9- LVDS, DDI, CRT .........................................................B-22
Top (W251HPQ,W251HNQ) ......................................................... A-3 PCH 4/9- OCI, USB, RSVD .........................................................B-23
Top (W255HP,W255HN) .............................................................. A-4 PCH 6/9- GPIO, CPU ...................................................................B-24
IX
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Preface
PCH 7/9- PWR ............................................................................. B-25 Set the computer to boot from the external drive ...........................C-1
PCH 8/9 POWER ......................................................................... B-26 Use the flash tools to update the BIOS ...........................................C-2
PCH 3/9- GRD ............................................................................. B-27 Restart the computer (booting from the HDD) ...............................C-2
WLAN 3G MINI PCIE ................................................................ B-28
CCD, TPM, MULTI CON ........................................................... B-29
USB2.0, USB3.0 NEC ................................................................. B-30
Card Reader (JMC251 C) ............................................................. B-31
SATA ODD, LED, USB CHARGE ............................................. B-32
HDMI, RJ45 ................................................................................. B-33
AUDIO CODEC ALC269 ........................................................... B-34
KBC-ITE IT8518E ....................................................................... B-35
5VS, 3VS, 3.3VM, 1.5VS CPU ................................................... B-36
VDD3, VDD5 ............................................................................... B-37
Power 0.85VS, 1.8VS, PEX VDD ............................................... B-38
Preface
POWER 1.5V/1.05VS/0.75V ....................................................... B-39
POWER VCORE1 ....................................................................... B-40
POWER VCORE2 ....................................................................... B-41
Power VGA NVVDD ................................................................... B-42
AC IN, CHARGER ...................................................................... B-43
AUDIO BOARD .......................................................................... B-44
CLICK BOARD ........................................................................... B-45
W251HPQ POWER SW BOARD ............................................... B-46
W270HU BRIDGE ODD BOARD .............................................. B-47
W270HU POWER SW BOARD ................................................. B-48
Power Diagram ............................................................................. B-49
Power On SEQ ............................................................................. B-50
Updating the FLASH ROM BIOS......... C-1
To update the FLASH ROM BIOS you must: C-1
Download the BIOS ....................................................................... C-1
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash
drive ................................................................................................ C-1
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Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the W251HPQ/W251HPQ-C/W251HNQ/
W251HNQ-C/W255HP/W255HN/W258HPQ/W258HPQ-C/W258HNQ series notebook computer. Information about
operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information about dri-vers
(e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the computer.
Operating systems (e.g. Windows Vista/ Window 7, etc.) have their own manuals as do application softwares (e.g. word
processing and database programs). If you have questions about those programs, you should consult those manuals.
1.Introduction
The W251HPQ/W251HPQ-C/W251HNQ/W251HNQ-C/W255HP/W255HN/W258HPQ/W258HPQ-C/W258HNQ
series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed description of the upgrade
procedures for each specific component. Please take note of the warning and safety information indicated by the “”
symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
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Introduction
Specifications Processor Options Video Adapter
Intel® Core™ i7 Processor W251HNQ/W251HNQ-C/W255HN/W258HNQ
i7-2820QM (2.30GHz) Intel® GMA HD and NVIDIA® GeForce GT540M
8MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W
i7-2720QM (2.20GHz)
Supports NVIDIA® Optimus Technology
Latest Specification Information Intel Integrated GPU (Intel® GMA HD):
6MB L3 Cache, 32nm, DDR3-1600MHz, TDP 45W
Microsoft DirectX®10.1 Compatible
The specifications listed here are correct at the i7-2630QM (2.00GHz)
time of sending them to the press. Certain items 6MB L3 Cache, 32nm, DDR3-1333MHz, TDP 45W NVIDIA Discrete GPU (NVIDIA® GeForce GT540M):
(particularly processor types/speeds) may be i7-2620M (2.70GHz) 2GB GDDR3 Video RAM
changed, delayed or updated due to the manu-
4MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Microsoft DirectX®11 Compatible
facturer's release schedule. Check with your
service center for more details. Intel® Core™ i5 Processor W251HPQ/W251HPQ-C/W255HP/W258HPQ/W258HPQ-
i5-2540M (2.60GHz), i5-2520M (2.50GHz), C
i5-2410M (2.30GHz)
Intel® GMA HD and NVIDIA® GeForce GT 520M
1.Introduction
3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W
Supports NVIDIA® Optimus Technology
Intel® Core™ i3 Processor
i3-2310M (2.10GHz) Intel Integrated GPU (Intel® GMA HD):
3MB L3 Cache, 32nm, DDR3-1333MHz, TDP 35W Microsoft DirectX®10.1 Compatible
CPU
Core Logic NVIDIA Discrete GPU (NVIDIA® GeForce GT520M):
The CPU is not a user serviceable part. Ac- 1GB GDDR3 Video RAM
cessing the CPU in any way may violate your Intel® HM65 Chipset
Microsoft DirectX®11 Compatible
warranty.
BIOS Memory
One 32Mb SPI Flash ROM
Two 204 Pin SO-DIMM Sockets Supporting DDR3 1333/
AMI BIOS 1600MHz Memory
Memory Expandable up to 8GB
LCD
(The real memory operating frequency depends on the FSB of
W251HNQ/W251HNQ-C/W255HN/W258HNQ the processor.)
15.6" (39.62cm) HD/ HD+ FHD LCD
Security
W251HPQ/W251HPQ-C/W255HP/W258HPQ/W258HPQ-
C BIOS Password
15.6" (39.62cm) HD/ HD+ LCD Security (Kensington® Type) Lock Slot
1 - 2 Specifications
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Introduction
Audio Keyboard Dimensions & Weight
High Definition Audio Compliant Interface Full-size “WinKey” keyboard (with numeric keypad) 374mm (w) * 250mm (d) * 14.3 - 37.2mm (h)
THX TruStudio Pro 2.6kg with ODD & 48.84WH Battery
Pointing Device
2 * Built-In Speakers
Built-In Microphone Built-in Touchpad (scrolling key functionality integrated)
Interface Card Reader
One USB 2.0 Port Embedded Multi-in-1 Card Reader
Two USB 3.0 Ports MMC (MultiMedia Card) / RS MMC
One eSATA Port SD (Secure Digital) / Mini SD / SDHC/ SDXC
One HDMI-Out Port MS (Memory Stick) / MS Pro / MS Duo
One Headphone-Out Jack
One Microphone-In Jack Mini Card Slots
1.Introduction
One RJ-45 LAN Jack Slot 1 for WLAN Module or WLAN and Bluetooth Combo
One External Monitor Port Module
One DC-in Jack (Factory Option) Slot 2 for 3.75G/HSPA Module
Storage Environmental Spec
(Factory Option) One Changeable 12.7mm(h) Optical Device Temperature
Type Drive (Super Multi Drive Module or Blu-Ray Combo Drive Operating: 5°C - 35°C
Module)
Non-Operating: -20°C - 60°C
One Changeable 2.5" 9.5 mm (h) SATA (Serial) HDD
Relative Humidity
Communication Operating: 20% - 80%
Non-Operating: 10% - 90%
Built-In Gigabit Ethernet LAN
(Factory Option) 1.3M/2.0M Pixel USB PC Camera Module Power
(Factory Option) 3.75G/HSPA Mini-Card Module
Full Range AC/DC Adapter
WLAN/ Bluetooth Half Mini-Card Modules: AC Input: 100 - 240V, 50 - 60Hz
(Factory Option) Intel® Centrino® Advanced-N 6230 Wire- DC Output: 19V, 4.74A (90W)
less LAN (802.11a/g/n) + Bluetooth 3.0
(Factory Option) Intel® Centrino® Wireless-N 1030 Wireless 6 Cell Smart Lithium-Ion Battery Pack, 48.84WH
LAN (802.11b/g/n) + Bluetooth 3.0 (Factory Option) 6 Cell Smart Lithium-Ion Battery Pack,
(Factory Option) Third-Party Wireless LAN (802.11b/g/n) + 62.16WH
Bluetooth 3.0
(Factory Option) Third-Party Wireless LAN (802.11b/g/n)
Specifications 1 - 3
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Introduction
Figure 1
External Locator - Top View with LCD Panel Open
Top View
1. PC Camera 1
(Optional)
2. LCD
3. Power Button
4. LED Status
Indicators
5. Keyboard 2
6. Built-In
1.Introduction
Microphone
7. Touchpad &
Buttons
15.6” (39.62cm)
3
4
1 - 4 External Locator - Top View with LCD Panel Open
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Introduction
External Locator - Front & Right Side Views Figure 2
Front View
1. LED Power
Indicator
FRONT VIEW
1.Introduction
Figure 3
Right Side View
1. Microphone-In
RIGHT SIDE VIEW Jack
2. Headphone-Out
Jack
3. USB 2.0 Port
4. Optical Device
1 2 3
4 5 Drive Bay
5. Emergency Eject
Hole
External Locator - Front & Right Side Views 1 - 5
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Introduction
External Locator - Left Side & Rear View
Figure 4
Left Side View
1. DC-In Jack
2. External Monitor /
Port LEFT SIDE VIEW
3. RJ-45 LAN Jack
4. HDMI-Out Port
5. USB 3.0 Ports
6. Vent 4 5 5 8
2 3
7. e-SATA Port 7
1 6
8. Multi-in-1 Card
1.Introduction
Reader
Figure 5 REAR VIEW
Rear View
1. Security Lock Slot
2. Battery
2
1
1 - 6 External Locator - Left Side & Rear View
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Introduction
External Locator - Bottom View
Figure 6
Bottom View
1. Battery
2. Component Bay
1 Cover
3 3. Vent
4. Hard Disk Bay
Cover
3 5. Speakers
1.Introduction
2
3
4
3
Overheating
To prevent your com-
5 5
puter from overhea-
ting, make sure no-
thing blocks any vent
while the computer is
in use.
External Locator - Bottom View 1 - 7
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Introduction
Figure 7 Mainboard Overview - Top (Key Parts)
Mainboard Top
Key Parts
1. KBC-ITE IT8518
2. Audio Codec
ALC269
3. JMICRO JMC251 C
1.Introduction
3 1
2
1 - 8 Mainboard Overview - Top (Key Parts)
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Introduction
Mainboard Overview - Bottom (Key Parts) Figure 8
Mainboard Bottom
Key Parts
1. Memory Slots
DDR3 SO-DIMM
2. CMOS Battery
3. Mini-Card
Connector (WLAN
Module)
6 4. CPU Socket (no
5
CPU installed)
5. Mini-Card
1.Introduction
Connector (3G
4 Module)
6. nVIDIA VGA
7. Platform Controller
Hub
3
2
Mainboard Overview - Bottom (Key Parts) 1 - 9
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Introduction
Figure 9 Mainboard Overview - Top (Connectors)
Mainboard Top
Connectors
1. HDMI-Out Port
2. USB Port 3.0
3. eSATA Port
4. Speaker Cable
Connector 11
5. Microphone 10
Cable Connector
6. Audio Board
Connector
1.Introduction
7. TouchPad Cable 1
Connector 1 9
8. TouchPad Cable
Connector 2 2
9. Keyboard Cable
Connector
10. Switch Board
5 7
Cable Connector 8
11. SIMLOCK 2
3
6
4
1 - 10 Mainboard Overview - Top (Connectors)
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Introduction
Mainboard Overview - Bottom (Connectors) Figure 10
Mainboard Bottom
Connectors
7
1. ODD Connector
8 2. HDD Connector
6 3. CPU Fan Cable
9 Connector
4. Multi-in-1 Card
Reader
5 5. RJ-45 LAN Jack
6. External Monitor
Port
1.Introduction
7. DC-In Jack
8. CCD Cable
Connector
9. LCD Cable
Connector
1
2 4
Mainboard Overview - Bottom (Connectors) 1 - 11
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Introduction
1.Introduction
1 - 12
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Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the W251HPQ/W251HPQ-C/W251HNQ/W251HNQ-
C/W255HP/W255HN/W258HPQ/W258HPQ-C/W258HNQ series notebook’s parts and subsystems. When it comes to
reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
2.Disassembly
repeated here for your convenience.
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a will also provide any possible helpful information. A box with a contains warnings.
An example of these types of boxes are shown in the sidebar.
Warning
Overview 2 - 1
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Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview
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Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re-
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines). It is
damaged. advisable to also re-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. move your battery in
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. order to prevent acci-
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. dentally turning the
6. Peripherals – Turn off and detach any peripherals. machine on.
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
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Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Battery: To remove the Keyboard:
1. Remove the battery page 2 - 5 1. Remove the battery page 2 - 5
2. Remove the keyboard page 2 - 16
To remove the HDD:
1. Remove the battery page 2 - 5
2. Remove the HDD page 2 - 6
To remove the Optical Device:
2.Disassembly
1. Remove the battery page 2 - 5
2. Remove the Optical device page 2 - 8
To remove the System Memory:
1. Remove the battery page 2 - 5
2. Remove the system memory page 2 - 9
To remove and install a Processor:
1. Remove the battery page 2 - 5
2. Remove the processor page 2 - 11
3. Install the processor page 2 - 13
To remove the 3.75G Module:
1. Remove the battery page 2 - 5
2. Remove the 3.75G module page 2 - 14
To remove the Wireless LAN Module:
1. Remove the battery page 2 - 5
2. Remove the WLAN module page 2 - 15
2 - 4 Disassembly Steps
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Disassembly
Removing the Battery Figure 1
1. Turn the computer off, and turn it over. Battery Removal
2. Slide the latch 1 in the direction of the arrow (Figure 1a).
a. Slide the latch and hold it
3. Slide the latch 2 in the direction of the arrow, and hold it in place (Figure 1a). in place.
4. Slide the battery 63 in the direction of the arrow 4 (Figure 1b). b. Slide the battery in the di-
rection of the arrow.
a. b.
2
1 3
2.Disassembly
4
3. Battery
Removing the Battery 2 - 5
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Disassembly
Removing the Hard Disk Drive
Figure 2 The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
HDD Assembly (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as outlined in
Removal Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Locate the HDD bay cover Hard Disk Upgrade Process
and remove the screws.
1. Turn off the computer, and remove the battery (page 2 - 5).
2. Locate the hard disk bay cover and remove screws 1 & 2 (Figure 2a).
2.Disassembly
a.
HDD System Warning
New HDD’s are blank. Before you
begin make sure:
You have backed up any data
you want to keep from your old
HDD.
You have all the CD-ROMs and
1 2 FDDs required to install your op-
erating system and programs.
If you have access to the internet,
download the latest application
and hardware driver updates for
the operating system you plan to
install. Copy these to a remov-
able medium.
• 2 Screws
2 - 6 Removing the Hard Disk Drive
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Disassembly
3. Remove the hard disk bay cover 63 (Figure 3b).
4. Grip the tab and slide the hard disk in the direction of arrow 4 (Figure 3c). Figure 3
5. Lift the hard disk assembly 65 out of the bay 6 (Figure 3d). HDD Assembly
Removal (cont’d.)
6. Remove the screw 7 - 10 and the mylar cover 11 from the hard disk 12 (Figure 3e).
7. Reverse the process to install a new hard disk (do not forget to replace all the screws and covers).
b. Remove the HDD bay
cover.
b. d. c. Grip the tab and slide the
HDD assembly in the di-
rection of the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screws and
6
6 mylar cover.
2.Disassembly
3 3
55
c. e.
7
10 3. HDD Bay Cover
8
5. HDD Assembly
44 11. Mylar Cover
11 12. HDD
9
12 • 4 Screws
Removing the Hard Disk Drive 2 - 7
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Disassembly
Figure 4 Removing the Optical (CD/DVD) Device
Optical Device
1. Turn off the computer, remove the battery (page 2 - 5) and hard disk (page 2 - 6).
Removal
2. Remove the screw at point 1 (Figure 4a).
a. Remove the screw at 3. Use a screwdriver to carefully push out the optical device 3 at point 2 (Figure 4b).
point 1 . 4. Insert the new device and carefully slide it into the computer (the device only fits one way. DO NOT FORCE IT; The
b. Use a screwdriver to screw holes should line up).
carefully push out the 5. Restart the computer to allow it to automatically detect the new device.
optical device at point
2 . a. b.
2.Disassembly
3. Optical Device
• 1 Screw
2 - 8 Removing the Optical (CD/DVD) Device
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Disassembly
Removing the System Memory (RAM) Figure 5
RAM Module
The computer has two memory sockets for 204 pin Small Outline Dual In-line Memory Modules (SO-DIMM) supporting Removal
DDRIII (DDR3) Up to 1066/1333 MHz. The main memory can be expanded up to 8GB. The SO-DIMM modules sup-
ported are 1024MB and 2048MB DDRIII Modules. The total memory size is automatically detected by the POST rou- a. Remove the screws
tine once you turn on your computer. from the component
bay cover.
Memory Upgrade Process b. The RAM modules will
1. Turn off the computer, turn it over and remove the battery (page 2 - 5). be visible at point 5
2. Remove screws 1 - 4 from the component bay cover (Figure 5a). on the mainboard.
c. Pull the release lat-
3. Carefully (a fan and cable are attached to the under side of the cover) lift up the bay cover. ches.
4. Carefully disconnect the fan cable 5 , and remove the cover (Figure 5b). d. Remove the module.
5. The RAM modules will be visible at point 6 on the mainboard.
2.Disassembly
a.
b. Contact Warning
1
2 Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest
3
hands have oils which
can attract particles, and
4 degrade the module’s
performance.
6 5
• 4 Screws
Removing the System Memory (RAM) 2 - 9
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Disassembly
Figure 6 6. Gently pull the two release latches ( 7 & 8 ) on the sides of the memory socket in the direction indicated by the
RAM Module arrows (Figure 5c). The RAM module 8 will pop-up (Figure 5d), and you can then remove it.
Removal (cont’d) 7. Pull the latches to release the second module if necessary.
8. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
c. Pull the release lat- 9. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
ches. as it will go. DO NOT FORCE IT; it should fit without much pressure.
d. Remove the module. 10. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
11. Replace the component bay cover and the screws (see page 2 - 9).
12. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
c. d.
8
2.Disassembly
Contact Warning
Be careful not to touch
the metal pins on the
9
module’s connecting
edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
module’s performance.
• 9 RAM
2 - 10 Removing the System Memory (RAM)
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Disassembly
Removing and Installing a Processor Figure 7
Processor Removal Procedure Processor Removal
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 8). a. The CPU heat sink will
2. The CPU heat sink will be visible at point A (Figure 7a). be visible at point A .
3. Loosen the CPU heat sink screws in the order 6 , 5 , 4 , 3 , 2 & 1 (the reverse order as indicated on the Remove the screws from
label Figure 7a). the CPU heatsink.
4. Grip the heat sink tab and carefully lift the heat sink 7 up and off the computer (Figure 7b). b. Grip the heat sink tab
and carefully lift the heat
sink up and off the com-
a. puter.
6 5
1 A
2.Disassembly
2 4
b.
7
7. Heat Sink
• 6 Screws
Removing and Installing a Processor 2 - 11
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Disassembly
5. Turn the release latch 5 towards the unlock symbol to release the CPU (Figure 8d).
Figure 8 6. Carefully (it may be hot) lift the CPU 6 up and out of the socket (Figure 8e).
Processor Removal 7. Reverse the process to install a new CPU.
(cont’d) 8. When re-inserting the CPU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE IT!).
c. Turn the release latch to
unlock the CPU. c.
d. Lift the CPU out of the
socket.
5 5
2.Disassembly
Unlock Lock
d.
Caution
6 The heat sink, and CPU area in
general, contains parts which are
subject to high temperatures. Allow
the area time to cool before remov-
ing these parts.
6. CPU
2 - 12 Removing and Installing a Processor
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Disassembly
Processor Installation Procedure Figure 9
1. Insert the CPU A (Figure 9a), pay careful attention to the pin alignment, it will fit only one way (DO NOT FORCE Processor
IT!), and turn the release latch B towards the lock symbol (Figure 9b). Installation
2. Remove the sticker C (Figure 9c) from the heat sink.
3. Insert the heat sink D as indicated in Figure 9d. a. Insert the CPU.
4. Tighten the CPU heat sink screws in the order r 1 , 2 , 3 , 4 ,, 5 & 3 (the order as indicated on the label and b. Turn the release latch to-
wards the lock symbol.
Figure 9d).
c. Remove the sticker from
5. Replace the component bay cover (don’t forget to replace the fan cable) and tighten the screws (page 2 - 9). the heat sink and insert
the heat sink.
a. c. d. Tighten the screws.
2.Disassembly
C
b. d.
D
6 4
B 1
5
2
A. CPU
3 Note: D. Heat Sink
Tighten the screws
in the order as indi- • 3 Screws
cated on the label.
Removing and Installing a Processor 2 - 13
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Disassembly
Figure 10 Removing the 3.75G Module
3G Module Removal
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
2. The 3.75G module will be visible at point 1 on the mainboard (Figure 10a).
a. Locate the 3.75G mod-
ule.
3. Carefully disconnect the cable 2 , and then remove the screw 3 (Figure 10b).
b. Disconnect the cable 4. The 3.75G module 4 (Figure 10c) will pop-up, and you can remove it from the computer (Figure 10d).
and remove the screw.
c. The module will pop-up.
d. Remove the 3.75G mod-
ule. a. c. d.
1 4
Note: Make sure you
2.Disassembly
reconnect the antenna
cable to socket.
a.
b. 4
4. 3.75G Module
2
3
• 1 Screw
2 - 14 Removing the 3.75G Module
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Disassembly
Removing the Wireless LAN Module Figure 11
Wireless LAN
1. Turn off the computer, turn it over, and remove the battery (page 2 - 5) and the component bay cover (page 2 - 9).
Module Removal
2. The Wireless LAN module will be visible at point 1 on the mainboard (Figure 11a).
3. Carefully disconnect the cables 2 - 3 , and then remove the screw 4 (Figure 11b).
a. Locate the WLAN.
4. The Wireless LAN module 4 (Figure 11c) will pop-up, and you can remove it from the computer. b. Disconnect the cable
and remove the screw.
c. c. The WLAN module will
a. pop up.
Note: Make sure you
reconnect the antenna
2.Disassembly
cable to the “1 + 2”
4 socket (Figure 11b).
1
b.
3
4.Wireless LAN Module
2 • 2 Screw
Removing the Wireless LAN Module 2 - 15
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Disassembly
Figure 12 Removing the Keyboard
Keyboard Removal
1. Turn off the computer, and remove the battery (page 2 - 5).
a. Remove screws from the 2. Remove screws 1 - 4 from the bottom of the computer. Press at points 5 to unsnap the LED cover module 6
bottom of the computer. (you may need to use the Eject Pin Tool to do this (Figure 12a).
Press at points 5 to un-
3. Remove the LED cover module 6 and screws 7 - 11 from the keyboard (Figure 12b).
snap the LED cover
module. 4. Carefully lift the keyboard up, being careful not to bend the keyboard ribbon cable 12 . Disconnect the keyboard
b. Remove the LED cover ribbon cable 12 from the locking collar socket 13 (Figure 12c)
module and screws 5. Carefully lift up the keyboard 14 (Figure 12d) off the computer.
from the keyboard. a. c.
c. Carefully lift the key-
board up and disconnect 12
the keyboard ribbon ca- 1 2 3 4
ble from the locking col- 5 5 13
2.Disassembly
lar socket.
d. Remove the keyboard.
Re-Inserting the
Keyboard b. d.
When re-inserting the 7 8 9 10 11
keyboard firstly align the
four keyboard tabs at the
bottom (Figure 12c) at
the bottom of the key-
board with the slots in the
case.
14
6
6. LED Cover Module
14. Keyboard
Keyboard Tabs
• 9 Screws
2 - 16
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Appendix A:Part Lists
This appendix breaks down the W251HPQ/W251HPQ-C/W251HNQ/W251HNQ-C/W255HP/W255HN/W258HPQ/
W258HPQ-C/W258HNQ series notebook’s construction into a series of illustrations. The component part numbers are
indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
A.Part Lists
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
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Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
W251HPQ/W251HPQ-C/ W258HPQ/W258HPQ-C/
Location Part W255HP/W255HN
W251HNQ/W251HNQ-C W258HNQ
Top page A - 3
Top page A - 4
Top page A - 5
Bottom page A - 6
A.Part Lists
SATA BLU RAY COMBO page A - 7
DVD Dual Drive page A - 8
LCD page A - 9
A - 2
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Top (W251HPQ,W251HNQ)
Figure A - 1
A.Part Lists
Top
(W251HPQ,W251H
NQ)
非耐落
灰色
Top (W251HPQ,W251HNQ) A - 3
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Top (W255HP,W255HN)
Figure A - 2
Top
A.Part Lists
(W255HP,W255HN)
非耐落
灰色
A - 4 Top (W255HP,W255HN)
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Top (W258HPQ,W258HNQ)
Figure A - 3
Top
A.Part Lists
(W258HPQ,W258H
NQ)
非耐落
非耐落
灰色
保護膜
Top (W258HPQ,W258HNQ) A - 5
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Bottom
Figure A - 4
A.Part Lists
Bottom
A - 6 Bottom
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SATA BLU RAY COMBO
Figure A - 5
SATA BLU RAY
A.Part Lists
COMBO
非耐落
志精
SATA BLU RAY COMBO A - 7
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DVD DUAL
Figure A - 6
A.Part Lists
DVD DUAL
非 耐落
志精
A - 8 DVD DUAL
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LCD
Figure A - 7
LCD
A.Part Lists
頭厚
非耐落
中性
LCD A - 9
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A.Part Lists
A - 10
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Schematic Diagrams
Appendix B: Schematic Diagrams
This appendix has circuit diagrams of the W251HPQ/W251HPQ-C/W251HNQ/W251HNQ-C/W255HP/W255HN/
W258HPQ/W258HPQ-C/W258HNQ notebook’s PCB’s. The following table indicates where to find the appropriate
schematic diagram.
Table B - 1
Diagram - Page Diagram - Page Diagram - Page
SCHEMATIC
System Block Diagram - Page B - 2 PCH 1/9- RTC, HDA, SATA - Page B - 19 5VS, 3VS, 3.3VM, 1.5VS CPU - Page B - 36
DIAGRAMS
Processor 1/7-DMI, FDI, PEG - Page B - 3 PCH 2/9- PCIE, SMBUS, CLK - Page B - 20 VDD3, VDD5 - Page B - 37
B.Schematic Diagrams
Processor 2/7- CLK, MISC - Page B - 4 PCH 3/9- DMI, FDI, PWRGD - Page B - 21 Power 0.85VS, 1.8VS, PEX VDD - Page B - 38
Processor 3/7- (DDR3) - Page B - 5 PCH 4/9- LVDS, DDI, CRT - Page B - 22 POWER 1.5V/1.05VS/0.75V - Page B - 39
Processor 4/7- Power - Page B - 6 PCH 4/9- OCI, USB, RSVD - Page B - 23 POWER VCORE1 - Page B - 40
Processor 5/7- GFX PWR - Page B - 7 PCH 6/9- GPIO, CPU - Page B - 24 POWER VCORE2 - Page B - 41
Processor 6/7- GND - Page B - 8 PCH 7/9- PWR - Page B - 25 Power VGA NVVDD - Page B - 42
Processor 7/7- RSVD - Page B - 9 PCH 8/9 POWER - Page B - 26 AC IN, CHARGER - Page B - 43
Version Note
DDR3 SO-DIMM_0 - Page B - 10 PCH 3/9- GRD - Page B - 27 AUDIO BOARD - Page B - 44
The schematic dia-
DDR3 SO-DIMM_1 - Page B - 11 WLAN 3G MINI PCIE - Page B - 28 CLICK BOARD - Page B - 45
grams in this chapter
PANEL, INVERTER, CRT - Page B - 12 CCD, TPM, MULTI CON - Page B - 29 W251HPQ POWER SW BOARD - Page B - 46 are based upon ver-
sion 6-7P-W25p6-001
VGA PCI-E Interace - Page B - 13 USB2.0, USB3.0 NEC - Page B - 30 W270HU BRIDGE ODD BOARD - Page B - 47
If your mainboard (or
VGA Frame Buffer Interface - Page B - 14 Card Reader (JMC251 C) - Page B - 31 W270HU POWER SW BOARD - Page B - 48 other boards) are a lat-
er version, please
VGA Frame Buffer A - Page B - 15 SATA ODD, LED, USB CHARGE - Page B - 32 Power Diagram - Page B - 49
check with the Service
VGA Frame Buffer C - Page B - 16 HDMI, RJ45 - Page B - 33 Power On SEQ - Page B - 50 Center for updated di-
agrams (if required).
VGA I/O - Page B - 17 AUDIO CODEC ALC269 - Page B - 34
VGA NVVDD Cecoupling - Page B - 18 KBC-ITE IT8518E - Page B - 35
B - 1
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Schematic Diagrams
System Block Diagram
VDD3,VDD5
W251HPQ/ W251HNQ W251HPQ 6I N1 6-7P-W25P6-001
W251HPQ MAIN BOARD
GPU NVDIDA GV2 NVVDD Huron River System Block Diagram 6-71-W25P0-D02
PCIE*8 AUDIO BOARD
5V,3V,5VS,3VS,1.5VS, P HO NE J AC K x2 , US B x1
6-71-W25P8-D02
1.8VS,+1.5S_CPU Sandy Bridge
800/1067/1333 MHz CLICK BOARD
1.8V, PEX_VDD,0.85VS Nvidia PROCESSOR 6-71-W25P2-D02
DDR3 / 1.5V DDRIII
Fermi N12P rPGA989/988
RAM SIZE:1~2GB SO-DIMM2 W251HPQ POWER SW B'd
1.5V,0.75VS(VTT_MEM) 6-71-W25PS-D02
(64MX16) SYSTEM SMBUS
FBVDDQ DDRIII
B.Schematic Diagrams
969 Balls 0. 1"~ 13 W270HU POWER SW B'd
FDI DMI*4 SO-DIMM1 6-71-W25PS-D11
1.05VS_VTT 0. 5" ~5 .5 " <= 8" AU DI O BO AR D W270HU BRIDGE ODD B'd
6-71-W25PN-D01
< 8"
LC
CR DT CO
CO NN
NN EC
EC TO
TO RR < 15" INT SPKER-R
VGFX_CORE MIC HP
Sheet 1 of 49 IN OUT
HD MI C on ne ct or CougarPoint U SB P OR T (U SB 1)
System Block S EN TEL IC Controller (INT SPK R)
6-49-C 4102-010
Diagram T OUCKCHBOPA
CLI ARDD EC /B IO S SP I Hub (PCH)
T PM 1 .2
Op ti on al
INT SPKER-L
32.768 KHz Az al ia C od ec
25x25mm
EC LPC REALTAK
I TE 8 51 8E 33 MHz 989 Ball FCBGA ALC269
128pins LQFP 0. 5" ~1 1" INT MIC
SHEET
1 4*14 *1. 6mm 18,19,20,21,22,23,24,25,26
24 MHz AZALIA LINK
IN T. K/ B EC SMBUS
25
PCIE 100 MHz <1 2" MH z
TH ER MA L S MA RT S MA RT
SE NS OR F AN B AT TE RY
G711ST9U A C- IN 32.768KHz
M in i PC IE Mi ni P CI E JM IC RO
S OC KE T S OC KE T JMC251_C
SATA I/II 3.0Gb/s USB2.0 3 G MS AT A CA RD WL AN CARD
< 12 " U SB 3. 0 (U SB 2/ SA TA 3) ( US B3 )
480 Mbps NE C LAN READER
(Optional)
u PD 72 02 00
1" ~1 6" (Lo w Power)
7I N1
SA TA H DD SA TA O DD eS AT A RJ -4 5 SO CK ET
U SB P OR T US B PO RT 1 C CD
(U SB 8) ( US B0 ) (U SB 5)
US B PO RT 2 US B PO RT 3
W2 70 HU
BR ID GE OD D BO AR D
U SB 2.0 /U SB 3. 0
B - 2 System Block Diagram
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Schematic Diagrams
Processor 1/7-DMI, FDI, PEG
CPU Sandy Bridge Processor 1/7 ( DMI,PEG,FDI )
H9 H1 7 H1 3
H6 _ 3 D4 _ 4 H6 _ 3 D4 _ 4 H6 _ 3 D4 _ 4
1 . 0 5V S _ V T T
U2 9 A
J 22 20 mil P E G _I R C O M P _ R R 421 24 . 9 _ 1 % _0 4
P E G _ I C O MP I J 21
B 27 P E G_ I C OM P O H2 2
20 D M I _T X N 0 B 25 DM I_ RX # [0 ] P E G _ R C OM P O
20 D M I _T X N 1 A 25 DM I_ RX # [1 ]
20 D M I _T X N 2 B 24 DM I_ RX # [2 ] K3 3
20 D M I _T X N 3 DM I_ RX # [3 ] P E G _R X # [ 0] P E G_ R X# 0 12
M3 5
B 28 P E G _R X # [ 1] L 34 P E G_ R X# 1 12
20 D M I _T X P 0 B 26 DM I_ RX [0 ] P E G _R X # [ 2] J 35 P E G_ R X# 2 12
20 D M I _T X P 1 DM I_ RX [1 ] P E G _R X # [ 3] P E G_ R X# 3 12
A 24 J 32
20 D M I _T X P 2 B 23 DM I_ RX [2 ] P E G _R X # [ 4] H3 4 P E G_ R X# 4 12
P E G_ R X# 5 12
DMI
20 D M I _T X P 3 DM I_ RX [3 ] P E G _R X # [ 5] H3 1
P E G _R X # [ 6] P E G_ R X# 6 12
G 21 G3 3
20 D MI _ R XN 0 E 22 D M I _ TX # [ 0 ] P E G _R X # [ 7] G3 0 P E G_ R X# 7 12
20 D MI _ R XN 1 F 21 D M I _ TX # [ 1 ] P E G _R X # [ 8] F35
20 D MI _ R XN 2 D 21 D M I _ TX # [ 2 ] P E G _R X # [ 9] E3 4
20 D MI _ R XN 3 D M I _ TX # [ 3 ] P E G _ R X # [ 1 0] E3 2
G 22 P E G _ R X # [ 1 1] D3 3
20 D MI _ R XP 0 D 22 D M I _ TX [ 0 ] P E G _ R X # [ 1 2] D3 1
20 D MI _ R XP 1 D M I _ TX [ 1 ] P E G _ R X # [ 1 3] PEG Compensation Signal
B.Schematic Diagrams
F 20 B3 3
20 D MI _ R XP 2 C 21 D M I _ TX [ 2 ] P E G _ R X # [ 1 4] C3 2
20 D MI _ R XP 3 D M I _ TX [ 3 ] P E G _ R X # [ 1 5]
PCI EXPRESS* - GRAPHICS
J 33
CAD NOTE: PEG_ICOMPI and RCOMPO signals
P E G_ R X [ 0] L 35 P E G_ R X0 12
P E G_ R X [ 1] P E G_ R X1 12 should be shorted and routed with
K3 4
A 21 P E G_ R X [ 2] H3 5 P E G_ R X2 12 - max length = 500 mils
20 FD I _ T XN 0 H 19 F D I 0 _ T X #[ 0 ] P E G_ R X [ 3] H3 2 P E G_ R X3 12
20 FD I _ T XN 1 F D I 0 _ T X #[ 1 ] P E G_ R X [ 4] P E G_ R X4 12 - typical impedance = 43 mohms
E 19 G3 4
20 FD I _ T XN 2 F 18 F D I 0 _ T X #[ 2 ] P E G_ R X [ 5] G3 1 P E G_ R X5 12 PEG_ICOMPO signals should be routed with
20 FD I _ T XN 3 F D I 0 _ T X #[ 3 ] P E G_ R X [ 6] P E G_ R X6 12
B 21 F33
- max length = 500 mils
Intel( R) FDI
20 FD I _ T XN 4 F D I 1 _ T X #[ 0 ] P E G_ R X [ 7] P E G_ R X7 12
C 20 F30
20 FD I _ T XN 5 D 18 F D I 1 _ T X #[ 1 ] P E G_ R X [ 8] E3 5 - typical impedance = 14.5 mohms
20 FD I _ T XN 6 E 17 F D I 1 _ T X #[ 2 ] P E G_ R X [ 9] E3 3
20 FD I _ T XN 7 F D I 1 _ T X #[ 3 ] P E G _R X [ 1 0] F32
P E G _R X [ 1 1] D3 4
P E G _R X [ 1 2]
CAD NOTE: DP_COMPIO and ICOMPO signals
20
20
20
FD
FD
FD
I _ T XP
I _ T XP
I _ T XP
0
1
2
A 22
G 19
E 20
G 18
F D I 0 _ T X [ 0]
F D I 0 _ T X [ 1]
F D I 0 _ T X [ 2]
P E G _R X [ 1 3]
P E G _R X [ 1 4]
P E G _R X [ 1 5]
E3 1
C3 3
B3 2
Sheet 2 of 49
Processor 1/7-DMI,
should be shorted near balls and routed with 20 FD I _ T XP 3 B 20 F D I 0 _ T X [ 3] M2 9 PEG _ TX # _ 0 C5 4 5 0. 22 u _ 1 0V _ X 5 R _ 0 4
20 FD I _ T XP 4 C 19 F D I 1 _ T X [ 0] P E G_ T X # [ 0] M3 2 PEG _ TX # _ 1 C5 4 2 0. 22 u _ 1 0V _ X 5 R _ 0 4 P E G_ T X # 0 12
- typical impedance < 25 mohms 20 FD I _ T XP 5 D 19 F D I 1 _ T X [ 1] P E G_ T X # [ 1] M3 1 PEG _ TX # _ 2 C5 5 0 0. 22 u _ 1 0V _ X 5 R _ 0 4
P E G_ T X # 1 12
20 FD I _ T XP 6 F 17 F D I 1 _ T X [ 2] P E G_ T X # [ 2] L 32 PEG _ TX # _ 3 P E G_ T X # 2 12
C5 5 4 0. 22 u _ 1 0V _ X 5 R _ 0 4
20
20
FD I _ T XP
F DI_ F S Y NC 0
7
J 18
J 17
F D I 1 _ T X [ 3]
F DI0 _ F S Y NC
P E G_ T X # [ 3]
P E G_ T X # [ 4]
P E G_ T X # [ 5]
L 29
K3 1
K2 8
PEG
PEG
PEG
_ TX # _ 4
_ TX # _ 5
_ TX # _ 6
C5 5 6
C5 6 1
C5 6 7
0.
0.
0.
22 u _ 1 0V _ X 5 R _ 0 4
22 u _ 1 0V _ X 5 R _ 0 4
22 u _ 1 0V _ X 5 R _ 0 4
P
P
P
P
E G_ T X # 3
E G_ T X # 4
E G_ T X # 5
E G_ T X # 6
12
12
12
12
FDI, PEG
1 .0 5 V S_ VT T 20 F DI_ F S Y NC 1 F DI1 _ F S Y NC P E G_ T X # [ 6] J 30 PEG _ TX # _ 7 C5 6 9 0. 22 u _ 1 0V _ X 5 R _ 0 4
H 20 P E G_ T X # [ 7] J 28 P E G_ T X # 7 12
20 F DI_ IN T F DI_ IN T P E G_ T X # [ 8] H2 9
1. 0 5 V S _ V T T J 19 P E G_ T X # [ 9] G2 7
R 43 1 20 F DI_ L S Y NC 0 H 17 F DI0 _ L SY N C P E G _T X # [ 1 0] E2 9
20 F DI_ L S Y NC 1 F DI1 _ L SY N C P E G _T X # [ 1 1] F27
P E G _T X # [ 1 2] D2 8
2 4. 9_ 1 % _ 04
R 43 2 P E G _T X # [ 1 3] F26
P E G _T X # [ 1 4] E2 5
E D P _ C O MP I O A 18 P E G _T X # [ 1 5]
* 1K _1 % _ 0 4
A 17 eD P _ C O MP I O M2 8 PEG _ TX _ 0 C5 4 0 0. 22 u _ 1 0V _ X 5 R _ 0 4
DP Compensation Signal E D P _H P D # B 16 eD P _ I C OM P O P E G_ T X [ 0] M3 3 PEG _ TX _ 1 P E G_ T X 0 12
C5 4 3 0. 22 u _ 1 0V _ X 5 R _ 0 4
eD P _ H P D P E G_ T X [ 1] M3 0 PEG _ TX _ 2 C5 4 7 0. 22 u _ 1 0V _ X 5 R _ 0 4 P E G_ T X 1 12
12/1 12/2 P E G_ T X 2 12
D
P E G_ T X [ 2] L 31 PEG _ TX _ 3 C5 5 3 0. 22 u _ 1 0V _ X 5 R _ 0 4
D P _ A U X _P C 15 P E G_ T X [ 3] L 28 PEG _ TX _ 4 P E G_ T X 3 12
Q 34 11 e DP _ A U X P C 208 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 C5 5 5 0. 22 u _ 1 0V _ X 5 R _ 0 4 P E G_ T X 4 12
G * MT N 7 0 0 2 Z H S 3 C 199 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 D P _ A U X _N D 15 eD P _ A U X P E G_ T X [ 4] K3 0 PEG _ TX _ 5 C5 6 0 0. 22 u _ 1 0V _ X 5 R _ 0 4
11 E M B _ HP D 11 e DP _ A U X N eD P _ A U X# P E G_ T X [ 5] K2 7 PEG _ TX _ 6 P E G_ T X 5 12
C5 6 5 0. 22 u _ 1 0V _ X 5 R _ 0 4
P E G_ T X [ 6] P E G_ T X 6 12
S
J 29 PEG _ TX _ 7 C5 6 8 0. 22 u _ 1 0V _ X 5 R _ 0 4
eDP
C 17 P E G_ T X [ 7] J 27 P E G_ T X 7 12
R 52 2 C 185 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X P _ 0
11 e DP _ T X P 0 DP _ T X P _ 1 F 16 eD P _ T X [ 0] P E G_ T X [ 8] H2 8
11 e DP _ T X P 1 C 193 *0 . 1 u_ 1 0 V _ X 7R _ 0 4
* 10 0 K _ 0 4 C 186 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X P _ 2 C 16 eD P _ T X [ 1] P E G_ T X [ 9] G2 8
11 e DP _ T X P 2 G 15 eD P _ T X [ 2] P E G_ T X [ 1 0] E2 8
C 700 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X P _ 3
11 e DP _ T X P 3 eD P _ T X [ 3] P E G_ T X [ 1 1] F28 Q1 5
C 187 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X N_ 0 C 18 P E G_ T X [ 1 2] D2 7 5 1
11 e DP _ T X N0
C 195 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X N_ 1 E 16 eD P _ T X #[ 0 ] P E G_ T X [ 1 3] E2 6 GN D NC 2 SC70-5 & SC70-3
11 e DP _ T X N1 C 192 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X N_ 2 D 16 eD P _ T X #[ 1 ] P E G_ T X [ 1 4] D2 5 G ND
11 e DP _ T X N2
C 701 *0 . 1 u_ 1 0 V _ X 7R _ 0 4 DP _ T X N_ 3 F 15 eD P _ T X #[ 2 ] P E G_ T X [ 1 5] 4 3 Co-lay
12/1 11 e DP _ T X N3 eD P _ T X #[ 3 ] V CC VO
*T M P 2 0
P Z 9 8 8 27 -3 6 4 B -0 1F 3 .3 V
Q1 4
2 1
M 6-86-27988-000 V CC OU T 1:2 (4mils:8mils) T H E R M _ V OL T 34
S 6-86-27988-001 C2 6 6
S 6-86-27988-002 3 C2 6 4
GN D
0 . 1u _ 1 0 V _ X5 R _ 04 G7 1 1 S T 9 U 0 . 1 u_ 1 0 V _ X 5R _ 0 4
1
3
2
PLACE NEAR U2
3, 5 , 2 3 , 2 4 , 2 5, 3 5 , 3 7 , 3 9 1 . 0 5V S _ V T T
3 , 8 , 11 , 1 6 , 1 8 , 19 , 2 0 , 2 2 , 2 3, 2 4 , 2 5 , 2 7, 2 8 , 2 9 , 3 0, 35 , 3 7 , 3 8 , 39 3 .3 V
Processor 1/7-DMI, FDI, PEG B - 3
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Schematic Diagrams
Processor 2/7- CLK, MISC
PU/PD for JTAG signals
Processor Pull downs Sandy Bridge Processor 2/7 ( CLK,MISC,JTAG ) 1 . 0 5V S _V T T
1 0 K _ 04 R3 9 9 H _ C P U P W R GD _ R XD P _ TM S R4 1 6 51 _ 0 4
XD P _ TD I _ R R4 1 4 51 _ 0 4
XD P _ PRE Q # R4 1 5 *5 1 _0 4
TRACE WIDTH 10MIL, LENGTH <500MILS XD P _ TD O_ R R4 1 8 51 _ 0 4
XD P _ TC L K R4 2 0 51 _ 0 4
XD P _ TR S T # R4 1 0 51 _ 0 4
U 2 9B
3 .3 VS
XDP _ D B R_ R R4 0 3 1 K_ 0 4
A2 8
H _ SNB _ IV B# C2 6 B CL K A2 7 C L K _ B C LK 1 9
23 H _S N B _ I V B # P R OC _S E LE C T # BCL K# C L K _ B C LK # 19
MISC
CLOCKS
AN3 4
S K T O CC # A1 6
D P L L_ R E F _ S S C L K CL K _ D P 1 9
A1 5
D P L L _R E F _ S S C L K # CL K _ D P # 1 9 DDR3 Compensation Signals
H_ C AT E RR # A L3 3 S M_ R C OM P _ 0 R4 4 6 14 0 _ 1% _ 0 4
C A TE R R #
S M_ R C OM P _ 1 R4 4 2 25 . 5 _ 1% _ 0 4
R4 0 0 *1 0 mi l _ sh o rt _ 04 H_ PE C I_ R AN3 3 R 8 C P U _D R A M R S T # S M_ R C OM P _ 2 R4 4 3 20 0 _ 1% _ 0 4
THERMAL
2 3, 3 4 H_ P E CI PEC I S M _ D R A MR S T#
B.Schematic Diagrams
If PR OC HO T# i s not u se d,
MISC
DDR3
th en it m us t be te rm in at ed R9 1 5 6 _1 % _ 0 4 H _ P R OC H O T# _ R A L3 2 AK 1 S M_ R C OM P _ 0
wi th a 56 -O + -5 % p ul l- up 39 H _P R OC H O T # P R OC H O T# S M _R C O MP [ 0 ] A5 S M_ R C OM P _ 1
S M _R C O MP [ 1 ] A4 S M_ R C OM P _ 2
re sis to r to 1 .0 5VS _V TT . S M _R C O MP [ 2 ]
R4 0 1 *1 0 mi l _ sh o rt _ 04 H _ T H R MT R I P #_ R AN3 2
23 H _ TH R M T R I P # T H E R MT R I P #
Sheet 3 of 49 S3 circuit:- DRAM_RST# to memory
should be high during S3
A P 29 XD P _ P R D Y #
Processor 2/7-CLK, P RD Y#
P R E Q#
A P 27
AR 2 6
XD P _ P R E Q #
XD P _ TC L K R 22 2 *0 _ 04
1. 5 V
T CK AR 2 7 XD P _ TM S
MISC R4 0 2 *1 0 mi l _ sh o rt _ 04 H _ P M _S Y N C _ R A M3 4 T MS A P 30 XD P _ TR S T # R 2 20
PWR MANAGEMENT
JTAG & BPM
20 H _ P M_ S Y N C P M _S Y N C T R S T#
1 K_ 0 4
AR 2 8 XD P _ TD I _ R Q2 0
T DI A P 26 XD P _ TD O_ R MT N 7 0 0 2Z H S 3
R8 2 *1 0 mi l _ sh o rt _ 04 H _ C P U P W R GD _ R AP3 3 TD O C P U _ D R A MR S T# S D R2 1 7 1 K_ 0 4
23 H _ C P U P W R GD U N C OR E P W R G OO D D D R 3 _D R A M R S T # 9, 1 0
AL 3 5 XD P _ D B R _R
D B R# D R A MR S T _ C N T R L 8 , 19
G
P M S Y S _ P W R GD _ B U F R 14 4 1 3 0_ 1 % _ 04 V D D P W R GO OD _R V8 R2 1 8
S M _D R A MP W R OK 4 . 9 9K _1 % _ 04 C6 5 2
AT2 8 XD P _ B P M0 _ R
B P M# [ 0 ] AR 2 9 XD P _ B P M1 _ R 0 . 04 7 u _1 0 V _ X7 R _0 4
Buffered reset to CPU 1. 05 V S _ V T T B P M# [ 1 ] AR 3 0 XD P _ B P M2 _ R
B UF _ CP U _ RS T # AR3 3 B P M# [ 2 ] AT3 0 XD P _ B P M3 _ R
R ESET# B P M# [ 3 ] A P 32 XD P _ B P M4 _ R
B P M# [ 4 ] AR 3 1 XD P _ B P M5 _ R
3 .3 VS B P M# [ 5 ] AT3 1 XD P _ B P M6 _ R
R4 4 1
B P M# [ 6 ] AR 3 2 XD P _ B P M7 _ R
75 _ 0 4
B P M# [ 7 ] S3 circuit:- DRAM PWR GOOD logic
3 .3 V 3 . 3V
R 4 36 R4 3 9 B U F _ CP U _ RS T #
43 _ 1 %_ 0 4
3
1 0 K_ 0 4 D P Z 98 8 2 7-3 6 4 B -0 1F C2 4 8
Q3 1 B
5G
* 0. 1 u _ 16 V _ Y 5 V _ 04
L 2 N 7 00 2 D W 1T 1 G R1 4 7 R1 5 3
S 1 . 5V S _C P U
4
6
* 1 00 K _ 0 4
D
*2 0 0 _0 4
2G Q3 1 A
1 2 , 22 , 2 8 P L T _ RST #
S L 2N 7 00 2 D W 1T 1 G R1 4 5
1
20 0 _ 1% _ 0 4
5
R 4 40
1
1 0 0 K _0 4 20 P M_ D R A M _P W R GD 4 P MS Y S _ P W R GD _B U F
2
38 1. 5V S _C P U _ P W R GD
3
U 10 R1 4 8
1 . 0 5V S _V T T * 7 4A H C 1 G 09 *3 9 _0 4
3. 3 V S Processor Pull up R 1 50 0 _0 4
12/1
D
R 88 Q1 3
3. 3 V TRACE WIDTH 10MIL, LENGTH <500MILS G ? ? ?
*MT N 70 0 2 Z H S 3
3 5, 3 7 , 3 8 SU SB
R 1 56 6 2 _ 04
S
* 1 0K _ 0 4
1 .5 V S _ CP U 1. 5 V S _ C P U _ P W R GD H _P R OC H O T #
R 15 7
D
* 10 K _ 0 4
R5 7 2 Q 16 Q 10
*1 0 K _0 4 3 . 3V _E N _ D G * MT N 7 0 0 2Z H S 3 G M T N 7 0 02 Z H S 3 C 1 35
34 H _ P R OC H OT # _ E C
D
47 p _ 50 V _ N P O _ 04
Q 17 C AD No te : Ca pac it or
G * B S S 1 38 _ N L R 94
1 0 0 K _0 4
n eed t o be p lac ed
6 , 9 , 10 , 2 5 , 2 9, 3 3 , 3 5, 37 , 3 8 1 . 5 V
S
12/1 c los e to b uf fer 6 , 35 1. 5 V S _ C P U
o utp ut p in 2 , 5, 2 3 , 2 4, 25 , 3 5 , 37 , 3 9 1 . 0 5 V S _ V TT
Add 2 , 8, 1 1 , 1 6, 18 , 1 9 , 20 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 5, 3 7 , 3 8, 3 9 3 . 3 V
9 , 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1, 22 , 2 3 , 24 , 2 5 , 2 7, 2 8 , 3 0, 31 , 3 2 , 33 , 3 4 , 3 5, 3 9 3 . 3 V S
B - 4 Processor 2/7- CLK, MISC
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Schematic Diagrams
Processor 3/7- (DDR3)
Sandy Bridge Processor 3/7 ( DDR3 )
U29C U29
D
AB6 AE2
9 M_A_DQ[63:0] SA_CLK[ 0] M_A_CL
K_DDR0 9 10 M_B_DQ[63:0] SB_CLK[0] M_B_CLK_DDR2 10
AA6 AD2
C5 SA_CLK#[ 0] V9 M_A_CL
K_DDR#0 9 C9 SB_CLK#[0] R9 M_B_CLK_DDR#2 10
M_A_DQ0 M_B_DQ0
D5 SA_DQ[0] SA_CKE[ 0] M_A_CKE0 9 A7 SB_DQ[0] SB_CKE[0] M_B_CKE2 10
M_A_DQ1 M_B_DQ1
D3 SA_DQ[1] D10 SB_DQ[1]
M_A_DQ2 M_B_DQ2
M_A_DQ3 D2 SA_DQ[2] M_B_DQ3 C8 SB_DQ[2]
M_A_DQ4 D6 SA_DQ[3] AA5 M_B_DQ4 A9 SB_DQ[3] AE1
SA_DQ[4] SA_CLK[ 1] M_A_CL
K_DDR1 9 SB_DQ[4] SB_CLK[1] M_B_CLK_DDR3 10
M_A_DQ5 C6 AB5 M_B_DQ5 A8 AD1
SA_DQ[5] SA_CLK#[ 1] M_A_CL
K_DDR#1 9 SB_DQ[5] SB_CLK#[1] M_B_CLK_DDR#3 10
M_A_DQ6 C2 V10 M_B_DQ6 D9 R10
SA_DQ[6] SA_CKE[ 1] M_A_CKE1 9 SB_DQ[6] SB_CKE[1] M_B_CKE3 10
M_A_DQ7 C3 M_B_DQ7 D8
M_A_DQ8 F10 SA_DQ[7] M_B_DQ8 G4 SB_DQ[7]
M_A_DQ9 F8 SA_DQ[8] M_B_DQ9 F4 SB_DQ[8]
M_A_DQ1
0 G10 SA_DQ[9] AB4 M_B_DQ10 F1 SB_DQ[9] AB2
G9 SA_DQ[10] SA_CLK[ 2] AA4 G1 SB_DQ[10] SB_CLK[2] AA2
M_A_DQ1
1 M_B_DQ11
B.Schematic Diagrams
M_A_DQ1
2 F9 SA_DQ[11] SA_CLK#[ 2] W9 M_B_DQ12 G5 SB_DQ[11] SB_CLK#[2] T9
M_A_DQ1
3 F7 SA_DQ[12] SA_CKE[ 2] M_B_DQ13 F5 SB_DQ[12] SB_CKE[2]
M_A_DQ1
4 G8 SA_DQ[13] M_B_DQ14 F2 SB_DQ[13]
M_A_DQ1
5 G7 SA_DQ[14] M_B_DQ15 G2 SB_DQ[14]
M_A_DQ1
6 K4 SA_DQ[15] AB3 M_B_DQ16 J7 SB_DQ[15] AA1
M_A_DQ1
7 K5 SA_DQ[16] SA_CLK[ 3] AA3 M_B_DQ17 J8 SB_DQ[16] SB_CLK[3] AB1
M_A_DQ1
8 K1 SA_DQ[17] SA_CLK#[ 3] W10 M_B_DQ18 K10 SB_DQ[17] SB_CLK#[3] T10
J1 SA_DQ[18] SA_CKE[ 3] K9 SB_DQ[18] SB_CKE[3]
M_A_DQ1
9 M_B_DQ19
J5 SA_DQ[19] J9 SB_DQ[19]
M_A_DQ2
0 M_B_DQ20
M_A_DQ2
1 J4 SA_DQ[20] M_B_DQ21 J10 SB_DQ[20]
M_A_DQ2
2 J2 SA_DQ[21] AK3 M_B_DQ22 K8 SB_DQ[21] AD3
Sheet 4 of 49
SA_DQ[22] SA_CS#[ 0] M_A_CS#0 9 SB_DQ[22] SB_CS#[0] M_B_CS#2 10
M_A_DQ2
3 K2 AL3 M_B_DQ23 K7 AE3
SA_DQ[23] SA_CS#[ 1] M_A_CS#1 9 SB_DQ[23] SB_CS#[1] M_B_CS#3 10
M_A_DQ2
4 M8 AG1 M_B_DQ24 M5 AD6
M_A_DQ2
5 N10 SA_DQ[24] SA_CS#[ 2] AH1 M_B_DQ25 N4 SB_DQ[24] SB_CS#[2] AE6
N8 SA_DQ[25] SA_CS#[ 3] N2 SB_DQ[25] SB_CS#[3]
M_A_DQ2
6
M_A_DQ2
7
M_A_DQ2
8
M_A_DQ2
9
N7
M10
M9
SA_DQ
SA_DQ
SA_DQ
[26]
[27]
[28] AH3
M
M
M
M
_B_DQ26
_B_DQ27
_B_DQ28
_B_DQ29
N1
M4
N5
SB_DQ[26]
SB_DQ[27]
SB_DQ[28] AE4
Processor 3/7-
(DDR3)
SA_DQ[29] SA_ODT[ 0] M_A_ODT0 9 SB_DQ[29] SB_ODT[0] M_B_ODT2 1
0
M_A_DQ3
0 N9 AG3 M_B_DQ30 M2 AD4
SA_DQ[30] SA_ODT[ 1] M_A_ODT1 9 SB_DQ[30] SB_ODT[1] M_B_ODT3 1
0
M_A_DQ3
1 M7 AG2 M_B_DQ31 M1 AD5
M_A_DQ3
2 AG6 SA_DQ[31] SA_ODT[ 2] AH2 M_B_DQ32 AM5 SB_DQ[31] SB_ODT[2] AE5
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY A
M_A_DQ3
3 AG5 SA_DQ[32] SA_ODT[ 3] M_B_DQ33 AM6 SB_DQ[32] SB_ODT[3]
M_A_DQ3
4 AK6 SA_DQ[33] M_B_DQ34 AR3 SB_DQ[33]
M_A_DQ3
5 AK5 SA_DQ[34] M_B_DQ35 AP3 SB_DQ[34]
M_A_DQ3
6 AH5 SA_DQ[35] M_B_DQ36 AN3 SB_DQ[35]
AH6 SA_DQ[36] C4 M_A_DQS#[7:0] 9 AN2 SB_DQ[36] D7 M_B_DQS#[7:0] 10
M_A_DQ3
7 M_
A_DQS#
0 M_B_DQ37 M_B_DQS#0
M_A_DQ3
8 AJ5 SA_DQ[37] SA_DQS#[ 0] G6 M_
A_DQS#
1 M_B_DQ38 AN1 SB_DQ[37] SB_DQS#[0] F3 M_B_DQS#1
M_A_DQ3
9 AJ6 SA_DQ[38] SA_DQS#[ 1] J3 M_
A_DQS#
2 M_B_DQ39 AP2 SB_DQ[38] SB_DQS#[1] K6 M_B_DQS#2
M_A_DQ4
0 AJ8 SA_DQ[39] SA_DQS#[ 2] M6 M_
A_DQS#
3 M_B_DQ40 AP5 SB_DQ[39] SB_DQS#[2] N3 M_B_DQS#3
M_A_DQ4
1 AK8 SA_DQ[40] SA_DQS#[ 3] AL6 M_
A_DQS#
4 M_B_DQ41 AN9 SB_DQ[40] SB_DQS#[3] AN5 M_B_DQS#4
M_A_DQ4
2 AJ9 SA_DQ[41] SA_DQS#[ 4] AM 8 M_
A_DQS#
5 M_B_DQ42 AT5 SB_DQ[41] SB_DQS#[4] AP9 M_B_DQS#5
M_A_DQ4
3 AK9 SA_DQ[42] SA_DQS#[ 5] AR12 M_
A_DQS#
6 M_B_DQ43 AT6 SB_DQ[42] SB_DQS#[5] AK12 M_B_DQS#6
M_A_DQ4
4 AH8 SA_DQ[43] SA_DQS#[ 6] AM 15 M_
A_DQS#
7 M_B_DQ44 AP6 SB_DQ[43] SB_DQS#[6] AP15 M_B_DQS#7
AH9 SA_DQ[44] SA_DQS#[ 7] AN8 SB_DQ[44] SB_DQS#[7]
M_A_DQ4
5 M_B_DQ45
AL9 SA_DQ[45] AR6 SB_DQ[45]
M_A_DQ4
6 M_B_DQ46
M_A_DQ4
7 AL8 SA_DQ[46] M_B_DQ47 AR5 SB_DQ[46]
M_A_DQ4
8 AP11 SA_DQ[47] M_B_DQ48 AR9 SB_DQ[47]
M_A_DQ4
9 AN11 SA_DQ[48] D4 M_
A_DQS0 M_A_DQS[7:0] 9 M_B_DQ49 AJ11 SB_DQ[48] C7 M_B_DQS0 M_B_DQS[7:0] 10
M_A_DQ5
0 AL12 SA_DQ[49] SA_DQS[ 0] F6 M_
A_DQS1 M_B_DQ50 AT8 SB_DQ[49] SB_DQS[0] G3 M_B_DQS1
M_A_DQ5
1 AM12 SA_DQ[50] SA_DQS[ 1] K3 M_
A_DQS2 M_B_DQ51 AT9 SB_DQ[50] SB_DQS[1] J6 M_B_DQS2
M_A_DQ5
2 AM11 SA_DQ[51] SA_DQS[ 2] N6 M_
A_DQS3 M_B_DQ52 AH11 SB_DQ[51] SB_DQS[2] M3 M_B_DQS3
M_A_DQ5
3 AL11 SA_DQ[52] SA_DQS[ 3] AL5 M_
A_DQS4 M_B_DQ53 AR8 SB_DQ[52] SB_DQS[3] AN6 M_B_DQS4
AP12 SA_DQ[53] SA_DQS[ 4] AM9 AJ12 SB_DQ[53] SB_DQS[4] AP8
M_A_DQ5
4 M_
A_DQS5 M_B_DQ54 M_B_DQS5
M_A_DQ5
5 AN12 SA_DQ[54] SA_DQS[ 5] AR11 M_
A_DQS6 M_B_DQ55 AH12 SB_DQ[54] SB_DQS[5] AK11 M_B_DQS6
M_A_DQ5
6 AJ14 SA_DQ[55] SA_DQS[ 6] AM14 M_
A_DQS7 M_B_DQ56 AT11 SB_DQ[55] SB_DQS[6] AP14 M_B_DQS7
M_A_DQ5
7 AH14 SA_DQ[56] SA_DQS[ 7] M_B_DQ57 AN14 SB_DQ[56] SB_DQS[7]
M_A_DQ5
8 AL15 SA_DQ[57] M_B_DQ58 AR14 SB_DQ[57]
M_A_DQ5
9 AK15 SA_DQ[58] M_B_DQ59 AT14 SB_DQ[58]
M_A_DQ6
0 AL14 SA_DQ[59] M_B_DQ60 AT12 SB_DQ[59]
AK14 SA_DQ[60] AD10 M_A_
A[15:0] 9 AN15 SB_DQ[60] AA8 M_B_A[15: 0
] 1
0
M_A_DQ6
1 M_
A_A0 M_B_DQ61 M_B_A0
M_A_DQ6
2 AJ15 SA_DQ[61] SA_MA[ 0] W1 M_
A_A1 M_B_DQ62 AR15 SB_DQ[61] SB_MA[0] T7 M_B_A1
AH15 SA_DQ[62] SA_MA[ 1] W2 AT15 SB_DQ[62] SB_MA[1] R7
M_A_DQ6
3 M_
A_A2 M_B_DQ63 M_B_A2
SA_DQ[63] SA_MA[ 2] W7 M_
A_A3 SB_DQ[63] SB_MA[2] T6 M_B_A3
SA_MA[ 3] V3 M_
A_A4 SB_MA[3] T2 M_B_A4
SA_MA[ 4] V2 M_
A_A5 SB_MA[4] T4 M_B_A5
SA_MA[ 5] W3 M_
A_A6 SB_MA[5] T3 M_B_A6
AE10 SA_MA[ 6] W6 M_
A_A7 AA9 SB_MA[6] R2 M_B_A7
9 M_A_BS0 SA_BS[0] SA_MA[ 7] 10 M_B_BS0 SB_BS[0] SB_MA[7]
AF10 V1 M_
A_A8 AA7 T5 M_B_A8
9 M_A_BS1 V6 SA_BS[1] SA_MA[ 8] W5 10 M_B_BS1 R6 SB_BS[1] SB_MA[8] R3
M_
A_A9 M_B_A9
9 M_A_BS2 SA_BS[2] SA_MA[ 9] AD8 10 M_B_BS2 SB_BS[2] SB_MA[9] AB7
M_
A_A10 M_B_A10
SA_MA[ 10] V4 SB_MA[10] R1
M_
A_A11 M_B_A11
SA_MA[ 11] W4 M_
A_A12 SB_MA[11] T1 M_B_A12
AE8 SA_MA[ 12] AF8 M_
A_A13 AA10 SB_MA[12] AB10 M_B_A13
9 M_A_CAS# SA_CAS# SA_MA[ 13] 10 M_B_CAS# SB_CAS# SB_MA[13]
AD9 V5 M_
A_A14 AB8 R5 M_B_A14
9 M_A_RAS# SA_RAS# SA_MA[ 14] 10 M_B_RAS# SB_RAS# SB_MA[14]
AF9 V7 M_
A_A15 AB9 R4 M_B_A15
9 M_A_WE# SA_WE# SA_MA[ 15] 10 M_B_WE# SB_WE# SB_MA[15]
PZ98827-364B-01F PZ9
8827-364B-01F
Processor 3/7- (DDR3) B - 5
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Schematic Diagrams
Processor 4/7- Power
Sandy Bridge Processor 4/7 ( POWER )
U29F POWER
PROCESSOR CORE POWER
PRO CES SO R U NC ORE P OWE R
VCORE
48A 1. 05VS_VTT
8 .5 A 1.05VS_VTT
ICCMAX Maximum Processor SV 48 AG35
AG34 VCC1 AH13
AG33 VCC2 VCCIO1 AH10
AG32 VCC3 VCCIO2 AG10
VCC4 VCCIO3 C196 C206 C204 C232 C203 + C640
VCORE AG31 AC10
AG30 VCC5 VCCIO4 Y10 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 220u_6.3V_6.3*6.3*4. 2
AG29 VCC6 VCCIO5 U10
AG28 VCC7 VCCIO6 P10
C589 C588 C188 C587 C586 VCC8 VCCIO7
AG27 L10
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
VCC9 VCCIO8
*22u_6. 3V_X5R_08
AG26 J14
AF35 VCC10 VCCIO9 J13 C627 C602 C603 C629 C614
VCC11 VCCIO10 + C641
AF34 J12
AF33 VCC12 VCCIO11 J11
VCC13 VCCIO12 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 220u_6.3V_6.3*6.3*4. 2
AF32 H14
AF31 VCC14 VCCIO13 H12
AF30 VCC15 VCCIO14 H11
AF29 VCC16 VCCIO15 G14
AF28 VCC17 VCCIO16 G13 C623 C608 C613 C609 C610
B.Schematic Diagrams
AF27 VCC18 VCCIO17 G12
PEG AND DDR
AF26 VCC19 VCCIO18 F14 22u_6.3V_X5R_08 22u_6.3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08 22u_6. 3V_X5R_08
AD35 VCC20 VCCIO19 F13
C76 C167 C102 C156 C585 AD34 VCC21 VCCIO20 F12
AD33 VCC22 VCCIO21 F11
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
VCC23 VCCIO22
*22u_6.3V_X5R_08
*22u_6. 3V_X5R_08
AD32 E14
AD31 VCC24 VCCIO23 E12 C607 C611 C612 C606 C597
AD30 VCC25 VCCIO24
AD29 VCC26 E11 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
Sheet 5 of 49 AD28
AD27
AD26
VCC27
VCC28
VCC29
VCC30
VCCIO25
VCCIO26
VCCIO27
VCCIO28
D14
D13
D12
AC35 D11
Processor 4/7- AC34
AC33
AC32
VCC31
VCC32
VCC33
VCC34
VCCIO29
VCCIO30
VCCIO31
VCCIO32
C14
C13
C12
C202
*22u_6.3V_X5R_08
C223
*22u_6.3V_X5R_08
C222
*22u_6.3V_X5R_08
AC31 C11
Power C590 C595 C137 C151 C594 AC30
AC29
VCC35
VCC36
VCCIO33
VCCIO34
B14
B12
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
VCC37 VCCIO35
*22u_6. 3V_X5R_08
*22u_6. 3V_X5R_08
AC28 A14
AC27 VCC38 VCCIO36 A13 C201 C205 C231
AC26 VCC39 VCCIO37 A12
AA35 VCC40 VCCIO38 A11 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08 *22u_6.3V_X5R_08
AA34 VCC41 VCCIO39
AA33 VCC42 J23
AA32 VCC43 VCCIO40
AA31 VCC44 1. 05VS_VCCP_F R419 *15mil_short_06
AA30 VCC45 1.05VS_VTT
AA29 VCC46
AA28 VCC47
AA27 VCC48
AA26 VCC49
Y35 VCC50
CORE SUPPLY
Y34 VCC51 CLOSE TO CPU
Y33 VCC52 1.05VS_VTT
VCORE Y32 VCC53
Y31 VCC54
Y30 VCC55 H_CPU_SVI DALRT# 75_04 R93
Y29 VCC56
C599 C598 C170 C171 C172 VCC57
Y28 H_CPU_SVI DDAT_R130_1%_04 R112
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VCC58
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
Y27
Y26 VCC59
V35 VCC60
V34 VCC61 AJ29 H_CPU_SVIDALRT#_R R105 43_1%_04
SVID
V33 VCC62 VIDALERT# AJ30 H_CPU_SVIDALRT# 39
H_CPU_SVIDCLK_R R95 0_04
V32 VCC63 VIDSCLK AJ28 H_CPU_SVIDDAT_R R108 0_04 H_CPU_SVIDCLK 39
V31 VCC64 VIDSOUT H_CPU_SVIDDAT 39
V30 VCC65
V29 VCC66
V28 VCC67
V27 VCC68
V26 VCC69
U35 VCC70
C173 C596 C191 C169 C168 VCC71
U34
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VCC72
*10u_6.3V_X5R_06
*10u_6. 3V_X5R_06
U33
U32 VCC73
U31 VCC74
U30 VCC75
U29 VCC76
U28 VCC77
U27 VCC78
U26 VCC79
R35 VCC80
R34 VCC81
R33 VCC82 VCORE_VCC_SENSE 39
R32 VCC83 VCORE_VSS_SENSE 39
R31 VCC84
R30 VCC85 1. 05VS_VTT
R29 VCC86
R28 VCC87
SENSE LINES
R27 VCC88 AJ35
R26 VCC89 VCC_SENSE AJ34 R433
P35 VCC90 VSS_SENSE 12/1
P34 VCC91
P33 VCC92
*10_04 ? ? 10R
P32 VCC93 B10
P31 VCC94 VCCIO_SENSE A10
P30 VCC95 VSSIO_SENSE
P29 VCC96
P28 VCC97 R438
P27 VCC98
P26 VCC99
VCC100 *10_04
39,40 VCORE
PZ98827-364B-01F 2,3,23,24,25, 35,37,39 1.05VS_VTT
B - 6 Processor 4/7- Power
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Schematic Diagrams
Processor 5/7- GFX PWR
Sandy Bridge Processor 5/7 ( GRAPHICS POWER )
U 2 9G
POWER 1 .5 V
V G F X _ CO RE
33A
AT 2 4 A K 35
SENSE
LINES
AT 2 3 VAXG 1 V A X G_ S E N S E A K 34 V C C _ G T_ S E N S E 39
V S S _G T _S E N S E 39 R 4 49 0_04 R4 5 1
AT 2 1 VAXG 2 V S S A X G_ S E N S E
C 1 83 C 16 6 C5 7 5 C1 9 0 C1 8 9
AT 2 0 VAXG 3 Q 32 1 K _ 1% _ 0 4
AT 1 8 VAXG 4
2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 *M T N 2 3 0 6A N 3
AT 1 7 VAXG 5 V _ S M _V R E F S D V _ S M_ V R E F _ C N T
AR2 4 VAXG 6
AR2 3 VAXG 7
R4 4 5
AR2 1 VAXG 8 *1 0 0K _1 % _ 0 4 R4 4 8 C6 3 7
VAXG 9
G
AR2 0
C 1 97 C 60 5 C2 0 7 C6 1 6 C1 7 4 AR1 8 VAXG 10 1 K _ 1% _ 0 4 0 . 1u _ 1 6 V _ Y 5 V _ 0 4
VREF
AR1 7 VAXG 11
2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 AP2 4 VAXG 12 AL 1 V_ S M _ VREF
AP2 3 VAXG 13 S M_ V R E F
VAXG 14
B.Schematic Diagrams
AP2 1
AP2 0 VAXG 15
AP1 8 VAXG 16 S US B # 2 0 , 2 9, 3 4 , 3 5
AP1 7 VAXG 17 CAD Note: +V_SM_VREF should
AN2 4 VAXG 18 have 10 mil trace width
C 5 76 C 62 6 C1 8 4 C6 0 0 C5 9 3
AN2 3 VAXG 19
2 2 u _ 6. 3 V _ X 5 R _ 0 8 2 2 u_ 6 . 3 V _ X 5R _ 08 2 2u _ 6 . 3 V _ X5 R _0 8 22 u _ 6 . 3V _X 5 R _ 0 8 2 2u _ 6 . 3 V _X 5 R _0 8 AN2 1 VAXG 20
AN2 0 VAXG 21
AN1 8 VAXG 22 1 .5 V S _ CP U
12A
DDR3 -1.5V RAILS
AN1 7 VAXG 23
A M2 4 VAXG 24 AF 7
GRAPHICS
A M2 3 VAXG 25 V D D Q1 AF 4
C6 3 0 A M2 1 VAXG 26 V D D Q2 AF 1 C2 6 9 C 26 8 C 26 7 C6 3 6
+
2 2 0 u_ 6 . 3 V _ 6 . 3* 6 . 3* 4 . 2
A M2 0
A M1 8
A M1 7
VAXG
VAXG
VAXG
27
28
29
V D D Q3
V D D Q4
V D D Q5
AC 7
AC 4
AC 1
1 0u _ 6 . 3 V _ X5 R _0 6 1 0 u_ 6 . 3 V _ X 5R _ 06 1 0 u _6 . 3 V _ X 5R _ 0 6
+
3 30 u F _ 2 . 5 V _ 9m _ 6 . 3 *6
Sheet 6 of 49
AL 2 4 VAXG 30 V D D Q6 Y 7
AL 2 3
AL 2 1
AL 2 0
VAXG
VAXG
VAXG
31
32
33
V D D Q7
V D D Q8
V D D Q9
Y 4
Y 1
U 7 C2 5 6 C 25 7 C 25 8
Processor 5/7- GFX
AL 1 8 VAXG 34 V D D Q1 0 U 4
AL 1 7
AK2 4
AK2 3
VAXG
VAXG
VAXG
35
36
37
V D D Q1 1
V D D Q1 2
V D D Q1 3
U 1
P7
P4
1 0u _ 6 . 3 V _ X5 R _0 6 1 0 u_ 6 . 3 V _ X 5R _ 06 10 u _ 6 . 3V _X 5 R _ 0 6 PWR
AK2 1 VAXG 38 V D D Q1 4 P1
AK2 0 VAXG 39 V D D Q1 5
AK1 8 VAXG 40
AK1 7 VAXG 41
AJ 2 4 VAXG 42
AJ 2 3 VAXG 43
AJ 2 1 VAXG 44
AJ 2 0 VAXG 45
AJ 1 8 VAXG 46
AJ 1 7 VAXG 47
AH2 4 VAXG 48 0 . 8 5V S
AH2 3 VAXG 49
SA RAIL
AH2 1
AH2 0
VAXG
VAXG
50
51 VCC SA1
M 27
M 26
6A
AH1 8 VAXG 52 VCC SA2 L26 C1 4 8 C1 5 8 C 15 5 C 71 6
AH1 7 VAXG 53 VCC SA3 J26 +
VAXG 54 VCC SA4 J25 10 u _ 6 . 3 V _X 5 R _0 6 1 0u _ 6 . 3 V _ X5 R _0 6 1 0 u_ 6 . 3 V _ X 5R _ 06 5 6 0 u_ 2 . 5 V _ 6. 6* 6 . 6* 5 . 9
VCC SA5 J24
VCC SA6 H 26
VCC SA7 H 25
VCC SA8 12/23
? ? ? ?
1.8V RAIL
1 .8 V S
1.2A B6
VC CPL L 1 V CC S A _ S E N S E
H 23 V CC S A _ S E N S E
V C CS A _ S E NS E 37
A6
MISC
A2 VC CPL L 2 1 .5 V
+ C 63 5 + C 6 33 C 6 34 C 63 1 C 63 2
VC CPL L 3
3 3 0u F _ 2 . 5 V _ 9 m_ 6 . 3 *6 3 3 0 u F _2 . 5 V _ 9 m _6 . 3 * 6 1 0 u _6 . 3 V _ X 5 R _ 0 6 1 u _ 6 . 3V _Y 5 V _ 04 1 u _ 6. 3 V _ X 5 R _ 0 4 C 2 2 R4 2 8 *0 _ 04
F C_ C2 2 V C CS A _ V ID0 37
C 2 4 R4 2 6 *0 _ 04
V C CS A _ V ID1 V C CS A _ V ID1 37
C2 8 5 C2 8 4
P Z 98 8 2 7 -36 4 B -0 1 F
0 . 1 u_ 1 0 V _ X 5 R _ 0 4
0 . 1u _ 1 0 V _ X 5R _ 0 4
1 .5 V S _ CP U
3 7 0 . 8 5V S
40 V GF X _ C O R E
3 , 35 1 . 5V S _C P U
2 3 , 2 4, 37 1. 8V S
3 , 9 , 1 0, 2 5 , 2 9 , 3 3, 3 5 , 3 7 , 38 1 . 5V
Processor 5/7- GFX PWR B - 7
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Schematic Diagrams
Processor 6/7- GND
Sandy Bridge Processor 6/7 ( GND )
U2 9H U29I
AT35 AJ22
AT32 VSS1 VSS81 AJ19
AT29 VSS2 VSS82 AJ16 T35 F22
AT27 VSS3 VSS83 AJ13 T34 VSS161 VSS234 F19
AT25 VSS4 VSS84 AJ10 T33 VSS162 VSS235 E30
AT22 VSS5 VSS85 AJ7 T32 VSS163 VSS236 E27
AT19 VSS6 VSS86 AJ4 T31 VSS164 VSS237 E24
AT16 VSS7 VSS87 AJ3 T30 VSS165 VSS238 E21
AT13 VSS8 VSS88 AJ2 T29 VSS166 VSS239 E18
CAD Note: 0 ohm resistor AT10 VSS9 VSS89 AJ1 T28 VSS167 VSS240 E15
should be placed close AT7 VSS1 0 VSS90 AH35 T27 VSS168 VSS241 E13
AT4 VSS1 1 VSS91 AH34 T26 VSS169 VSS242 E10
B.Schematic Diagrams
to CPU AT3 VSS1 2 VSS92 AH32 P9 VSS170 VSS243 E9
AR25 VSS1 3 VSS93 AH30 P8 VSS171 VSS244 E8
AR22 VSS1 4 VSS94 AH29 P6 VSS172 VSS245 E7
AR19 VSS1 5 VSS95 AH28 P5 VSS173 VSS246 E6
AR16 VSS1 6 VSS96 AH26 P3 VSS174 VSS247 E5
AR13 VSS1 7 VSS97 AH25 P2 VSS175 VSS248 E4
AR10 VSS1 8 VSS98 AH22 N 35 VSS176 VSS249 E3
AR7 VSS1 9 VSS99 AH19 N 34 VSS177 VSS250 E2
AR4 VSS2 0 VSS100 AH16 N 33 VSS178 VSS251 E1
AR2 VSS2 1 VSS101 AH7 N 32 VSS179 VSS252 D3 5
Sheet 7 of 49 AP34
AP31
AP28
VSS2 2
VSS2 3
VSS2 4
VSS102
VSS103
VSS104
AH4
AG9
AG8
N 31
N 30
N 29
VSS180
VSS181
VSS182
VSS253
VSS254
VSS255
D3 2
D2 9
D2 6
VSS2 5 VSS105 VSS183 VSS256
Processor 6/7- GND AP25
AP22
AP19
VSS2 6
VSS2 7
VSS106
VSS107
AG4
AF6
AF5
N 28
N 27
N 26
VSS184
VSS185
VSS257
VSS258
D2 0
D1 7
C3 4
AP16 VSS2 8 VSS108 AF3 M34 VSS186 VSS259 C3 1
AP13 VSS2 9 VSS109 AF2 L 33 VSS187 VSS260 C2 8
AP10 VSS3 0 VSS110 AE35 L 30 VSS188 VSS261 C2 7
AP7 VSS3 1 VSS111 AE34 L 27 VSS189 VSS262 C2 5
AP4 VSS3 2 VSS112 AE33 L9 VSS190 VSS263 C2 3
AP1 VSS3 3 VSS113 AE32 L8 VSS191 VSS264 C1 0
AN30 VSS3 4 VSS114 AE31 L6 VSS192 VSS265 C1
AN27 VSS3 5 VSS115 AE30 L5 VSS193 VSS266 B22
AN25 VSS3 6 VSS116 AE29 L4 VSS194 VSS267 B19
AN22
AN19
AN16
VSS3 7
VSS3 8
VSS3 9
VSS VSS117
VSS118
VSS119
AE28
AE27
AE26
L3
L2
L1
VSS195
VSS196
VSS197
VSS VSS268
VSS269
VSS270
B17
B15
B13
AN13 VSS4 0 VSS120 AE9 K35 VSS198 VSS271 B11
AN10 VSS4 1 VSS121 AD7 K32 VSS199 VSS272 B9
AN7 VSS4 2 VSS122 AC9 K29 VSS200 VSS273 B8
AN4 VSS4 3 VSS123 AC8 K26 VSS201 VSS274 B7
AM29 VSS4 4 VSS124 AC6 J 34 VSS202 VSS275 B5
AM25 VSS4 5 VSS125 AC5 J 31 VSS203 VSS276 B3
AM22 VSS4 6 VSS126 AC3 H 33 VSS204 VSS277 B2
AM19 VSS4 7 VSS127 AC2 H 30 VSS205 VSS278 A35
AM16 VSS4 8 VSS128 AB35 H 27 VSS206 VSS279 A32
AM13 VSS4 9 VSS129 AB34 H 24 VSS207 VSS280 A29
AM10 VSS5 0 VSS130 AB33 H 21 VSS208 VSS281 A26
AM7 VSS5 1 VSS131 AB32 H 18 VSS209 VSS282 A23
AM4 VSS5 2 VSS132 AB31 H 15 VSS210 VSS283 A20
AM3 VSS5 3 VSS133 AB30 H 13 VSS211 VSS284 A3
AM2 VSS5 4 VSS134 AB29 H 10 VSS212 VSS285
AM1 VSS5 5 VSS135 AB28 H9 VSS213
AL34 VSS5 6 VSS136 AB27 H8 VSS214
AL31 VSS5 7 VSS137 AB26 H7 VSS215
AL28 VSS5 8 VSS138 Y9 H6 VSS216
AL25 VSS5 9 VSS139 Y8 H5 VSS217
AL22 VSS6 0 VSS140 Y6 H4 VSS218
AL19 VSS6 1 VSS141 Y5 H3 VSS219
AL16 VSS6 2 VSS142 Y3 H2 VSS220
AL13 VSS6 3 VSS143 Y2 H1 VSS221
AL10 VSS6 4 VSS144 W35 G 35 VSS222
AL7 VSS6 5 VSS145 W34 G 32 VSS223
AL4 VSS6 6 VSS146 W33 G 29 VSS224
AL2 VSS6 7 VSS147 W32 G 26 VSS225
AK33 VSS6 8 VSS148 W31 G 23 VSS226
AK30 VSS6 9 VSS149 W30 G 20 VSS227
AK27 VSS7 0 VSS150 W29 G 17 VSS228
AK25 VSS7 1 VSS151 W28 G 11 VSS229
AK22 VSS7 2 VSS152 W27 F34 VSS230
AK19 VSS7 3 VSS153 W26 F31 VSS231
AK16 VSS7 4 VSS154 U9 F29 VSS232
AK13 VSS7 5 VSS155 U8 VSS233
AK10 VSS7 6 VSS156 U6
AK7 VSS7 7 VSS157 U5
AK4 VSS7 8 VSS158 U3
AJ25 VSS7 9 VSS159 U2
VSS8 0 VSS160
PZ98827 -364B-0 1F PZ98 827-3 64B-01F
B - 8 Processor 6/7- GND
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Schematic Diagrams
Processor 7/7- RSVD
CFG Straps for Processor
PE G Sta tic L ane Rever sal - CFG2 is f or th e 16 x
Sandy Bridge Processor 7/7 ( RESERVED )
CF G2 1: (Defa ult) Norm al Op erati on; L ane #
de finit ion match es so cket pin m ap d efini tion
0: Lane Reve rsed
CFG2 R417 *1K_04
U29E
L7
RSVD28 AG7
Di splay Port Pre sence Stra p CFG0 AK28 RSVD29 AE7
AK29 CFG[0] RSVD30 AK2
1: (Defa ult) Disa bled; No P hysic al D ispla y Por t CFG2 AL26 CFG[1] RSVD31 W8
AL27 CFG[2] RSVD32
CF G4 at tache d to Embe dded Displ ay Po rt CFG4 AK26 CFG[3]
CFG5 AL29 CFG[4] AT26
0: Enabl ed; An ex terna l Dis play Port devi ce is CFG[5] RSVD33
CFG6 AL30 AM33
B.Schematic Diagrams
co nnect ed t o the Embe dded Displ ay P ort CFG7 AM31 CFG[6] RSVD34 AJ27
AM32 CFG[7] RSVD35
AM30 CFG[8]
AM28 CFG[9]
CFG4 R114 *1K_04 AM26 CFG[10]
AN28 CFG[11]
AN31 CFG[12] T8
AN26 CFG[13] RSVD37 J16
PC IE Po rt Bi furc ation Stra ps
AM27
AK31
AN29
CFG[14]
CFG[15]
CFG[16]
RSVD38
RSVD39
RSVD40
H16
G16 Sheet 8 of 49
CFG[17]
11: (Default) x16 - Device 1 functions 1 and 2 disabled
AR35
Processor 7/7-
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled RSVD41
CF G[6:5 ] 01:
00:
Reserved - (Device 1 function 1 disabled ; function 2 enabled)
x8,x4,x4 - Device 1 functions 1 and 2 enabled
H_CPU_RSVD1 AJ31
H_CPU_RSVD2 AH31
H_CPU_RSVD3 AJ33
H_CPU_RSVD4 AH33
VAXG_VAL_SENSE
VSSAXG_VAL_SENSE
VCC_VAL_SENSE
RSVD42
RSVD43
RSVD44
AT34
AT33
AP35
AR34
RSVD
VSS_VAL_SENSE RSVD45
R134 *0_04 AJ26
CFG5 R111 *1K_04 RSVD5
Q11
RESERVED
*MTN2306AN3 B34
D S B4 RSVD46 A33
CFG6 R109 *1K_04 9 VREF_DQ_CHA VREF_CH_A_DI MM RSVD6 RSVD47
VREF_CH_B_DI MM D1 A34
RSVD7 RSVD48 B35
RSVD49 C35
G
RSVD50
F25
F24 RSVD8
R138 *0_04 R136 R129 RSVD9
F23
Q12 *1K_04 *1K_04 D24 RSVD10 AJ32
*MTN2306AN3 G25 RSVD11 RSVD51 AK32
D S G24 RSVD12 RSVD52
10 VREF_DQ_CHB E23 RSVD13
D23 RSVD14
C30 RSVD15 AH27
G
A31 RSVD16 VCC_DIE_SENSE
B30 RSVD17
3,19 DRAMRST_CNTRL B29 RSVD18
D30 RSVD19 AN35
B31 RSVD20 RSVD54 AM35
A30 RSVD21 RSVD55
C29 RSVD22
RSVD23
3.3V R429 10K_1%_04 J20
B18 RSVD24 AT2
H_SNB_IVB#_PWRCTRL R430 *10mil_short _04 H_SNB_IVB#_PWRCTRL_R A19 RSVD25 RSVD56 AT1
VCCIO_SEL RSVD57 AR1
RSVD58
J15
On CR B RSVD27
H_SNB _IVB# _PWRC TRL = low , 1.0 V B1
KEY
H_SNB _IVB# _PWRC TRL = hig h/NC, 1.05 V
PE G DEF ER TR AINI NG PZ98827-364B- 01F
1: (De fault ) PEG Trai n imm ediat ely follo wing xxRES ETB d e ass erti on
CF G7 0: PEG Wait for BIOS for t raini ng
CFG7 R107 *1K_04
2,3,11, 16,18,19,20,22, 23,24,25,27, 28,29,30,35,37, 38,39 3.3V
Processor 7/7- RSVD B - 9
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Schematic Diagrams
DDR3 SO-DIMM_0
SO-DIMM A
C 34 9 *1 0 p_ 5 0 V _N P O_ 0 4
M_ A _ C L K _ D D R 0 M _ A _C L K _D D R # 0
JD I MM 2A
4 M_ A _ A [ 1 5 : 0 ] M _A _A 0 98 5 M _A _D Q0 M_ A _ D Q [ 63 : 0 ] 4
C 34 8 *1 0 p_ 5 0 V _N P O_ 0 4 J D I MM 2B
M_ A _ C L K _ D D R 1 M _ A _C L K _D D R # 1 M _A _A 1 97 A0 DQ 0 7 M _A _D Q1
M _A _A 2 96 A1 DQ 1 15 M _A _D Q2
M _A _A 3 95 A2 DQ 2 17 M _A _D Q3 1 .5 V
M _A _A 4 92 A3 DQ 3 4 M _A _D Q4
M _A _A 5 91 A4 DQ 4 6 M _A _D Q5 75 44
M _A _A 6 90 A5 DQ 5 16 M _A _D Q6 76 VD D1 VS S 16 48
M _A _A 7 86 A6 DQ 6 18 M _A _D Q7 81 VD D2 VS S 17 49
M _A _A 8 89 A7 DQ 7 21 M _A _D Q8 82 VD D3 VS S 18 54
La yout Note : M _A _A 9 85 A8 DQ 8 23 M _A _D Q9 87 VD D4 VS S 19 55
M _A _A 1 0 1 07 A9 DQ 9 33 M _A _D Q1 0 88 VD D5 VS S 20 60
si gna l/ spa ce /si gna l: M _A _A 1 1 84 A 1 0 /A P DQ 1 0 35 M _A _D Q1 1 93 VD D6 VS S 21 61
M _A _A 1 2 83 A1 1 DQ 1 1 22 M _A _D Q1 2 94 VD D7 VS S 22 65
8 / 4 /8 M _A _A 1 3 1 19 A 1 2 /B C # DQ 1 2 24 M _A _D Q1 3 3 .3 V S 99 VD D8 VS S 23 66
M _A _A 1 4 80 A1 3 DQ 1 3 34 M _A _D Q1 4 1 00 VD D9 VS S 24 71
B.Schematic Diagrams
M _A _A 1 5 78 A1 4 DQ 1 4 36 M _A _D Q1 5 2 0 mi ls 1 05 VD D1 0 VS S 25 72
A1 5 DQ 1 5 39 M _A _D Q1 6 1 06 VD D1 1 VS S 26 127
1 09 DQ 1 6 41 M _A _D Q1 7 C 3 61 C3 1 5 1 11 VD D1 2 VS S 27 128
4 M _ A _B S 0 1 08 BA 0 DQ 1 7 51 M _A _D Q1 8 1 12 VD D1 3 VS S 28 133
4 M _ A _B S 1 79 BA 1 DQ 1 8 53 1 17 VD D1 4 VS S 29 134
M _A _D Q1 9 1 u _ 6. 3V _ X 5 R _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4
4 M _ A _B S 2 1 14 BA 2 DQ 1 9 40 M _A _D Q2 0 1 18 VD D1 5 VS S 30 138
4 M _ A _C S # 0 1 21 S0 # DQ 2 0 42 1 23 VD D1 6 VS S 31 139
M _A _D Q2 1
4 M _ A _C S # 1 1 01 S1 # DQ 2 1 50 M _A _D Q2 2 1 24 VD D1 7 VS S 32 144
4 M _ A _C L K _D D R 0 C K0 DQ 2 2 VD D1 8 VS S 33
Sheet 9 of 49 4
4
4
M _ A _C L K _D D R # 0
M _ A _C L K _D D R 1
M _ A _C L K _D D R # 1
1 03
1 02
1 04
73
C K0 #
C K1
C K1 #
DQ 2 3
DQ 2 4
DQ 2 5
52
57
59
67
M
M
M
M
_A
_A
_A
_A
_D
_D
_D
_D
Q2 3
Q2 4
Q2 5
Q2 6 3 .3 V S
1 99
77
V D DS P D
VS
VS
VS
S 34
S 35
S 36
145
150
151
155
4 M _ A _C K E 0
DDR3 SO-DIMM_0 74 C KE0 DQ 2 6 69 M _A _D Q2 7 1 22 N C1 VS S 37 156
4 M _ A _C K E 1 1 15 C KE1 DQ 2 7 56 M _A _D Q2 8 1 25 N C2 VS S 38 161
4 M_ A _ C A S # R1 9 4 1 0 K_ 0 4
1 10 C AS# DQ 2 8 58 M _A _D Q2 9 N CT E S T VS S 39 162
4 M_ A _ R A S # 1 13 R AS# DQ 2 9 68 M _A _D Q3 0 1 98 VS S 40 167
4 M_ A _ W E # S A 0 _ DIM 0 1 97 WE # DQ 3 0 70 M _A _D Q3 1 10 T S # _ D I MM 0 _1 30 EVEN T# VS S 41 168
S A 1 _ DIM 0 2 01 SA 0 DQ 3 1 12 9 M _A _D Q3 2 3 ,1 0 D D R 3_ D R A MR S T # R ESET# VS S 42 172
2 02 SA 1 DQ 3 2 13 1 M _A _D Q3 3 C 3 63 1 u_ 6 . 3 V _ X5 R _0 4 VS S 43 173
1 0 ,1 9 S M B _C L K 2 00 SC L DQ 3 3 14 1 M _A _D Q3 4 V R E F _ D Q_ 0 1 VS S 44 178
C 3 64 0 . 1 u_ 1 6 V _Y 5 V _0 4
1 0 ,1 9 S M B _D A T A SD A DQ 3 4 14 3 M _A _D Q3 5 C 3 66 1 u_ 6 . 3 V _ X5 R _0 4 V R E F _ C A _0 1 26 V R E F _ DQ VS S 45 179
1 16 DQ 3 5 13 0 M _A _D Q3 6 V R E F _ CA VS S 46 184
C 3 51 0 . 1 u_ 1 6 V _Y 5 V _0 4
4 M _ A _O D T 0 1 20 O DT 0 DQ 3 6 13 2 M _A _D Q3 7 VS S 47 185
4 M _ A _O D T 1 O DT 1 DQ 3 7 14 0 M _A _D Q3 8 2 VS S 48 189
11 DQ 3 8 14 2 M _A _D Q3 9 3 VSS1 VS S 49 190
28 D M0 DQ 3 9 14 7 M _A _D Q4 0 8 VSS2 VS S 50 195
46 D M1 DQ 4 0 14 9 M _A _D Q4 1 9 VSS3 VS S 51 196
63 D M2 DQ 4 1 15 7 M _A _D Q4 2 13 VSS4 VS S 52
1 36 D M3 DQ 4 2 15 9 M _A _D Q4 3 14 VSS5
1 53 D M4 DQ 4 3 14 6 M _A _D Q4 4 19 VSS6
1 70 D M5 DQ 4 4 14 8 M _A _D Q4 5 20 VSS7 V T T_ M E M
1 87 D M6 DQ 4 5 15 8 M _A _D Q4 6 25 VSS8
D M7 DQ 4 6 16 0 M _A _D Q4 7 CLO SE TO SO -DI MM _ 0 26 VSS9 203
4 M _A _D QS [ 7 : 0 ] 12 DQ 4 7 16 3 31 VSS1 0 V T T1 204
M _A _D QS 0 M _A _D Q4 8
M _A _D QS 1 29 D QS 0 DQ 4 8 16 5 M _A _D Q4 9 1 .5 V 32 VSS1 1 V T T2
47 D QS 1 DQ 4 9 17 5 RN 6 37 VSS1 2 G ND 1
M _A _D QS 2 M _A _D Q5 0
M _A _D QS 3 64 D QS 2 DQ 5 0 17 7 M _A _D Q5 1 5 4 V R E F _ CA _ 0 38 VSS1 3 G1 G ND 2
1 37 D QS 3 DQ 5 1 16 4 6 3 43 VSS1 4 G2
M _A _D QS 4 M _A _D Q5 2 V R E F _ D Q _0 R 2 07 *0 _ 0 4
M _A _D QS 5 1 54 D QS 4 DQ 5 2 16 6 M _A _D Q5 3 7 2 V R E F _ D Q_ C H A 8 VSS1 5
1 71 D QS 5 DQ 5 3 17 4 8 1
M _A _D QS 6 M _A _D Q5 4 C 3 62 C3 6 5 L I N K T E K D D R R K -20 4 0 1- TP 5 B
M _A _D QS 7 1 88 D QS 6 DQ 5 4 17 6 M _A _D Q5 5
D QS 7 DQ 5 5 18 1
0. 1u _ 16 V _ Y 5 V _ 0 4
0 . 1 u_ 1 6 V _ Y 5V _0 4
M _A _D Q5 6 1 K _ 8P 4 R _0 4
3 .3 V S 4 M _ A _ D QS #[ 7 : 0 ] M _A _D QS # 0 10 DQ 5 6 18 3 M _A _D Q5 7
RN 3 M _A _D QS # 1 27 D QS 0 # DQ 5 7 19 1 M _A _D Q5 8
10 K _ 8 P 4 R _ 0 4 M _A _D QS # 2 45 D QS 1 # DQ 5 8 19 3 M _A _D Q5 9
1 8 M _A _D QS # 3 62 D QS 2 # DQ 5 9 18 0 M _A _D Q6 0
2 7 S A 1 _ DIM 1 10 M _A _D QS # 4 1 35 D QS 3 # DQ 6 0 18 2 M _A _D Q6 1
3 6 S A 1 _ D I M0 S A 0 _ DIM 1 10 1 52 D QS 4 # DQ 6 1 19 2
M _A _D QS # 5 M _A _D Q6 2
4 5 S A 0 _ D I M0 M _A _D QS # 6 1 69 D QS 5 # DQ 6 2 19 4 M _A _D Q6 3
M _A _D QS # 7 1 86 D QS 6 # DQ 6 3
D QS 7 #
LI N K T E K D D R R K -2 04 0 1 -TP 5B ? ? 5 .2 H REV
6-86-24204-005
V T T _M E M
1 . 5V
12/17 PWRCHANGE
C3 0 7 C 32 8 C3 1 7 C 30 2 C2 9 6
+ C6 4 2 + C7 0 2 + C 7 03
10 u _ 6. 3 V _ X 5 R _ 06 1 u _6 . 3 V _ X 5R _0 4 1u _ 6 . 3V _X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4
*5 60 u _ 2. 5V _ 6 . 6 *6 . 6 *5 . 9 56 0 u _2 . 5 V _ 6. 6 * 6. 6 * 5. 9 56 0 u _2 . 5 V _ 6. 6 * 6. 6 * 5. 9
1. 5 V
C3 2 1 C 32 3 C2 9 8 C 30 0 C3 0 1 C 30 4 C3 2 4 C2 9 9 C 3 03 C3 0 5
0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 0. 1 u _ 16 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4
10 , 3 8 V T T _M E M
1 . 5V 3 , 6 , 1 0, 2 5 , 2 9, 3 3 , 3 5 , 37 , 3 8 1 .5 V
3 , 10 , 1 1 , 1 2, 1 8 , 1 9, 2 0 , 2 1 , 22 , 2 3 , 24 , 2 5 , 27 , 2 8 , 3 0, 3 1 , 3 2, 3 3 , 3 4 , 35 , 3 9 3 .3 V S
C2 9 5 C 32 7 C3 1 2 C 32 5 C3 2 6 C 29 7 C3 2 2 C3 2 0
10 u _ 6. 3 V _ X 5 R _ 06 1 0 u_ 6 . 3 V _ X5 R _ 0 6 10 u _ 6. 3 V _ X 5 R _ 06 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4 1u _ 6 . 3V _ X 5 R _ 0 4 1 u _6 . 3 V _ X5 R _0 4
B - 10 DDR3 SO-DIMM_0
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Schematic Diagrams
DDR3 SO-DIMM_1
SO-DIMM B
J D I M M1 B
C3 1 3 *1 0 p_ 5 0 V _ N P O _ 04
M _ B _C L K _ D D R 2 M _ B _ CL K _ DD R# 2
J D I M M1 A 1 . 5V
C3 0 6 *1 0 p_ 5 0 V _ N P O _ 04 4 M _ B _ A [ 1 5: 0] M _B _ A 0 98 5 M_ B _ D Q 0 M_ B _ D Q[ 6 3 : 0 ] 4
M _ B _C L K _ D D R 3 M _ B _ CL K _ DD R# 3 M _B _ A 1 97 A0 DQ 0 7 M_ B _ D Q 1 75 44
M _B _ A 2 96 A1 DQ 1 15 M_ B _ D Q 2 76 VD D1 VSS1 6 48
M _B _ A 3 95 A2 DQ 2 17 M_ B _ D Q 3 81 VD D2 VSS1 7 49
M _B _ A 4 92 A3 DQ 3 4 M_ B _ D Q 4 82 VD D3 VSS1 8 54
M _B _ A 5 91 A4 DQ 4 6 M_ B _ D Q 5 87 VD D4 VSS1 9 55
M _B _ A 6 90 A5 DQ 5 16 M_ B _ D Q 6 88 VD D5 VSS2 0 60
M _B _ A 7 86 A6 DQ 6 18 M_ B _ D Q 7 93 VD D6 VSS2 1 61
M _B _ A 8 89 A7 DQ 7 21 M_ B _ D Q 8 94 VD D7 VSS2 2 65
La y out N ot e : M _B _ A 9 85 A8 DQ 8 23 M_ B _ D Q 9 99 VD D8 VSS2 3 66
M _B _ A 1 0 107 A9 DQ 9 33 M_ B _ D Q 10 100 VD D9 VSS2 4 71
signa l/ spac e /si gna l : M _B _ A 1 1 84 A 1 0/ A P DQ 1 0 35 M_ B _ D Q 11 105 VD D1 0 VSS2 5 72
M _B _ A 1 2 83 A1 1 DQ 1 1 22 M_ B _ D Q 12 106 VD D1 1 VSS2 6 1 27
8/ 4 / 8 M _B _ A 1 3 119 A 1 2/ B C # DQ 1 2 24 M_ B _ D Q 13 111 VD D1 2 VSS2 7 1 28
M _B _ A 1 4 80 A1 3 DQ 1 3 34 M_ B _ D Q 14 112 VD D1 3 VSS2 8 1 33
M _B _ A 1 5 78 A1 4 DQ 1 4 36 M_ B _ D Q 15 117 VD D1 4 VSS2 9 1 34
A1 5 DQ 1 5 39 M_ B _ D Q 16 118 VD D1 5 VSS3 0 1 38
109 DQ 1 6 41 123 VD D1 6 VSS3 1 1 39
B.Schematic Diagrams
M_ B _ D Q 17
4 M _B _B S 0 108 BA0 DQ 1 7 51 M_ B _ D Q 18 124 VD D1 7 VSS3 2 1 44
4 M _B _B S 1 3. 3 V S
79 BA1 DQ 1 8 53 M_ B _ D Q 19 VD D1 8 VSS3 3 1 45
4 M _B _B S 2 114 BA2 DQ 1 9 40 M_ B _ D Q 20 20 m ils 199 VSS3 4 1 50
4 M _B _C S # 2 121 S0 # DQ 2 0 42 M_ B _ D Q 21 V D DSP D VSS3 5 1 51
4 M _B _C S # 3 101 S1 # DQ 2 1 50 77 VSS3 6 1 55
M_ B _ D Q 22 C3 4 4 C3 4 3
4 M_ B _ C L K _ D D R 2 103 CK 0 DQ 2 2 52 M_ B _ D Q 23 122 NC 1 VSS3 7 1 56
4 M_ B _ C L K _ D D R # 2 102 CK 0 # DQ 2 3 57 125 NC 2 VSS3 8 1 61
M_ B _ D Q 24 1u _ 6 . 3 V _ X5 R _0 4 0 . 1u _ 1 6V _Y 5 V _ 04
4 M_ B _ C L K _ D D R 3 CK 1 DQ 2 4 NC T ES T VSS3 9
Sheet 10 of 49
104 59 M_ B _ D Q 25 1 62
4 M_ B _ C L K _ D D R # 3 CK 1 # DQ 2 5 VSS4 0
73 67 M_ B _ D Q 26 198 1 67
4 M_ B _ C K E 2 74 CK E 0 DQ 2 6 69 M_ B _ D Q 27 9 T S # _ D I M M0 _ 1 30 EVEN T # VSS4 1 1 68
4 M_ B _ C K E 3 115 CK E 1 DQ 2 7 56 M_ B _ D Q 28 3 ,9 D D R 3 _D R A MR S T # RE S ET # VSS4 2 1 72
4 M _ B _ CA S #
DDR3 SO-DIMM_1
110 CA S # DQ 2 8 58 M_ B _ D Q 29 C 333 1 u _ 6. 3 V _ X 5 R _ 0 4 VSS4 3 1 73
4 M _ B _ RA S # 113 RA S # DQ 2 9 68 M_ B _ D Q 30 V R E F _D Q_ 1 1 VSS4 4 1 78
4 M _ B_ W E# C 330 0 . 1 u _1 6 V _ Y 5 V _ 0 4
S A0 _ DIM 1 197 W E# DQ 3 0 70 M_ B _ D Q 31 C 288 1 u _ 6. 3 V _ X 5 R _ 0 4 V R E F _C A _ 1 126 V R E F _ DQ VSS4 5 1 79
9 S A 0 _ D I M1 S A1 _ DIM 1 201 SA0 DQ 3 1 12 9 M_ B _ D Q 32 V R E F _ CA VSS4 6 1 84
9 S A 1 _ D I M1 C 291 0 . 1 u _1 6 V _ Y 5 V _ 0 4
202 SA1 DQ 3 2 13 1 M_ B _ D Q 33 12/06 ? ? VSS4 7 1 85
9 , 19 S MB _C L K 200 SCL DQ 3 3 14 1 M_ B _ D Q 34 2 VSS4 8 1 89
9 , 19 S MB _D A T A SDA DQ 3 4 14 3 M_ B _ D Q 35 3 VSS1 VSS4 9 1 90
116 DQ 3 5 13 0 M_ B _ D Q 36 8 VSS2 VSS5 0 1 95
4 M _B _O D T 2 120 OD T 0 DQ 3 6 13 2 M_ B _ D Q 37 9 VSS3 VSS5 1 1 96
4 M _B _O D T 3 OD T 1 DQ 3 7 14 0 13 VSS4 VSS5 2
M_ B _ D Q 38
11 DQ 3 8 14 2 M_ B _ D Q 39 14 VSS5
28 DM 0 DQ 3 9 14 7 M_ B _ D Q 40 19 VSS6
46 DM 1 DQ 4 0 14 9 M_ B _ D Q 41 20 VSS7 V T T_ M E M
63 DM 2 DQ 4 1 15 7 M_ B _ D Q 42 CLOS E TO SO- DI MM 1 25 VSS8
136 DM 3 DQ 4 2 15 9 26 VSS9 2 03
M_ B _ D Q 43
153 DM 4 DQ 4 3 14 6 M_ B _ D Q 44 1 .5 V 31 VSS1 0 VT T1 2 04
170 DM 5 DQ 4 4 14 8 M_ B _ D Q 45 RN 2 32 VSS1 1 VT T2
187 DM 6 DQ 4 5 15 8 M_ B _ D Q 46 5 4 V R E F _ C A _1 37 VSS1 2 GN D 1
DM 7 DQ 4 6 16 0 M_ B _ D Q 47 6 3 V R E F _ D Q_ 1 R1 8 5 * 0 _0 4 38 VSS1 3 G 1 GN D 2
4 M _B _ D QS [ 7 : 0 ] M _B _ D QS 0 12 DQ 4 7 16 3 M_ B _ D Q 48 7 2 V R E F _ D Q_ C H B 8 43 VSS1 4 G 2
M _B _ D QS 1 29 DQ S0 DQ 4 8 16 5 M_ B _ D Q 49 8 1 C2 9 0 C 2 89 VSS1 5
47 DQ S1 DQ 4 9 17 5
M _B _ D QS 2 M_ B _ D Q 50 D D R R K -2 0 4 01 -T P 9 D
DQ S2 DQ 5 0
0 . 1 u_ 1 6 V _ Y 5V _0 4
0. 1u _ 1 6V _Y 5V _ 0 4
M _B _ D QS 3 64 17 7 M_ B _ D Q 51 1K _ 8 P 4 R _ 0 4
M _B _ D QS 4 137 DQ S3 DQ 5 1 16 4 M_ B _ D Q 52
M _B _ D QS 5 154 DQ S4 DQ 5 2 16 6 M_ B _ D Q 53
M _B _ D QS 6 171 DQ S5 DQ 5 3 17 4 M_ B _ D Q 54
M _B _ D QS 7 188 DQ S6 DQ 5 4 17 6 M_ B _ D Q 55
DQ S7 DQ 5 5 18 1 M_ B _ D Q 56
4 M _ B _D QS #[ 7 : 0 ] 10 DQ 5 6 18 3
M _B _ D QS # 0 M_ B _ D Q 57
M _B _ D QS # 1 27 DQ S0 # DQ 5 7 19 1 M_ B _ D Q 58
M _B _ D QS # 2 45 DQ S1 # DQ 5 8 19 3 M_ B _ D Q 59
M _B _ D QS # 3 62 DQ S2 # DQ 5 9 18 0 M_ B _ D Q 60
M _B _ D QS # 4 135 DQ S3 # DQ 6 0 18 2 M_ B _ D Q 61
M _B _ D QS # 5 152 DQ S4 # DQ 6 1 19 2 M_ B _ D Q 62
M _B _ D QS # 6 169 DQ S5 # DQ 6 2 19 4 M_ B _ D Q 63
186 DQ S6 # DQ 6 3
M _B _ D QS # 7
DQ S7 #
D D R R K -2 0 4 01 -T P 9 D ? ? 9 .2 H RE V
V T T_ M E M
6-86-24204-006
C 360 C3 1 4 C3 3 1 C3 5 0 C3 3 4
1 0 u _ 6. 3 V _ X 5 R _ 0 6 1u _ 6 . 3 V _X 5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1u _ 6 . 3 V _ X5 R _0 4 1 u _ 6. 3V _ X 5 R _ 0 4
1. 5V
C 316 C3 4 5 C3 5 9 C3 3 7 C3 4 1 C3 5 3 C3 3 6 C3 3 8
1 0 u _ 6. 3 V _ X 5 R _ 0 6 10 u _ 6. 3V _ X 5 R _ 0 6 10 u _ 6 . 3V _X 5 R _ 0 6 1u _ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _0 4 1 u_ 6 . 3 V _ X5 R _ 04 1 u_ 6 . 3 V _ X 5R _ 04 1 u_ 6 . 3 V _ X 5R _ 04
9 ,3 8 V T T _M E M
3 , 6 , 9 , 25 , 2 9 , 3 3, 35 , 3 7 , 3 8 1 .5 V
3 , 9, 1 1 , 1 2 , 1 8, 1 9 , 2 0 , 21 , 2 2 , 2 3, 24 , 2 5 , 2 7, 2 8 , 3 0 , 31 , 3 2 , 3 3, 34 , 3 5 , 3 9 3 .3 VS
La yout Note :
1 .5 V
SO -D IM M _1 i s pl ac e d fa rthe r f rom t he GM CH tha n S O- DIM M _ 0
C3 5 2 C3 3 5 C3 5 4 C3 4 0 C3 3 9 C3 4 2 C3 5 8 C3 5 7 C3 5 6 C 35 5
0 . 1 u _ 16 V _ Y 5V _0 4 0. 1 u _ 1 6V _ Y 5 V _0 4 0. 1 u _ 1 6V _Y 5 V _0 4 0. 1u _ 1 6V _Y 5 V _ 04 0 . 1u _ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6 V _Y 5 V _ 04 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _ Y 5 V _ 0 4
DDR3 SO-DIMM_1 B - 11
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Schematic Diagrams
PANEL, INVERTER, CRT
R N 21 8 1 0 _ 8 P 4R _ 04 La yo ut :N ot e
PANEL CONNECTOR (30Pin & 40Pin CO-lay) 3. 3 V S
21
21
L V D S -U 2N
L V D S -U 2P
7
6
2
3
LV DS & e DP
21 L V D S -U 1N
R3 6 9 2 . 2K _ 0 4 21 L V D S -U 1P
5
R N 22 8
4
1 0 _ 8 P 4R _ 04
? ? ? ? ? ?
21 L V D S -U 0N 7 2
R3 7 0 2 . 2K _ 0 4
21 L V D S -U 0P 6 3
VIN_ L CD 21 L V D S -L 0 N 5 4
21 L V D S -L 0 P
J _L C D 2 R5 2 3 0_04
1 2 P _ DDC _ DA T A 21 L V D S -L 1 N
21 L V D S -L1 P R5 2 4 0_04
3 1 2 4 P _ DDC _ CL K
5 3 4 6
7 5 6 8 B RIG HT NE S S _ R
C 17 C2 0 9 7 8 10 12/1 ADD
11 9 10 12 I N V _ B L ON R N 23 1 8 * 0 _8 P 4 R _ 0 4 MU X _2 N
0 . 1 u_ 5 0 V _Y 5V _0 6 0. 1 u _ 50 V _ Y 5 V _ 0 6 13 11 12 14 2 e DP _ T X N1 2 7 MU X _2 P
2 e DP _ T X P 1
L V D S -L C LK N 1 5 13 14 16 LV D S -L 2 N 3 6 MU X _1 N
L V D S -L C LK P 1 7 15 16 18 LV D S -L 2 P 2 e DP _ T X N0 4 5 MU X _1 P
19 17 18 20 2 e DP _ T X P 0
R N 24 1 8 * 0 _8 P 4 R _ 0 4 MU X _0 N
MU X _4 N 21 19 20 22 E MB _ H P D 2 e D P _ A U XN 2 7 MU X _0 P
MU X _4 P 23 21 22 24 2 e D P _ A U XP 3 6 MU X _3 N
23 24 3 .3 V S 2 e DP _ T X N2
25 26 4 5 MU X _3 P
CLOSE TO LVDS CONN. PIN MU X _3 N 27 25
27
26
28
28 2
2
e DP _ T X P 2
e DP _ T X N3 R5 2 5 * 0 _0 4 MU X _4 N
MU X _3 P 29 30 R5 2 6 * 0 _0 4 MU X _4 P
29 30 2 e DP _ T X P 3
C 15
*8 7 2 16 -3 0 06
B.Schematic Diagrams
0 . 1 u_ 1 6 V _Y 5 V _0 4
VIN_ L CD
G 1
P L V DD
G2
J _ L CD 1 V DD 3 SYS1 5 V Q 6
P _ D D C _ D A TA P _D D C _D A T A 2 1 C1 1 C1 0 P 2 7 0 3B A G
PANEL POWER
Gn d 1
G nd2
1 2 P _ DD C_ CL K 3. 3 V 6 PL V DD
3 4 P _D D C _C L K 2 1 5
4 . 7 u_ 6 . 3V _X 5 R _ 0 6 0. 1 u _ 16 V _ Y 5 V _ 0 4
5
7
6
8
B R I GH TN E S S _ R R8 R 7 2A 2 4 2A
1
9 10 I N V _ B LO N 1M _ 04 1 M_ 0 4
Sheet 11 of 49 11
13
12
14
R1 8 * 1 0K _ 0 4
PL V DD
3
LV D S -L C L K N L V D S -L2 N
21 L V D S -L C L K N LV D S -L C L K P 15 16 L V D S -L2 P L V D S -L2 N 21
21 L V D S -L C L K P L V D S -L2 P 21 R1 5 0_04 Q 5 R1 3
C
17 18
6
D T C 11 4 E U A D
PANEL, INVERTER, MU X _ 4 N
MU X _ 4 P
19
21
20
22
E M B_ HP D
E MB _H P D 2
B R I G H T N E S S _R A C
B R I GH TN E S S 34
NB _ E N AV DD B
2G
C1 4 1 00 _ 0 4
AC
23 24 3 . 3V S
S 0 . 02 2 u _1 6 V _ X7 R _ 0 4
25 26
1
CRT
MU X _ 3 N D7 D 6 *R B 7 5 1 S -40 C 2 R 17 Q 2A
27 28 P L VDD 2A
E
MU X _ 3 P
3
M TD N 7 0 0 2Z H S 6 R D
29 30 *B A V 99 R E C T I F I E R * 1 00 K _ 0 4
31 32
C
5G
A
MU X_ 2 N NB _ E N A V DD #
21 L V D S -U C L K N 33 34 MU X_ 2 P S
21 L V D S -U C L K P 35 36 3 .3 V
4
MU X _ 1 N MU X_ 0 N Q2 B
37 38
MU X _ 1 P MU X_ 0 P C2 8 MT D N 7 00 2 Z H S 6 R
39 40 *0 . 1 u_ 1 6V _Y 5V _ 0 4
87 2 1 6-4 0 0 6
? 4 0pin c onnec to r? , ? ? 3 0pin c onnec to r? ? ? ? pin
pad? ? ? ? V IN L1 V IN_ L CD
*H C B 1 6 0 8K F - 12 1 T2 5
VIN Q 3
CRT J_ C R T 1 2A S
M TP 3 4 0 3N 3
D 2A
1 0 8A H 1 5F S T0 4 A 1 C C
12/8 ? ?
DA C_ RE D L4 F C M1 0 0 5M F -6 00 T 0 1 L4 1 F C M1 0 0 5M F -6 00 T 01 F RED 1 R 59 5
21 DA C _ RE D
G
9 R9 1 0 0 K _0 4 R1 2 1 0 K _ 04
D A C _ GR E E N L3 F C M1 0 0 5M F -6 00 T 0 1 L4 0 F C M1 0 0 5M F -6 00 T 01 F GR N 2 B L 01 1 K _ 04
21 D A C _ GR E E N 10 B L 02
D A C _ B LU E L2 F C M1 0 0 5M F -6 00 T 0 1 L3 9 F C M1 0 0 5M F -6 00 T 01 F B L UE 3
21 D A C _ B LU E
3
11 D D
C 25 C 16 C 12 C 52 8 C 52 4 C5 2 2 C5 2 7 C5 2 3 C 5 21 4
12
24 mil D DCD A T A N B _ E NA V D D 2G N B _ E N A V D D # 5G
5 2 1 ,3 4 NB _ E N A V DD
6 p_ 5 0 V _N P O_ 0 4
6 p _5 0 V _ N P O _0 4
6 p _5 0 V _ N P O_ 0 4
6 p_ 5 0V _N P O_ 0 4
6 p _5 0 V _ N P O _0 4
6 p_ 5 0 V _N P O_ 0 4
6 p_ 5 0V _N P O_ 0 4
6 p _ 50 V _ N P O _ 04
R 37 6 R 37 2 R3 7 1 S S
6p _ 5 0V _ N P O_ 04
13
4
H SYN C Q4 A Q 4B
6
1 5 0 _1 % _0 4
1 5 0_ 1 % _0 4
1 50 _ 1 %_ 0 4
MT D N 70 0 2 Z H S 6 R M TD N 7 0 02 Z H S 6R
14 V S Y NC
7
15 D DCL K
8 3 .3 V
3 . 3V
2 2 0 p_ 5 0 V _N P O_ 0 4
1 0 0 0p _ 50 V _ X 7 R _ 0 4
1 00 0 p_ 5 0 V _X 7R _0 4
22 0 p _5 0 V _ N P O_ 0 4
G ND 2
GN D 1
3 . 3V S 5V S R 40 8 *1 0 0 K _0 4 U2 7 A
14
74 L V C 0 8 P W U 27 B
14
B K L _E N 1
8
7
6
5
7 4 LV C 0 8P W
R N1 34 BKL _ EN 3 B L ON 1 4 3 .3 V
B L ON 2 6 B L O N2
C 13
C 5
2 . 2 K _ 8P 4R _0 4
C9
C7
21 B L ON
5
1
2
3
4
R 40 7 1 00 K _ 0 4
7
U2 7 C
7
14
U 23 74 L V C 0 8 P W
10 9 D DC DA T A 9
21 DA C_ D DCA DA T A DD C_ IN1 D D C _ OU T 1 3 . 3V 8 I N V _ B L ON
R 40 6 *1 0 0 K _0 4
11 12 DD CL K 10
21 DA C_ D DCA CL K DD C_ IN2 D D C _ OU T 2 U 27 D
14
13 14 23 S B _ B L ON
H S Y N C _ C R 16 33 _ 04 HS Y NC 7 4 LV C 0 8P W
21 D A C_ H S YNC S Y N C_ IN1 S Y N C _ OU T 1
7
12 R 3 97 C5 4 8
15 16 28 , 3 4 L ID_ S W # 11 L I D _ S W # 1
V S Y N C _ C R 14 33 _ 04 V S Y NC
21 D A C_ V S Y NC S Y N C_ IN2 S Y N C _ OU T 2 13 1 M _0 4
* 0. 1 u _ 16 V _ Y 5 V _0 4
1 3 F RED 2 0 , 3 4, 3 9 A L L _ S Y S _ P W R GD
5 VS R2 5 1 _ 04
V C C _S Y N C VIDEO _ 1
7
2 4 F GR N
3 .3 V S V C C _V I D E O VIDEO _ 2
C2 7 C3 0 7 5 F B L UE
V C C _D D C VIDEO _ 3
B YP 8 6
0 . 1u _ 1 6V _ Y 5 V _ 0 4
0. 1 u _ 16 V _ Y 5 V _0 4
BYP G ND
T PD7 S 0 1 9
C5 2 5 ESD+LEVEL SHIFT+BUFFER
1 8 , 27 , 3 0 , 34 , 3 5 , 36 , 3 7 , 41 , 4 2 V D D 3
0 . 1u _ 16 V _ Y 5 V _ 0 4
3 5, 3 6 , 3 7 S Y S 1 5 V
M 6-02-07019-B20 3 5 , 36 , 3 7 , 38 , 3 9 , 40 , 4 1 , 42 V IN
S 6-02-47721-B60 1 8, 2 4 , 2 5, 2 8 , 3 1, 3 2 , 3 3, 3 5 , 3 9, 4 0 5 V S
2 , 3, 8 , 1 6 , 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 30 , 3 5 , 37 , 3 8 , 39 3. 3 V
3 , 9, 10 , 1 2, 18 , 1 9, 20 , 2 1, 22 , 2 3, 24 , 2 5, 27 , 2 8, 30 , 3 1, 32 , 3 3, 34 , 3 5, 39 3 . 3 V S
B - 12 PANEL, INVERTER, CRT
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Schematic Diagrams
VGA PCI-E Interace
GPU
H7 H8 H 12
H8 _0D 4_3 H8_0 D4_ 3 H 8_0D 4_3 3V3 _RU N
BI OS R OM
U26A PE X_V DD 3 V3_R U N
1/16 PCI _EXPR ESS 12/7 ? BIOS
A K16 R3 73
PE X_IO VDD A K17 U 24 share ROM ,
PE X_IO VDD
7
PE X_IO VDD A K21 C1 39 C 103 C9 2 C 120 C 38 C 43 C 33 U 26K *10K_ 04 H OLD VC C 8
A K24 13/16M I SC2 3 ? ? ?? ?
PE X_IO VDD A K27 0. 1u_16 V_Y 5V_ 04 0. 1u _16V_ Y5V _04 1u_6. 3V _X5R _04 1u_6 .3V _X5R _04 10u _6. 3V_X5 R_0 6 4. 7u_6 .3 V_X5R _06 22 u_6. 3V_ X5R _08 J2 6 C3 VG A_R O M_C S# 1 WP C 531
PE X_IO VDD J2 5 BBIA SN_NC ROM_CS CS
BBIA SP_NC D3 5
R OM_SI VG A_R O M_S I SI *0 .1u _16V _Y5V _04
3 .3V S 3V 3_R UN P LAC E N EAR BA LLS P LAC E N EAR BG A C4 VG A_R O M_S O 2
A G1 1 ROM_SO D4 VG A_R O M_S CL K 6 SO 4
PEX_I OVD DQ R OM_SCLK SC K GN D
PEX_I OVD DQ A G1 2
PEX_I OVD DQ A G1 3 *MX25L 5121E MC - 20G
C3 9 R 44 PEX_I OVD DQ A G1 5
PEX_I OVD DQ A G1 6 S TRAP 0 W5 VG A_S TRA P0 6-04-25512-B71
U4 1u_6. 3V _X5R _04 10 0K_0 4 PEX_I OVD DQ A G1 7 22 0 0 mA S TRAP 1 W7 VG A_S TRA P1
MC 74VH C 1G0 8DF T2G PEX_I OVD DQ A G1 8 S TRAP 2 V7 VG A_S TRA P2 6-04-25512-B70
5
A G2 2 P EX_ VD D
1 PEX_I OVD DQ A G2 3 3V3_R U N 6-04-25512-B72
34 dG P U_R ST # 4 A M1 6 PEX_I OVD DQ A G2 4
PE RS TB# PEX_R ST PEX_I OVD DQ 6-04-25010-490
3, 22, 28 PLT_ RS T# 2 I2C H_SC L F6 I2C H _SC L R 384 *2 2
. K_04
A R1 3 PEX_C LKREQ PEX_I OVD DQ A G2 5 C8 4 C 79 C9 5 C66 C 44 C 131 C36
3V3_ RU N R6 1 A G2 6 G6 I2C H _SD A R 383 *2 2
. K_04
PEX_I OVD DQ I2CH _SDA
3
PEX_I OVD DQ A J14 0. 1u_16 V_Y 5V_ 04 0. 1u _16V_ Y5V _04 1u_6. 3V _X5R _04 1u_6. 3V _X5R _04 10 u_6. 3V_ X5R _06 4 .7u _6. 3V_X 5R_ 06 22u_6. 3V _X5R _08
100K _04 PEX_I OVD DQ A J15 AB 5 CEC
R55 *0_0 4 A J19
G
PEX_I OVD DQ
PEX_I OVD DQ A J21 P LAC E N EAR BA LLS P LAC E N EAR BG A S PDI F_NC A5
PEX_I OVD DQ A J22
D S P EX_C LK RE Q#_ R A J24 A4
1 9 P EG _CL KR EQ # PEX_I OVD DQ A J25 BU FRST C5
PEX_I OVD DQ PGO OD _OUT
Q29 PEX _TST CLK _O UT AJ1 7 PEX_T STCLK_O UT PEX_I OVD DQ A J27 R 57 40. 2K_ 1%_04 M_S TRA P_R EF 0 N 9 MU LTI_STR AP_R EF0_GN D
MTN 700 2ZH S3 R 64 *220 _1%_04 PEX _TST CLK _O UT# AJ1 8 A K18 R 60 40. 2K_ 1%_04 M_S TRA P_R EF 1 M9
PEX_T STCLK_O UT PEX_I OVD DQ A K20 MU LTI_STR AP_R EF1_GN D AK1 4
B.Schematic Diagrams
VG A_P EXC LK A R1 6 PEX_I OVD DQ A K23 G ND K9
19 VG A_P EXC LK PEX_R EFC L
K PEX_I OVD DQ G ND
19 VG A_P EXC LK # VG A_P EXC LK# A R1 7 PEX_R EFC L
K PEX_I OVD DQ A K26
PEX_I OVD DQ A L16 N 12P -G V 2-A 1
PEG _R X0 C 71 0. 22u _10V_ X5R _04 PE X_R X0 AL1 7 PEX_T X0
2 PE G_ RX0 PEG _R X#0 C 77 0. 22u _10V_ X5R _04 PE X_R X0# A M1 7
2 PE G_ RX# 0 PEX_T X0
PEG _TX0 AP1 7 PEX_R X0 3V 3_R UN P EX_ VD D P LAC E N EA R BA LLS
2 P EG _TX0 PEG _TX# 0 A N1 7 L5 HC B 1608K F- 121T2 5
2 P EG _TX# 0 PEX_R X0 L6 H CB 1005K F- 121 T20 16 mi l V I D_P LLVD D
A M1 8 A G1 9 16 m il
2 PE G_ RX1 PEG _R X1 C 75 0. 22u _10V_ X5R _04 PE X_R X1 PEX_T X1 PEX_S VDD 3
_V 3 PEX _VD D_ SVD D
2 PE G_ RX# 1 PEG _R X#1 C 81 0. 22u _10V_ X5R _04 PE X_R X1# A M1 9 PEX_T X1 G F108 PE X_SVDD _3V3_NC F 7 C 51 C 45 C4 1 C4 9 C 42
Sheet 12 of 49
C 104 C5 8 U26D
PEG _TX1 A N1 9 G T21X P EX_SVD D_3V3 4 .7u _6. 3V_X 5R_ 06 10u_ 6.3 V_X5 R_0 6 0. 1u_10V _X5R _04 0. 1u_10 V_X5R _04 0. 1u_1 0V_X5 R_0 4 14/ 16XTA L_PLL
2 P EG _TX1 PEG _TX# 1 AP1 9 PEX_R X1 4. 7u_ 6. 3V_X5 R_0 6 0. 1u_10V _X5R _04 NE AR PI N AD 9 N EAR PI N A F9
2 P EG _TX# 1 PEX_R X1 A E9
AL1 9 A2 A D9 PLLVD D
2 PE G_ RX2 PEG _R X2 C 86 0. 22u _10V_ X5R _04 PE X_R X2 PEX_T X2 NC 12 mi l VI D_PLLVD D
2 PE G_ RX# 2 PEG _R X#2 C 82 0. 22u _10V_ X5R _04 PE X_R X2# AK1 9 PEX_T X2 NC A7 S P_P LLV DD A F9 SP _PLLVDD
VGA PCI-E Interace
A A4
A R1 9 NC A B4 PL AC E NE AR BAL LS
2 P EG _TX2 PEG _TX2 PEX_R X2 NC C4 8 C 61
2 P EG _TX# 2 PEG _TX# 2 A R2 0 PEX_R X2 NC A B7
NC A C5 4. 7u_6. 3V _X5R _06 0. 1u_1 0V_X5 R_0 4
PEG _R X3 C 85 0. 22u _10V_ X5R _04 PE X_R X3 AL2 0 A D6 N EAR PI N A E9
2 PE G_ RX3 PEG _R X#3 C 93 0. 22u _10V_ X5R _04 PE X_R X3# A M2 0 PEX_T X3 NC A F6
2 PE G_ RX# 3 PEX_T X3 NC A G6 X_S SI N D2 D1 X_O U TBU FF
NC XT AL_SSIN XTAL_O UTB UFF
2 P EG _TX3 PEG _TX3 AP2 0 PEX_R X3 NC A J5
PEG _TX# 3 A N2 0 A K15
2 P EG _TX# 3 PEX_R X3 NC A L7 B1 B2
NC XT AL_IN XTAL_O UT
2 PE G_ RX4 PEG _R X4 C 94 0. 22u _10V_ X5R _04 PE X_R X4 A M2 1 PEX_T X4 NC B7 R 381 R38 2
PEG _R X#4 C 100 0. 22u _10V_ X5R _04 PE X_R X4# A M2 2 PEX_T X4 NC C 7 R3 80 0_0 4 STR AP 4 N 12P- G V2- A 1
2 PE G_ RX# 4 NC D5 10 K_04 10K_0 4
2 P EG _TX4 PEG _TX4 A N2 2 PEX_R X4 NC D6 FSX8L_25MHz? ? ? ? ?
PEG _TX# 4 AP2 2 PEX_R X4 NC D 7 R3 4 0_0 4 STR AP 3
2 P EG _TX# 4 NC E5 X6 HS X840G A_ 27MHZ
PEG _R X5 C 106 0. 22u _10V_ X5R _04 PE X_R X5 AL2 2 E 7 R3 5 0_0 4 PG OO D XTAL_ N
I 1 2 XTA L_O UT
2 PE G_ RX5 PEG _R X#5 C 107 0. 22u _10V_ X5R _04 PE X_R X5# AK2 2 PEX_T X5 NC F4
2 PE G_ RX# 5 PEX_T X5 NC G5
NC C 29 C2 6
2 P EG _TX5 PEG _TX5 A R2 2 PEX_R X5 NC H 32 X5
PEG _TX# 5 A R2 3 PEX_R X5 NC P 6 R3 0 0_0 4 MU LTI _S TRA P_R EF 2_G ND 2 0p_50V _N PO _04 20p_5 0V_N PO _04
2 P EG _TX# 5 U7 4 3
PEG _R X6 C 118 0. 22u _10V_ X5R _04 PE X_R X6 AL2 3 NC V6
2 PE G_ RX6 PEG _R X#6 PE X_R X6# A M2 3 PEX_T X6 NC Y4 1 2
2 PE G_ RX# 6 C 119 0. 22u _10V_ X5R _04 PEX_T X6 NC
*H S X321S _27MHZ
2 P EG _TX6 PEG _TX6 AP2 3 PEX_R X6 VDD 33 J 10
PEG _TX# 6 A N2 3 PEX_R X6 VDD 33 J 11
2 P EG _TX# 6
VDD 33 J 12 3V 3_R UN
2 PE G_ RX7 PEG _R X7
PEG _R X#7
C 122
C 132
0. 22u _10V_ X5R _04
0. 22u _10V_ X5R _04
PE X_R X7
PE X_R X7#
A M2 4
A M2 5
PEX_T X7
PEX_T X7
VDD 33 J 13
VDD 33 J 9
Cry s ta l 80 4 5 & 3 2 2 5 Co- la y
2 PE G_ RX# 7
PEG _TX7 A N2 5 PEX_R X7 C6 5 C 56 C 40 C 35 C 62
2 P EG _TX7 PEG _TX# 7 AP2 5 PEX_R X7
2 P EG _TX# 7
0. 1u_16 V_Y 5V_0 4 0. 1u_16 V_Y 5V_ 04 0. 1u_1 6V_Y 5V _04 4. 7u_6 .3 V_X5R _06 1u _6. 3V_X 5R_ 04
AL2 5 PEX_T X8
AK2 5 PEX_T X8
PLA CE N EA R BA LLS
A R2 5 PEX_R X8
A R2 6
PEX_R X8
AL2 6 PEX_T X9 VDD_S ENSE D 35
A M2 6 P7
PEX_T X9 VDD_S ENSE 3V 3_R U N
VDD_S ENSE A D2 0 PS 1_VD D _SE NS E PS 1_V DD _SE NS E 41
AP2 6 PEX_R X9 G ND_S ENSE A D1 9 PS 1_G ND _S EN SE PS 1_G ND _S EN SE 41
A N2 6 R7 R28 *20K _1%_04 V GA _R OM_SI R 379 2 0K_1%_ 04
PEX_R X9 G ND_S ENSE
G ND_S ENSE E 35
A M2 7 PEX_T X10
A M2 8 R37 4 *4. 99K _1%_04 V GA _R OM_SO R 375 1 0K_04
PEX_T X10
A N2 8
PEX_R X10
AP2 8 PEX_R X10 R29 *15K _1%_04 V GA _R OM_SC LK R 378 1 5K_1%_ 04
PEX_ VD D
AL2 8 PEX_T X11
AK2 8 1 6 mi l L7 H C B10 05KF -1 21T20 R37 45. 3K _1%_04 V GA _ST RA P0 R 38 *4. 99 K_1%_0 4
PEX_T X11
PEX P
_ LLVDD A G1 4 P EX_P LLV DD 12/ 7
A R2 8 PEX_R X11
A R2 9 PEX_R X11 C 73 C72 C7 0 R49 *34. 8K _1%_04 V GA _ST RA P1 R 48 4 .99 K_1%_0 4
AK2 9 PEX_T X12 0. 1u_ 16V_ Y5V _04 1u_6. 3V _X5R _04 4. 7u_6. 3V _X5R _06
AL2 9 PEX_T X12 R47 30K _1%_04 V GA _ST RA P2 R 46 *24 .9 K_1%_0 4
AP2 9 PLA CE NE AR B ALLS PL AC E NE AR BG A
A N2 9 PEX_R X12
PEX_R X12
A M2 9 1u->0.1u C990525
A M3 0 PEX_T X13
PEX_T X13
A N3 1
AP3 1 PEX_R X13
PEX_R X13
De f a ult N1 2 P- GV2 RED MA RK De f aul t 1 G VGA R O M G RE EN M AR K
A M3 1
A M3 2 PEX_T X14
PEX_T X14 GT21X GF108
V GA CAR D R2 9 R37 8 R4 7 R 46 V GA ROM T ype R3 79
A R3 1 A G2 0 6-04-41164-E35
A R3 2
PEX_R X14
PEX_R X14
RF U PEX_P LL
_H VDD _NC N 12P -GS 15 K X X 24 .9K SAM SUN G 1G K 4W1 G16 46G -BC 11 20 K
PEX_TER MP A G2 1 PE X_TE RMP R74 2.4 9K_1 %
_ 04
A N3 2 6-04-42164-E30
AP3 2 PEX_T X15
PEX_T X15
N 12P -GV 2 X 15K 30 K X SAM SUN G 2G K 4W2 G16 46C -HC 11 45 .3K
A R3 4 PEX_R X15
AP3 4 PEX_R X15 TE STMODE A P35 G PU _TES TMOD E R42 2 10K_ 04
N1 2P- GV 2- A1
16, 37, 41 3V3 _RU N
13, 37 PE X_VD D
3 ,9 1
,0 1
,1 1
, 8 ,1 9,2 0,2 1, 22, 23, 24, 25, 27, 28, 30, 31, 32, 33, 34, 35, 39 3. 3VS
VGA PCI-E Interace B - 13
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Schematic Diagrams
VGA Frame Buffer Interface
F ram e Buf fer Interface
U 26B U 26C
2/16F BA 3/16F BB
15 FB C_D [ 63: 0] FB C_ D[ 63: 0] FBV D DQ
P2N727
FB A_D [ 63: 0] FBV DD Q P LAC E U N DE R BG A
A 27
14 FB A_D 6
[ 3: 0] B13
AAA29
P LAC E U ND E R BG A F BC _D0
7 27
FBB_D0 F BVDD Q
FB A_D 0 L32 F BC _D1 D 13
A 31
T2 R
FB A_D 1 N 33 F BA_D0 FB VDD Q F BC _D2 A13 FBB_D1 F BVDD Q
BA27
F BA_D1 FB VDD Q FBB_D2 F BVDD Q
U 27
L33 A14
BA29
FB A_D 2 C1 28 C 125 C 124 C12 6 F BC _D3 C1 29 C 136 C 96 C1 27
7 29
FB A_D 3 N 34 F BA_D2 FB VDD Q F BC _D4 C 16 FBB_D3 F BVDD Q
27
F BA_D3 FB VDD Q FBB_D4 F BVDD Q
2U
CA
FB A_D 4 N 35 F BC _D5 B16
DA27
F BA_D4 FB VDD Q 0. 1u_10 V_X5R _0 4 0. 1u_1 0V_X 5R_ 04 01
. u _10V _X5R _04 0. 1u_10V _X5R _04 FBB_D5 F BVDD Q 0. 1u_10 V_X5 R_0 4 0. 1u_ 10V_ X5R _04 01
. u_10V _X5R _04 0. 1u_10 V_X5 R_0 4
42V9
FB A_D 5 P 35 F BC _D6 A17
27
F BA_D5 FB VDD Q FBB_D6 F BVDD Q
AE A
V3 V
FB A_D 6 P 33 F BA_D6 FB VDD Q F BC _D7 D 16 FBB_D7 F BVDD Q
P 34 C 13
FB A_D 7 F BA_D7 FB VDD Q F BC _D8 FBB_D8 F BVDD Q
FB A_D 8 K 35 F BA_D8 FB VDD Q A J28 P LAC E N EA R BG A F BC _D9 B11 FBB_D9 F BVDD Q W 27 P LAC E N EA R B GA
FB A_D 9 K 33 B 18 F BC _D1 0 C 11 Y 27
K 34 F BA_D9 FB VDD Q E 21 A11 FBB_D10 F BVDD Q
FB A_D 10 F BA_D10 FB VDD Q F BC _D1 1 FBB_D11
FB A_D 11 H 33 F BA_D11 FB VDD Q G 17 C5 0 C 80 F BC _D1 2 C 10 FBB_D12
FB A_D 12 G 34 F BA_D12 FB VDD Q G 18 F BC _D1 3 C8 FBB_D13 C1 01 C 108
FB A_D 13 G 33 F BA_D13 FB VDD Q G 22 1u_6. 3V _X5R _04 4. 7u_6 .3 V_X5 R_0 6 F BC _D1 4 B8 FBB_D14
FB A_D 14 E 34 F BA_D14 FB VDD Q G8 F BC _D1 5 A8 FBB_D15 1u_6 .3V _X5R _04 4. 7u_ 6.3 V_X5 R_0 6
FB A_D 15 E 33 G9 F BC _D1 6 E8
FB A_D 16 G 31 F BA_D15 FB VDD Q H 29 F BC _D1 7 F8 FBB_D16
F BA_D16 FB VDD Q FBB_D17
FB A_D 17 F 30 F BA_D17 FB VDD Q J1 4 F BC _D1 8 F10 FBB_D18
FB A_D 18 G 30 J1 5 F BC _D1 9 F9
FB A_D 19 G 32 F BA_D18 FB VDD Q J1 6 F BC _D2 0 F12 FBB_D19
FB A_D 20 K 30 F BA_D19 FB VDD Q J1 7 F BC _D2 1 D8 FBB_D20
F BA_D20 FB VDD Q FBB_D21
FB A_D 21 K 32 F BA_D21 FB VDD Q J2 0 F BC _D2 2 D 11 FBB_D22
FB A_D 22 H 30 J2 1 F BC _D2 3 E11
K 31 F BA_D22 FB VDD Q J2 2 D 12 FBB_D23
FB A_D 23 F BA_D23 FB VDD Q F BC _D2 4 FBB_D24
FB A_D 24 L31 F BA_D24 FB VDD Q J2 3 F BC _D2 5 E13 FBB_D25
FB A_D 25 L30 F BA_D25 FB VDD Q J2 4 F BC _D2 6 F13 FBB_D26
FB A_D 26 M32 F BA_D26 FB VDD Q J2 9 F BC _D2 7 F14 FBB_D27
FB A_D 27 N 30 F BA_D27 F BC _D2 8 F15 FBB_D28
FB A_D 28 M30 F BC _D2 9 E16
B.Schematic Diagrams
F BA_D28 FBB_D29
FB A_D 29 P 31 F BC _D3 0 F16
FB A_D 30 R 32 F BA_D29 F BC _D3 1 F17 FBB_D30
R 30 F BA_D30 D 29 FBB_D31
FB A_D 31 F BC _D3 2
FB A_D 32 AG 30 F BA_D31 F BC _D3 3 F27 FBB_D32
FB A_D 33 AG 32 F BA_D32 F BC _D3 4 F28 FBB_D33
F BA_D33 FBB_D34
FB A_D 34 AH 31 F BA_D34 F BC _D3 5 E28 FBB_D35
FB A_D 35 AF 31 F BC _D3 6 D 26
AF 30 F BA_D35 F25 FBB_D36
FB A_D 36 F BA_D36 F BC _D3 7 FBB_D37
FB A_D 37 AE 30 F BA_D37 F BC _D3 8 D 24 FBB_D38
FB A_D 38 AC 32 F BA_D38 F BC _D3 9 E25 FBB_D39
FB A_D 39 AD 30 FBA _C MD [ 31: 0] F BC _D4 0 E32
FB A_D 40 AN 33 F BA_D39 F BA _CMD [3 1: 0] 14 F BC _D4 1 F32 FBB_D40 FBC _C MD[ 31: 0]
F BA_D40 FBB_D41 F BC _C MD [ 31: 0] 15
Sheet 13 of 49
FB A_D 41 A L31 F BA_D41 F BC _D4 2 D 33 FBB_D42
FB A_D 42 AM33 F BC _D4 3 E31
FB A_D 43 A L33 F BA_D42 F BC _D4 4 C 33 FBB_D43
AK 30 F BA_D43 F29 FBB_D44
FB A_D 44 F BA_D44 F BC _D4 5 FBB_D45
FB A_D 45 AK 32 F BA_D45 F BC _D4 6 D 30 FBB_D46
FB A_D 46 A J30 FBA _C MD 1 F BC _D4 7 E29 FB C_C MD1
F BA_D46 FBB_D47
VGA Frame Buffer FB A_D 47 AH 30 FBA _C MD 17 F BC _D4 8 B29 FB C_C MD1 7
FB A_D 48 AH 33
F BA_D47
FBA _C MD 31
UNUSED NTES F BC _D4 9 C 31
FBB_D48
FB C_C MD3 1
UNUSED NTES
FB A_D 49 AH 35 F BA_D48 F BC _D5 0 C 29 FBB_D49
F BA_D49 FBB_D50 GT21X GF 10
8
FB A_D 50 AH 34 F BA_D50 GT21X GF108 F BC _D5 1 B31 FBB_D51
FB A_D 51 AH 32 F BA_D51 F BC _D5 2 C 32 FBB_D52 FB B_CMD0 F 18 FB C_C MD0
A J33 U 30 B32 FBB _CM D25 E 19
Interface
FB A_D 52 F BA_D52 FBA _CM D25 FB A_CMD0 FBA _C MD 0 F BC _D5 3 FBB_D53 FBB _CM D23 FB B_CMD1 FB C_C MD1
FB A_D 53 A L35 F BA_D53 FBA _CM D23 FB A_CMD1 V 30 FBA _C MD 1 F BA_ OD T_L F BA_ CMD 0 R 81 10K_ 04 F BC _D5 4 B35 FBB_D54 FBB _CM D2 FB B_CMD2 D 18 FB C_C MD2
FB A_D 54 AM34 F BA_D54 FB A_CMD2 U 31 FBA _C MD 2 F BA_ OD T_H F BA_ CMD 19 R 86 10K_ 04 F BC _D5 5 B34 FBB_D55 FB B_CMD3 C 17 FB C_C MD3 FBA _O DT _L FB C_C MD0 R 67 10K _04
FB A_D 55 AM35 FBA _CM D2 V 32 FBA _C MD 3 F BA_ CK E_L F BA_ CMD 3 R 106 10K_ 04 F BC _D5 6 A29 FBB _CM D0 F 19 FB C_C MD4 FBA _O DT _H FB C_C MD1 9R 71 10K _04
FB A_D 56 AF 33 F BA_D55 FBA _CM D0 FB A_CMD3 T3 5 FBA _C MD 4 F BA_ CK E_H F BA_ CMD 16 R 87 10K_ 04 F BC _D5 7 B28 FBB_D56 FBB _CM D10 FB B_CMD4 C 19 FB C_C MD5 FBA _C KE _L FB C_C MD3 R 68 10K _04
FB A_D 57 AE 32 F BA_D56 FBA _CM D10 FB A_CMD4 U 33 FBA _C MD 5 F BA_ CMD 20 R 110 F BC _D5 8 A28 FBB_D57 FBB _CM D26 FB B_CMD5 B 17 FB C_C MD6 FB C_C MD1 6R 77
F BA_D57 FB A_CMD5 F BA_ RS T# 10K_ 04 FBB_D58 FB B_CMD6 FBA _C KE _H 10K _04
FB A_D 58 AF 34 FBA _CM D26 W3 2 FBA _C MD 6 F BC _D5 9 C 28 FBB _CM D14 E 20 FB C_C MD7 FBA _R ST# FB C_C MD2 0R 72 10K _04
FB A_D 59 AE 35 F BA_D58 FBA _CM D14 FB A_CMD6 W3 3 FBA _C MD 7 F BC _D6 0 C 26 FBB_D59 FBB _CM D7 FB B_CMD7 B 19 FB C_C MD8
AE 34 F BA_D59 FBA _CM D7 FB A_CMD7 W3 1 D 25 FBB_D60 FBB _CM D1 FB B_CMD8 D 20
FB A_D 60 F BA_D60 FBA _CM D1 FB A_CMD8 FBA _C MD 8 F BC _D6 1 FBB_D61 FBB _CM D22 FB B_CMD9 FB C_C MD9
FB A_D 61 AE 33 F BA_D61 FBA _CM D22 FB A_CMD9 W3 4 FBA _C MD 9 F BC _D6 2 B25 FBB_D62 FBB _CM D20 FB B_CMD10 A 19 FB C_C MD1 0
FB A_D 62 AB 32 F BA_D62 FB A_CMD10 U 34 FBA _C MD 10 F BC _D6 3 A25 FBB_D63 FB B_CMD11 D 19 FB C_C MD1 1
AC 35 FBA _CM D20 U 35 FB CD Q M[ 7: 0] FBB _CM D24 C 20
FB A_D 63 F BA_D63 FBA _CM D24 FB A_CMD11 FBA _C MD 11 15 FBC D QM[ 7: 0] FBB _CM D18 FB B_CMD12 FB C_C MD1 2
1 4 FB AD Q M[ 7: 0] FB AD QM[ 7: 0] FBA _CM D18 FB A_CMD12 U 32 FBA _C MD 12 FBB _CM D9 FB B_CMD13 F 20 FB C_C MD1 3
FB A_CMD13 T3 4 FBA _C MD 13 FB CD Q M0 A16 FBB_DQ M0 FB B_CMD14 B 20 FB C_C MD1 4
FB AD Q M0 P 32 FBA _CM D9 T3 3 FBA _C MD 14 FB CD Q M1 D 10 FBB _CM D29 G 21 FB C_C MD1 5
F BA_DQ M0 FBA _CM D29 FB A_CMD14 FBB_DQ M1 FBB _CM D8 FB B_CMD15
FB AD Q M1 H 34 F BA_DQ M1 FB A_CMD15 W3 0 FBA _C MD 15 FB CD Q M2 F11 FBB_DQ M2 FB B_CMD16 F 22 FB C_C MD1 6
FB AD Q M2 J30 FBA _CM D8 A B30 FBA _C MD 16 FB CD Q M3 D 15 FBB _CM D27 F 24 FB C_C MD1 7
FB AD Q M3 P 30 F BA_DQ M2 FBA _CM D27 FB A_CMD16 A A30 FBA _C MD 17 FB CD Q M4 D 27 FBB_DQ M3 FBB _CM D15 FB B_CMD17 F 23 FB C_C MD1 8
FB AD Q M4 AF 32 F BA_DQ M3 FBA _CM D15 FB A_CMD17 A B31 FBA _C MD 18 FB CD Q M5 D 34 FBB_DQ M4 FBB _CM D11 FB B_CMD18 C 25 FB C_C MD1 9
A L32 F BA_DQ M4 FBA _CM D11 FB A_CMD18 A A32 A34 FBB_DQ M5 FBB _CM D16 FB B_CMD19 C 23
FB AD Q M5 F BA_DQ M5 FBA _CM D16 FB A_CMD19 FBA _C MD 19 FB CD Q M6 FBB_DQ M6 FBB _CM D28 FB B_CMD20 FB C_C MD2 0
FB AD Q M6 A L34 A B33 FBA _C MD 20 FB CD Q M7 D 28 F 21 FB C_C MD2 1
FB AD Q M7 AF 35 F BA_DQ M6 FBA _CM D28 FB A_CMD20 Y 32 FBA _C MD 21 FB CD Q S_WP [ 7: 0] FBB_DQ M7 FBB _CM D3 FB B_CMD21 E 22 FB C_C MD2 2
F BA_DQ M7 FBA _CM D3 FB A_CMD21 15 FB CD Q S_WP [7 0
: ] FBB _CM D17 FB B_CMD22
14 FB AD QS _WP[ 7: 0] FB AD QS _WP 7
[ : 0] FBA _CM D17 FB A_CMD22 Y 33 FBA _C MD 22 FBB _CM D5 FB B_CMD23 D 21 FB C_C MD2 3
FB A_CMD23 A B34 FBA _C MD 23 FB CD Q S_WP 0 C 14 FBB_DQ S_WP0 FB B_CMD24 A 23 FB C_C MD2 4
L34 FBA _CM D5 A B35 A10 FBB _CM D4 D 22
FBA D QS _WP0 F BA_DQ S_WP0 FBA _CM D4 FB A_CMD24 FBA _C MD 24 FB CD Q S_WP 1 FBB_DQ S_WP1 FBB _CM D21 FB B_CMD25 FB C_C MD2 5
FBA D QS _WP1 H 35 F BA_DQ S_WP1 FBA _CM D21 FB A_CMD25 Y 35 FBA _C MD 25 FB CD Q S_WP 2 E10 FBB_DQ S_WP2 FBB _CM D6 FB B_CMD26 B 23 FB C_C MD2 6
FBA D QS _WP2 J32 F BA_DQ S_WP2 FB A_CMD26 W3 5 FBA _C MD 26 FB CD Q S_WP 3 D 14 FBB_DQ S_WP3 FB B_CMD27 C 22 FB C_C MD2 7
FBA D QS _WP3 N 31 FBA _CM D6 Y 34 FBA _C MD 27 FB CD Q S_WP 4 E26 FBB _CM D13 B 22 FB C_C MD2 8
FBA D QS _WP4 AE 31 F BA_DQ S_WP3 FBA _CM D13 FB A_CMD27 Y 31 FBA _C MD 28 FB CD Q S_WP 5 D 32 FBB_DQ S_WP4 FBB _CM D19 FB B_CMD28 A 22 FB C_C MD2 9
FBA D QS _WP5 A J32 F BA_DQ S_WP4 FBA _CM D19 FB A_CMD28 Y 30 FBA _C MD 29 FB CD Q S_WP 6 A32 FBB_DQ S_WP5 FBB _CM D12 FB B_CMD29 A 20 FB C_C MD3 0
F BA_DQ S_WP5 FB A_CMD29 FBB_DQ S_WP6 FB B_CMD30
FBA D QS _WP6 A J34 FBA _CM D12 W2 9 FBA _C MD 30 FB CD Q S_WP 7 B26 FBB _CM D30 G 20 FB C_C MD3 1
FBA D QS _WP7 AC 33 F BA_DQ S_WP6 FBA _CM D30 FB A_CMD30 Y 29 FBA _C MD 31 FB CD Q S_R N [7 0
:] FBB_DQ S_WP7 N /A FB B_CMD31
FB AD QS _R N[ 7: 0] F BA_DQ S_WP7 N/ A FB A_CMD31 15 FB CD Q S_R N[ 7: 0]
14 FBA D QS _RN [ 7: 0] T3 2 FBA _C LK0 FB CD Q S_R N0 B14
FBA D QS _RN 0 L35 FBA _CLK0 T3 1 FBA _C LK0# F BA_ CLK 0 1 4 FB CD Q S_R N1 B10 FBB_DQ S_RN 0
G 35 F BA_DQ S_RN 0 FBA _CLK0 A C3 1 F BA_ CLK 0# 14 D9 FBB_DQ S_RN 1 E 17
FBA D QS _RN 1 F BA_DQ S_RN 1 FBA _CLK1 FBA _C LK1 F BA_ CLK 1 1 4 FB CD Q S_R N2 FBB_DQ S_RN 2 FB B_CLK0 FB C_C LK 0 FB C_ CLK 0 1 5
FBA D QS _RN 2 H 31 F BA_DQ S_RN 2 FBA _CLK1 A C3 0 FBA _C LK1# F BA_ CLK 1# 14 FB CD Q S_R N3 E14 FBB_DQ S_RN 3 FB B_CLK0 D 17 FB C_C LK 0# FB C_ CLK 0# 15
FBA D QS _RN 3 N 32 FB CD Q S_R N4 F26 D 23 FB C_C LK 1
F BA_DQ S_RN 3 FBB_DQ S_RN 4 FB B_CLK1 FB C_ CLK 1 1 5
FBA D QS _RN 4 AD 32 F BA_DQ S_RN 4 FB CD Q S_R N5 D 31 FBB_DQ S_RN 5 FB B_CLK1 E 23 FB C_C LK 1# FB C_ CLK 1# 15
FBA D QS _RN 5 A J31 F BA_DQ S_RN 5 FB CD Q S_R N6 A31 FBB_DQ S_RN 6
FBA D QS _RN 6 A J35 FB CD Q S_R N7 A26
FBA D QS _RN 7 AC 34 F BA_DQ S_RN 6 FBB_DQ S_RN 7
F BA_DQ S_RN 7
P 29
R 29 F BA_WCK0 G 14 G 19 FB C_D EB U G0 R 70 *6 0. 4_04
L29 F BA_WCK0 T3 0 FB A_D EB U G0 G 15 FBB_WCK0 F BB_DE BUG 0_
C AS2 G 16 FB C_D EB U G1 F B V D DQ
F BA_WCK1 F BA_DEB UG0_C AS2 R8 5 *6 0.4 _04 F B V DD Q FBB_WCK0 FBB _DEBU G1 R 69 *1 0K_0 4
M29 T2 9 FB A_D EB U G1 R8 0 *1 0K_04 G 11
AG 29 F BA_WCK1 FBA _DEBU G1 G 12 FBB_WCK1
AH 29 F BA_WCK2 G 27 FBB_WCK1
AD 29 F BA_WCK2 G 28 FBB_WCK2
F BA_WCK3 FBB_WCK2
AE 29 F BA_WCK3 G 24 FBB_WCK3
G 25 FBB_WCK3
PLA C E NE AR BAL LS P LA CE N EA R B GA C LO SE T O C APS
1 6m i l L8 PE X_VD D
FB _DLLAVD D A G2 7 HC B16 08KF - 121T25
A F27 FB A_ PLLA VD D_ GP U
F B_PLLAVD D
GT 2
1X GF108 C12 1 C 130 C13 3 C14 3
FB _DLLAVD D 0.1 u_10V _X5R _04 *0. 1u_ 10V_ X7R _04 1u_16 V_X5R _0 6 10u_6. 3V _X5R _06
R FU
R FU F B_PLLAVD D NE AR P I N AG 27 N EA R P N
I AF2 7 F B_CAL_PD _VDD Q FB _CA L_P D_V D DQ R 78 4 0. 2_1%_04 F BV D D Q
J19
J18
M27 L27 K2 7
FB_CAL_P U_GN D FB _CA L_P U_G N D R 84 4 0. 2_1%_04
G F108 G T21X
FB _VR E F_TP J27 F B_VRE F_NC FB_VR EF FB_CA L_TERM_GN D FB _CA L_TE RM_G N D R 79 6 0. 4_1%_04
N 12P -G V 2-A 1
N 12P -G V2 A
- 1 C89 C 83
0.1 u_10V _X5R _04 *0. 1u_10 V_X7 R_0 4
NE AR P I N J19 N EAR PI N J1 8
1u ? ? X7R NV suggest
BEAD 30 ohms @100Mhz (ESR=0.01ohms) NV suggest
12, 37 PEX _VD D
14, 15, 37 FBV DD Q
B - 14 VGA Frame Buffer Interface
Downloaded from www.Manualslib.com manuals search engine
Schematic Diagrams
VGA Frame Buffer A
Frame Buffer Partition A
F B A_ CMD [ 31 : 0]
13 F BA _C MD [ 31: 0]
FB A _D [ 63: 0 ]
13 F B A_ D[ 6 3: 0]
F BV D D Q
FB VD D Q FB A D QM[ 7 :0 ]
13 F B AD Q M[ 7: 0]
FB A D QS _W P 7
[ 0
: ]
13 FB A DQ S _W P[ 7: 0 ]
C 1 59 C 161 C 21 6 C 1 60 C2 17 C 162 C 21 8 C2 15
C 164 C 21 9 C 2 21 C6 20 C 220 C 16 5 C1 63 C 210 FB A D QS _R N [ 7: 0 ]
13 FB A DQ S _R N [ 7: 0]
0 . 1u_ 16V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 0. 1u _1 6V _Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 1u _6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04
0. 1u _16 V_ Y5 V_ 04 0. 1 u_1 6V _Y 5V _04 0 .1 u_ 16V _Y 5V _0 4 0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 1u _6. 3V _X 5R _0 4
FB V D DQ
C 601 C 19 8 C 19 4 C6 04
FB VD D Q F BV D D Q
1u_ 6. 3V _X 5R _04 1u _6. 3 V_X 5R _0 4 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04
C 624 C 62 5 C 6 19 C6 15 C 581 C 58 3 C5 84 C 582 C 6 22 C 580 C 57 8 C 5 77 C5 79 C 618 C 61 7 C6 21
0. 1u _16 V_ Y5 V_ 04 0. 1 u_1 6V _Y 5V _04 0 .1 u_ 16V _Y 5V _0 4 0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04 1u _6. 3V _X 5R _0 4 MI RR O R MOD E C OMMAN D MAP PI NG 0 . 1u_ 16V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 0. 1u _1 6V _Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 1u _6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04 1u_ 6. 3V _X5 R _04
GT21x GF108 0
- 31 32-63
CMD0 CMD3 CKE
CMD1 CMD8 A8 A8
U8 U 31 CMD2 CMD2 CS0* U7 U3 0
CMD3 CMD21 A7 A6
F BV D D Q FB VD D Q FB V D D Q F BV D D Q
CMD4 CMD24 A2 A1
CMD5 CMD23 A11 A9
F BA _C M D 11 J3 B2 F B A_ CM D 1 1 J 3 B2 FB A _C MD 11 J3 B2 F BA _C MD 11 J3 B2
R AS VD D RA S V DD CMD6 CMD26 A5 A4 RA S VDD R AS VD D
F BA _C MD 15 K3 D9 F B A_ CMD 1 5 K3 D9 FB A _C MD 15 K3 D9 F BA _C MD 15 K3 D9
CMD7 CMD7 A0 A12
L3 C AS VD D G7 L3 CA S V DD G7 L3 CA S VDD G7 L3 C AS VD D G7
F BA _C MD 28 F B A_ CMD 2 8 FB A _C MD 25 F BA _C MD 25
CMD8 CMD15 CAS* CAS *
F BA _C MD 2 L2 WE VD D K2 F B A_ CMD 2 L2 W E V DD K2 FB A _C MD 18 L2 WE VDD K2 F BA _C MD 18 L2 WE VD D K2
CS VD D CS V DD CMD9 CMD13 BA1 A3 CS VDD CS VD D
K8 K8 CMD10 CMD4 A9 A1 K8 K8
VD D V DD VDD VD D
N1 N1 N1 N1
CMD11 CMD18 CS0*
N3 VD D N9 N3 V DD N9 N3 VDD N9 N3 VD D N9
B.Schematic Diagrams
F BA _C MD 7 F B A_ CMD 7 FB A _C MD 9 F BA _C MD 9
A0 VD D A0 V DD CMD12 CMD29 BA0 BA0 A0 VDD A0 VD D
F BA _C MD 10 P7 R1 F B A_ CMD 1 0 P7 R1 FB A _C MD 24 P7 R1 F BA _C MD 24 P7 R1
F BA _C MD 24 P3 A1 VD D R9 F B A_ CMD 2 4 P3 A1 V DD R9 CMD13 CMD27 BA2 A15 FB A _C MD 10 P3 A1 VDD R9 F BA _C MD 10 P3 A1 VD D R9
CMD14 CMD6 A3 BA1
N2 A2 VD D N2 A2 V DD N2 A2 VDD N2 A2 VD D
F BA _C MD 6 F B A_ CMD 6 FB A _C MD 13 F BA _C MD 13
CMD15 CMD17 CS1*
F BA _C MD 22 P8 A3 A1 F B A_ CMD 2 2 P8 A3 A1 FB A _C MD 26 P8 A3 A1 F BA _C MD 26 P8 A3 A1
A4 VD D Q A4 V D DQ CMD16 CMD19 ODT A4 V DDQ A4 VD D Q
F BA _C MD 26 P2 A8 F B A_ CMD 2 6 P2 A8 FB A _C MD 22 P2 A8 F BA _C MD 22 P2 A8
CMD17 CMD22 A4 A5
F BA _C MD 5 R8 A5 VD D Q C1 F B A_ CMD 5 R8 A5 V D DQ C1 FB A _C MD 21 R8 A5 V DDQ C1 F BA _C MD 21 R8 A5 VD D Q C1
CMD18 CMD12 A13 A14
F BA _C MD 21 R2 A6 VD D Q C9 F B A_ CMD 2 1 R2 A6 V D DQ C9 FB A _C MD 5 R2 A6 V DDQ C9 F BA _C MD 5 R2 A6 VD D Q C9
A7 VD D Q A7 V D DQ CMD19 CMD28 WE* A1
0 A7 V DDQ A7 VD D Q
F BA _C MD 8 T8 D2 F B A_ CMD 8 T8 D2 FB A _C MD 8 T8 D2 F BA _C MD 8 T8 D2
A8 VD D Q A8 V D DQ CMD20 CMD10 A1 A2 A8 V DDQ A8 VD D Q
F BA _C MD 4 R3 E9 F B A_ CMD 4 R3 E9 FB A _C MD 23 R3 E9 F BA _C MD 23 R3 E9
L7 A9 VD D Q F1 L7 A9 V D DQ F1 CMD21 CMD25 A10 WE* L7 A9 V DDQ F1 L7 A9 VD D Q F1
F BA _C MD 25 F B A_ CMD 2 5 FB A _C MD 28 F BA _C MD 28
Sheet 14 of 49
CMD22 CMD9 A12 A0
F BA _C MD 23 R7 A1 0 VD D Q H2 F B A_ CMD 2 3 R7 A 10 V D DQ H2 FB A _C MD 4 R7 A10 V DDQ H2 F BA _C MD 4 R7 A1 0 VD D Q H2
A1 1 VD D Q A 11 V D DQ CMD23 CMD1 CS1* A11 V DDQ A1 1 VD D Q
F BA _C MD 9 N7 H9 F B A_ CMD 9 N7 H9 FB A _C MD 7 N7 H9 F BA _C MD 7 N7 H9
CMD24 CMD11 RAS* RAS*
T3 A1 2 VD D Q T3 A 12 V D DQ T3 A12 V DDQ T3 A1 2 VD D Q
F BA _C MD 12 F B A_ CMD 1 2 CMD25 CMD0 ODT FB A _C MD 14 F BA _C MD 14
A1 3 A 13 A13 A1 3
CMD26 CMD5 A6 A7
VGA Frame Buffer
CMD27 CMD16 CKE
F BA _C MD 29 M2 F B A_ CMD 2 9 M2 FB A _C MD 29 M2 F BA _C MD 29 M2
CMD28 CMD20 RST RST
N8 BA 0 A9 N8 B A0 A9 N8 BA 0 A9 N8 BA 0 A9
F BA _C MD 13 BA 1 V SS F B A_ CMD 1 3 B A1 VS S CMD29 CMD14 A14 A13 FB A _C MD 6 BA 1 VS S F BA _C MD 6 BA 1 V SS
F BA _C MD 27 M3 B3 F B A_ CMD 2 7 M3 B3 FB A _C MD 30 M3 B3 F BA _C MD 30 M3 B3
BA 2 V SS B A2 VS S CMD30 CMD30 A15 BA2 BA 2 VS S BA 2 V SS
E1 E1 E1 E1
N/A CMD 3
1
V SS G8 VS S G8 VS S G8 V SS G8
13
13
F BA _C LK 0
F BA _C LK 0#
F BA _C MD 3
F BA _C LK 0
F BA _C LK 0#
K9
J7
K7
C KE
CK
CK
V SS
V SS
V SS
V SS
V SS
J 2
J 8
M1
M9
P1
F BA _C L K0
F B A_ CMD 3
F B A_ CL K0
F B A_ CL K0 #
K9
J 7
K7
CK E
CK
CK
VS S
VS S
VS S
VS S
VS S
J2
J8
M1
M9
P1
13
13
FB A _C LK 1
FB A _C LK 1#
FB A _C MD 16
FB A _C LK 1
FB A _C LK 1#
K9
J7
K7
CK E
CK
CK
VS S
VS S
VS S
VS S
VS S
J2
J8
M1
M9
P1
FB A _C LK 1
F BA _C MD 16
F BA _C LK 1
F BA _C LK 1#
K9
J7
K7
C KE
CK
CK
V SS
V SS
V SS
V SS
V SS
J 2
J 8
M1
M9
P1
A
R 434 R 4 35
V SS VS S VS S V SS
J1 P9 J 1 P9 J1 P9 J1 P9
J9 NC1 V SS T1 J 9 NC1 VS S T1 J9 NC 1 VS S T1 J9 NC1 V SS T1
16 0_1 %_04 1 60 _1%_ 04
L1 NC2 V SS T9 L1 NC2 VS S T9 L1 NC 2 VS S T9 L1 NC2 V SS T9
L9 NC3 V SS F BA _C L K0 # L9 NC3 VS S L9 NC 3 VS S FB A _C LK 1# L9 NC3 V SS
NC4 NC4 NC 4 NC4
M7 B1 M7 B1 M7 B1 M7 B1
T7 NC5 V S SQ B9 T7 NC5 VS SQ B9 T7 NC 5 V SS Q B9 T7 NC5 V S SQ B9
NC6 V S SQ NC6 VS SQ NC 6 V SS Q NC6 V S SQ
D1 D1 D1 D1
V S SQ VS SQ V SS Q V S SQ
D8 D8 D8 D8
V S SQ E2 VS SQ E2 V SS Q E2 V S SQ E2
F BA _C MD 20 T2 V S SQ E8 F BA _C MD 20 T2 VS SQ E8 FB A _C MD 20 T2 V SS Q E8 F B A_ C MD 2 0 T2 V S SQ E8
F BV D D Q F BV D D Q
R ES E T V S SQ R E SE T VS SQ RE S ET V SS Q R ES E T V S SQ
F9 F9 F9 F9
V S SQ VS SQ V SS Q V S SQ
F BA _C MD 0 K1 G1 F BA _C MD 0 K1 G1 FB A _C MD 19 K1 G1 F B A_ C MD 1 9 K1 G1
OD T V S SQ G9 OD T VS SQ G9 OD T V SS Q G9 OD T V S SQ G9
V S SQ VS SQ V SS Q V S SQ
F BA _Z Q 0 L8 R 1 32 FB A _Z Q1 L8 FB A _Z Q2 L8 F B A_ ZQ3 L8
ZQ ZQ ZQ ZQ
R 13 3
1 .1 K_ 1%_ 04
16mil<500mil 16mil <500mil 16mil<500mil 16mil <500mil
1. 1K _1 %_0 4
R 1 23 H1 FB A_ VR E F 0 R 43 7 H1 F BA _V R EF 0 R 12 8 H1 F BA _V R E F1 R 425 H1 FB A_ VR E F 1
VR E FD Q M8 VR E F DQ M8 V R EF D Q M8 VR E FD Q M8
VR E F CA V R EF C A V R E FC A VR E F CA
2 43 _1%_ 04 C 2 11 R 1 30 2 43_ 1%_0 4 2 43_ 1%_0 4 C 21 2 R 13 1 24 3_1 %_04
0 .0 1u _16 V_ X7R _0 4 1 .1 K_ 1%_ 04 0. 01 u_ 16V _X 7R _0 4 1. 1K _1 %_0 4
E3 D7 E3 D7 E3 D7 E3 D7
FB A _D 12 FB A _D 22 F BA _D 2 9 FB A _D 3 F B A_ D3 7 F B A_ D 56 FB A _D 45 FB A _D 51
FB A _D 9 F7 D Q L0 D QU 0 C3 FB A _D 19 F BA _D 2 8 F7 D Q L0 D QU 0 C3 FB A _D 6 F B A_ D3 3 F7 DQ L 0 D QU 0 C3 F B A_ D 59 FB A _D 47 F7 D Q L0 D QU0 C3 FB A _D 52
D Q L1 D QU 1 D Q L1 D QU 1 DQ L 1 D QU 1 D Q L1 D QU1
FB A _D 14 F2 C8 FB A _D 20 F BA _D 3 0 F2 C8 FB A _D 1 F B A_ D3 9 F2 C8 F B A_ D 58 FB A _D 42 F2 C8 FB A _D 48
D Q L2 D QU 2 D Q L2 D QU 2 DQ L 2 D QU 2 D Q L2 D QU2
FB A _D 8 F8 C2 FB A _D 17 F BA _D 2 5 F8 C2 FB A _D 7 F B A_ D3 2 F8 C2 F B A_ D 62 FB A _D 46 F8 C2 FB A _D 54
H3 D Q L3 D QU 3 A7 H3 D Q L3 D QU 3 A7 H3 DQ L 3 D QU 3 A7 H3 D Q L3 D QU3 A7
FB A _D 13 D Q L4 D QU 4 FB A _D 21 F BA _D 2 6 D Q L4 D QU 4 FB A _D 2 F B A_ D3 6 DQ L 4 D QU 4 F B A_ D 61 FB A _D 43 D Q L4 D QU4 FB A _D 49
FB A _D 10 H8 A2 FB A _D 18 F BA _D 2 7 H8 A2 FB A _D 5 F B A_ D3 4 H8 A2 F B A_ D 57 FB A _D 44 H8 A2 FB A _D 55
D Q L5 D QU 5 D Q L5 D QU 5 DQ L 5 D QU 5 D Q L5 D QU5
FB A _D 15 G2 B8 FB A _D 23 F BA _D 3 1 G2 B8 FB A _D 0 F B A_ D3 8 G2 B8 F B A_ D 60 FB A _D 40 G2 B8 FB A _D 50
H7 D Q L6 D QU 6 A3 H7 D Q L6 D QU 6 A3 H7 DQ L 6 D QU 6 A3 H7 D Q L6 D QU6 A3
FB A _D 11 FB A _D 16 F BA _D 2 4 FB A _D 4 F B A_ D3 5 F B A_ D 63 FB A _D 41 FB A _D 53
D Q L7 D QU 7 D Q L7 D QU 7 DQ L 7 D QU 7 D Q L7 D QU7
FB A DQ M1 E7 D3 F BA D Q M2 F BA D QM3 E7 D3 FB A D QM0 F B AD Q M4 E7 D3 FB A DQM7 FB A DQ M5 E7 D3 FB A DQ M6
F3 D ML D MU C7 F3 D ML D MU C7 F3 DML D MU C7 F3 D ML D MU C7
FB A DQ S _W P1 F BA D Q S_ WP 2 F BA D QS_ WP 3 FB A D QS _W P0 F B AD Q S _WP 4 FB A DQS _W P7 FB A DQ S _W P5 FB A DQ S _W P6
D Q SL D Q SU D QS L D QSU DQ S L D QS U D Q SL D Q SU
FB A DQ S _R N 1 G 3 B7 F BA D Q S_ R N2 F BA D QS_ R N3 G 3 B7 FB A D QS _R N 0 F B AD Q S _R N 4 G 3 B7 FB A DQS _R N 7 FB A DQ S _R N 5 G 3 B7 FB A DQ S _R N 6
D Q SL D Q SU D QS L D QSU DQ S L D QS U D Q SL D Q SU
K 4W 1G 16 46 G- B C 11 K4 W1 G1 64 6G - BC 11 K 4W 1G 16 46G -B C1 1 K 4W 1G 16 46 G- B C 11
FB VD D Q
+ C 715 C 706 C 7 07
330 u_2 . 5V _V _A *22u _6 .3 V_ X5R _ 08 *2 2u _6. 3V _X 5R _0 8
12/2 0
1 3, 15, 3 7 FB V DD Q
VGA Frame Buffer A B - 15
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Schematic Diagrams
VGA Frame Buffer C
Frame Buffer Partition C 13 F BC _ C MD [ 3 1: 0]
FB C _C MD [ 31: 0 ]
F B C_ D [6 3: 0]
13 FB C _D [ 63 :0 ]
F B CD QM[ 7: 0]
13 FB C D Q M[ 7 0
: ]
F B VD D Q
FB V DD Q F B CD QS _W P[ 7: 0 ]
13 F BC D QS_ WP [ 7: 0]
F B CD QS _R N [ 7: 0]
13 F BC D Q S _R N [ 7: 0]
C1 47 C 146 C 14 1 C5 33 C 64 C 1 17 C 153
C 53 0 C3 4 C 536 C 53 5 C 534 C 57 C 52 9
0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0. 1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _04 1 u_6 . 3V _X5 R _04 1u _6. 3V _X 5R _0 4
0. 1u _1 6V _Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 1u_ 6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04
F B VD D Q
FB V DD Q
C6 9 C 154 C 11 2 C5 38 C 55 7 C 5 44 C 564
C 56 6 C 5 39 C 570 C 55 9 C 140 C 546 C 14 9 0. 1u_ 16 V_Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0. 1 u_1 6V _Y 5V _0 4 0. 1u_ 16V _Y 5 V_ 04 0. 1u _1 6V _Y 5V _04 1 u_6 . 3V _X5 R _04 1u _6. 3V _X 5R _0 4
0. 1u _1 6V _Y 5V _04 0 . 1u_ 16V _Y 5 V_ 04 0. 1u _16 V_ Y 5V _04 0 .1 u_1 6V _Y 5V _0 4 0. 1u _16 V_ Y5 V_ 04 1u_ 6. 3V _X 5R _0 4 1 u_6 .3 V_ X5R _ 04
U3 U 25 U5 U 28
B.Schematic Diagrams
FB V D DQ FB V D DQ FB V D D Q FB V D DQ
F BC _ C M D1 1 J 3 B2 F BC _ C MD 1 1 J3 B2 F B C_ C MD1 1 J 3 B2 F BC _ C MD1 1 J 3 B2
RA S VDD RAS V DD RA S V DD RA S V DD
F BC _ C MD1 5 K3 D9 F BC _ C MD 1 5 K3 D9 F B C_ C MD1 5 K3 D9 F BC _ C MD1 5 K3 D9
L3 CA S VDD G7 L3 CAS V DD G7 L3 CA S V DD G7 L3 CA S V DD G7
F BC _ C MD2 8 F BC _ C MD 2 8 F B C_ C MD2 5 F BC _ C MD2 5
F BC _ C MD2 L2 W E VDD K2 F BC _ C MD 2 L2 W E V DD K2 F B C_ C MD1 8 L2 W E V DD K2 F BC _ C MD1 8 L2 W E V DD K2
CS VDD CS V DD CS V DD CS V DD
K8 K8 K8 K8
VDD V DD V DD V DD
N1 N1 N1 N1
N3 VDD N9 N3 V DD N9 N3 V DD N9 N3 V DD N9
F BC _ C MD7 F BC _ C MD 7 F B C_ C MD9 F BC _ C MD9
F BC _ C MD1 0 P7 A0 VDD R1 F BC _ C MD 1 0 P7 A0 V DD R1 F B C_ C MD2 4 P7 A0 V DD R1 F BC _ C MD2 4 P7 A0 V DD R1
A1 VDD A1 V DD A1 V DD A1 V DD
F BC _ C MD2 4 P3 R9 F BC _ C MD 2 4 P3 R9 F B C_ C MD1 0 P3 R9 F BC _ C MD1 0 P3 R9
Sheet 15 of 49 F BC _ C MD6
F BC _ C MD2 2
F BC _ C MD2 6
F BC _ C MD5
N2
P8
P2
R8
R2
A2
A3
A4
A5
A6
VDD
V DDQ
V DDQ
V DDQ
A1
A8
C1
C9
F BC _ C MD 6
F BC _ C MD 2 2
F BC _ C MD 2 6
F BC _ C MD 5
N2
P8
P2
R8
R2
A2
A3
A4
A5
A6
V DD
VDDQ
VDDQ
VDDQ
A1
A8
C1
C9
F B C_ C MD1 3
F B C_ C MD2 6
F B C_ C MD2 2
F B C_ C MD2 1
N2
P8
P2
R8
R2
A2
A3
A4
A5
A6
V DD
V DDQ
V DDQ
V DDQ
A1
A8
C1
C9
F BC _ C MD1 3
F BC _ C MD2 6
F BC _ C MD2 2
F BC _ C MD2 1
N2
P8
P2
R8
R2
A2
A3
A4
A5
A6
V DD
V DDQ
V DDQ
V DDQ
A1
A8
C1
C9
F BC _ C MD2 1 F BC _ C MD 2 1 F B C_ C MD5 F BC _ C MD5
VGA Frame Buffer F BC _ C MD8
F BC _ C MD4
F BC _ C MD2 5
F BC _ C MD2 3
T8
R3
L7
R7
A7
A8
A9
A 10
A 11
V DDQ
V DDQ
V DDQ
V DDQ
V DDQ
D2
E9
F1
H2
F BC _ C MD 8
F BC _ C MD 4
F BC _ C MD 2 5
F BC _ C MD 2 3
T8
R3
L7
R7
A7
A8
A9
A 10
A 11
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
D2
E9
F1
H2
F B C_ C MD8
F B C_ C MD2 3
F B C_ C MD2 8
F B C_ C MD4
T8
R3
L7
R7
A7
A8
A9
A 10
A 11
V DDQ
V DDQ
V DDQ
V DDQ
V DDQ
D2
E9
F1
H2
F BC _ C MD8
F BC _ C MD2 3
F BC _ C MD2 8
F BC _ C MD4
T8
R3
L7
R7
A7
A8
A9
A 10
A 11
V DDQ
V DDQ
V DDQ
V DDQ
V DDQ
D2
E9
F1
H2
F BC _ C MD9 N7 H9 F BC _ C MD 9 N7 H9 F B C_ C MD7 N7 H9 F BC _ C MD7 N7 H9
C F BC _ C MD1 2
F BC _ C MD2 9
T3
M2
A 12
A 13
B A0
V DDQ F BC _ C MD 1 2
F BC _ C MD 2 9
T3
M2
A 12
A 13
B A0
VDDQ F B C_ C MD1 4
F B C_ C MD2 9
T3
M2
A 12
A 13
B A0
V DDQ F BC _ C MD1 4
F BC _ C MD2 9
T3
M2
A 12
A 13
B A0
V DDQ
F BC _ C MD1 3 N8 A9 F BC _ C MD 1 3 N8 A9 F B C_ C MD6 N8 A9 F BC _ C MD6 N8 A9
M3 B A1 VS S B3 M3 B A1 VS S B3 M3 B A1 VS S B3 M3 B A1 VS S B3
F BC _ C MD2 7 F BC _ C MD 2 7 F B C_ C MD3 0 F BC _ C MD3 0
B A2 VS S B A2 VS S B A2 VS S B A2 VS S
E1 E1 E1 E1
VS S VS S VS S VS S
G8 G8 G8 G8
K9 VS S J2 K9 VS S J2 K9 VS S J2 K9 VS S J2
F BC _ C MD3 F BC _ C MD 3 F B C_ C MD1 6 F BC _ C MD1 6
F BC _ C LK 0 J 7 CK E VS S J8 F BC _ C LK 0 J7 CKE VS S J8 F B C_ C LK 1 J 7 CK E VS S J8 F BC _ C LK 1 J 7 CK E VS S J8
13 F BC _ CL K0 CK VS S CK VS S 13 F BC _ C LK 1 CK VS S CK VS S
F BC _ C LK 0# K7 M1 F BC _ C LK 0# K7 M1 F B C_ C LK 1# K7 M1 F BC _ C LK 1# K7 M1
13 F BC _ CL K0 # CK VS S M9 FB C _C L K0 CK VS S M9 13 F BC _ C LK 1# CK VS S M9 FB C _C L K1 CK VS S M9
VS S P1 VS S P1 VS S P1 VS S P1
J 1 VS S P9 J1 VS S P9 J 1 VS S P9 J 1 VS S P9
NC1 VS S NC1 VS S NC1 VS S NC1 VS S
J 9 T1 R 39 J9 T1 J 9 T1 R9 2 J 9 T1
L1 NC2 VS S T9 L1 NC2 VS S T9 L1 NC2 VS S T9 L1 NC2 VS S T9
L9 NC3 VS S L9 NC3 VS S L9 NC3 VS S L9 NC3 VS S
1 60_ 1%_0 4 1 60_ 1%_ 04
NC4 NC4 NC4 NC4
M7 B1 M7 B1 M7 B1 M7 B1
T7 NC5 VS S Q B9 FB C _C L K0# T7 NC5 VS S Q B9 T7 NC5 VS S Q B9 FB C _C L K1 # T7 NC5 VS S Q B9
NC6 VS S Q D1 NC6 VS S Q D1 NC6 VS S Q D1 NC6 VS S Q D1
VS S Q D8 VS S Q D8 VS S Q D8 VS S Q D8
VS S Q VS S Q VS S Q VS S Q
E2 E2 E2 E2
VS S Q VS S Q VS S Q VS S Q
F BC _ C MD2 0 T2 E8 F BV D D Q F BC _ CMD 2 0 T2 E8 F B C_ C MD2 0 T2 E8 F BV D D Q F BC _ C MD 2 0 T 2 E8
R E SE T VS S Q F9 R E SE T VS S Q F9 R E SE T VS S Q F9 R E SE T VS S Q F9
VS S Q VS S Q VS S Q VS S Q
F BC _ C MD0 K1 G1 F BC _ CMD 0 K1 G1 F B C_ C MD1 9 K1 G1 F BC _ C MD 1 9 K 1 G1
OD T VS S Q ODT VS S Q OD T VS S Q OD T VS S Q
G9 G9 G9 G9
L8 VS S Q L8 VS S Q L8 VS S Q L8 VS S Q
F BC _ ZQ 0 R 52 FB C _Z Q 1 F B C_ ZQ2 R 39 8 FB C _Z Q 3
ZQ ZQ ZQ ZQ
1. 1 K_ 1%_0 4 1. 1 K_ 1%_ 04
16mil<500mil 16mil <500mil 16mil<500mil 16mil <500mil
H1 H1 H1 H1
R 66 F BC _ VR E F0 R 38 5 F BC _ VR E F0 R 83 F BC _ VR E F 1 R 41 2 F BC _ VR E F 1
V R EF D Q V RE F D Q V R EF D Q V R EF D Q
M8 M8 M8 M8
V R EF C A V R EF C A V R EF C A V R EF C A
243 _1% _04 C 47 24 3_1 %_0 4 243 _1% _04 C 13 4 24 3_ 1%_0 4
R 38 6 R 40 9
0. 01 u_ 16V _X 7R _0 4 0. 0 1u_ 16V _X 7R _0 4
1. 1 K_ 1%_0 4 1. 1 K_ 1%_ 04
F BC _D 1 5 E3 D7 F B C_ D 20 FB C _D 2 8 E3 D7 F BC _ D3 F BC _D 3 7 E3 D7 F B C _D 59 F BC _D 4 4 E3 D7 F B C_ D 49
D Q L0 DQU 0 D QL0 DQU 0 D Q L0 DQ U 0 D Q L0 DQ U 0
F BC _D 9 F7 C3 F B C_ D 21 FB C _D 2 6 F7 C3 F BC _ D7 F BC _D 3 5 F7 C3 F B C _D 62 F BC _D 4 6 F7 C3 F B C_ D 53
F2 D Q L1 DQU 1 C8 F2 D QL1 DQU 1 C8 F2 D Q L1 DQ U 1 C8 F2 D Q L1 DQ U 1 C8
F BC _D 1 2 F B C_ D 23 FB C _D 2 9 F BC _ D0 F BC _D 3 6 F B C _D 57 F BC _D 4 0 F B C_ D 48
F BC _D 1 0 F8 D Q L2 DQU 2 C2 F B C_ D 19 FB C _D 2 7 F8 D QL2 DQU 2 C2 F BC _ D6 F BC _D 3 4 F8 D Q L2 DQ U 2 C2 F B C _D 61 F BC _D 4 5 F8 D Q L2 DQ U 2 C2 F B C_ D 54
D Q L3 DQU 3 D QL3 DQU 3 D Q L3 DQ U 3 D Q L3 DQ U 3
F BC _D 1 4 H3 A7 F B C_ D 18 FB C _D 3 0 H3 A7 F BC _ D1 F BC _D 3 9 H3 A7 F B C _D 58 F BC _D 4 2 H3 A7 F B C_ D 51
F BC _D 8 H8 D Q L4 DQU 4 A2 F B C_ D 17 FB C _D 2 4 H8 D QL4 DQU 4 A2 F BC _ D4 F BC _D 3 3 H8 D Q L4 DQ U 4 A2 F B C _D 63 F BC _D 4 7 H8 D Q L4 DQ U 4 A2 F B C_ D 55
G2 D Q L5 DQU 5 B8 G2 D QL5 DQU 5 B8 G2 D Q L5 DQ U 5 B8 G2 D Q L5 DQ U 5 B8
F BC _D 1 3 F B C_ D 22 FB C _D 3 1 F BC _ D2 F BC _D 3 8 F B C _D 56 F BC _D 4 1 F B C_ D 50
F BC _D 1 1 H7 D Q L6 DQU 6 A3 F B C_ D 16 FB C _D 2 5 H7 D QL6 DQU 6 A3 F BC _ D5 F BC _D 3 2 H7 D Q L6 DQ U 6 A3 F B C _D 60 F BC _D 4 3 H7 D Q L6 DQ U 6 A3 F B C_ D 52
D Q L7 DQU 7 D QL7 DQU 7 D Q L7 DQ U 7 D Q L7 DQ U 7
F BC D QM1 E7 D3 FB C D Q M2 FB C D Q M3 E7 D3 F BC D Q M0 F BC D Q M4 E7 D3 FB C D Q M7 F BC D Q M5 E7 D3 F B CD Q M6
D ML D MU D ML D MU D ML D MU D ML D MU
F BC D QS_ WP 1 F 3 C7 FB C D Q S_ WP 2 FB C D Q S_ WP 3 F3 C7 F BC D Q S _WP 0 F BC D Q S _WP 4 F 3 C7 FB C D Q S_ WP 7 F BC D Q S _WP 5 F 3 C7 F B CD Q S _W P6
D QS L D QS U D QS L DQS U DQS L D QS U D QS L D QS U
F BC D QS_ R N 1 G 3 B7 FB C D Q S_ RN 2 FB C D Q S_ R N 3 G3 B7 F BC D Q S _R N 0 F BC D Q S _R N 4 G3 B7 FB C D Q S_ R N7 F BC D Q S _R N 5 G 3 B7 F B CD Q S _R N 6
D QS L D QS U D QS L DQS U DQS L D QS U D QS L D QS U
K4 W1 G1 64 6G - BC 11 K4 W1 G1 64 6G - BC 11 K4 W1 G 164 6G -BC 1 1 K4 W1 G1 64 6G- BC 1 1
FB V DD Q
+ C 714 C 70 4 C 705
*33 0u_ 2. 5V _V _A *22 u_6 . 3V _X5 R _08 *22 u_6 .3 V_ X5 R_ 08
12/ 20
13, 1 4, 37 F BV D D Q
B - 16 VGA Frame Buffer C
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Schematic Diagrams
VGA I/O
U2 6 H U 26 O U 26 P U 26 I
81/ 6IFPC 10/16 MIOA 11/16 MIOB 9/16 IF PEF
P 2P 1P 4N 1
A B3Y 3Y 2Y 1
P9 AA9
R9 MIOA_VDDQ_NC M IOAD0_NC AB9 MIOB_VDDQ_NC MIOBD0 _NC
MIOA_VDDQ_NC M IOAD1_NC MIOB_VDDQ_NC MIOBD1 _NC
I F P C _ P LL V D D A J9 IF P C_ PL LVD D
T9
MIOA_VDDQ_NC M IOAD2_NC
W9
MIOB_VDDQ_NC MIOBD2 _NC
U9 Y9 DVI-DL DVI-SL DP
DVI/HDMI DP MIOA_VDDQ_NC M IOAD3_NC MIOB_VDDQ_NC MIOBD3 _NC HDMI
A K7 IF P C_ R SE T M IOAD4_NC P3 MIOBD4 _NC A B2
I F PC _A U X A N3 M IOAD5_NC T3 MIOBD5 _NC A B1 I FP E_ AU X
SDA AP2 T2 A C4 SDA SDA
SCL I F PC _A U X C5 2 M IOAD6_NC C5 3 MIOBD6 _NC SCL SCL I FP E_ AU X
R5 3 T1 R5 6 A C1
M IOAD7_NC U4 MIOBD7 _NC A C2
*0 . 1u _ 16 V _Y 5 V _0 4
A R2 M IOAD8_NC U1 MIOBD8 _NC A C3
1 0K _ 04 1 0K _ 04
*0 . 1u _ 16 V _Y 5 V _0 4
TXC FI P C _L3 M IOAD9_NC MIOBD9 _NC TXC TXC FI PE _L3
IF P C _L3 AP1 MIOAD1 0_NC U2 MIOBD10 _NC A E3 I F P E F _ PL L VD D AJ 6 I FP E F_P LL VD D IF PE _L3
TXC U5 U3 AA7 A E2 TXC TXC
MIOACAL_ PD_VDDQ_NC MIOAD1 1_NC MIOBCAL_PD_VDDQ_ NC MIOBD11 _NC
A M4 R6 U6 AL 1
TXD0 IF P C _L2 A M3 T5 MIOAD1 2_NC T6 AA6 MIOBD12 _NC W6 I FP E F_R S ET TXD0 TXD0 IF PE _L2
TXD0 IF P C _L2 MIOACAL_ PU_GND_NC MIOAD1 3_NC N6 MIOBCAL_PU_GND_NC MIOBD13 _NC Y6 TXD0 TXD0 IF PE _L2
A M5 MIOAD1 4_NC MIOBD14 _NC
TXD1 FI P C _L1 TXD1 TXD1 FI PE _L1
IF P C _L1 AL 5 IF PE _L1
I F P C _ I OV D D A J8 TXD1 N5 AF1 TXD1 TXD1
IF P C_ IO V D D MIOA_VREF_NC MIOB_VREF_NC
A M6
TXD2 FI P C _L0 A M7 TXD2 TXD2 FI PE _L0
TXD2 IF P C _L0 TXD2 TXD2 IF PE _L0
HPDE HPDE GP O
I 15
MIOA_CTL 3_NC P5 MIOB_ CTL3 _NC W3
GP IO 1 K2 M IOA_HSYNC_NC N3 MIOB_HSYNC_NC W1
HPDC L3 W2
IF PC MIOA_VSYNC_NC MIOB_VSYNC_NC
N2 Y5
MIOA_DE_NC MIOB_DE_NC AE7
N 1 2 P-G V 2-A 1 I FP E _IO V D D I FP F_ AU X
SDA
SCL I FP F_ AU X
B.Schematic Diagrams
MIOA_CLKOUT_NC R4 MIOB_CL KOUT_NC V4 I F P E F _ IO V D D A D7 I FP F _IO V D D
U2 6 G T4 W4
MIOA_CLKOUT_NC N 4 MI OA _C LK I N _ N C MIOB_CL KOUT_NC A E1 MI OB _ C LK I N _ N C TXC FI PF _L3
51/ 6IFPD MIOA_ CL KIN_NC MIOB_CLKIN_NC TXC IF PF _L3
TXD3 TXD0 IF PF _L2
I F P D _ P LL V D D A C 6 IF P D_ PL LVD D N 12 P -GV 2 -A1 R4 0 N 12 P -GV 2-A 1 R 33 IF PF _L2
TXD3 TXD0
A B6 DVI/HDMI DP
IF P D_ R SE T 1 0K _ 04 1 0K _ 0 4 TXD4 TXD1 FI PF _L1
A N4
SDA
SCL
I F PD _A U X
I F PD _A U X
AP4 TXD4
TXD5
TXD5
TXD1
TXD2
TXD2
IF PF _L1
IF PF _L0
IF PF _L0
Sheet 16 of 49
A R4
VGA I/O
TXC FI P D _L3
A R5
TXC IF P D _L3 3 V 3_ R U N
AP5 3 V 3_ R U N HPDF GP O
I 21
IF P D _L2 IFPEF
TXD0 A N5
TXD0 IF P D _L2
Q 7B N 12 P -GV 2 -A 1
5
A N7 * L2 N 7 00 2D W1 T 1G
G
TXD1 FI P D _L1
AP7
I F P D _ I OV D D A K8 TXD1 IF P D _L1
8
7
6
5
IF P D_ IO V D D 4 3
A R7 RN1 3
TXD2 FI P D _L0 A R8
S
IF P D _L0 2 . 2K _ 8P 4 R _0 4 S M C _V GA _ TH E R M
TXD2 S M D _V GA _ TH E R M S MC _V GA _ TH E R M 34
S MD _V GA _ TH E R M 34
1
2
3
4
U 26 J
2
G
B4
12/16 MISC1
L7 V GA _ TH E R M D C E2 S MC _ V GA _T H E R M1
HPDD GPI O19 T H ER MD N I2 C S_S C L E1 1 6
I 2C S _S D A S MD _ V GA _T H E R M1 U 26 L
IF PD 7/16 IF PAB
S
C8 I 2C C _S C L E3 I 2C C _S C L Q 7A
N 1 2 P-G V 2-A 1 I 2C C _S D A E4 I 2C C _S D A * L2 N 7 00 2D W1 T 1G
10 00 p _5 0V _ X7 R _ 04 LVDS
DVI-DL
Test Point V GA _ TH E R M D A B5
T H ER MD P
DVI-SL
I PAB_ TXD0*
F I PA_TXD0
F
IF PAB_ TXD0 IF PA_TXD0
3 V 3_ R U N
R5 0 1 00 K _0 4 I PAB_ TXD1*
F I PA_TXD1
F
K3 R4 1 1 00 K _0 4 3 V 3 _R U N
GPI O2 H3 IF PAB_ TXD1 IF PA_TXD1
5
6
7
8
GPI O3
RN1 4 GPI O4 H2
2 2. K _ 8P 4 R _0 4 GPI O5 H1 I FP A B _ P LL V D D AK9 IFPAB_PLLVDD I PA_TXD2
F
H4 N V V D D _ V I D 0 41 IF PAB_ TXD2*
GPI O6 N V V D D _ V I D 1 41 I PAB_ TXD2
F IF PA_TXD2
4
3
2
1
I 2C A_ S D A H5 A J1 1
I 2C A_ S C L GPI O7 H6 V _G PI O 8 IFPAB_RSET
GPI O8 R4 2 *0 _ 04 V GA _ TH E R M_ SH D W N #
I 2C B_ S D A AP1 4 J7 V _G PI O 9 R3 6 *0 _ 04 E C _ V GA _ AL E R T #
A R1 4 JT A G_TC K GPI O9 K4 IF PA_TXD3
I 2C B_ S C L JT A G_TM S GPI O10 IF PA_TXD3
U2 6 F A N1 4 JT A G_TD I GPI O11 K5 3 V 3_ R U N
41/ 6DACA A N1 6 JT A G_TD O GPI O12 H7 A C_ DE T R4 5 1 0K _ 04
D AC A _V D D A J 12 G1 I 2C A _ S C L V _J TA G_ T R S A
TP1 6 J4
D AC A _V D D I 2C A _S C L G4 I 2C A _ S D A JT A G_TR S T GPI O13 J6 IF PAB_ TXC* IFPA_ TXC
A K 12 I 2C A_ SD A GPI O14 I PAB_ TXC
F IFPA_ TXC
D AC A _V R EF L2
R 38 8 GPI O16 12 /13 ? ?
C 63 R 58 A K 13 D AC A _R S ET D AC A _H SY N C AM 13 S NN_ HS Y NC GPI O17 L4
D A CA _V SY N C AL 1 3 S N N _ V SY N C 1 K _ 04 GPI O18 M4 I PB_TXD4
F
IF PAB_ TXD3*
* 0. 1 u_ 1 6V _ Y5 V _ 04
10 K _0 4 I PAB_ TXD3
F IF PB_TXD4
L5
AM 15 GPI O20
D A C A_R E D S NN_ RE D
L6 A G9
GPI O22 IFPA_O
I VDD I PAB_ TXD4*
F IF PB_TXD5
D AC A _GR EE N AM 14 S N N _ GR E E N GPI O23 M6 IF PB_TXD5
M7 I F P A B _ IO V D D A G1 0 IF PAB_ TXD4
GPI O24 IFPB_O
I VDD
D A C A_B LU E AL 1 4 S N N _ B LU E
N 12 P -GV 2 -A 1 IF PAB_ TXD5* IF PB_TXD6
I PAB_ TXD5
F IF PB_TXD6
R1 9 *1 0m li _ sh ort _ 04 V GA _ TH E R M_ SH D W N _#
N 1 2 P -G V 2-A 1 U2
I PB_TXD7
F
5 4 IF PB_TXD7
V GA _ TH E R M_ SH D W N # 6 GN D TH ER M# 3 V G A_ T H E R MD C
R 24 * 0_ 04
S MD _V GA _ TH ER M 7 AL E R T # D - 2 V G A_ T H E R MD A
S MC _V GA _ TH ER M 8 SD A TA D+ 1 V G A_ V D D
SC LK VDD IFPB_ TXC
U 26 E IFPB_ TXC
6/1 6 DACB G7 81 -1P 8 U F
D A C B _ VD D AG 7 D AC B _V D D I2C B _S C L G3 I 2C B _S C L 3 3. V
G2 I 2C B _S D A R1 0
AK6 I 2C B _SD A
D AC B _V R EF R 21 10 0K _ 0 4 C6 0. 1 u_ 16 V _Y 5V _ 04 3. 3 V
R 22 10 0K _ 0 4
AH 7 A M1 6-02-00781-LD0 *10 m li _s h ort _ 04
D AC B _R S ET D AC B _H S YN C
D A C B_V S YN C A M2 R 23 10 K _0 4 V GA _ TH E R M _S H D WN #1 GPIO0
R 32 R 20 10 K _0 4 HPDAB
10 K _0 4 AK4 IFPAB
D A C B_ RE D
A L4 N 12 P -GV 2 -A 1
D AC B _GR EE N
A J4 RN1 6 RN1 5
D A C B_ BLU E
4 5 I F P C _ PL L V D D 4 5 I F P E F _P L LV D D
3 6 I F P A B _P L LV D D 3 6 I F P A B _I OV D D
2 7 I F P D _ I OV D D 2 7 I F P E F _I OV D D
1 8 I F P C _ I OV D D 1 8 I F P D _ PL L VD D
N 12 P -GV 2-A 1
10 K _8 P 4R _0 4
10 K _8 P 4R _0 4
1 2, 3 7, 4 1 3 V 3 _R U N
2 , 3, 8 , 1 1, 1 8, 1 9, 2 0, 2 2 ,2 3 , 24 , 25 , 27 , 28 , 2 9, 3 0, 3 5, 3 7, 3 8 3, 9 3. 3 V
VGA I/O B - 17
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Schematic Diagrams
VGA NVVDD Cecoupling
U 2 6M
15 /1 6 GND NV V DD N VVD D N VVD D
AA1 1 E1 5
GND GND
AA1 2 GND GND E1 8 U 26N
AA1 3 E2 4
GND GND 1 6/16 NVVDD
AA1 4 E2 7 AB1 1 P2 1
AA1 5 GND GND E3 0 AB1 3 VDD VDD P2 3
GND GND VDD VDD C 87 C 67 C 74 C5 4 C9 0 C1 0 9 C 59 C6 8
AA1 6 E6 AB1 5 P2 5
GND GND VDD VDD
AA1 7 GND GND E9 AB1 7 VDD VDD R1 1 0 . 0 1 u_ 1 6 V _ X 7R _ 0 4 0 . 0 1 u _1 6 V _ X 7 R _ 0 4 0 . 0 1 u _ 16 V _ X 7 R _ 0 4 0. 0 1 u _ 16 V _ X 7 R _ 0 4 0 . 01 u _ 1 6V _X 7 R _0 4 0 . 0 1u _ 1 6 V _ X7 R _ 04 0 . 0 1 u _ 16 V _ X 7 R _ 0 4 0. 0 1 u _ 16 V _ X 7 R _ 0 4
AA1 8 F2 AB1 9 R1 2
GND GND VDD VDD
AA1 9 F31 AB2 1 R1 3
AA2 GND GND F34 AB2 3 VDD VDD R1 4
GND GND VDD VDD
AA2 0 F5 AB2 5 R1 5
GND GND VDD VDD
AA2 1 J2 A C1 1 R1 6 C 10 5 C 1 23 C 115
AA2 2 GND GND J 31 A C1 2 VDD VDD R1 7
GND GND VDD VDD
AA2 3 J 34 A C1 3 R1 8 0 . 0 2 2u _ 1 6 V _ X7 R _ 04 0 . 0 2 2 u_ 1 6 V _ X 7R _ 0 4 0 . 0 2 2 u _1 6 V _ X 7 R _ 0 4
GND GND VDD VDD
AA2 4 GND GND J5 A C1 4 VDD VDD R1 9 1u ? ? ? ? X7R NV suggest
AA2 5 L9 A C1 5 R2 0
GND GND VDD VDD
AA3 4 M1 1 A C1 6 R2 1
AA5 GND GND M1 3 A C1 7 VDD VDD R2 2
GND GND VDD VDD P L A C E I N TH E B A C K P L A T E A R E A
AB1 2 M1 5 A C1 8 R2 3 C 88 C 99 C 98
GND GND VDD VDD
AB1 4 M1 7 A C1 9 R2 4
AB1 6 GND GND M1 9 A C2 0 VDD VDD R2 5
GND GND VDD VDD 0 . 0 4 7u _ 1 0 V _ X7 R _ 04 0 . 0 4 7 u_ 1 0 V _ X 7R _ 0 4 0 . 0 4 7 u _1 0 V _ X 7 R _ 0 4
AB1 8 M2 A C2 1 T1 2
GND GND VDD VDD
AB2 0 GND GND M2 1 A C2 2 VDD VDD T1 4
AB2 2 M2 3 A C2 3 T1 6
GND GND VDD VDD
B.Schematic Diagrams
AB2 4 M2 5 A C2 4 T1 8
AC 9 GND GND M3 1 A C2 5 VDD VDD T2 0
GND GND VDD VDD C 18 C 19
A D1 1 M3 4 A D1 2 T2 2
GND GND VDD VDD
A D1 3 M5 A D1 4 T2 4 * 0. 1 u _ 1 0V _X 5 R _0 4 * 0 . 1u _ 1 0 V _ X5 R _ 04
A D1 5 GND GND N1 1 A D1 6 VDD VDD V1 1
GND GND VDD VDD
A D1 7 N1 2 A D1 8 V1 3
GND GND VDD VDD
AD 2 GND GND N1 3 A D2 2 VDD VDD V1 5
A D2 1 N1 4 A D2 4 V1 7
GND GND VDD VDD
Sheet 17 of 49
A D2 3 N1 5 L11 V1 9 C 97 C 78 C 91
A D2 5 GND GND N1 6 L12 VDD VDD V2 1
GND GND VDD VDD
A D3 1 N1 7 L13 V2 3 0 . 2 2 u_ 1 0 V _ X 5R _ 0 4 0 . 2 2 u _1 0 V _ X 5 R _ 0 4 0 . 2 2 u _ 10 V _ X 5 R _ 0 4
GND GND VDD VDD
A D3 4 GND GND N1 8 L14 VDD VDD V2 5
VGA NVVDD AD 5
AE1 1
AE1 2
AE1 3
GND
GND
GND
GND
GND
GND
N1 9
N2 0
N2 1
N2 2
L15
L16
L17
L18
VDD
VDD
VDD
VDD
VDD
VDD
W11
W12
W13
W14
GND GND VDD VDD C 60 C 5 26
Cecoupling AE1 4
AE1 5
AE1 6
GND
GND
GND
GND
GND
GND
N2 3
N2 4
N2 5
L19
L20
L21
VDD
VDD
VDD
VDD
VDD
VDD
W15
W16
W17
1 u _ 6. 3 V _ X 5 R _ 0 4 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6
AE1 7 GND GND P1 2 L22 VDD VDD W18
AE1 8 P1 4 L23 W19
GND GND VDD VDD
AE1 9 P1 6 L24 W20
GND GND VDD VDD
AE2 0 GND GND P1 8 L25 VDD VDD W21 C 22 C 21
AE2 1 P2 0 M1 2 W22
GND GND VDD VDD
AE2 2 P2 2 M1 4 W23 1 0 u _6 . 3 V _ X 5 R _ 0 6 1 0 u _6 . 3 V _ X 5 R _ 0 6
AE2 3 GND GND P2 4 M1 6 VDD VDD W24
GND GND VDD VDD
AE2 4 R2 M1 8 W25
GND GND VDD VDD
AE2 5 GND GND R3 1 M2 0 VDD VDD Y1 2
AG 2 R3 4 M2 2 Y1 4
GND GND VDD VDD
A G3 1 R5 M2 4 Y1 6 C 23 C 24 C 710 C7 1 1 C7 1 2 C7 1 3
GND GND VDD VDD
A G3 4 GND GND T 11 P1 1 VDD VDD Y1 8
AG 5 T 13 P1 3 Y2 0 2 2 u _6 . 3 V _ X 5 R _ 0 8 2 2 u _6 . 3 V _ X 5 R _ 0 8 * 2 2u _ 6 . 3 V _ X 5R _ 0 8 *2 2 u_ 6 . 3 V _ X 5 R _ 0 8 *2 2 u _6 . 3 V _ X 5 R _ 0 8 *1 0 u _ 6. 3 V _ X 5 R _ 0 6
GND GND VDD VDD
AK2 T 15 P1 5 Y2 2
AK3 1 GND GND T 17 P1 7 VDD VDD Y2 4
GND GND VDD VDD
AK3 4 T 19 P1 9
GND GND VDD
AK5 GND GND T 21 12/22
AL 1 2 T 23 N 1 2 P -GV 2-A 1
GND GND +C 69 8 +C 6 99
AL 1 5
GND GND
T 25 ? ripple
AL 1 8 U1 1 3 3 0 U_ 2 .5 V _ D2 _ D 3 3 0 U_ 2 .5 V _ D2 _ D
GND GND noise
AL 2 1 U1 2
GND GND
AL 2 4 U1 3
AL 2 7 GND GND U1 4
GND GND
AL 3 0 U1 5
GND GND
AL 6 GND GND U1 6
AL 9 U1 7
GND GND
AN 2 U1 8
A N3 4 GND GND U1 9
GND GND
AP1 2 U2 0
GND GND
AP1 5 U2 1
AP1 8 GND GND U2 2
GND GND
AP2 1
AP2 4
GND
GND
GND
GND
U2 3
U2 4
BOM LIST for(GS+2G B OM & GV2+1G BOM)i nclude special s tuff Location SET TING
AP2 7 U2 5
GND GND
AP3
AP3 0 GND
GND
GND
GND
V1 2
V1 4 BOM LIST R29 R378 R47 R46 PR137 PR136 PR135 PR134 PR142 PR141 PR140 PR139 R379 U26 U3,U5,U7,U8,U25,U28,U30,U31
AP3 3 V1 6
GND GND
AP6 V1 8 15K X X 24.9K 12K 15K 12.7K 15K 10K 12.7K 10K 11.8K 45.3K N12P-GS QS K4W2G1646C-HC11(2G)
AP9 GND
GND
GND
GND
V2 GS+2G SDRAM BOM
B1 2 V2 0
GND GND
B1 5 V2 2 X 15K 30K X 12K 15K 12K 16.2K 10K 11.8K 11.5K 10K 20K N12P-GV2-A1 MP K4W1G1646G-BC11(1G)
B2 1
GND
GND
GND
GND
V2 4 GV2+1GSDRAM BOM
B2 4 V3 1
B2 7 GND GND V5
PS. X= Un-stuff GPU
B3
GND GND
V9 GPU CHIP SET GPU POWER SET GPU CHIP GPU SDRAM SELECT
B3 0
GND GND
Y1 1
SDRAM
B3 3 GND GND Y1 3 SELECT
B6
GND GND
Y1 5
SET
GND GND
B9 GND GND Y1 7
C 2 Y1 9
GND GND
C3 4 Y2 1
E1 2 GND GND Y2 3
GND GND
Y2 5
GND
N 1 2P -GV 2 -A 1
41 NV V D D
B - 18 VGA NVVDD Cecoupling
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Schematic Diagrams
PCH 1/9- RTC, HDA, SATA
RT CV C C
N O RE BO OT S TR AP
V D D3
20m ils 1
D 9
B A T 5 4 CW G H
A
20m ils
CougarPoint - M (RTC,HDA,SATA)C6 5 8
N O RE BO OT ST RA P: HD A_ SP KR Hi gh E na bl e
3 .3 V S
C 3 C4 0 1 1 u _6 . 3 V _ X5 R _0 4 1 8 p_ 5 0 V _N P O_ 0 4 S E R IRQ 1 0 K_ 0 4 R 20 6
R T C _ V B A T _ 12 A
H DA_ S PKR *1 K _ 0 4 R 21 4
R2 5 4 6- 22 -3 2R 76 -0B 2 X8
2
1
2
1
R 25 1 20 K _ 1 %_ 0 4 6- 22 -3 2R 76 -0B G X7 R 4 89 S A T A _ L E D# *1 0 K _ 04 R4 6 9
* 3 2. 7 6 8 K H z
1 K _ 04 MC -3 0 6 _3 2 . 7 6 8K H z 1 0 M_ 0 4 U3 4 A
1 RT C _ VB AT
R TC CL EA R
R T C _ X 1 A 20 C3 8
3
4
3
4
C3 9 4 J OP E N 1 C6 5 6
R TC X 1 F W H 0 / LA D 0 A3 8 L P C _A D 0 2 8 ,3 4
*O P E N _1 0 m li -1 MM 1 8 p_ 5 0 V _N P O_ 0 4 L P C _A D 1 2 8 ,3 4
1u _ 6 . 3V _ X 5 R _ 0 4 RT C_ X 2 C 20 F W H 1 / LA D 1 B3 7
L PC
R TC X 2 F W H 2 / LA D 2 L P C _A D 2 2 8 ,3 4
2
C3 7
12/06 DEL R2 6 3
Zo= 50O ? 5% R TC _ R S T # D 20 F W H 3 / LA D 3 L P C _A D 3 2 8 ,3 4
R TC R S T # D3 6
20 K _ 1 %_ 0 4 L P C _F R A M E # 2 8, 3 4
+
S R TC _ R T C # G 22 F W H4 / L F RA M E # R 2 96 3 .3 V S
S R T C R S T# E3 6 * 10 K _ 0 4
R 25 8 C3 9 8 S M _I N T R U D E R # K 22 L D R Q0 # K3 6 B o a rd I D
RTC
I N TR U D E R # L D R Q1 # / G P I O2 3
J_ R TC 3
B H A A A - B A T- 06 3 -P 0 1 1 M_ 0 4 1u _ 6 . 3V _ X 5 R _ 0 4 R4 8 8 3 3 0 K _ 04 P C H _ I N T V R ME N C 17 V5 S E R IRQ
-
RT CV C C I N TV R ME N SE R IRQ S E RIR Q 2 8 ,3 4
R 2 97
2
I NTV RM EN - Int eg ra te d S US
A M3 S A T A R XN 0 1 0 K _ 04
1 .05 V VR M Ena bl e H DA _ B IT CL K _ R N 34 S A T A 0 RX N A M1 S A T A R XP 0
H igh - E na ble I nt er nal V Rs H D A _ B C LK S A T A 0R X P AP7 S A T A T X N0
ESATA
SATA 6G
R2 9 0 1 K_ 0 4 L 34 S A T A 0 TX N AP5 SATAT XP0
L ow - E na ble E xt er nal V Rs 3 . 3 A _ 1. 5 A _ H D A _ I O H DA _ S Y NC SAT A0 TXP
H DA _ S Y N C_ R T 10 A M1 0 S A T A _ RX N 1
C4 7 3 2 2 p_ 5 0 V _N P O_ 0 4 ON -D ie P LL Vo lt ag e Sel ec t : SPK R S A T A 1 RX N A M8 S A T A _ RX P 1
K 34 S A T A 1R X P AP1 1 S A T A _ T XN 1
SATA HDD
B.Schematic Diagrams
R2 9 9 3 3 _0 4 H D A _ S D OU T _ R
HD A_ SY NC H D A _ R S T# S A T A 1 TX N AP1 0 S A T A _ T XP 1
33 H D A _ S D OU T Hi -1 .5 V (D EFA UL T) 33 H D A _S P K R SAT A1 TXP
33 H D A _R S T # E 34 A D7
R3 0 6 3 3 _0 4 H DA _ B IT CL K _ R Lo w- 1. 8V S A TA _ R XN 2 3 1
33 H DA _ B IT CL K 33 HD A _ S DIN 0 H DA _ S D IN0 S A T A 2 RX N A D5
33 H DA _ S Y NC
R3 3 2 3 3 _0 4 S D
Q2 7
H DA _ S Y NC_ R
J OP E N 2
*4 0 m li
G 34
C 34
H DA _ S D IN1
S A T A 2R X P
S A T A 2 TX N
SAT A2 TXP
A H5
A H4
S A TA _ R XP 2 31
S A TA _ T X N 2 3 1
S A TA _ T X P 2 3 1
SATA ODD Sheet 18 of 49
La yo ut N ot e: H DA _ S D IN2 AB8
PCH 1/9- RTC, HDA,
IHDA
MT N 7 0 02 Z H S 3 S A TA _ R XN 3 2 7
G
R3 3 7 1 K _ 04 1 2 D2 0 A 34 S A T A 3 RX N AB1 0
Cl ose t o PC H S A TA _ R XP 3 27
3 .3 V S
3. 3 A _ 1 . 5 A _H D A _ I O
R B 75 1 S -4 0C 2
H DA _ S D IN3 S A T A 3R X P
S A T A 3 TX N
SAT A3 TXP
AF3
AF1 S A TA _ T X N 3 2 7
S A TA _ T X P 3 2 7
3G/MSATA
SATA
R3 3 6 0 _ 04 A C H D A _S D OU T _R A 36
34 ME _ W E H DA _ S D O Y7
SATA
S A T A 4 RX N Y5
R3 3 5 *9 1 0 _0 4
C 36 S A T A 4R X P A D3
H D A _ D O C K _ E N # / GP I O 33 S A T A 4 TX N A D1
N 32 SAT A4 TXP
29 U S B 3 . 0_ S I M # H D A _ D O C K _ R S T# / G P I O1 3 Y3
12/7 ? ? W15? ? S A T A 5 RX N Y1
S A T A 5R X P AB3
P C H _ J TA G_ TC K _ B U F J3 S A T A 5 TX N AB1
J T A G_ T C K SAT A5 TXP 1. 05 V S
P C H _ J TA G_ TM S H7 Y1 1 S A T A I C O MP R2 6 0 3 7 . 4 _1 % _ 04
J T A G_ T MS S A T A I C O MP O
Fl as h De sc rip to r Se cur it y
JT AG
P C H _ J TA G_ TD I K5 Y1 0
Ov er id e J T A G_ T D I S A T A I C OM P I
Lo w = Di sa ble d- (D ef aul t) P C H _ J TA G_ TD O H1
J T A G_ T D O
1. 05 V S
Hi gh = E na ble d A B 1 2 S A T A 3C OM P R2 4 0 4 9 . 9 _1 % _ 04
S A TA 3R C O MP O
AB1 3
S A TA 3 C OM P I
H S P I_ S CL K T3 A H1 RB IA S _ S A T A 3 R4 7 4 7 5 0 _1 % _ 04
34 H S P I_ S CL K S P I _ C LK S A T A 3 RB IA S
0 _ 04 R4 5 4 S P I _ C S _0 # Y 14
34 H SPI_ CE# SPI_ C S0 #
*0 _ 0 4 R4 7 0 S P I _ C S _1 # T1
SPI_ C S1 # P3 S A T A _L E D #
S PI
S A T A LE D # S A T A _L E D # 31
H S P I _ MS I V4 V1 4 OD D _ D E T E C T#
34 H S P I _M S I S P I _ M OS I S A T A 0G P / G P I O2 1 O D D _D E T E C T # 23
H S P I _ MS O U3 P1 BBS _ BIT 0 R 46 8 * 1 K _0 4
34 H S P I _ MS O SPI_ M ISO S A T A 1G P / G P I O1 9
B D 8 2 H M6 5 QS B 2 Q N J H F C -B G A
BBS_BIT0 - BIOS BOOT STRAP BIT 0
J_ H D D 1 6-S03-08265-0S1
S1
S2 S A T A _ TX P 1 _ R C6 7 2 0 . 0 1u _ 1 6V _X 7 R _ 0 4 S A T A _ TX P 1 J _ ESAT A1
S3 S A T A _ TX N 1_ R C6 7 1 0 . 0 1u _ 1 6V _X 7 R _ 0 4 S A T A _ TX N 1 1
S4 G ND1
S5 S A T A _ RX N1 _ R C6 6 8 0 . 0 1u _ 1 6V _X 7 R _ 0 4 S A T A _ RX N1 3. 3 V SATATXP0 C3 9 5 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _T X P 0 _ C 1 L25 2 S A T A _ T XP _ 0 _ C 2
S6 S A T A _ R X P 1 _R C 6 6 6 0 . 0 1u _ 1 6V _X 7 R _ 0 4 S A T A _ RX P 1 TXP
S7 SAT A T XN0 C3 8 7 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _T X N 0 _ C 4 3 S A T A _ T XN _ 0_ C 3
3. 3 V S * W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt TXN
4
P1 R 4 56 R 2 02 R 2 01 G ND2
P2 S A T A R XN 0 C3 7 7 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _R X N 0 _ C 1 L23 2 S A T A _ R X N _0 _ C 5
P3 21 0 _ 1% _ 0 6 21 0 _ 1% _ 0 6 21 0 _ 1% _ 0 6 R XN
P4 S A T A R XP 0 C3 7 2 0 . 0 1 u _1 6 V _ X7 R _0 4 S A T A _R X P 0_ C 4 3 S A T A _ R X P _ 0 _C 6
P5 P C H _J T A G _T MS * W C M 2 01 2 F 2 S -1 61 T 0 3-s h o rt R XP
P6 P C H _J T A G _T D I 7
P7 P C H _J T A G _T D O G ND3
P8
Gen3
P9
P 10
P 11 H D D _N C 0 C6 5 0 C6 5 1
+
5 VS
C6 4 3 R 4 65 R 2 11 R 2 10
ESATA POART A T 0 7 J3 6 B A A 1 0 1
6- 21 -1 470 4- 10 7
P 12
P 13 H D D _N C 1 0. 1 u _ 16 V _ Y 5 V _ 0 4 2. 2 u _ 6. 3 V _ Y 5 V _ 0 6 22 0 u _6 . 3 V _ 6. 3* 6. 3 * 4. 2 1 0 0_ 1 % _0 4 1 0 0 _1 % _ 0 4 10 0 _ 1% _ 0 4
P 14 H D D _N C 2
P 15 H D D _N C 3 2 5 3 . 3 A _1 . 5 A _ H D A _ I O
GN D 1 2 0, 25 RT CV C C
19 , 2 0 , 2 4, 2 5 , 3 5, 3 7 , 3 8 1 . 0 5V S
1 1 , 27 , 3 0 , 3 4, 3 5 , 3 6, 3 7 , 4 1, 42 V DD 3
G ND 2
R4 6 6 51 _ 0 4 P C H _J T A G_ T C K _ B U F
1 -1 62 -1 0 0 56 1 1 1 , 24 , 2 5 , 28 , 3 1 , 3 2, 3 3 , 3 5, 3 9 , 4 0 5 V S
2 , 3 , 8 , 1 1, 1 6 , 1 9, 2 0 , 2 2, 23 , 2 4 , 25 , 2 7 , 28 , 2 9 , 3 0, 3 5 , 3 7, 3 8 , 3 9 3 . 3 V
P I N G N D 1 ~ 2 = G ND 3, 9 , 1 0 , 11 , 1 2 , 1 9, 2 0 , 2 1, 2 2 , 2 3, 24 , 2 5 , 27 , 2 8 , 30 , 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 9 3 . 3 V S
PCH 1/9- RTC, HDA, SATA B - 19
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Schematic Diagrams
PCH 2/9- PCIE, SMBUS, CLK
CougarPoint - M (PCI-E,SMBUS,CLK)
U 3 4B RN 7 3 .3 V
2 .2 K _ 8 P 4 R_ 0 4
B G 34 S M B _ CL K 8 1
12/7 B J 34 P ERN 1 E1 2 B T _ S B D# S M B _ DA T A 7 2
A V 32 P ERP1 S MB A LE R T # / GP I O1 1 BT _ SBD # 27 6 3
? ? X7R A U 32 P E T N1 H 14 S MB _C L K
S M L0 _ C LK
S M L0 _ D A T A 5 4
P ET P1 S MB C L K S M B _ CL K 9, 10
B E 34 C 9 S MB _D A T A RN 4
29 P C I E _ R X N 2_ U S B 3 0 _N E C P ERN 2 SM BD ATA S M B _ DA T A 9 , 10
B F 34 1 0 K _ 8P 4R _ 0 4
29 P C I E _ R X P 2 _ U S B 30 _ N E C B B 32 P ERP2 8 1
C4 3 8 0 . 1 u_ 1 0 V _ X 7R _ 0 4 P C I E _T X N 2_ C L P D _ S P I _I N T R #
29 P C I E _T X N 2_ U S B 3 0 _N E C P C I E _T X P 2 _ C A Y 32 P E T N2 BT_ SBD # 7 2
C4 5 2 0 . 1 u_ 1 0 V _ X 7R _ 0 4
SMBUS
29 P C I E _T X P 2 _ U S B 30 _ N E C P ET P2 A1 2 D R A MR S T _ C N T R L P E G _ B _ C L K R Q# 6 3
B G 36 S M L 0A LE R T # / GP I O6 0 DR A M RS T _ CN T RL 3 ,8 5 4
P E G _ P C I E C L K R Q7 #
2 7 P C I E _ R XN 3 _W L A N B J 36 P ERN 3 C 8 S ML 0 _ C L K
2 7 P C I E _ R XP 3_ W L A N A V 34 P ERP3 S M L 0C L K
C4 6 4 0 . 1 u_ 1 0 V _ X 7R _ 0 4 P C I E _T X N 3_ C RN 5
2 7 P C I E _ T XN 3 _W L A N P C I E _T X P 3 _ C A U 34 P E T N3 G 12 S ML 0 _ D A TA
C4 5 7 0 . 1 u_ 1 0 V _ X 7R _ 0 4 1 0 K _ 8P 4R _ 0 4
2 7 P C I E _ T XP 3_ W L A N P ET P3 S M L0 D A T A 8 1
B F 36 P C I E C L K R Q6 # 7 2
30 P C I E _R X N 4 _ GL A N B E 36 P ERN 4 P C I E C L K R Q5 # 6 3
30 P C I E _R X P 4 _ GL A N A Y 34 P ERP4 C 13 5 4
C4 6 5 0 . 1 u_ 1 0 V _ X 7R _ 0 4 P C I E _T X N 4_ C L P D_ S P I_ IN T R# P C I E C L K R Q0 #
30 P C I E _ T X N 4 _ GL A N P C I E _T X P 4 _ C B B 34 P E T N4 S M L1 A L E R T # / P C H H OT # / GP I O7 4
C4 5 9 0 . 1 u_ 1 0 V _ X 7R _ 0 4
30 P C I E _ T X P 4 _ GL A N P ET P4 E1 4 S MC _ C P U _ T H E R M S M D_ CP U_ T HE R M R 237 2 . 2K _0 4
B G 37 S M L1 C L K / GP I O5 8 S MC _C P U _T H E R M 34
PCI-E*
S M C_ CP U_ T HE R M R 234 2 . 2K _0 4
B H 37 P ERN 5 M 16 S MD _ C P U _ T H E R M DR A M RS T _ CN T RL
S MD _C P U _T H E R M 34 R 482 1 K _0 4
A Y 36 P ERP5 S ML 1 D A T A / GP I O7 5 P E G _ C L K R E Q# R 377 1 0K _ 0 4
B B 36 P E T N5
B.Schematic Diagrams
P ET P5
B J 38 3 .3 V S
B G 38 P ERN 6
Controller
A U 36 P ERP6 M7 CL _ CL K 1 D G P U _P R S N T # R 328 1 0K _ 0 4
PCI-E x1 Usage
Sheet 19 of 49 A V 36 P E T N6 C L _ CL K1 C L _ C LK 1 27
U S B 3 0_ C L K R E Q # _ V LI R 203 1 0K _ 0 4
P ET P6 U S B 3 0_ C L K R E Q # _ N E C _ R R 1 9 8 1 0K _ 0 4
B G 40 T11
Link
Lane 1 X C L _ D A TA 1
B J 40 P ERN 7 C L _D A T A 1 CL _ D A T A 1 27
PCH 2/9- PCIE, Lane
Lane
2
3
USB3.0 NEC
WLAN
A Y 40
B B 40
P ERP7
P E T N7
P ET P7 CL _ RS T 1 #
P1 0 C L _ R S T# 1 C L _ R S T #1 27
Lane 4 GLAN / CARD READER B E 38
SMBUS, CLK Lane 5 X
B C 38
A W 38
A Y 38
P ERN 8
P ERP8
P E T N8
Lane 6 X P ET P8
Lane 7 X M 10 P E G _C L K R E Q#
Y 40 P E G _A _C L K R Q # / GP I O4 7 P E G _ C L K R E Q# 12
RN 1 9
Lane 8 X Y 39 C L K OU T _ P C I E 0N 1 0 K _ 8 P 4 R_ 0 4
C L K OU T _ P C I E 0P AB3 7 V GA _P E X C L K # CL K _ P C IE _ ICH # 8 1
C L K O U T _ P E G _A _ N V GA _ P E X C LK # 1 2
CLOCKS
P C I E C L K R Q0 # J2 AB3 8 V GA _P E X C L K CL K _ P C IE _ ICH 7 2
P C I E C L K R Q 0 # / GP I O7 3 CL K O UT _ P E G _ A _ P V GA _ P E X C LK 12 10 0MH z CL K _ B U F _ CP Y CL K # 6 3
CL K _ B U F _ CP Y CL K 5 4
C L K _ P C I E _ U S B _ 30 _ # _ V LAI B 49 AV2 2
C L K _ B CL K # 3
C L K _ P C I E _ U S B _ 30 _ V L I A B 47 C L K OU T _ P C I E 1N C L K OU T _D MI _ N AU 2 2 RN 9
C L K OU T _ P C I E 1P CL K O UT _ DM I_ P C L K _ B CL K 3 10 0MH z 1 0 K _ 8 P 4 R_ 0 4
U S B 3 0_ C LK R E Q # _V LI M1 C L K _ B U F _ D O T 96 8 1
P C I E C L K R Q 1 # / GP I O1 8 AM 1 2 7 2
P CH _ CL K _ D P _ N_ R R 22 3 *1 0 m li _ s ho rt _ 0 4 C L K _ DP # 3 C L K _ B U F _ D O T 96 #
CL K O UT _ DP _ N AM 1 3 P CH _ CL K _ D P _ P _ R R 22 6 *1 0 m li _ s ho rt _ 0 4 CL K _ B U F _ CK S S CD 6 3
R5 1 0 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _U S B _ 3 0 _# _ N E C A A 48 C LK OU T_ D P _ P C L K _ DP 3 12 0MH z CL K _ B U F _ CK S S CD # 5 4
2 9 C L K _ P CI E _ US B 3 0 # _ NE C C L K OU T _ P C I E 2N
R5 1 1 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _U S B _ 3 0 _N E C A A 47
1 00 MHz 2 9 C L K _ P C I E _U S B 3 0 _ N E C C L K OU T _ P C I E 2P BF1 8 CL K _ P C IE _ ICH # C L K _ B U F _ R E F 14 R 27 9 1 0 K_ 0 4
V 10 C L K I N _D MI _ N BE1 8
R1 9 9 * 1 0m i l _ sh o rt _ 0 4 U S B 3 0 _ C L K R E Q# _ N E C _ R CL K _ P C IE _ ICH P E G _C L K R E Q# R 27 7 * 1 0K _0 4
29 U S B 3 0 _C L K R E Q# _ N E C P C I E C L K R Q 2 # / GP I O2 0 CL K IN _ DM I_ P L A N _ C LK R E Q # R 49 3 1 0 K_ 0 4
R3 1 0 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _W LA N # _ R Y 37 BJ 3 0 CL K _ B U F _ CP Y CL K #
2 7 C LK _P C I E _ W L A N # R3 0 9 * 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _W LA N _ R Y 36 C L K OU T _ P C I E 3N C L K I N _ G N D 1_ N BG 3 0 CL K _ B U F _ CP Y CL K
10 0MH z 2 7 CL K _ P C IE _ W L A N C L K OU T _ P C I E 3P C L K I N _G N D 1 _ P
A8
27 W L A N_ C L K RE Q # P C I E C L K R Q 3 # / GP I O2 5 G 24 C L K _ B U F _ D O T 96 #
C LK I N _ D OT _ 96 N E2 4 C L K _ B U F _ D O T 96
3 0 C L K _ P C I E _ GL A N #
R3 2 7
R3 2 6
* 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _G L A N # _ R
* 1 0m i l _ sh o rt _ 0 4 C L K _ P C I E _G L A N _ R
Y 43
Y 45 C L K OU T _ P C I E 4N
C L K I N _D OT _ 9 6 P
Crystal 8045 & 3225 Co-lay
10 0MH z 30 C L K _ P C I E _ GL A N C L K OU T _ P C I E 4P AK7 CL K _ B U F _ CK S S CD # C6 8 5 1 8p _ 5 0 V _ N P O _ 04
L A N _C L K R E Q# L 12 C L K I N _ S A TA _ N AK5 CL K _ B U F _ CK S S CD
P C I E C L K R Q 4 # / GP I O2 6 CL K IN _ S A T A _ P
X 8 A 0 25 0 0 0 F G1 H _2 5 M H z
V 45 K4 5 C L K _ B U F _ R E F 14
V 46 C L K OU T _ P C I E 5N R E F C LK 14 I N
1
C L K OU T _ P C I E 5P R 505 X1 3
P C I E C LK R Q 5# L 14 H 45 *H S X 3 21 S _ 2 5 MH Z
P C I E C L K R Q 5 # / GP I O4 4 C LK I N _ P C I L OO P B A C K C LK _P C I _ F B 22 33 MHz 1 M _ 04 X 12
2
2
A B 42 V4 7 X TA L2 5 _ I N
A B 40 C L K OU T _ P E G_ B _ N X T A L 2 5_ I N V4 9 X TA L2 5 _ OU T
C L K OU T _ P E G_ B _ P X T A L 25 _ OU T
C6 8 4 1 8p _ 5 0 V _ N P O _ 04
P E G _ B _ C L K R Q# E6 FSX8L_25MHz? ? ? ? ?
P E G_ B _ C LK R Q # / GP I O 5 6
Y 47 X C L K _ R C OM P R5 1 3 9 0 . 9_ 1 % _ 0 4
X C L K _ R C OM P 1 . 05 V S
V 40
V 42 C L K OU T _ P C I E 6N
C L K OU T _ P C I E 6P
90.9-O ? % pullup to +VccIO
P C I E C LK R Q 6# T 13 (1.05V, S0 rail)close to
P C I E C L K R Q 6 # / GP I O4 5 PCH
V 38 K4 3
FLEX CLOCKS
V 37 C L K OU T _ P C I E 7N C L K O U T F L E X 0 / GP I O6 4
C L K OU T _ P C I E 7P F47
P E G _ P C I E C L K R Q7 # K 12 C L K O U T F L E X 1 / GP I O6 5
P C I E C L K R Q 7 # / GP I O4 6 H 47
C L K _ XD P _ N A K 14 C L K O U T F L E X 2 / GP I O6 6
C L K _ XD P _ P A K 13 C L K OU T _ I TP XD P _ N K4 9 D G P U _ P R S N T#
C L K OU T _ I TP XD P _ P C L K O U T F L E X 3 / GP I O6 7
B D 8 2 H M 6 5 QS B 2 QN JH F C -B GA
18 , 2 0 , 2 4, 25 , 3 5 , 3 7 , 38 1 . 0 5V S
2, 3, 8 , 1 1 , 1 6 , 18 , 2 0 , 2 2 , 2 3, 2 4 , 2 5 , 2 7, 2 8 , 2 9 , 3 0, 35 , 3 7 , 3 8 , 39 3 . 3V
3 , 9 , 1 0 , 1 1, 1 2 , 1 8 , 2 0, 21 , 2 2 , 2 3, 24 , 2 5 , 2 7 , 28 , 3 0 , 3 1 , 32 , 3 3 , 3 4 , 3 5, 3 9 3. 3V S
B - 20 PCH 2/9- PCIE, SMBUS, CLK
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Schematic Diagrams
PCH 3/9- DMI, FDI, PWRGD
CougarPoint -M (DMI,FDI,GPIO)
U34C
BC24 BJ14
2 DMI_RX
N0 BE20 DMI0RXN FDI_RXN0 AY14 FDI_TXN0 2 3.3V
2 DMI_RX
N1 BG18 DMI1RXN FDI_RXN1 BE14 FDI_TXN1 2
2 DMI_RX
N2 DMI2RXN FDI_RXN2 FDI_TXN2 2
BG20 BH13 PM_SLP_LAN# R23
0 *10K_04
2 DMI_RX
N3 DMI3RXN FDI_RXN3 FDI_TXN3 2
BC12 SWI# R47
8 10K_04
FDI_RXN4 FDI_TXN4 2
BE24 BJ12 SUS_PWR_ACK R48
3 10K_04
2 DMI_RX
P0 BC20 DMI0RXP FDI_RXN5 BG10 FDI_TXN5 2
2 DMI_RX
P1 BJ18 DMI1RXP FDI_RXN6 BG9 FDI_TXN6 2 PCIE_WAKE#
FDI_TXN7 2 R22
9 10K_04
2 DMI_RX
P2 BJ20 DMI2RXP FDI_RXN7 PWR_BTN# R24
1 *10K_04
2 DMI_RX
P3 DMI3RXP BG14 PM_BATLOW# R47
7 8.2K_04
AW24 FDI_RXP0 BB14 FDI_TXP0 2
2 DMI_TX
N0 AW20 DMI0TXN FDI_RXP1 BF14 FDI_TXP1 2
FDI_TXP2 2 AC_PRESENT_R R57
8 10K_04
2 DMI_TX
N1 BB18 DMI1TXN FDI_RXP2 BG13
2 DMI_TX
N2 DMI2TXN FDI_RXP3 FDI_TXP3 2
AV18 BE12
2 DMI_TX
N3 DMI3TXN FDI_RXP4 BG12 FDI_TXP4 2 12/7 add 3.3VS
DMI
FDI
AY24 FDI_RXP5 BJ10 FDI_TXP5 2
2 DMI_TX
P0 DMI0TXP FDI_RXP6 FDI_TXP6 2
AY20 BH9 PM_CLKRUN# R46
0 8.2K_04
2 DMI_TX
P1 DMI1TXP FDI_RXP7 FDI_TXP7 2
AY18
2 DMI_TX
P2 DMI2TXP
AU18
2 DMI_TX
P3 DMI3TXP AW1
6 RSMRST# R26
2 10K_04
B.Schematic Diagrams
FDI_INT FDI_I NT 2
R491 49.9_1
%_04 DMI_COMP_R BJ24 AV12
1. 05
VS DMI_ZCOMP FDI_FSYNC0 FDI_FSYNC0 2
BG25 BC10
R486 750_1%_04 DMI_2RBIAS BH21
DMI_IRCOMP
DMI2RBIAS
FDI_FSYNC1
FDI _
LSYNC0
AV14
FDI_FSYNC1 2
FDI_LSYNC0 2
Sheet 20 of 49
PCH 3/9- DMI, FDI,
BB10 RTCVCC
FDI _
LSYNC1 FDI_LSYNC1 2
DSWODVREN R48
7 330K_04
DSWVRMEN
A18 DSWODVREN
R48
5 *330K_04 PWRGD
System Power Management
SUS_PWR_ACK C12 E22 RSMRST#
SUSACK# DPWROK
R457 10K_04 SYS_RESET# K3 B9 PCIE_WAKE#
3.3VS SYS_RESET# WAKE# PCIE_WAKE# 27,29,30
C411 *0.1u_10V_
X5R_04 SYS_PWROK P12 N3 PM_CLKRUN#
SYS_PWROK CLKRUN# / GPIO32 PM_CLKRUN# 28 DSWODV REN - On Die DSW VR Enable
R259 0_04 PM_PCH_PWROK_R L22 G8 S4_STATE#
34 PM_PCH_PWROK PWROK SUS_STAT# / GPIO61 S4_STATE# 28 HI En abled (DEFAULT)
R255 04 PM_M
*10mil_short _ PWROK L10 N14 SUSCLK
LOW Di sabled
APWROK SUSCLK / GPIO62
B13 D10 SLP_S5#
3 PM_DRAM_PWRGD DRAMPWROK SLP_S5# / GPIO63
RSMRST# C21 H4
34 RSMRST
# RSMRST# SLP_S4# SUSC# 34
, 38
SUS_PWR_
ACK K16 F4
34 SUS_PWR_ACK SUSWARN#/SUSPWRDNACK/GPIO30 SLP_S3# SUSB# 6,29,34,35
PWR_BTN# E20 G10 SLP_A#
34 PWR_BTN# PWRBTN# SLP_A#
R579 *0_04 AC_PRESENT_R H20 G16 SLP_SUS#
22,34 AC_PRESENT ACPRESENT / GPIO31 SLP_SUS#
12/7 add PM_BAT
LOW# E10 AP14
BATLOW# / GPIO72 PMSYNCH H_PM_SYNC 3
SWI# A10 K14 PM_SLP_LAN#
34 SWI# RI # SLP_LAN# / GPIO29
BD82HM65 QSB2 QNJH FC-BGA
3.3VR
3.3VR U22D
74LVC08PW
14
R580 0_04
3.3V
R581 *0_04 12
3.3VS 39 DELAY_
PWRGD 11 SYS_PWROK
13
U22C
12/8 34 PM_PCH_PWROK
14
74LVC08PW
7
3.3VR 9
3.3VR 37 0.85VS_PWRGD 8
10 ALL_SYS_PWRGD 11,34,39
U22B
U22A 74
LVC08PW
14
74LVC08PW R364
7
14
4 *100K_04
1 37 1.8VS_PWRGD 6
38 DDR1.5V_PWRGD 3 DDR_1.05VS_
PWRGD 5
2 12/8
38 1.05VS_PWRGD
7
7
1.05VS_VTT
_EN 35
R253 *10K_04 PM_MPWROK
11,18,27,30,34, 35,36,37,41,42 VDD3
18,25 RT CVCC
ON 18,19,24,25,35,37,38 1.05VS
2,3,8, 1
1,16,18,19,22,23,24,25,27, 28,29,30,35,37,38,39 3.3V
? ? SUSB# -->? ? 1.05VS_VTT? SUSPEND? ? ? ? ? 3, 9, 1
0,11,12,18,19,21,22,23,24
, 25,27,28,30,31,32,33,34,35,39 3.3VS
PCH 3/9- DMI, FDI, PWRGD B - 21
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Schematic Diagrams
PCH 4/9- LVDS, DDI, CRT
CougarPoint -M (LVDS,DDI)
U 34D
J47 A P4 3
1 1 B LO N M4 5 L _ BKL TEN S D V O _ TV C L K I N N A P4 5
1 1 , 3 4 N B _E N A V D D L _ V DD _ E N S D V O_ T V C L K I N P
P4 5 A M4 2
L _ B K L T CT L S D V O_ S T A L L N A M4 0
T40 S D V O_ S T A L L P
Ver:1.0 11 P _ D D C _ C LK
3 .3 V S K4 7 L _ DD C_ C L K A P3 9
pull up 2.2K 11 P _ DD C_ D A T A L _ DD C_ D A T A S D V O_ I N T N A P4 0
R3 0 2 1 0K _0 4 L _C T R L _ C L K T45 S DV O _ INT P
R2 8 6 1 0K _0 4 L _C T R L _ D A TA P3 9 L _ C T R L_ C L K
L _ C T R L_ D A T A
R2 9 1 2 . 3 7K _1 % _ 0 4 L V D S _I B G AF3 7 P 38
B.Schematic Diagrams
AF3 6 L V D _I B G S D V O_ C TR L C L K M 39
L V D _V B G S D V O _ C T R LD A T A
AE4 8
AE4 7 L V D _V R E F H A T4 9
Sheet 21 of 49 L V D _V R E F L DD P B _ A U X N
D D P B _A U X P
A T4 7
A T4 0
SDVO
Display Port B
AK3 9 DD P B _ HP D
11 L V D S - LC L K N
LVDS
AK4 0 L V D S A_ CL K # A V4 2
PCH 4/9- LVDS, 11
11
L V D S - LC L K P
L V D S - L0 N
A N4 8
A M4 7
L V D S A_ CL K
L V D S A _ D A TA # 0
Digital Display Interface
DD P B _ 0 N
D DP B _ 0 P
DD P B _ 1 N
A
A
A
V4 0
V4 5
V4 6
3 .3 VS
11 L V D S - L1 N L V D S A _ D A TA # 1 D DP B _ 1 P
DDI, CRT
AK4 7 A U4 8
11 L V D S - L2 N AJ 4 8 L V D S A _ D A TA # 2 DD P B _ 2 N A U4 7
L V D S A _ D A TA # 3 D DP B _ 2 P A V4 7 R3 3 0 R3 2 9
A N4 7 DD P B _ 3 N A V4 9
11 L V D S - L0 P L V D S A _ D A TA 0 D DP B _ 3 P 2 . 2 K _ 04 2. 2 K _ 0 4
A M4 9
11 L V D S - L1 P AK4 9 L V D S A _ D A TA 1
11 L V D S - L2 P AJ 4 7 L V D S A _ D A TA 2 P 46
L V D S A _ D A TA 3 D D P C _ C TR L C L K P 42 H DM I_ CT R L CL K 32
D D P C _ C T R LD A T A H DM I_ CT R L DA T A 32
AF4 0
11 L V D S - U C LK N AF3 9 L V D S B_ CL K # A P4 7
11 L V D S - U C LK P L V D S B_ CL K DD P C_ A U X N A P4 9
A H4 5 D D P C _A U X P A T3 8
Display Port C
11 L V DS - U0 N L V D S B _ D A TA # 0 D DP C_ HP D H D MI _H P D 32
A H4 7
11 L V DS - U1 N AF4 9 L V D S B _ D A TA # 1 A Y4 7
11 L V DS - U2 N AF4 5 L V D S B _ D A TA # 2 D DP C _ 0 N A Y4 9 HD MI C _ C0 C N 32
L V D S B _ D A TA # 3 DD P C_ 0 P A Y4 3 HD MI C _ C0 C P 32
A H4 3 D DP C _ 1 N A Y4 5 HD MI C _ C1 C N 32
12/7 change to 11
11
L V DS - U0 P
L V DS - U1 P
A H4 9 L V D S B _ D A TA 0 DD P C_ 1 P B A4 7 HD
HD
MI C
MI C
_ C1 C P
_ C2 C N
32
32
AF4 7 L V D S B _ D A TA 1 D DP C _ 2 N B A4 8
10mil 11 L V DS - U2 P AF4 3 L V D S B _ D A TA 2 DD P C_ 2 P B B4 7 HD MI C _ C2 C P 32
L V D S B _ D A TA 3 D DP C _ 3 N HD MI C _ CL K C N 32
B B4 9
DD P C_ 3 P HD MI C _ CL K C P 32
* 1 0m i l _ sh o rt _ 0 4 D A C _B LU E _ R
11 D A C _B LU E N4 8 M 43
C6 8 9 R5 1 6 R 50 6 1 5 0 _ 1% _ 0 4 D A C _ B L U E _ R
C RT _ BL UE D D P D _ C TR L C L K
11 D A C _G R E E N * 3 3p _ 5 0 V _ N P O _ 04 * 1 0m i l _ sh o rt _ 0 4 D A C _G R E E N _ R R 51 2 1 5 0 _ 1% _ 0 4 D A C _ G R E E N _ R P 4 9 M 36
C6 9 2 R5 1 7 R 51 5 1 5 0 _ 1% _ 0 4 D A C _ R E D _ R T49 C R T _ GR E E N D D P D _ C T R LD A T A
C RT _ RE D
* 3 3p _ 5 0 V _ N P O _ 04 * 1 0m i l _ sh o rt _ 0 4 D A C _R E D _R
11 D A C _R E D A T4 5
C6 9 7 R5 2 1
T39 DD P D_ A U X N A T4 3
CRT
* 3 3p _ 5 0 V _ N P O _ 04
NEAR PCH 11 D A C_ D DC A CL K M4 0 C RT _ DD C_ C L K D D P D _A U X P B H4 1
Display Port D
EMI 11 D A C _ D D C A D A TA C RT _ DD C_ D A T A D DP D_ HP D
B B4 3
M4 7 D DP D _ 0 N B B4 5
11 D A C _H S Y N C M4 9 C RT _ HS Y N C DD P D_ 0 P B F44
11 D A C _V S Y N C C RT _ VS Y NC D DP D _ 1 N B E4 4
DD P D_ 1 P B F42
R 2 94 1 K_ 1 % _ 0 4 DA C_ IRE F _ R T43 D DP D _ 2 N B E4 2
T42 D A C_ IR E F DD P D_ 2 P B J4 2
C RT _ IRT N D DP D _ 3 N B G4 2
DD P D_ 3 P
B D 8 2 H M 6 5 QS B 2 Q N J H F C - B GA
Connect to GND
External Graphics (PCH Integrated Graphics Disable)
3 , 9, 1 0 , 1 1 , 1 2, 18 , 1 9 , 2 0 , 22 , 2 3 , 2 4 , 25 , 2 7 , 2 8 , 3 0, 3 1 , 3 2 , 3 3, 3 4 , 3 5 , 3 9 3 .3 VS
B - 22 PCH 4/9- LVDS, DDI, CRT
Downloaded from www.Manualslib.com manuals search engine
Schematic Diagrams
PCH 4/9- OCI, USB, RSVD
CougarPoint -M (PCI,USB,RSVD)
RN8 3.3V
10K_8P4R_04
USB_OC#01 5 4
U34E USB_OC#23 6 3
AY7 USB_OC#89 7 2
RSVD1 AV7 USB_OC#1213 8 1
BG26 RSVD2 AU3
BJ26 TP1 RSVD3 BG4 RN18
BH25 TP2 RSVD4 10K_8P4R_04
BJ16 TP3 AT10 USB_OC#14 5 4
Boot BIOS Strap BG16 TP4 RSVD5 BC8 USB_OC#67 6 3
AH38 TP5 RSVD6 USB_OC#1011 7 2
AH37 TP6 AU2 USB_OC#45 8 1
BBS_BIT1 BBS_BIT0 Boot BIOS Location AK43 TP7 RSVD7 AT4
AK45 TP8 RSVD8 AT3
C18 TP9 RSVD9 AT1
0 0 LPC N30 TP10 RSVD10 AY3
H3 TP11 RSVD11 AT5
0 1 Reserved (NAND) TP12 RSVD12
AH12 AV3
1 0 PCI AM4 TP13 RSVD13 AV1 RN12 3.3VS
AM5 TP14 RSVD14 BB1 10K_8P4R_04
1 1 SPI TP15 RSVD15
Y13 BA3 INT_PIRQE# 4 5
K24 TP16 RSVD16 BB5 SATA_ODD_DA# 3 6
L24 TP17 RSVD17 BB3 2 7
B.Schematic Diagrams
INT_PIRQD#
BBS_BIT1 AB46 TP18 RSVD18 BB7 INT_PIRQA# 1 8
R354 *1K_04
AB45 TP19 RSVD19 BE8
TP20 RSVD20 BD4
RSVD
RN20
RSVD21 BF6 10K_8P4R_04
RSVD22 DGPU_HOLD_RST# 4 5
B21 AV5 DGPU_SELECT# 3 6
M20 TP21 RSVD23 AV10 D_GPU_PWR_EN# 2 7
TP22 RSVD24
Flash Descriptor security override strap
AY16
BG46 TP23
TP24 RSVD25
AT8
1 8
RN11
Sheet 22 of 49
AY5 10K_8P4R_04
PCI_GNT#3
LOW = PCI_GNT#3 swap override BE28
BC30 TP25
TP26
RSVD26
RSVD27
RSVD28
BA2
AT12
INT_PIRQB#
INT
_PIRQC#
INT
_PIRQH#
4
3
2
5
6
7
PCH 4/9- OCI, USB,
BE32 BF3 INT
_PIRQG# 1 8
HIGH = Default BJ32
BC28
BE30
TP27
TP28
TP29
RSVD29
DGPU_PWM_SELECT
# R3
52 *10K_04
RSVD
BF32 TP30
BG 32 TP31 C24
AV26 TP32 USBP0N A24 USB_
PN0 29
Unde rstand the RE D FONT define BB26 TP33 USBP0P C25
USB_
PP0 29 USB PORT0
TP34 USBP1N USB_
PN1 31
AU28 B25
R353 *1K_04 PCI_GNT#3 AY30 TP35 USBP1P C26
USB_
PP1 31 USB PORT1
TP36 USBP2N USB_
PN2 27
AU26 A26 3G
AY26 TP37 USBP2P K28 USB_
PP2 27
AV28 TP38 USBP3N H28 USB_
PN3 27
AW30 TP39 USBP3P E28 USB_
PP3 27 WLAN
TP40 USBP4N D28
USBP4P C28
USBP5N USB_
PN5 28
R318 *1K_04 INT
_PIRQE# A28 CCD
USBP5P USB_
PP5 28
C29
USBP6N B29
K40 USBP6P N28
MPC Switch C ontrol INT_PIRQA#
INT_PIRQB# K38 PIRQA# USBP7N M28
MPC OFF -- 0 DEFAULT INT_PIRQC# H38 PIRQB# USBP7P L30
PCI
PIRQC# USBP8N USB_
PN8 29
INT_PIRQD# G38 K30
MPC ON -- 1 PIRQD# USBP8P G30
USB_
PP8 29 USB PORT3
DGPU_HOLD_RST# C46 USBP9N E30
C44 REQ1# / GPIO5
0 USBP9P C30
USB
DGPU_SELECT#
E40 REQ2# / GPIO5
2 USBP10N A30
D_GPU_PWR_EN#
REQ3# / GPIO5
4 USBP10P L32
BBS_BIT1 D47 USBP11N K32
DGPU_PWM _SELECT# E42 GNT1# / GPIO51 USBP11P G32
PCI_GNT#3 F46 GNT2# / GPIO53 USBP12N E32
GNT3# / GPIO55 USBP12P C32
USBP13N A32
G42 USBP13P
INT_PIRQE#
SATA_ODD_DA# G40 PIRQE# / GPIO2
31 SATA_ODD_DA# INT_PIRQG# C42 PIRQF# / GPIO3 C33 USB_BIAS R492 22.6_1%_06
INT_PIRQH# D44 PIRQG# / GPIO4 USBRBI AS#
PIRQH# / GPIO5
B33
R2
39 *0_04 K10 USBRBI AS
30,34 PME# PME#
PLT_RST# C6 A14 USB_OC#01
3,12,28 PLT_RST# PLTRST# OC0# / GPI O59 K20 USB_OC#23 USB_
OC#01 31
OC1# / GPI O40 B17 USB_OC#45
H49 OC2# / GPI O41 C16 USB_OC#67
R333 *22_04 PCLK_TPM_PCH H43 CLKOUT_PCI0 OC3# / GPI O42 L16 USB_OC#89
28 PCLK_TPM J48 CLKOUT_PCI1 OC4# / GPI O43 A16
R502 22_04 CLK_PCI_FB_R USB_OC#10
11
19 CLK_PCI_FB K42 CLKOUT_PCI2 OC5# / GPI O9 D14 USB_OC#12
13
CLK_PCI_KBC_R H40 CLKOUT_PCI3 OC6# / GPI O10 C14 USB_OC#14 R484
34 PCLK_KBC R298 22_04 *0_04
CLKOUT_PCI4 OC7# / GPI O14 AC_PRESENT 20,34
BD82HM65 QSB2 QNJH FC-BGA
3.3VS
PI N PL T_ RS T# to B uf fe r
C648 *0.1u_1
6V_Y5V_
04
5
U33
PL
T_RST# 1 MC74VHC1G08DFT
2G
4
2 BUF_
PLT_RST
# 27,29,30,34
R480
3
100K_04
2,3,8,11,16,18,19,20,23,24,25,27,28,29,30,35,37,38,39 3.3V
3,9,10,11,12,18,19,20,21,23,24,25,27,28,30,31,32,33,34,35,39 3.3VS
PCH 4/9- OCI, USB, RSVD B - 23
Downloaded from www.Manualslib.com manuals search engine
Schematic Diagrams
PCH 6/9- GPIO, CPU
3.3V
R464
R208
1K_04
1K_04
HOST_ALERT#1
HOST_ALERT#2
CougarPoint - M (GPIO,VSS_NCTF,RSVD)
3.3VS
R473 *1K_04 GPIO34 U34F
R305 *10K_04 DGPU_PWROK
R300 1K_04 SATA_ODD_PWRGT S_GPI O T7 C40 SATA_ODD_PWRGT
BMBUSY# / GPI O0 TACH4 / GPIO68 SATA_ODD_PWRGT 31
R459 10K_04 MFG_MODE
R461 10K_04 SATA_DET#4 SMI# A42 B41 PCH_GPIO57R495 1.5K_1%_04
34 SMI# TACH1 / GPIO1 TACH5 / GPIO69
RN10 DGPU_HPD_INTR# H36 C41 GPIO70 R497 1.5K_1%_04
TACH2 / GPIO6 TACH6 / GPIO70 3.3VS
10K_8P4R_04
1 8 KBC_RST# SCI# E38 A40 GPIO71 R496 1.5K_1%_04
34 SCI# TACH3 / GPIO7 TACH7 / GPIO71 3.3VS
2 7 DGPU_HPD_INTR#
3 6 SCI# ICC_EN# C10
4 5 SMI# GPIO8
R215 200K_04 SATA_ODD_PRSNT# R476 10K_04 EDID_SELECT# C4
3.3V LAN_PHY_PWR_CTRL / GPIO12
R213 10K_04 3. 3VS
RN17 HOST_ALERT#1 G2 P4
GPIO15 A20GATE GA20 34
10K_8P4R_04 R227 *10K_04 1. 05VS_VTT
1 8 S_GPIO AU16 HPECI_R R224 *0_04
PECI H_PECI 3, 34
2 7 ODD_DETECT# ODD_DETECT# 18 SATA_DET#4 U2
3 6 TEST_SET_UP SATA4GP / GPIO16 P5 KBC_RST#
4 5 RCIN# KBC_RST# 34
CRIT_TEMP_REP#_R
B.Schematic Diagrams
D40 AY11
GPIO
DGPU_PWROK
TACH0 / GPIO17 PROCPWRGD H_CPUPWRGD 3
CPU/MISC
BI OS_REC T5 AY10 HTHRMTRIP#_R R228 390_1%_06
SCLOCK / GPIO22 THRMTRI P# H_THRMTRIP# 3
R233 *10mil_short_04 PCH_TS_VSS1
R216 *10mil_short_04 PCH_TS_VSS2 HOST_ALERT#2 E8 T14 INIT3_3V#
GPIO24 / MEM_LED INIT3_3V#
R225 *10mil_short_04 PCH_TS_VSS3 R472 2.2K_04 1.8VS
R219 *10mil_short_04 PCH_TS_VSS4 SB_BLON E16 AY1 NV_CLE R475 1K_04
11 SB_BLON GPIO27 DF_TVS H_SNB_IVB# 3
Sheet 23 of 49 R212
R221
*1K_04
100K_04
PLL_ODVR_EN
FDI_OVRVLTG
PLL_ODVR_EN
GPIO34
P8
K1
GPIO28
TS_VSS1
AH8 PCH_TS_VSS1 DMI & FDI Termination Voltage
STP_PCI # / GPIO34 AK11 PCH_TS_VSS2 Set to Vss when LOW
PCH 6/9- GPIO, PLL_ODVR_EN:HIGH- ENABLED[DEFAULT] 34 I CPPE#
R238 *0_04 PCH_MUTE#
SATA_ODD_PRSNT#
K4
V8
GPIO35
TS_VSS2
TS_VSS3
AH10 PCH_TS_VSS3
NV_CLE Set to Vcc when HIGH
LOW - DISABLED 31 SATA_ODD_PRSNT# SATA2GP / GPIO36
CPU 3.3VS
FDI_OVRVLTG M5
SATA3GP / GPIO37
TS_VSS4
AK10 PCH_TS_VSS4
MFG_MODE N2 P37
SLOAD / GPIO38 NC_1
R458 *10K_04 GFX_CRB_DET GFX_CRB_DET M3
SDATAOUT0 / GPIO39
TEST_SET_UP V13 BG2
R467 INTERNAL GFX: LOW (DEFAULT) SDATAOUT1 / GPIO48 VSS_NCTF_15
R200 *0_04 CRIT_TEMP_REP#_R V3 BG48
EXTERNAL GFX: HIGH 34 CRI T_TEMP_REP# SATA5GP / GPIO49 VSS_NCTF_16
100K_04
R209 100K_04 TEST_DET D6 BH3
GPIO57 VSS_NCTF_17
BH47
VSS_NCTF_18
A4 BJ4
BI OS_REC VSS_NCTF_1 VSS_NCTF_19
R205 10K_04
A44 BJ44
VSS_NCTF_2 VSS_NCTF_20
R204 BIOS RECOVERY A45 BJ45
VSS_NCTF_3 VSS_NCTF_21
DISABLE----HIGH (DEFAULT) A46 BJ46
NCTF
*0_04
ENABLE-----LOW VSS_NCTF_4 VSS_NCTF_22
A5 BJ5
VSS_NCTF_5 VSS_NCTF_23
A6 BJ6
3.3V VSS_NCTF_6 VSS_NCTF_24
B3 C2
VSS_NCTF_7 VSS_NCTF_25
B47 C48
R481 10K_04 ICC_EN# VSS_NCTF_8 VSS_NCTF_26
BD1 D1
VSS_NCTF_9 VSS_NCTF_27
INTEGRATED Clock Chip Enable BD49 D49
VSS_NCTF_10 VSS_NCTF_28
R479 ICC_EN#: HIGH - DISABLED [DEFAULT]
BE1 E1
*1K_04 LOW - ENABLED VSS_NCTF_11 VSS_NCTF_29
BE49 E49
VSS_NCTF_12 VSS_NCTF_30
BF1 F1
VSS_NCTF_13 VSS_NCTF_31
BF49 F49
VSS_NCTF_14 VSS_NCTF_32
BD82HM65 QS B2 QNJH FC- BGA
6,24,37 1.8VS
2,3,5,24,25,35,37,39 1.05VS_VTT
2,3,8,11,16,18,19, 20, 22, 24,25,27,28,29,30,35,37,38,39 3.3V
3,9,10,11,12,18,19,20,21, 22, 24, 25,27,28,30,31,32,33,34,35,39 3.3VS
B - 24 PCH 6/9- GPIO, CPU
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Schematic Diagrams
PCH 7/9- PWR
CougarPoint -M (POWER) L5 3 3 . 3V S
H C B 16 0 8 K F -1 2 1T 2 5
1 . 0 5V S
U 3 4G PO W ER V C CA _ D A C_ 3 .3 V S 5 VS
L5 2
1.3A 1mA H C B 16 0 8 K F -1 2 1T 2 5 U 35
AA2 3 U4 8 V C CA _ DA C3 .3 V S 5 1
AC2 3 VC CC OR E [1 ] V CC A DA C OU T IN
C 40 4 C 42 4 C4 1 8 C 41 9 AD2 1 VC CC OR E [2 ] C 6 82 C6 8 1 C6 8 8 C 6 76 C6 9 1 R5 0 3
CRT
AD2 3 VC CC OR E [3 ] U4 7 3 C 67 5
AF 2 1 VC CC OR E [4 ] V S S A DA C S H DN #
1 0 u _6 . 3 V _ X 5R _ 06 1 u _6 . 3 V _ X 5 R _ 0 4 1u _ 6 . 3 V _X 5 R _0 4 1 u _6 . 3 V _ X 5 R _ 0 4 0 . 0 1 u _1 6 V _ X 7R _ 04 0 . 1 u_ 1 0 V _ X5 R _0 4 1 0u _ 6 . 3 V _X 5 R _0 6 0 . 1 u _ 10 V _ X 5 R _ 0 4 2 2u _ 6 . 3 V _X 5 R _ 0 8 * 2 3. 7 K _ 1 % _0 4
VCC CORE
AF 2 3 VC CC OR E [5 ] SET 4 2
* 1u _ 6 . 3 V _X 5R _ 04
A G2 1 VC CC OR E [6 ] 3 . 3V S _V C C A _L V D SET G ND
A G2 3 VC CC OR E [7 ] 3 .3 V S R 5 01 * A P L 56 0 3 -3 3B
A G2 4 VC CC OR E [8 ] AK3 6
1mA
R 27 5 * 1 5m i l _s h o rt _ 06
A G2 6 VC CC OR E [9 ] V C CA L V D S * 1 0K _ 1 % _ 04
A G2 7 VC CC OR E [ 1 0] AK3 7 C4 5 0
A G2 9 VC CC OR E [ 1 1] VSSAL VD S
A J2 3 VC CC OR E [ 1 2] *1 u _ 6. 3V _ X 5 R _ 0 4
VC CC OR E [ 1 3]
LVDS
A J2 6 A M 37 1 . 8V S _ V C C TX _ L V D L3 4 1 .8 V S
A J2 7 VC CC OR E [ 1 4] V C C T X _L V D S [ 1 ] H C B 1 60 8 K F -1 2 1T 2 5
APL5603-33B 6-02-56033-4C0
12/7 change to 15mil A J2 9 VC CC OR E [ 1 5] A M 38
60mA G9091-330T11UF 6-02-90913-4C0
A J3 1 VC CC OR E [ 1 6] V C C T X _L V D S [ 2 ]
1. 0 5 V S 1 . 0 5 V S _ V C C A P L L _E XP VC CC OR E [ 1 7] AP3 6 C4 6 1 C4 6 7 C 4 74
V C C T X _L V D S [ 3 ]
R 4 90 *1 5 m il _ s ho rt _ 0 6 AP3 7 0. 0 1 u _1 6 V _ X 7R _ 0 4 0. 01 u _ 16 V _ X 7 R _ 0 4 2 2 u _6 . 3 V _ X 5R _ 08
B.Schematic Diagrams
AN1 9 V C C T X _L V D S [ 4 ]
L4 9 1 . 0 5 V S _ V C C A P L L _E XP 1 V C C I O [ 2 8]
*H C B 1 0 05 K F -1 2 1 T 20
B J2 2 3 . 3V S
V C CA P L L E X P
C 65 5 V3 3 266mA
V C C 3_ 3 [ 6 ]
HVCMOS
AN1 6
*1 0 u _ 6. 3 V _ X 5 R _ 0 6 V C C I O [ 1 5] C4 5 8
AN1 7
V C C I O [ 1 6]
V C C 3_ 3 [ 7 ]
V3 4 0. 1 u _ 10 V _ X 5 R _ 0 4 Sheet 24 of 49
AN2 1
1. 0 5 V S
2.93A
AN2 6
V C C I O [ 1 7]
V C C I O [ 1 8]
160mA
1 . 5 V S _ 1 . 8V S PCH 7/9- PWR
AN2 7 AT1 6
V C C I O [ 1 9] V CC V RM [3 ]
C 4 03 C 3 80 C 4 44 C 43 7 C 41 5 AP2 1
V C C I O [ 2 0]
AP2 3 AT2 0
42mA
1 0 u _6 . 3 V _ X 5 R _ 0 6 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u _ 6. 3 V _ X 5 R _ 0 4 1 u _6 . 3 V _ X 5 R _ 0 4 1 .0 5 V S _ V T T
V C C I O [ 2 1] V CC DM I[1 ]
AP2 4
DMI
C3 9 1 C3 8 8
V C C I O [ 2 2] 2mA
VCCIO
AP2 6 AB3 6 V C C C LK D MI R 28 5 1u _ 6 . 3V _X 5 R _ 0 4 1 0 u_ 6 . 3 V _ X5 R _0 6
V C C I O [ 2 3] V C CC L K DM I 1 . 05 V S
*1 5 m il _ s ho rt _ 0 6
A T2 4
V C C I O [ 2 4]
AN3 3
V C C I O [ 2 5]
AN3 4 A G 16
3 .3 V S V C C I O [ 2 6] V C CD F T E RM [1 ] V _ N V R A M _V C C Q 1 .8 V S 3. 3 V S
266mA BH2 9 A G 17 190mA R 4 63 *1 5 m il _ sh o rt _ 0 6
V C C 3 _ 3 [ 3] V C CD F T E RM [2 ]
DFT / SPI
C 4 29 1 . 5 V S _ 1 . 8V S C3 9 0 R4 7 1 *0 _ 04
AJ 1 6
0 . 1 u _ 10 V _ X 5 R _ 0 4 V C CD F T E RM [3 ] 0. 1 u _ 1 0V _ X 5 R _ 0 4
AP1 6
1 . 0 5V S _V C C A P LL _ F D I V C C V R M[ 2 ] AJ 1 7
V C CD F T E RM [4 ]
R2 3 1 * 0 _0 4 B G6 V C CM E 3 .3 V 3 .3 V S 3 .3 V
1. 0 5 V S Vc c AF D IPL L
R4 6 2 * 0 _0 4
AP1 7
12/17 V C C I O [ 2 7] V1
20mA R 45 5 * 1 5m i l _s h o rt _ 06
FDI
V C CS P I
AU2 0 C 645
1 .0 5 S _ V CC _ DM I V C C D MI [ 2 ]
1 u _ 6 . 3V _X 5 R _ 0 4
R 25 6 * 1 5m i l _s h o rt _ 06 B D 8 2 H M6 5 Q S B 2 QN J H F C -B GA
1 .0 5 VS_ VT T
1. 05 V S 1 .5 V S 1 .8 V S 1 . 5 V S _ 1 . 8V S
R 31 9 *0 _ 0 4 35 1 . 5V S
2 5 1 . 5 V S _ 1 . 8V S
R 25 2 *1 0 m i l_ s h ort _ 0 4
6 , 2 3 , 37 1 . 8V S
R 30 7 *0 _ 0 4 1 8 , 1 9 , 20 , 2 5 , 3 5, 37 , 3 8 1 . 0 5 V S
1 1, 1 8 , 2 5 , 28 , 3 1 , 3 2, 3 3 , 3 5 , 39 , 4 0 5 V S
2 , 3 , 5 , 23 , 2 5 , 3 5, 3 7 , 3 9 1 . 0 5 V S _ V TT
2 , 3 , 8, 11 , 1 6 , 1 8, 1 9 , 2 0 , 22 , 2 3 , 2 5, 2 7 , 2 8 , 29 , 3 0 , 3 5, 3 7 , 3 8 , 39 3 . 3V
3 , 9 , 10 , 1 1 , 1 2, 18 , 1 9 , 2 0, 2 1 , 2 2 , 23 , 2 5 , 2 7, 2 8 , 3 0 , 31 , 3 2 , 3 3, 3 4 , 3 5 , 39 3 . 3V S
PCH 7/9- PWR B - 25
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Schematic Diagrams
PCH 8/9 POWER
L51
CougarPoint - M (POWER)
1. 0 5 V S _ V C C A _ C L K
CougarPoint power supply range
*H C B 1 0 05 K F -1 2 1 T2 0
1 . 05 V S 1 . 05 V S Min Voltage Max
3 . 3V U 34 J P OW ER 1.00V 1.05V 1.10V
C 39 3 A D4 9 N2 6
V CC A CL K V C C I O [ 2 9] C 4 23
1.43V 1.5V 1.58V
Note: C417 - STUFFED ONLY FOR CPT INTERPOSER; P 26
0 . 1 u_ 1 0 V _ X5 R _ 0 4 3mA 1.71V 1.8V 1.89V
UNSTUFF FOR CPT T16 V C C I O [ 3 0] 1u _ 6 . 3V _ X 5 R _ 0 4
V C C D S W 3_ 3 P 28
L35 V C C I O [ 3 1] 3 .3 V 3.14V 3.3V 3.47V
H C B 1 6 08 K F -1 2 1 T2 5 C3 7 5 *0 . 1 u_ 1 0 V _X 5 R _ 0 4 P CH _ V CC DS W V1 2 T2 7
DC P S US B Y P V C C I O [ 3 2] 97m A 4.75V 5V 5.25V
3. 3 V S T2 9
26 6mA V C C I O [ 3 3]
C 68 3 C 46 3 V C C 3 _3 T38 C 4 20 C4 3 1
V C C 3 _3 [ 5 ]
1 0 u_ 6 . 3 V _ X5 R _0 6 1 u _6 . 3 V _ X 5R _0 4 T2 3 0. 1 u _ 10 V _ X 5R _ 04 0 . 1 u_ 1 0 V _X 5 R _ 0 4
B H2 3 V C C S U S 3 _ 3[ 7]
V C C A P LL _ C P Y _ P C H V C C A P L L D MI 2 T2 4
1. 0 5 V S AL 2 9 V C C S U S 3 _ 3[ 8]
L50 *H C B 1 6 08 K F -1 2 1 T2 5
V C C I O[ 1 4 ] V 23
1. 0 5 V S V C C S U S 3 _ 3[ 9]
U SB
C4 0 2 *0 . 1 u_ 1 6 V _Y 5 V _0 4 D CP S U S AL 2 4 V 24 1mA D1 0 R B 7 5 1S -4 0 C 2
D C P S U S [ 3] V C C S U S 3 _ 3 [ 1 0] C A
3. 3 V
P 24
V C C S U S 3 _ 3[ 6]
R2 7 8 10 _ 1 %_ 0 4 5V
AA1 9
V CC A S W [1 ] T2 6
B.Schematic Diagrams
1 .01 A 1 . 0 5V S C 4 34
AA2 1 V C C I O [ 3 4]
1. 0 5 V S V CC A S W [2 ] 0. 1 u _ 10 V _ X 5R _ 04
C 41 4 C 43 5 AA2 4 M2 6 5 V A _ P C H _ V C C 5R E F S U S
V CC A S W [3 ] V 5R E F _ S U S
Clock and Miscellaneous
2 2 u_ 6 . 3 V _ X5 R _0 8 1 u _6 . 3 V _ X 5R _0 4 AA2 6
V CC A S W [4 ] A N2 3 V C CA _ U S B S US C 4 00 *1 u _ 6. 3 V _ X 5 R _ 0 4
AA2 7 D C P S U S [ 4]
V CC A S W [5 ] A N2 4
V C C S U S 3 _ 3[ 1] 3. 3 V
Sheet 25 of 49 C 41 3 C 42 2
AA2 9
AA3 1
V CC A S W [6 ]
V CC A S W [7 ]
5 V S _ P C H_ V CC 5 RE F S U S
D1 2 R B 75 1 S -4 0C 2
1mA
PCH 8/9 POWER 2 2 u_ 6 . 3 V _ X5 R _0 8 1 u _6 . 3 V _ X 5R _0 4 A C2 6
A C2 7
V CC A S W [8 ]
V CC A S W [9 ]
V 5 RE F
P 34
N2 0
C
R 2 74
A
1 0 _1 % _ 04
3 .3 V S
5 VS
A C2 9 V C C S U S 3 _ 3[ 2]
P CI /G PI O/ LP C
C4 4 5
V CC A S W [1 0 ] N2 2
A C3 1 V C C S U S 3 _ 3[ 3]
C 39 7 1 u _6 . 3 V _ X5 R _0 4
V CC A S W [1 1 ] P 20
A D2 9 V C C S U S 3 _ 3[ 4]
1 u _6 . 3 V _ X 5R _ 04
V CC A S W [1 2 ] P 22
A D3 1 V C C S U S 3 _ 3[ 5] 3 .3 V
V CC A S W [1 3 ] C 4 12
W21 A A 16
V CC A S W [1 4 ] V C C 3 _ 3[ 1] 3 .3 V S
1 u _ 6. 3V _ X 5 R _ 0 4
W23 W 16 C4 5 1 C 6 62 C3 9 6
V CC A S W [1 5 ] V C C 3 _ 3[ 8]
Note: C1289- STUFFED ONLY FOR CPT INTERPOSER; W24 T3 4 0 . 1 u_ 1 0 V _X 5 R _ 0 4 0. 1 u _ 10 V _ X 5R _ 04 0 . 1 u_ 1 0 V _X 5 R _ 0 4
UNSTUFF FOR CPT V CC A S W [1 6 ] V C C 3 _ 3[ 4]
W26
V CC A S W [1 7 ]
C3 9 2 0. 1 u _ 10 V _ X 5 R _ 04 W29
12/7 change pcb F/P V CC A S W [1 8 ]
W31 A J2
1 . 5V S _1 . 8 V S V CC A S W [1 9 ] V C C 3 _ 3[ 2] 1 . 0 5 S _ S A TA 3 L2 4
W33 H C B 10 0 5 K F -1 21 T 2 0
1 .0 5 V S L33 1 . 0 5V S _ V C C A _ A _ D P L V CC A S W [2 0 ] A F 13
V C C I O[ 5] 1 .0 5 V S
H C B 1 0 05 K F -1 2 1 T2 0
V C CR T CE X T N1 6 C3 7 3
DC P RT C A H1 3
C 68 7 C6 8 6 C 48 3 V C C I O [ 1 2] 1 u _6 . 3 V _ X5 R _0 4
+ 1 6mA
R3 0 8 Y4 9 A H1 4
* 22 0 u _4 V _ V _ B 22 u _ 6. 3V _ X 5 R _ 0 8 1 u _6 . 3 V _ X 5R _ 04 V CC V RM [4 ] V C C I O [ 1 3]
*0 _ 04
80mA A F 14 L4 8
L 31 1 . 0 5 V S _ V C C A _ B _D P L B D4 7 V C C I O[ 6] *H C B 1 00 5 K F -1 2 1T 2 0
H C B 1 00 5 K F -1 21 T 2 0 V C C A D P LL A AK1 1 . 05 V S _ V C C A P L L _S A TA 3
S AT A
80mA BF4 7 V C C A P L LS A T A 1. 0 5 V S
V C C A D P LL B
A F 11 1. 5 V S _ 1 . 8 V S
C 70 8 + C 67 3 C 67 4 C6 7 0 C 47 1 150mA AF1 7 V C C V R M[ 1] 1 .0 5 V S
1. 0 5 V S
AF3 3 V C C I O[ 7 ]
* 22 u _ 6. 3 V _ X 5 R _ 0 8
* 22 u _ 6. 3 V _ X 5 R _ 0 8
* 22 0 u _4 V _ V _ B 22 u _ 6. 3V _ X 5 R _ 0 8 1 u _6 . 3 V _ X 5R _ 04
AF3 4 V CC DIF F CL K N[1 ] A C1 6 3 . 3V 1 . 5V 3 . 3A _ 1 . 5 A _ H D A _I O
C 38 9 C4 8 4
A G3 4 V CC DIF F CL K N[2 ] V C C I O[ 2]
V CC DIF F CL K N[3 ] A C1 7
1 u _6 . 3 V _ X 5R _ 04 1u _ 6 . 3V _X 5 R _ 0 4 C4 1 0
V C C I O[ 3] R 5 00 *0 _ 0 4
1 2/ 21 A G3 3 A D1 7 1 u _6 . 3 V _ X5 R _0 4 R 4 99 0 _0 4
1 . 05 V S V CC S S C V C C I O[ 4]
C 43 2
V C CS S T V 1 6
DC P S S T
1 u _6 . 3 V _ X 5R _ 04 C 37 4 0. 1 u _ 10 V _ X 5 R _ 04 1 8 3 . 3A _1 . 5 A _ H D A _I O
1 . 0 5 M_ V C C S U ST 1 7 T2 1 1 8 ,2 0 RT C V CC
D C P S U S [ 1] V C C A S W [ 2 2] 1. 0 5 V S 2 4 1 . 5 V S _ 1 . 8V S
C 39 9 * 1u _ 6 . 3V _ X 5 R _ 0 4 V1 9
D C P S U S [ 2] 1 8 , 19 , 2 0 , 2 4, 3 5 , 3 7, 3 8 1 . 0 5 V S
M IS C
3 , 6, 9 , 1 0 , 2 9, 3 3 , 3 5, 3 7 , 3 8 1 . 5V
V 21
V C C A S W [ 2 3] 2 , 3, 5 , 2 3 , 2 4, 3 5 , 3 7, 3 9 1 . 0 5 V S _ V T T
<1mA BJ 8
1 1 , 18 , 2 4 , 28 , 3 1 , 3 2, 3 3 , 3 5, 3 9 , 4 0 5 V S
C PU
1. 0 5 V S _ V T T V _ P RO C_ IO T1 9 2 , 3 , 8 , 11 , 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3 , 24 , 2 7 , 28 , 2 9 , 3 0, 3 5 , 3 7, 3 8 , 3 9 3 . 3V
C3 7 6 C 37 1 C 37 9 V C C A S W [ 2 1] 3 , 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4 , 27 , 2 8 , 30 , 3 1 , 3 2, 3 3 , 3 4, 3 5 , 3 9 3 . 3V S
3 . 3A _1 . 5 A _ H D A _I O 28 , 2 9 , 3 1, 3 5 , 3 7, 3 8 , 4 1 5 V
4. 7 u _ 6. 3V _ X 5 R _ 0 6 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _ 0 4 2mA 16mA
A2 2 P 32
R TC
V CC RT C V CC S US H DA
H DA
RT CV C C
C 4 36
C6 5 9 C 66 1 C 66 3 B D 82 H M6 5 QS B 2 Q N J H F C -B GA
0. 1 u _ 10 V _ X 5R _ 04
1u _ 6 . 3V _X 5 R _ 0 4 0 . 1 u_ 1 0 V _ X5 R _0 4 0 . 1 u_ 1 0 V _ X5 R _ 0 4
B - 26 PCH 8/9 POWER
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Schematic Diagrams
PCH 3/9- GRD
CougarPoint -M (GND) Voltage Rail Voltage
V_CPU_IO 1.05
S0 Iccmax Current (A)
1 (mA)
U34I V5REF 5 1 (mA)
U34H
AY4 H46 H5 V5REF_Sus 5 1 (mA)
AY42 VSS[ 159] VSS[259] K18 VSS[ 0]
AY46 VSS[ 160] VSS[260] K26 AA17 AK38 Vcc3_3 3.3 0.266
AY8 VSS[ 161] VSS[261] K39 AA2 VSS[ 1] VSS[ 80] AK4
B11 VSS[ 162] VSS[262] K46 AA3 VSS[ 2] VSS[ 81] AK42
VccADAC3 1.05 1 (mA)
B15 VSS[ 163] VSS[263] K7 AA33 VSS[ 3] VSS[ 82] AK46 VccADPLLA 1.05 0.08
B19 VSS[ 164] VSS[264] L18 AA34 VSS[ 4] VSS[ 83] AK8
B23 VSS[ 165] VSS[265] L2 AB11 VSS[ 5] VSS[ 84] AL16
VccADPLLB 1.05 0.08
B27 VSS[ 166] VSS[266] L20 AB14 VSS[ 6] VSS[ 85] AL17
VSS[ 167] VSS[267] VSS[ 7] VSS[ 86]
VccCore 1.05 1.3
B31 L26 AB39 AL19
B35 VSS[ 168] VSS[268] L28 AB4 VSS[ 8] VSS[ 87] AL2 VccDMI 1.1 0.042
B39 VSS[ 169] VSS[269] L36 AB43 VSS[ 9] VSS[ 88] AL21
B7 VSS[ 170] VSS[270] L48 AB5 VSS[ 10] VSS[ 89] AL23
VccIO 1.05 2.925
F45 VSS[ 171] VSS[271] M12 AB7 VSS[ 11] VSS[ 90] AL26 VccASW 1.05 1.01
BB12 VSS[ 172] VSS[272] P16 AC19 VSS[ 12] VSS[ 91] AL27
BB16 VSS[ 173] VSS[273] M18 AC2 VSS[ 13] VSS[ 92] AL31 VccSPI 3.3 0.020
BB20 VSS[ 174] VSS[274] M22 AC21 VSS[ 14] VSS[ 93] AL33
VSS[ 175] VSS[275] VSS[ 15] VSS[ 94]
VccDSW3_3 3.3 2 (mA)
BB22 M24 AC24 AL34
BB24 VSS[ 176] VSS[276] M30 AC33 VSS[ 16] VSS[ 95] AL48 VccDFTERM 1.8 0.19
BB28 VSS[ 177] VSS[277] M32 AC34 VSS[ 17] VSS[ 96] AM11
BB30 VSS[ 178] VSS[278] M34 AC48 VSS[ 18] VSS[ 97] AM14
VccSus3_3 3.3 0.097
BB38 VSS[ 179] VSS[279] M38 AD10 VSS[ 19] VSS[ 98] AM36 VccSusHDA 3.3 1 (mA)
BB4 VSS[ 180] VSS[280] M4 AD11 VSS[ 20] VSS[ 99] AM39
BB46 VSS[ 181] VSS[281] M42 AD12 VSS[ 21] VSS[ 100] AM43 VccVRM 1.5 0.16
BC14 VSS[ 182] VSS[282] M46 AD13 VSS[ 22] VSS[ 101] AM45 VccClKDMI 1.05 0.02
B.Schematic Diagrams
BC18 VSS[ 183] VSS[283] M8 AD19 VSS[ 23] VSS[ 102] AM46
BC2 VSS[ 184] VSS[284] N18 AD24 VSS[ 24] VSS[ 103] AM7 VccSSC 1.05 0.095
BC22 VSS[ 185] VSS[285] P30 AD26 VSS[ 25] VSS[ 104] AN2
BC26 VSS[ 186] VSS[286] N47 AD27 VSS[ 26] VSS[ 105] AN29
VccDIFFCLKN 1.05 0.055
BC32 VSS[ 187] VSS[287] P11 AD33 VSS[ 27] VSS[ 106] AN3 VccALVDS 3.3 1 (mA)
BC34 VSS[ 188] VSS[288] P18 AD34 VSS[ 28] VSS[ 107] AN31
BC36 VSS[ 189] VSS[289] T33 AD36 VSS[ 29] VSS[ 108] AP12 VccTX_LVDS 1.8 0.06
VSS[ 190] VSS[290] VSS[ 30] VSS[ 109]
BC40
BC42
BC48
VSS[ 191]
VSS[ 192]
VSS[ 193]
VSS[291]
VSS[292]
VSS[293]
P40
P43
P47
AD37
AD38
AD39
VSS[ 31]
VSS[ 32]
VSS[ 33]
VSS[ 110]
VSS[ 111]
VSS[ 112]
AP19
AP28
AP30
Sheet 26 of 49
BD46 P7 AD4 AP32
BD5
BE22
BE26
VSS[ 194]
VSS[ 195]
VSS[ 196]
VSS[294]
VSS[295]
VSS[296]
R2
R48
T12
AD40
AD42
AD43
VSS[ 34]
VSS[ 35]
VSS[ 36]
VSS[ 113]
VSS[ 114]
VSS[ 115]
AP38
AP4
AP42
PCH 3/9- GRD
BE40 VSS[ 197] VSS[297] T31 AD45 VSS[ 37] VSS[ 116] AP46
BF10 VSS[ 198] VSS[298] T37 AD46 VSS[ 38] VSS[ 117] AP8
BF12 VSS[ 199] VSS[299] T4 AD8 VSS[ 39] VSS[ 118] AR2
BF16 VSS[ 200] VSS[300] W34 AE2 VSS[ 40] VSS[ 119] AR48
BF20 VSS[ 201] VSS[301] T46 AE3 VSS[ 41] VSS[ 120] AT1
1
BF22 VSS[ 202] VSS[302] T47 AF10 VSS[ 42] VSS[ 121] AT1
3
BF24 VSS[ 203] VSS[303] T8 AF12 VSS[ 43] VSS[ 122] AT1
8
BF26 VSS[ 204] VSS[304] V11 AD14 VSS[ 44] VSS[ 123] AT2
2
BF28 VSS[ 205] VSS[305] V17 AD16 VSS[ 45] VSS[ 124] AT2
6
BD3 VSS[ 206] VSS[306] V26 AF16 VSS[ 46] VSS[ 125] AT2
8
BF30 VSS[ 207] VSS[307] V27 AF19 VSS[ 47] VSS[ 126] AT3
0
BF38 VSS[ 208] VSS[308] V29 AF24 VSS[ 48] VSS[ 127] AT3
2
BF40 VSS[ 209] VSS[309] V31 AF26 VSS[ 49] VSS[ 128] AT3
4
BF8 VSS[ 210] VSS[310] V36 AF27 VSS[ 50] VSS[ 129] AT3
9
BG17 VSS[ 211] VSS[311] V39 AF29 VSS[ 51] VSS[ 130] AT4
2
BG21 VSS[ 212] VSS[312] V43 AF31 VSS[ 52] VSS[ 131] AT4
6
BG33 VSS[ 213] VSS[313] V7 AF38 VSS[ 53] VSS[ 132] AT7
BG44 VSS[ 214] VSS[314] W17 AF4 VSS[ 54] VSS[ 133] AU24
BG8 VSS[ 215] VSS[315] W19 AF42 VSS[ 55] VSS[ 134] AU30
BH11 VSS[ 216] VSS[316] W2 AF46 VSS[ 56] VSS[ 135] AV16
BH15 VSS[ 217] VSS[317] W27 AF5 VSS[ 57] VSS[ 136] AV20
BH17 VSS[ 218] VSS[318] W48 AF7 VSS[ 58] VSS[ 137] AV24
BH19 VSS[ 219] VSS[319] Y12 AF8 VSS[ 59] VSS[ 138] AV30
H10 VSS[ 220] VSS[320] Y38 AG19 VSS[ 60] VSS[ 139] AV38
BH27 VSS[ 221] VSS[321] Y4 AG2 VSS[ 61] VSS[ 140] AV4
BH31 VSS[ 222] VSS[322] Y42 AG31 VSS[ 62] VSS[ 141] AV43
BH33 VSS[ 223] VSS[323] Y46 AG48 VSS[ 63] VSS[ 142] AV8
BH35 VSS[ 224] VSS[324] Y8 AH11 VSS[ 64] VSS[ 143] AW14
BH39 VSS[ 225] VSS[325] BG29 AH3 VSS[ 65] VSS[ 144] AW18
BH43 VSS[ 226] VSS[328] N24 AH36 VSS[ 66] VSS[ 145] AW2
BH7 VSS[ 227] VSS[329] AJ3 AH39 VSS[ 67] VSS[ 146] AW22
D3 VSS[ 228] VSS[330] AD47 AH40 VSS[ 68] VSS[ 147] AW26
D12 VSS[ 229] VSS[331] B43 AH42 VSS[ 69] VSS[ 148] AW28
D16 VSS[ 230] VSS[333] BE10 AH46 VSS[ 70] VSS[ 149] AW32
D18 VSS[ 231] VSS[334] BG41 AH7 VSS[ 71] VSS[ 150] AW34
D22 VSS[ 232] VSS[335] G14 AJ19 VSS[ 72] VSS[ 151] AW36
D24 VSS[ 233] VSS[337] H16 AJ21 VSS[ 73] VSS[ 152] AW40
D26 VSS[ 234] VSS[338] T36 AJ24 VSS[ 74] VSS[ 153] AW48
D30 VSS[ 235] VSS[340] BG22 AJ33 VSS[ 75] VSS[ 154] AV11
D32 VSS[ 236] VSS[342] BG24 AJ34 VSS[ 76] VSS[ 155] AY12
D34 VSS[ 237] VSS[343] C22 AK12 VSS[ 77] VSS[ 156] AY22
D38 VSS[ 238] VSS[344] AP13 AK3 VSS[ 78] VSS[ 157] AY28
D42 VSS[ 239] VSS[345] M14 VSS[ 79] VSS[ 158]
D8 VSS[ 240] VSS[346] AP3 BD82HM65 QSB2 QNJH FC-BGA
E18 VSS[ 241] VSS[347] AP1
E26 VSS[ 242] VSS[348] BE16
G18 VSS[ 243] VSS[349] BC16
G20 VSS[ 244] VSS[350] BG28
G26 VSS[ 245] VSS[351] BJ28
G28 VSS[ 246] VSS[352]
G36 VSS[ 247]
G48 VSS[ 248]
H12 VSS[ 249]
H18 VSS[ 250]
H22 VSS[ 251]
H24 VSS[ 252]
H26 VSS[ 253]
H30 VSS[ 254]
H32 VSS[ 255]
H34 VSS[ 256]
F3 VSS[ 257]
VSS[ 258]
BD8
2HM65 QSB2 QNJH FC-BGA
PCH 3/9- GRD B - 27
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Schematic Diagrams
WLAN 3G MINI PCIE
3G/MSATA MINI CARD
+
C 55 2 22 0 u_ 6 . 3 V _ 6. 3 *6 . 3 *4 . 2 G ND J _ S I M1
C 57 3 0. 1 u _ 16 V _ Y 5 V _ 04 SIM CONN 9
(T OP VI EW )
8
R 76
* 10 m li _ s ho rt _ 0 4
U I M_ P W R R 73 U I M _D A T A 7 D E TE C T _S W U I M _M C M D 6 U I M_ D U I M_ D A T A
J _3 G 1 *4 . 7 K _ 04
U I M_ D A T A UIM _ I/O
1
3 W AKE# 3 . 3 V A U X_ 0
2
6
60 mils 3G _ 3. 3 V
U I M_ C LK
U I M_ R S T
U I M _C 5
3 U I M_ C L K U I M_ V P P
4
2
U I M_ V P P
R 75 *1 0 mi l _ sh o rt _ 04
5 C O E X1 1. 5 V _ 0 8 U I M_ P W R U I M_ P W R 1 U I M_ R S T U I M_ GN D
GN G
G ND
GN D
G ND
C O E X2 U I M_ P W R 10 U I M_ D A TA U I M_ P W R
C 11 1 C 11 4 C1 1 6
7 U I M _D A T A 12 U I M_ C LK C5 7 1
11 CL K RE Q # UIM _ CL K 14 U I M_ R S T
* 22 p _ 50 V _ N P O _0 4
*2 2 p _5 0 V _ N P O _0 4
*2 2 p _5 0 V _ N P O_ 0 4
9 17 1 2 -00 9 0 P
G ND 2
G ND 4
3 G _3 . 3 V 13 R E F C LK - U I M _R E S E T 16
GN D 1
GN D 3
U I M_ V P P 0 . 1u _ 1 6V _ Y 5V _ 0 4 C1 1 3 C1 1 0
9 R E F C LK + UIM _ V P P
15 GN D 0 4 0 . 1u _ 16 V _ Y 5 V _ 0 4 *2 2 p _5 0 V _ N P O_ 0 4
GN D 1 GN D 5 GN D
C 56 2
G ND GN D G ND
0 . 1 u_ 1 6 V _Y 5 V _0 4
KEY
21 18 Lay ou t?
27 GN D 2 GN D 6 26
GN D 29 GN D 3 GN D 7 34 1. SI M? ? ? ? ? ? ? ? (1 0m il)
GN D 4 GN D 8 40
35 GN D 9 50
2. ? ? ? ? ? ? ? ? GND GN D
GN D
3 4 3 G_ D E T # 23 GN D 1 1 GN D 1 0 3. SI M hol d ? ? ? ? ? GN D? ?
18 S A T A _R XP 3 C5 6 3 0 . 01 u _ 16 V _ X 7R _ 04
C5 5 8 0 . 01 u _ 16 V _ X 7R _ 04 25 P E T n0 20 4. SI M CON N ? ? MI NI CA RD CO NN
18 S A T A _R XN 3 31 P E T p0 W _ DIS A B L E # 22 3G _E N 34
18 S A TA _T X N 3 C6 4 7 0 . 01 u _ 16 V _ X 7R _ 04
C6 4 6 0 . 01 u _ 16 V _ X 7R _ 04 33 PERn 0 P E RS E T # 30
1 8 S A T A _ T XP 3 PERp 0 S M B _ CL K 32
17 S M B _D A T A 36
19
37
R e s erv e d 0
R e s erv e d 1
U S B _D -
U S B _ D+
38 US B _ P N2
USB_ P P2
22
22 Port 2 3G POWER
B.Schematic Diagrams
GN D 1 2
6 0mi ls
39
41 3. 3V A U X _3 3 . 3 V A U X_ 1
24
28
60 mil s 3G _3 . 3 V
3 G_ 3. 3V 43 3. 3V A U X _4 1. 5 V _ 1 48 3. 3 V Q 30 3 G _3 . 3 V
45 GN D 1 3 1. 5 V _ 2 52
C5 5 1 C 54 1 A O 3 41 5
47 R e s erv e d 2
R e s erv e d 3
3 . 3 V A U X_ 2
L E D _W W A N #
42 3G _3 . 3 V 3A S D 3A
3 G_ E N 49 44
0 . 1 u_ 1 6V _Y 5 V _ 0 4
1 0 u _6 . 3 V _ X 5R _ 06
R3 8 7 * 0_ 0 4 + C 5 37
51 R e s erv e d 4 LE D _ W L A N # 46 C 55
R e s erv e d 5 L E D _W P A N #
22 0 u_ 6 . 3 V _ 6. 3 *6 . 3 *4 . 2 C7 0 9 1 u _6 . 3 V _ X5 R _0 4
Sheet 27 of 49
G
GN D GN D 8 89 0 8 -52 0 4 M-0 1 H =9. 9? 10 u _ 6. 3 V _ X 5R _0 6
G ND GN D G ND
R 59
WLAN 3G MINI R 63
1 0 0K _ 0 4
R 54
2 0 K _ 1% _ 0 4
1 0 0 _0 4
12/ 22
PCIE
3
D
6
H 11 D Q8 B
* 6-3 4 -M5 2 N S -0 2 0 -2 5G MT D N 7 00 2 Z H S 6 R
2G Q8 A S
Bot to m 34 3 G_ P O W E R _ E N
4
S MT D N 7 00 2 Z H S 6 R
1
6-3 4- M5 2N S- 02 0-2
From EC default HI
WLAN MINI CARD J _ MI N I 1
M1 M5 M7 M8 M2 M3 M4 M6
M -MA R K M -MA R K M -MA R K M-M A R K M-M A R K M-M A R K M -MA R K M -MA R K
H 2
C 11 1 D 1 1 1N
H1
C 1 1 1D 1 11 N
H2 3
C 1 1 1D 11 1 N
H 24
C 1 11 D 1 1 1 N
R 2 32 * 0_ 0 4 W A K E # 1 2 20 mil
2 0 , 29 , 3 0 P C IE _ W A K E # 3 W AKE# 3 . 3V A U X _0 6 3 . 3V
5 CO E X 1 1 . 5 V _0 8 20 mil
CO E X 2 U I M _P W R VD D3
R1 5 1 10 K _ 0 4 10 R1 5 2 *0 _ 0 4
3 . 3V 7 U I M_ D A T A 12 B T _ S B D# 19
8 0C LK
1 9 W LA N _C L K R E Q # 11 C L K R E Q# U I M_ C L K 14 8 0_ D E T# 80 C LK 34
1 9 C L K _ P C I E _W L A N # R 1 54 * 10 m i l_ s h ort _ 0 4
13 RE F CL K - U I M_ R E S E T 16 3 IN1 H1 0 H2 0 H 26
1 9 C L K _ P C I E _W L A N 9 RE F CL K + U I M_ V P P 3I N 1 34 J _ 80 D B G1 2 9 2 9 2 9
H1 6 15 GN D 0 4 3 8 3 8 3 8
6 -34 -M5 2 N S -0 2 0 -2 GN D 1 GN D 5 12/7 10K? ? short 1
2
80 C LK 4 1 7 4 1 7 4 1 7
3I N 1 R 5 83 10 K _ 0 4 5 6 5 6 5 6
B ott om KEY
3
4 V D D3
6 -34 -M 52 NS -0 20 -2 21 18 8 5 20 5 -0 40 0 1
MT H 8 _ 0 D 2 _8 MT H 8_ 0 D 2 _ 8 M TH 8_ 0 D 2 _ 8
27 GN D 2 GN D 6 26 H1 9 GN D H6 G ND H2 7 G ND H 14 G ND
29 GN D 3 GN D 7 34 2 9 2 9 2 9 2 9
GN D 4 GN D 8 40 3 8 3 8 3 8 3 8
35 GN D 9 50 R 4 47 *1 0 K _ 04 4 1 7 4 1 7 4 1 7 4 1 7
3 4 W L A N_ DE T # 23 GN D 1 1 G N D 10 3 . 3V S 5 6 5 6 5 6 5 6
1 9 P C I E _ R X N 3 _ W LA N
1 9 P C I E _ R XP 3 _ W L A N
25 PET n 0
PET p 0 W _ D I S A B LE #
20
W L AN_ EN 3 4
12/06
31 22 MT H 8 _ 0D 2 _8 MT H 8 _ 0 D 2 _8 MT H 8_ 0 D 2 _ 8 M TH 8_ 0 D 2 _ 8
1 9 P C I E _ T X N 3 _ W LA N 33 P E R n0 P E R S E T# 30 B U F _ P L T _R S T # 2 2, 2 9 , 3 0, 3 4
19 P C I E _ T XP 3 _ W L A N P E R p0 S MB _ C L K 32 3 .3 V GN D H4 GN D H2 5 G ND H5 G ND H 3 G ND
17 S MB _ D A T A 36 B T _ DE T # 3 4 2 9 2 9 2 9 2 9
B T _E N R 16 1 * 0_ 0 4 B T _ E N _ R 19
37
R e s e rv e d0
R e s e rv e d1
GN D 1 2
U S B _ D-
US B _ D+
38
20 mil
USB_ P N 3 2 2
USB_ P P3 2 2 Port 3 3
4 1
8
7
3
4 1
8
7
3
4 1
8
7
3
4 1
8
7
39 24 3. 3 V A U X _1 R4 5 0 0 _0 4 R 45 2 5 6 5 6 5 6 5 6
3 . 3V 41 3 .3 V A UX _ 3 3 . 3V A U X _1 28 3 .3 V
43 3 .3 V A UX _ 4 1 . 5 V _1 48 4 7 K _0 4 MT H 8 _ 0D 2 _8 MT H 8 _ 0 D 2 _8 MT H 8_ 0 D 2 _ 8 M TH 8_ 0 D 2 _ 8
GN D 1 3 1 . 5 V _2
19 C L _C L K 1 R 17 5 * 0_ 0 4 C L _C LK 1_ R 45 52 40 mil 3 .3 V
R 17 7 * 0_ 0 4 C L _D A T A 1_ R 47 R e s e rv e d2 3 . 3V A U X _2 42 GN D GN D G ND G ND G ND
19 C L _D A T A 1 R e s e rv e d3 LE D _ W W A N # 20 mil
19 C L _R S T #1 R 18 1 * 0_ 0 4 C L _R S T #1 _ R 49 44
W LA N _L E D # 3 1, 3 4
B T _ DE T #
R 18 3 *1 0 K _ 04 P C H _ B T _ E N _ # 51 R e s e rv e d4 L E D_ W L A N# 46
3 . 3V R e s e rv e d5 LE D _ W P A N #
C 63 9
8 8 9 08 -5 20 4 M-0 1 H= 9. 9?
R 18 2 0_04 * 1 80 p _5 0 V _ N P O _0 4
3 1 , 3 4 B T _E N
R 18 4 * 0_ 0 4
1 9 B T _S B D #
1 1 , 35 , 3 6 , 37 SYS1 5 V
1 1 , 1 8, 3 0 , 3 4, 3 5 , 3 6, 3 7 , 4 1, 4 2 V D D 3
2, 3 , 8 , 1 1, 16 , 1 8, 19 , 2 0, 22 , 2 3, 24 , 2 5, 28 , 2 9, 30 , 3 5, 37 , 3 8, 39 3 . 3 V
3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 8, 3 0 , 3 1, 3 2 , 3 3, 3 4 , 3 5, 3 9 3 . 3 V S
B - 28 WLAN 3G MINI PCIE
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Schematic Diagrams
CCD, TPM, MULTI CON
FOR POWER SW BOARD FOR OPTIMUS FUNCTION FOR TOUCH SENSOR BOARD CPU FAN CONTROL
U 13
FO N 1 8
2 F ON GN D 7
5 VS 3 V IN GN D 6
3 .3 V S 3 .3 V 5 VS_ F AN
C3 0 8 4 V OU T GN D 5
VSET GN D
J _ SW 1 1 u_ 6 . 3 V _Y 5V _0 4 A X 9 95 S A
1
20 mi l C P U_ F A N 34
2 M B TN R6 5 *1 0 m il _ sh o rt _ 04 M_ B T N # 35 6-02-03940-B20
3 W EB_ W W W # 6-02-00995-B20 C 30 9
4 W E B _ E M A I L# 6-02-99011-B20
5 0 . 1u _ 1 6V _ Y 5 V _ 0 4
6 LI D _ S W # 1 1, 3 4 1 2/ 14 DE L
7 A P _ ON 12 /14 D EL
8 5 V S _F A N CP U_ FA N
8 8 48 6 -0 80 1 J _F A N 1
1
6-20-94K10-108 2
C 3 10
3
B.Schematic Diagrams
10 u _ 6. 3 V _ X 5R _0 6 85 2 05 -0 3 70 1
1 2/ 06 ? ? f oo tp ri nt
J_FAN1
34 C P U _F A N S E N
3
R 45 3 4 . 7 K _ 04
3. 3 V S
1
Sheet 28 of 49
CLICK CONN R 1 70 *1 5 m il _ s ho rt _ 06
5 VS_ TP
TPM 1.2 CCD, TPM, MULTI
5V S
R 1 72 R1 7 3
C 2 78 C2 7 9 CON
* 10 u _ 6. 3 V _ X 5R _ 06 1 u_ 6 . 3 V _Y 5V _0 4
J _T P 1 10 K _ 0 4 10 K _ 0 4
1
2 T P _D A T A 3 4
3 .3 V S
3 T P _C L K 3 4
4 C 2 80 C2 8 1 R 3 68 *1 0K _0 4
8 52 0 1 -04 0 5 1 3 .3 V
C2 8 7 47 p _ 50 V _ N P O _0 4 47 p _ 50 V _ N P O _0 4 U 20 C5 1 8 C 47 8 C5 2 0 C 4 77
* 0. 1 u _ 16 V _ Y 5 V _ 04 26 10
18 , 3 4 L P C_ A D0 23 L A D0 V D D1 19
3. 3 V *0 . 1 u_ 1 6 V _Y 5 V _0 4 * 0. 1 u _ 16 V _ Y 5 V _ 0 4 *0 . 1 u_ 1 6 V _Y 5 V _0 4 * 1u _ 6 . 3V _ Y 5V _ 0 4
18 , 3 4 L P C_ A D1 20 L A D1 V D D2 24
18 , 3 4 L P C_ A D2 17 L A D2 V D D3
18 , 3 4 L P C_ A D3 L A D3
GN D
J _ TP 2 21 3 . 3V S
22 P CL K _ T P M L CL K TPM
1 22 5
2 L E D_ P W R 3 4 18 , 3 4 L P C _ F R A ME # 16 L F RA M E # VSB
3 L E D _ A C I N 34 3 , 12 , 2 2 P L T _R S T# 27 L RE S E T # C5 1 7
4 L E D_ B A T _ F UL L 3 4 18 , 3 4 S E R IRQ 15 S E R IRQ
5 L E D_ B A T _ CH G 3 4 20 P M _C LK R U N # CL K R UN# *0 . 1 u_ 1 6V _Y 5V _ 0 4
6 28 6 T P M3 0 0 4
85 2 0 1-0 6 05 1 20 S 4 _ S TA T E # L P CP D # GP I O 2 T P M3 0 0 5
TP M _ B A D D9 G P I O2
6-21-91A00-106 T E S T B I/B A DD 13
G ND 6-21-91A10-106 XTAL I
TP M _ P P 7 XT A L I
6-20-94A70-104 PP X9 * 3 2. 7 6 8K H z
14 XTAL O 4 1
T P M3 0 0 1 1 XTAL O 3 2
T P M3 0 0 2 3 NC _ 1 4
T P M3 0 0 3 1 2 NC _ 2 G ND_ 1 11 X1 1 * 3 2. 7 6 8K H z
NC _ 3 G ND_ 2 18 4 1
CCD 8
TESTI
G ND_ 3
G ND_ 4
25
C 47 5
3 2
C 4 76
* S LB 9 6 3 5T T * 18 p _5 0 V _ N P O _0 4 *1 8p _ 5 0V _ N P O_ 04
Ass ert ed be for e e nt erin g S3
5V 5 V _ CCD LPC res et timin g:
U1
1A 4 1 1A LPCPD# in act ive t o LRST# in ac tive 32 ~9 6u s 3. 3 V S
5 V IN V OU T
V IN T P M_ P P R3 1 4 * 10 K _ 0 4 R 3 67 C 5 19
HI: ACCESS
C1 C2 C3 TPM _PP * 3 3_ 0 4 * 1 0p _ 50 V _ N P O _ 04
3 2 L OW: NORMAL ( Inte rnal PD) T P M_ B A D D R3 1 3 * 10 K _ 0 4 P C L K _T P M P C L K _ T P M1
34 C C D _E N EN G ND
1u _ 6 . 3V _ Y 5V _ 0 4 0. 1 u _1 6 V _ Y 5 V _ 04 2. 2 u _ 6. 3 V _ Y 5 V _ 06 HI: 4E/ 4F H
G 5 24 3 A TPM _BADD R3 1 2 * 10 K _ 0 4
L OW: 2E/ 2F H
J _ CCD 1
1
P or t 5 22
22
U S B _P N 5
US B _ P P 5
2
3
From EC default HI 34 C C D _D E T # 4
5
85 2 0 5-0 5 0 01
11 , 1 8 , 24 , 2 5, 31 , 3 2, 33 , 3 5, 3 9 , 4 0 5 V S
2 5, 2 9 , 3 1, 3 5 , 37 , 3 8 , 41 5V
11 , 1 8, 2 7 , 3 0, 3 4 , 3 5, 3 6 , 3 7, 4 1 , 4 2 V D D 3
2 , 3 , 8 , 11 , 1 6 , 18 , 1 9 , 20 , 2 2 , 23 , 2 4 , 25 , 2 7, 29 , 3 0, 35 , 3 7, 3 8 , 3 9 3 . 3V
3, 9 , 1 0 , 11 , 1 2 , 18 , 1 9 , 20 , 2 1 , 22 , 2 3 , 24 , 2 5 , 27 , 3 0, 31 , 3 2, 33 , 3 4, 3 5 , 3 9 3 . 3V S
CCD, TPM, MULTI CON B - 29
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Schematic Diagrams
USB2.0, USB3.0 NEC
C 332 22 u_6. 3V _X5R _0 8
C 318 22 u_6. 3V _X5R _0 8
3. 3V 33
. V 3. 3V A 1.0 5V 3. 3VA
L21 C 292 0. 1u _16V _Y 5V_ 04
H CB 1608 KF -1 21T25
L15 US BV CC 3. 0 U S BVC C 3. 0_1 C 347 *10 0u_6 .3V _B _A
+
R 169
10K _04 C 244 H C B16 08KF - 121T 25 C 254 C 26 0 C 26 3 GN D
12 /7 R 14 9 *1 5mil _sho rt _0 6
0 .1 u_16V _Y 5V_ 04 0.1 u_16 V_Y 5V _04 0 .1 u_16 V_Y 5V _04 0 1
. u_16 V_Y 5V _04 C 24 2
CLOSE TO CONNECTOR J _US B3
AU XD ET
0 .1 u_16 V_Y 5V _04 TXP 1 C 29 3 0. 1u_1 0V_X 7R _04 TXP 1_R 9 GN D 1
1 SST X+ S H E
I LD
S tan da rd -A
UG N D
VBU S
33
. VA TXN 1 C 29 4 0. 1u_1 0V_X 7R _04 TXN 1_R 8 GN D 2
D
G _D M1 4 3 US B_ PN 0- 2 SST X- S HE
I LD
C 277 C 271 C 233
D-
Q 18 0. 01u _16V _X7 R_0 4 0. 01 u_16V _X7 R_0 4 *W CM20 12F2 S- 161 T03- sho rt L 19 4 GN D 3
G 0. 1u_ 16V _Y 5V_0 4 C 239 C2 36 C 25 2 G _D P1 1 2 US B_ PP 0+ 3 GN D S HEI LD
6,2 0, 34, 35 SU SB # 4 3 6 D+ GN D 4
*MTN 7002Z H S3 0. 01u _16V _X7R _0 4 0. 01u_1 6V_ X7R _04 0 .0 1u_1 6V_X 7R _04 C2 43 0 .0 1u_16 V_X 7R_ 04 R XP1 RX P1_ R
SSR X+ S H E
I LD
S
C2 45
C 246
C2 70 C 237 *W CM20 12F2 S- 161 T03- sho rt L 20 7
1 2 5 GN D _D
0. 01u_ 16V _X7R _04 0. 01u_ 16V _X7R _04 C2 59 5 p_50V _N PO _04 R XN 1 RX N1 _R
SSR X-
C 265
0. 01 u_16 V_X7 R_ 04
C 23 4
0 .0 1u_16 V_X 7R _04
C 235
0 .01 u_16 V_X7 R_ 04
C 238
0. 01u _16V _X7R _04
D i f f . t ra ce 9 0o h m GN D
USB3.0 NEC core power 1.05V
0. 1u_1 6V_ Y5V _04
0. 1u_ 16V _Y5 V_04
GN D C 190 09- 909 05- L
D 10
F 13
L1 4
E 11
E1 2
K1 1
K 12
F14
G3
L9
L10
L13
N4
N5
N6
P3
C4
C6
D5
C8
C9
D8
D9
E3
H4
H11
D7
P13
1 2/ 23
F3
G4
C5
C7
E4
H3
L5
L8
U1 1
uPD 72 0200 E MI ? ? ? ? USB 3.0/PCH USB 2.0 Co-layout ? ? ? ? PIN6?
V D D3 3
V D D3 3
V D D1 0
U 3A VD D3 3
U 2A VD D 33
VD D 33
V DD 33
VD D 33
VD D3 3
VD D 33
V D D33
VD D 33
VD D 33
V DD 33
VD D 33
VD D 33
V D D33
V DD 10
VD D 10
V DD 10
VD D1 0
VD D 10
VD D 10
V DD 10
VD D 10
V DD 10
V DD 10
VD D1 0
VD D 10
VD D 10
V DD 10
VD D 10
VD D1 0
VD D 10
V D D10
VD D 10
6-02-06615-320
1 . 5V 5V
5V
US B_ PN 0 R 18 7 *0_04 U S B_P N0 - 6-02-07113-320 C2 14
1 2/ 7 B2
US B_ PP 0 R 19 0 *0_04 U S B_P P0+
19 CL K_P C IE _U SB 30_N EC PE CL KP
B1 B6 TXP 1 J _US B4 U9 1u_6 .3V _Y 5V _04 1. 05 V
1 9 C LK _PC I E_U S B30 #_N EC
PE CL KN U 3T XDP 2 U SB VC C 3. 0_1 1
V+
R 12 6 2A 5
VI N VC N TL
6
C 274 0. 1u_ 10V _X7R _04 D 2 A6 TXN 1 L1 8 9
19
19
PC I E_R XP 2_U SB 30_ NE C
PC I E_R XN 2_U S B30 _NE C
C 273 0. 1u_ 10V _X7R _04
D1 PE TXP
PE TXN
U 3TXD N 2
U2D M2
N8 G _D M1
22 U S B_P N 0
US B_ PN 0 4 3 U SB _P N0 - 2
DA TA_ L
1 0K_ 04
7 VI N
PO K VO U T
4 3A
F2 P8 G _D P1 US B_ PP0 1 2 U SB _P P0+ 3 3
22 U S B_P P0
1 9 P CI E _TXP 2_U SB 30_ NE C F1 PE RX P U 2DP 2 B8 DA TA_ H 8 VO U T
R XP1
GN D 3
1 9 P CI E _TXN 2_U S B30 _NE C PE RX N U 3R XDP 2 EN
GN D 1
GND 2
GND 4
*WC M201 2F2S - 161T0 3 4
A8 GN D 1 2
R XN 1 C 20 0 R 127 750_ 1%_04 C2 28 C 213 C 225
B.Schematic Diagrams
U3 RXD N 2 G ND VF B
H2
*10u_6 .3 V_X 5R _06
10u_ 6. 3V_X 5R _06
0. 1u_ 16V_ Y5V _04
33
. V R 192 *C 107C J- 104 05- L 1 u_6. 3V _Y 5V_ 04
GN D 3
22 ,27 3
, 0, 34 B U F_P LT_R S T# PE RS TB
GN D 1
G ND 2
G ND 4
R 164 0_0 4 PE WAK E K1 10 K_0 4 GN D C 209 0. 02 2u_16 V_X 7R _04
1 2/2 1 20 ,2 7, 30 P C E
I _WA KE #
R 165 0_0 4
K2 PE WAK EB G 14 US B30 _O C
G S7 11 3
1 9 U S B30_ CL KR EQ #_N E C PE CR E QB OC 2
I B 3. 3V
H 13
( 15 nF ~48 nF )
C
AU XD ET AU XD ET _R J 2 OC 1
I B
R 168 0_0 4 C 22 9
J 1 AU XD ET H 14
D8 R 15 5 R 162 10K _04 P PO N 6-21-B4A20-009 GN D C 226 R 125
3. 3V PS EL PPO N 2
R 167 10K _04 H1 J14 1 0u_6 .3 V_X5 R_ 06
SMI B PPO N 1
R B 751S -4 0C 2 3 92K _1%_04 0. 1u_ 16V_ Y5 V_04 2. 37K _1%_0 4
18 U S B3. 0_ SI M#
A
P5
PO N RS TB
B 10 TXP 0 Vout= 0.8*(R127+R125)/R125=1.053V
U 3T XDP 1
Sheet 29 of 49
C 26 1
R16 3 *0_04 AU XD ET_ R U SB _SP I _SC LK M2 A 10 TXN 0
U SB _SP I _CE # N 2 SP IS C K U 3TXD N 1 N 10 G _D M0
1 u_6. 3V _X5R _04
SP IC S B U2D M1
U SB _SP I _SI N1
SP IS I
U SB _SP I _SO M1 P 10 G _D P0
SP IS O U 2DP 1 B 12
R XP0
U 3R XDP 1
USB2.0, USB3.0 K1 3
K1 4
J1 3
GN D
GN D
uPD72 0200 U3 RXD N 1
A 12
R XN 0
3. 3V
R 188
5V
US B30 _O C
2A
R5 96
*0_04
5
U 14
F LG # VO U T1
6 2A
US BV C C3. 0
P4 GN D 2 7
NEC GN D
RR E F
U 2A VS S
P 12 R1 46
N 12
1. 6K _1%_04
3
V I N1
V I N2
VO U T2
VO U T3
8
C 319 C 329 +C 346 R 19 7
0. 1u_1 6V_ Y5V _04
*0. 1u_ 16V_ Y5V _04
22 0u_6 .3V _6. 3*6 .3*4 .2
*10K _04 1 00K _04
C1 4 N 11 U SB _O N 1# 4 1
GN D U 2P VS S E N# G ND
D
D6 Q 19 A PL3 510B KI - TR G
N1 4 U 3A VS S
C3 11 R 189
XT1
M1 4 PP O N G 6-02-03510-920
XT2
*2N 700 2W 1u_6. 3V _Y 5V _04 0_0 4 6-02-06288-920
S
P6 UG N D
CS EL P 14
R 140
G ND P 11
G ND VIA EN# R189 ? ? ?
X2 100 _04 P9
A1 G ND P7
24MH z-F SX 5
- L
GN D G ND
6-22-24R00-1B5 2 1 A2 P2 C 251 22 u_6. 3V _X5R _08
A3 GN D G ND P1
GN D G ND
A4 N 13 C 247 22 u_6. 3V _X5R _08 3. 3V 33
. V
2 1
A5
A7
A9
GN D
GN D
GN D
G ND
G ND
G ND
N9
N7
N3
L17 C 224 0. 1u_ 16V _Y 5V_0 4
USB3.0 NEC ROM
H CB 1608 KF -12 1T25 N C1
GN D G ND
+
A1 1 M13 U SB VC C 3. 0_2 C 262 *10 0u_6. 3V _B_ A
3 4 GN D G ND U S BV CC 3. 0
A1 3 M12 *N C_ 04 KBC_SPI_*_R = 0.1"~0.5" R 180
A1 4 GN D G ND M11
C2 41 X1 C 240
*2 4MH z B3
GN D G ND
M10 GN D C 27 2 0. 1u_1 6V_Y 5V _04 51 2K bi t 47 K_0 4
B4 GN D G ND M9
2 0p_5 0V_N P O_ 04 20p _50V _N PO _04 CLO1
SE2/TO7 CONNECTOR U 12
GN D G ND
B5 M8 J_ US B1 US B_S PI _V D D_1 8 5 U S B_S PI _S I_ R R 15 9 4 7_04 U SB _S PI _SI
B7 GN D G ND M7 V DD SI
GN D G ND
B9 M6 TXP 0 C 22 7 0. 1u_10 V_X 7R_ 04 TXP 0_R 9 GN D 1 2 U S B_S PI _S O_R R 17 9 1 5_1%_ 04 U SB _S PI _SO
B1 1 GN D G ND M5 1 S ST X+ S HI E LD SO
St an da rd -A
GN D G ND V BU S
B1 3 M4 TXN 0 C 23 0 0. 1u_10 V_X 7R_ 04 TXN 0_R 8 GN D 2 R 166 1K _04 U SB _F LAS H 3 1 U S B_S PI _C E#_ R R 17 8 1 5_1%_ 04 U SB _S PI _C E#
B1 4 GN D G ND M3 G_ DM0 4 3 US B_P N 8- 2 S ST X- S HI E LD WP # CE #
C1 GN D G ND L12 4 D- GN D 3 6
*W CM201 2F2 S- 161T 03- shor t L 13 U S B_S PI _S CLK _RR 15 8 4 7_04 U SB _S PI _SC LK
GN D G ND GN D S HI E LD S CK
C2 L11 G_ DP 0 1 2 US B_P P8 + 3
C3 GN D G ND L7 4 3 6 D+ GN D 4 7 4
RX P0 RX P0_R R 160 4. 7K _04 U SB _H O LD# 6-04-25512-B71
GN D G ND S SR X+ S HI E LD H O LD# V SS
C1 0 L6 *W CM201 2F2 S- 161T 03- shor t L 16 7
C1 1 GN D G ND 1 2 5 G N D _D 6-04-25512-B70
RX N0 RX N0_ R MX25L5 121E MC- 20G
GN D S SR X-
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
G ND
GN D
GN D
G ND
G ND
G ND
GN D
GN D
G ND
G ND
GN D
GN D
GN D
G ND
G ND
GN D
GN D
G ND
GN D
G ND
G ND
GN D
GN D
G ND
GN D
G ND
G ND
GN D
6-04-25512-B72
D i f f . t rac e 9 0o hm G ND C 190 09- 9090 5- L
G ND
C 12
C 13
D4
D1 1
D 12
D 14
E1
E 13
F4
F7
F8
F 11
F1 2
G1
G6
G8
G9
G 11
G 12
G 13
H6
H8
H 12
J 3
J 6
J1 1
K4
L2
D3
D13
E2
E14
F6
F9
G2
G7
H7
H9
J4
J7
J8
J9
J12
K3
L1
L3
L4
1 2/ 23
E MI ? ? ? ?
USB 3.0/PCH USB 2.0 Co-layout
US B_P N 8 R 139 *0 _04 U SB _PN 8-
US B_P P8 U SB _PP 8+
R 141 *0 _04
J_ US B2
U SB VC C 3. 0_2 1
V+
4 3 2
U SB _PN 8 L1 4 U SB _PN 8-
22 U SB_ PN 8 D A TA_ L
1 2 3
U SB _PP 8 U SB _PP 8+
22 U SB_ PP 8 D A TA_ H
*WC M2 012F 2S- 161 T03
GN D 1
4
G ND 2
G N D3
GN D 4
GN D
*C 107C J- 104 05- L
GN D 1
2, 3, 8, 11, 16, 18, 19, 20 ,2 2, 23, 24, 25, 27 ,28 ,3 0, 35, 37, 38, 39 3. 3V
G ND 2
G N D3
G ND 4
GN D
25 ,28 ,3 1, 35, 37, 38, 41 5V
36 , 9
, ,10 ,2 5, 33, 35, 37, 38 1. 5V
6-21-B4A20-009
GN D
B - 30 USB2.0, USB3.0 NEC
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Schematic Diagrams
Card Reader (JMC251 C)
JMC251 C S D _ CL K R2 7 6 0 _ 04
V D D3
S wi tc hi ng Re gu la to r
c lo se t o PIN 33
R 26 9 0_04 D V DD
L32
C4 3 3 near Pin#41 (> 20 mi l)
R 27 1 * 10 0 K _ 0 4 R E GL X DV DD (> 20 mi l) 3 . 3 V _ LA N
*1 0 p _5 0 V _ N P O _ 04
R3 2 0 * 4. 7 K _ 0 4 S W F 2 52 0 C F -4 R 7M -M C4 8 7 C 48 5
3 . 3V S MS _I N S #
R3 1 7 1 K_ 0 4 R 3 34 * 4 . 7K _ 0 4
S D X C_ P O W ER
3 . 3 V _ LA N U 21
I S ON _ 25 1 C
L A N _L E D 1
Fo r JM C2 51/ 26 1 on ly 1 0 u_ 6 . 3 V _X 5 R _ 0 6 0 . 1 u_ 1 6 V _ Y 5 V _ 04
L A N_ L E D0
3 . 3V _ L A N
Pin#33 Pin#33 L A N _ S C L R 3 42 * 4 . 7K _ 0 4 8 7
M D I O1 1
S D _ C LK _ C
SD _ BS
RE G L X
V CC WP
S D_ D 3
S D _ D2
S D_ D 1
S D _ D0
Card Reader Pull High/Low S DX C_ P O W E R
DV D D
6
Resistors C6 6 5 C6 6 9 V DD 3 3 . 3V L A N _ SDA 5 S CL 1
S DA A0 2
*0 . 1 u _1 6 V _ Y 5 V _ 0 4 2 . 2 u_ 6 . 3 V _ Y 5 V _ 06 4 A1 3
GN D A2
48
47
46
45
44
43
42
41
40
39
38
36
34
37
35
33
U1 8 *A T 2 4 C 0 2 B N
R 3 21 R 32 2
L A N _L E D 0
M D I O5
M DIO 4
M D I O3
M DIO 2
M D I O1
M DIO 0
F B 12
VD DIO
VDD O
IS O N
GN D
GN D
LX
M D I O1 1
LA N _ L E D 1
* 1 5m i l _s h o rt _0 6 *0 _ 0 6
M D I O 10 49 32 V DD RE G
M DIO 1 0 V DD RE G (> 20 mi l)
M DIO 9 50 31 3 . 3V _ L A N 3 . 3V
51 M DIO 9 V C C 3V 30 ( >2 0m il ) 3 .3 V S 3 .3 V S
M DIO 8 ( >2 0m il )
A V D D 1 2 _ 52 52 M DIO 8 P W R CR 29 V C C_ CA R D
DV D D R2 5 0 *1 5 m il _ sh o rt _ 0 6 R 2 47 *0 _ 0 6
53 VD D T EST 28 MP D R3 4 3 1 0 K _0 4 V DD 3
32 L A N_ M DIP 0 54 V I P _1 MP D 27 P ME # _ R
32 L A N_ M DIN 0 55 V IN _ 1 W AKEN 26
R2 4 9 *1 5 m il _ sh o rt _ 0 6 A V D D 1 2 _ 55 LA N _ S C L R3 4 4 * 4. 7 K _ 0 4
DV D D 56 A V DD1 2 L A N _L E D 2 25 LA N _ S D A
32 L A N_ M DIP 1
JMC251 C
B.Schematic Diagrams
57 V I P _2 CR_ L E D 24 C4 9 0 0. 1 u _ 16 V _ Y 5V _ 0 4
32 L A N_ M DIN 1 58 V IN _ 2 RST N 23 CP P E N B U F _ P L T_ R S T# 22 , 2 7 , 29 , 3 4
59 G ND C PPEN 22
3 . 3 V _ LA N L A N _M D I P 2 60 A V DD3 3 G ND 21
32 L A N_ M DIP 2
L A N _M D I N 2 61 V I P _3 (LQFP 64) V D DIO 20 S D_ W P R3 2 4 1 K_ 0 4
3 . 3 V _L A N
32 L A N_ M DIN 2 A V D D 1 2 _ 62 62 V IN _ 3 M DIO 6 19 MD I O1 2 V C C _C A R D
R2 4 8 *1 5 m il _ sh o rt _ 0 6
DV D D
32 L A N_ M DIP 3
L A N _M D I P 3
L A N _M D I N 3
63
64
A V DD1 2
V I P _4
6-03-02510-0P0 MD I O1 2
MD I O1 4
18
17
MD I O1 4
S D_ CD # R3 2 3 * 4 . 7K _0 4
Sheet 30 of 49
32 L A N_ M DIN 3 V IN _ 4 C R _C D 0 N 3. 3 V S
CR _ CD1 N
A VDD 3 3
A VD D1 2
A V DD1 2
M D I O 13
M D I O7
C LK N
R EXT
X OU T
CL K P
R XN
GN D
TX N
RXP
T XP
X IN
V D D3 3 . 3V S
JM C 2 5 1- LG B Z 0 C Card Reader
1
2
3
4
5
6
7
8
9
10
11
12
*1 5 mi l _ sh o rt _ 06 1 4
16
(> 20 mil ) ( >2 0m il )
A V D D 1 2_ 1 3 13
15
PC Ie Di ff er en ti al
(JMC251 C)
*1 5 mi l _ sh o rt _ 06
C 51 5 C 5 03 C4 8 6 C4 9 2 RE X T _ C Pa ir s = 1 00 O hm
C R_ C D1 N
L A N X OU T
A V D D 1 2_ 7
L A NX IN
M DIO 7
1 0 u_ 6 . 3 V _ X5 R _0 6 0 . 1u _ 1 6V _ Y 5V _0 4 1 0u _ 6 . 3V _X 5 R _ 0 6 0 . 1 u_ 1 6 V _Y 5 V _0 4
Pin#32 Pin#32 Pin#31 Pin#31 R2 6 4
12 K _ 1 % _0 4
3 .3 V _ L A N
R 30 3
R 30 4
A V D D 1 2_ 7 A V D D 1 2 _1 3
12/7
DVD D
DVD D
C 45 6 C 4 72 R 31 1 0 _0 4 MS _I N S # 3 . 3 V _ LA N
0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 P C I E _ R X P _ 4 _G L A N C 4 69 0 . 1u _ 1 0V _X 7 R _ 0 4
Pin#7 Pin#13 P C I E _ R X N _4 _ GL A N C 4 66 P C I E _ R XP 4 _ GL A N 19
0 . 1u _ 1 0V _X 7 R _ 0 4
P C I E _R X N 4 _ GL A N 19 R 3 25
12/7 ? EC? ? ?
1 0 K_ 0 4
D1 5
A V D D 1 2_ 5 2 A V D D 1 2 _5 5 A V D D 1 2 _6 2 A V D D 12 _ 7
P C I E _T X N 4 _ GL A N 1 9 A C P M E #_ R R 3 01 0 _0 4
P C I E _ T X P 4_ G LA N 19 2 0 , 2 7, 2 9 P CIE _ W A K E # P ME # 2 2 ,3 4
C L K _ P C I E _ GL A N 1 9 R B 7 5 1 S -40 C 2
C L K _ P C I E _ G LA N # 1 9
C 40 9 C 4 08 C 4 06 C4 6 8
0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 *1 0 u _6 . 3 V _ X 5R _ 06
Pin#52 Pin#55 Pin#62 Pin#7 Card Reader 4 IN 1 SOCKET SD/MMC/MS/MS Pro
Reserved
L A N X OU T
Power
F or J MC2 51 C J _ C A R D -R E V 1
S D _C D # P1
3 . 3 V _ LA N V CC _ CA R D R2 8 0 * 1M _ 04 L A NX IN S D _D 2 P2 C D_ S D
S D _D 3 P3 D A T2 _ S D
X3 3 . 3 V _L A N C D / D A T3 _ S D
F S X -8L _ 2 5M H z V CC_ C A RD S D _B S P4
1 2 P5 C MD _S D
C 48 9 C4 0 5 C 4 91 C 5 02 C4 8 8 C 38 5 P6 VSS_ SD
V C C_ CA R D S D _C L K P7 V D D_ S D
FSX8L_25MHz? ? ? ? ?
0 . 1 u _1 6 V _ Y 5 V _ 04 *0 . 1 u _1 6 V _ Y 5 V _ 04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4 X4 *H S X3 2 1 S _2 5 MH Z *0 . 1 u _1 6 V _ Y 5 V _ 04 *1 0 u _6 . 3 V _ X5 R _0 6 C 66 4 P8 C LK _ S D
S D _D 0 P9 VSS_ SD
Pin#43 Pin#43
4 3 Pin#2 Pin#2 * 0. 1 u _ 16 V _ Y 5V _ 0 4 S D _D 1 P1 0 D A T0 _ S D
P1 1 D A T1 _ S D
R 49 4 C 65 3 S D _W P
1 2 7 5 _0 4 4 . 7 u_ 6 . 3 V _ X5 R _0 6 P1 2 W P_ SD
P1 3 VSS_ M S
3 . 3 V _ LA N V C C_ CA R D SD _C L K P1 4 V C C _ MS
C 45 3 C4 3 0 C 65 4 SD _D 3 P1 5 S C LK _M S
MS _I N S # P1 6 D A T3 _ MS
2 2 p_ 5 0 V _N P O_ 0 4 22 p _ 50 V _ N P O_ 0 4 V C C_ CA R D * 0. 1 u _ 16 V _ Y 5V _ 0 4 SD _D 2 P1 7 I N S _ MS
SD _D 0 P1 8 D A T2 _ MS
C 38 4 C 4 07 C 6 67 C4 2 1
12/13 ? EVT bug 19 SD _D 1 P1 9 S D I O/ D A T 0_ M S
SD _B S P2 0 D A T1 _ MS P 22
1 0 u_ 6 . 3 V _ X5 R _0 6 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u _1 6 V _ Y 5 V _ 0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4
Pin#59 Pin#59 Pin#2 Pin#21 C6 5 7 C6 6 0 P2 1 BS_ M S GN D P 23
VSS_ M S GN D
Reserved 6 -22 -2 5R 00 -1 B4
0 . 1u _ 1 6V _Y 5V _0 4 *4 . 7 u _6 . 3 V _ X 5R _ 06 M D R 0 19 -C 0-1 0 4 2
6 -22 -2 5R 00 -1 B5
Place all ca pacit ors close d to chi p. Crystal 8045 & 3225 Co-lay
The sub scrip t in each CAP in cicat es th e pin Near Cardreader CONN
n umb er o f JMC251/ JM C261 th at shou ld b e
clo sed to. 3 2 DV DD
1 1 , 1 8, 2 7 , 3 4, 35 , 3 6 , 37 , 4 1 , 4 2 V D D 3
2 , 3, 8 , 1 1 , 1 6, 1 8 , 1 9, 2 0 , 2 2 , 23 , 2 4 , 25 , 2 7 , 2 8, 2 9 , 3 5, 37 , 3 8 , 39 3. 3 V
3 , 9, 10 , 1 1 , 12 , 1 8 , 1 9, 2 0 , 2 1, 2 2 , 2 3 , 24 , 2 5 , 27 , 2 8 , 3 1, 3 2 , 3 3, 34 , 3 5 , 39 3. 3 V S
Card Reader (JMC251 C) B - 31
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Schematic Diagrams
SATA ODD, LED, USB CHARGE
SATA ODD Zero Power ODD LED
3. 3 V S 3 .3 V S 3 .3 V S
J_ O D D 1 ? ? ? ? ? J_ODD1
S1
S2 C 28 6 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 5 VS
S3 S A T A _ TX P 2 1 8
C 28 3 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 S A T A _ TX N 2 18 R 2 R 3 R4
S4
S5 C 27 5 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 2 2 0_ 0 4 2 2 0_ 0 4 2 20 _ 0 4
S6 S A T A _ RX N2 18
C 27 6 0 . 0 1 u_ 1 6 V _X 7 R _ 0 4 5 V S _ OD D C6 3 8
S7 S A T A _ RX P 2 18 U3 2
A
? ??? ?? ?? ? 1 4 1 u_ 6 . 3 V _Y 5V _0 4
V O UT V IN SCROLL
5 D2 NUM LOCK D3 CAPS LOCK D 4
V IN LOCK
P1 R Y -S P 17 0 Y G 34 -5 M LED R Y -S P 17 0 Y G 34 -5 M LED R Y -S P 1 7 0 Y G3 4 -5 M
P2 S A T A _ OD D _ P R S N T# 23 2 3 LED
P3 S A T A _ OD D _ D A # 2 2 G ND EN S A TA _O D D _P W R GT 23
Gre en G re en G re en
C
P4 G5 2 43 A
G ND2 P5 R4 4 4
G ND1 P6 C 2 55 C2 5 0 C2 5 3 C2 4 9 +C 62 8
10 0 K _ 04 L E D _ N U M# LE D _ N U M # 34 L E D_ CA P # LE D _ C A P # 34 LE D _ S C R O L L# L E D _ S C R OL L # 34
C 1 8 51 1 -11 3 0 5-L 0. 1 u _ 16 V _ Y 5 V _ 04 0. 1 u _ 16 V _ Y 5 V _ 0 4 1u _ 6 . 3V _ Y 5V _ 0 4 1 0u _ 6. 3 V _ X 5R _ 06 * 22 0 u _6 . 3 V _ 6. 3 *4 . 2
P IN G ND 1 ~ 4 = G ND
H1 8 H1 5
H 6 _0 D 2_ 3 H 6 _ 0D 2 _3
HDD LED 3 . 3V S
WLAN/BT
B.Schematic Diagrams
3. 3 V S
12 /8
R 1
2 2 0_ 0 4
R6
22 0 _ 04
R5
22 0 _0 4
LED
Sheet 31 of 49
A
1 3
3
D1 HDD/CD-ROM D5
USB Charge PORT 2 4
SG
Y
R Y -S P 17 0 Y G 34 -5 M LED R Y -S P 1 55 H Y Y G 4 -1
SATA ODD, LED, G ree n
4
VD D5
C 990 71 3
C
U S B V C C 01
C
USB CHARGE C 69 3 S A T A _ LE D # BT_ EN B W L A N _L E D #
17
S A T A _L E D # 18 2 7, 3 4 BT_ EN W LA N _L E D # 2 7, 3 4
1 u _6 . 3 V _ Y 5 V _ 04 U3 7
1 12 Q1
IN OU T
PPAD
D TC 11 4 E U A
E
US B _ P N 1 2 11 US B 1 _ P N1 C 69 0
22 US B _ P N1 D M_ O D M_ I N
US B _ P P 1 3 10 US B 1 _ P P 1 0 . 1 u_ 1 6V _Y 5V _ 0 4
22 US B _ P P 1 DP _ O D P _ IN
4 14
I LI M _S E L GN D
R 5 14 10 K _ 0 4 5 16 R 5 18 15 K _ 1 %_ 0 4
VD D5 E N/DS C I L I M0
R 5 07 10 K _ 0 4 6 15 R 5 19 *1 0 K _0 4
3 4 , 35 , 3 6 D D _ ON C T L1 I L I M1
VD D5 R 5 08 10 K _ 0 4 7 9
C T L2 N C
VD D5 R 5 09 10 K _ 0 4 8
C T L3 F A U L T#
1 3 G _ OC # 0 1R 5 20 *0 _ 04 U S B _O C # 0 1 22 FOR AUDIO BOARD
T P S 25 4 0 T o S out h B rid ge O C P in. U S B V C C 01
M _PQ FP1 6
12 /1 4 De l Q 33 1.1A 60mils
C 3 78 0 . 0 1u _ 1 6V _ X 7 R _ 04
J _A U D I O 1
CT L1 CT L2 CT L3 1
M I C 1 -R
33 M I C 1 -R 2
Dedic ated Char gin g Pot, Au to- de tect , M IC1 -L
33 M I C 1 -L 3
0 X 1 Disab le USBp ort, Cha rg e cu rren t 1.5A 4
33 H E A D P H ON E -R R 2 68 22 0 _ 04 H E A D P H ON E -R R
H E A D P H ON E -L L 5
33 H E A D P H ON E -L R 2 72 22 0 _ 04
? ? ? ? ? ? ? ? ? 6
Char g ing Dow ns tream Po rt, 33 J D_ S E N S E 7
S P K _ HP #
1 1 1 BCSpe cificat ion 1.1, US B _ P N1 R 3 59 *0 _ 04 U S B 1 _P N 1 8
US B _ P P 1 R 3 58 *0 _ 04 U S B 1 _P P 1 33 J D _ S E N S E _B U S B 1_ P N 1 9
Supp ort USB 2.0, Charge curren t 1.5A 10
U S B 1_ P P 1
11
12
33 S P K O UT R+ _ R 13
33 S P K O U T R -_ R 14
8 72 1 3 - 14 0 0G
U S B V CC 0 1
U S B V C C0 1 5V 5V 3 5 , 36 V DD5
U3 6 2A
G_ OC # 01 5 6 2 5 , 28 , 2 9 , 35 , 3 7 , 38 , 4 1 5 V
100 MIL 100 MIL F L G # V OU T1 1 1 , 18 , 2 7 , 30 , 3 4 , 35 , 3 6 , 37 , 4 1 , 42 V DD3
2A 1 1, 1 8 , 2 4, 2 5 , 2 8, 3 2 , 3 3, 3 5 , 3 9, 4 0 5 V S
2 7 C6 8 0 C 6 77
V IN 1 V OU T2 3 , 9 , 1 0, 1 1 , 1 2, 1 8 , 1 9, 2 0 , 21 , 2 2 , 23 , 2 4 , 25 , 2 7 , 28 , 3 0 , 32 , 3 3 , 34 , 3 5 , 39 3. 3 V S
C 6 79 C 6 78 C 6 95 C6 9 4 C 69 6 3 8 *0 . 1 u _1 6 V _ Y 5 V _0 4 * 2 2u _ 6. 3V _ X 5R _ 08
V IN 2 V OU T3
0. 1 u _1 6 V _ Y 5 V _ 04 *2 2u _ 6 . 3V _ X 5 R _ 08 * 0 . 1u _ 1 6V _ Y 5 V _ 0 4 *0 . 1 u _1 6 V _ Y 5 V _0 4 * 1u _ 6 . 3V _ Y 5V _ 0 4 4 1
EN # GN D
*R T 9 7 15 B G S
3 5, 3 8 D D _ ON #
B - 32 SATA ODD, LED, USB CHARGE
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Schematic Diagrams
HDMI, RJ45
FOR W/O LEVEL SHIFT
LAN PORT GIGA LAN (JMC251C) L42
L MX 1 +
L MX 1 - 4
1
3
2 D L MX 1 +
D L MX 1 - I F W/ O U 6 Le ve l Shi ft ,
L A N _ MD I P 0 12 13 LM X1 +
L43 *W C M2 01 2 F 2 S - 1 61 T 03 -s h ort t hi s com po ne nt m usr s tu ff RN2 5
30 LA N _M D I P 0 11 T D4 - MX 4 - 14 1 2
L A N _ MD I N 0 LM X1 - L MX 2 + D L MX 2 + *0 _8 P 4 R _ 0 4
30 LA N _M D I N 0 L A N _ MD I P 1 9 T D4 + M X4 + 16 LM X2 + H D MI C _ C 0C P _ C 8 1 T MD S _D A TA 2-L
30 LA N _M D I P 1 8 T D3 - MX 3 - 17 4 3 7 2
L A N _ MD I N 1 LM X2 - L MX 2 - D L MX 2 - H D MI C _ C 0C N _ C T MD S _D A TA 2# -L
30 LA N _M D I N 1 T D3 + M X3 + L44 *W C M2 01 2 F 2 S - 1 61 T 03 -s h ort 3 .3 V S H D MI C _ C 1C P _ C 6 3 T MD S _D A TA 1-L
D V DD H D MI C _ C 1C N _ C 5 4 T MD S _D A TA 1# -L
L A N _ MD I P 2 6 19 LM X3 + L MX 3 + 1 2 D L MX 3 + Q3 3 A
30 LA N _M D I P 2 5 T D2 - MX 2 - 20
2
L A N _ MD I N 2 LM X3 - *L 2 N 7 00 2 D W 1 T 1 G RN2 6
G
R5 1 30 LA N _M D I N 2 L A N _ MD I P 3 3 T D2 + M X2 + 22 LM X4 + L MX 3 - 4 3 D L MX 3 - *0 _8 P 4 R _ 0 4
30 LA N _M D I P 3 L A N _ MD I N 3 2 T D1 - MX 1 - 23 LM X4 - H D M I _C T R L C L K 1 6 H D MI _ S C L -C H D MI C _ C 2C P _ C 8 1 T MD S _D A TA 0-L
L45 *W C M2 01 2 F 2 S - 1 61 T 03 -s h ort
30 LA N _M D I N 3 T D1 + M X1 + H D MI C _ C 2C N _ C 7 2 T MD S _D A TA 0# -L
T CT 4 10 15 N MC T _4 7 5 _ 04 N MC T_ R L MX 4 + 1 2 D L MX 4 + H D MI C _ C LK C P _ C 6 3 T MD S _C LO C K -L
D
*0 _0 4 R4 3
T CT 3 7 T CT 4 M CT 4 18 N MC T _3 R3 1 7 5 _ 04 3 .3 V S H D MI C _ C LK C N _ C 5 4 T MD S _C LO C K # -L
T CT 2 4 T CT 3 M CT 3 21 N MC T _2 L MX 4 - 4 3 D L MX 4 -
R2 7 7 5 _ 04
T CT 1 1 T CT 2 M CT 2 24 N MC T _1 R2 6 7 5 _ 04 L46 *W C M2 01 2 F 2 S - 1 61 T 03 -s h ort Q3 3 B
T CT 1 M CT 1
5
*L 2 N 7 00 2 D W 1 T 1 G
G
G S T 50 0 9 LF C5 3 2 RN2 7
C4 6 C3 7 C3 2 C3 1 H D M I _C T R L D A T A 4 3 H D MI _ S D A -C *0 _8 P 4 R _ 0 4
10 0 0 p_ 2 K V _ X7 R _ 1 2 _H 1 25 TM D S _ D A TA 2 # -L 5 4 T MD S _D A TA 2# -R
TM D S _ D A TA 2 -L 6 3 T MD S _D A TA 2-R
D
0. 0 1 u_ 1 6 V _X 7 R _ 0 4 *0 . 01 u _ 16 V _ X 7R _0 4 *0 . 01 u _ 16 V _ X 7R _ 04 *0 . 01 u _ 16 V _ X 7R _ 04
12 /2 3 TM D S _ D A TA 1 -L 7 2 T MD S _D A TA 1-R
3 . 3V S TM D S _ D A TA 1 # -L 8 1 T MD S _D A TA 1# -R
J _ RJ _ 1 EM I? ? ? ?
B.Schematic Diagrams
D L MX 1 + 1 GN D 1 RN2 8
D L MX 1 - 2 DA + s h i el d GN D 2 12 /1 4 *0 _8 P 4 R _ 0 4
D L MX 2 + 3 DA - s h i el d TM D S _ D A TA 0 -L 5 4 T MD S _D A TA 0-R
D L MX 2 - 6 DB + TM D S _ D A TA 0 # -L 6 3 T MD S _D A TA 0# -R
R 5 86
DB - Q 35 B TM D S _ C LO C K - L 7 2 T MD S _C LO C K -R
TM D S _ C LO C K # -L 8 1 T MD S _C LO C K # -R
5
* 1 M_ 04 * L2 N 7 0 0 2D W 1 T1 G
G
D L MX 3 + 4
D L MX 3 - 5 DC + H D M I _H P D 4 3 H D MI _ H P D -C
Sheet 32 of 49
D L MX 4 + 7 DC -
D L MX 4 - 8 DD +
S
DD -
P J S -0 8 S O1 B -1
Main 6-21-B4040-008
HDMI, RJ45
5V S _H D M I
Fo r ES D
FOR INTEL GRAPHIC HDMI CONNECTOR
C
C
A
A
R 41 1 R4 1 3
2 . 2 K _ 04 2 . 2K _0 4
12 /7 D1 9 D 18 D1 7
A C
AC
AC
5V S _ H D MI
? ? X7 R U6
5V S
*B A V 99 R E C T I F I E R *B A V 9 9 R E C TI F I E R
R 89 1_04 5 V S _ H D MI _ I N R1 0 4 1 _ 04 *B A V 9 9 R E C T I F I E R
C1 7 6 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 0C N _ C 39 22 TM D S _ D A T A 2 # - R H D MI _S C L- C
21 H D MI C _ C 0 C N I N _D 1 + OU T _ D 1 +
C1 7 5 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 0C P _C 38 23 TM D S _ D A T A 2 -R
21 H D MI C _ C 0 C P I N _D 1 - O UT _ D1 - J _ H D MI 1 H D M I _ S D A -C
C1 7 8 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 1C N _ C 42 19 TM D S _ D A T A 1 # - R
21 H D MI C _ C 1 C N 41 I N _D 2 + OU T _ D 2 + 20
21 H D MI C _ C 1 C P C1 7 7 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 1C P _C TM D S _ D A T A 1 -R C 13 8 C 1 42 H D M I _ H P D -C
I N _D 2 - O UT _ D2 -
21 H D MI C _ C 2 C N C1 8 0 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 2C N _ C 45 16 TM D S _ D A T A 0 # - R 1 0 u_ 6 . 3 V _ X5 R _ 0 6 2 2 u _6 . 3 V _ X5 R _0 8
C1 7 9 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C 2C P _C 44 I N _D 3 + OU T _ D 3 + 17 TM D S _ D A T A 0 -R 19 H D MI _ H P D -C
21 H D MI C _ C 2 C P I N _D 3 - O UT _ D3 - 18 H OT P L U G D E T E C T
C1 8 2 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C LK C N _ C 48 13 TM D S _ C L OC K # -R +5V 17
21 H D MI C _ C LK C N I N _D 4 + OU T _ D 4 + D D C / C E C GN D
21 H D MI C _ C LK C P C1 8 1 0 . 1 u _1 0 V _ X7 R _ 0 4 H D M I C _ C LK C P _ C 47 14 TM D S _ C L OC K -R H D M I _ S D A -C 16
I N _D 4 - O UT _ D4 - SD A 15 H D MI _ S C L-C
21 HDM I_ CT RL CL K
HDM I_ CT RL CL K 9 28 H D M I _ S C L -C 12 /2 3 14 S CL 12 /2 3
8 SC L S C L_ S I N K 29 R E S E RV E D 13
21 H D M I _C TR L D A T A HDM I_ CT RL DA T A
SD A S DA _ S IN K
H D M I _ S D A -C
TM D S _ C L OC K # - R
EM4I? ? ? 3? T MD S _C L OC K # 12 C EC
H D MI _ C E C EM I? ? ? ?
7 30 HDM I_ HP D- C R 1 16 10 0 K _ 04 T MD S C L OC K - 11
21 H D MI _ H P D H PD HP D_ S IN K TM D S _ C L OC K -R 1 2 T MD S _C L OC K 10 CL K SH IEL D
R 1 15 * 4. 7 K _ 0 4 OE # 25 2 L12 *W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt T MD S C L OC K + 9 T MD S _ D A T A 0 # 1 2 T MD S _ D A T A 0 #-R
3. 3 V S O E# VC C[1 ] 3. 3 V S T MD S D A T A 0 -
R 1 13 * 0_ 0 4 11 8
DCC _ E N# 32 VC C[2 ] 15 S H I E LD 0 7 T MD S _ D A T A 0 4 3 T MD S _ D A T A 0 -R
? ? ? 10 D C C _E N # VC C[3 ] 21 C 15 7 C 15 2 TM D S _ D A T A 1 # -R 4 3 T MD S _D A T A 1# 6 TM D S D A T A 0+ L 11 * W C M 20 1 2 F 2S - 16 1 T0 3 -s ho rt
R T_ E N # VC C[4 ] 26 T MD S D A T A 1 - 5
P C0 3 VC C[5 ] 33 0 . 1 u_ 1 6 V _Y 5V _0 4 0 . 1 u_ 1 6 V _Y 5 V _0 4 TM D S _ D A T A 1 -R 1 2 T MD S _D A T A 1 4 S HIE L D1
SN7 5D P1 39 Ch an ge 3. 9K PC 0 VC C[6 ] T MD S D A T A 1 +
P C1 4 40 L10 *W C M2 0 12 F 2 S -1 61 T 0 3-s h o rt 3 T MD S _ D A T A 2 # 1 2 T MD S _ D A T A 2 #-R
R 1 19 3 . 9 K _ 04 RE X T 6 PC 1 VC C[7 ] 46 2 T MD S D A T A 2 -
R E XT VC C[8 ] S H I E LD 2 1 T MD S _ D A T A 2 4 3 T MD S _ D A T A 2 -R
R 5 87
R5 8 8
R 58 9
R5 9 0
1 TM D S D A T A 2+ L9 * W C M 20 1 2 F 2S - 16 1 T0 3 -s ho rt
OE _ 1 34 GN D [ 1 ] 5
3 . 3V S R1 2 2 *4 . 7 K _0 4 C 14 4 C 15 0
R1 2 4 *4 . 7 K _0 4 OE _ 2 35 O E _1 GN D [ 2 ] 12
R5 9 1
R 59 2
R5 9 3
R 59 4
G ND
GN D
Q E _2 GN D [ 3 ]
GN D
GN D
18 0 . 1 u_ 1 6 V _Y 5V _0 4
? ? ? GN D [ 4 ] 24 0 . 1 u_ 1 6 V _Y 5 V _0 4
GN D [ 5 ] 27
* 4 99 _ 1% _ 0 4
* 49 9 _ 1% _ 0 4
5 VS
*4 9 9_ 1 % _0 4
*4 9 9_ 1 % _0 4
G ND 2
G ND 4
GN D [ 6 ] 31
GN D 1
GN D 3
GN D [ 7 ] 36
GN D [ 8 ] 37
* 49 9 _ 1% _ 0 4
R1 1 8 4. 7 K _ 0 4 D CC_ E N # C 14 5 Q 3 5A
*4 9 9_ 1 % _0 4
*4 9 9_ 1 % _0 4
* 49 9 _1 % _ 04
3. 3 V S
GN D
GN D [ 9 ]
2
43 * L 2N 70 0 2 D W 1 T 1G C 12 8 17 -1 1 9A 5 -L
G
R1 2 1 4. 7 K _ 0 4 PC 0 GN D [ 1 0 ] 0 . 1 u_ 1 6 V _Y 5V _0 4 P IN G ND 1 ~ 4 = G ND
12 /14
S N 7 5D P 1 39 1 6 H D M I GN D
49
R1 2 0 *4 . 7 K _0 4 PC 1 P I N 4 9 = GN D
1 2/ 14
S
? ? ? H D MI G N D
SN 75 DP 139 6- 03 -7 513 9- 03 0
3 0 DV D D
11 , 1 8 , 24 , 2 5 , 28 , 3 1 , 33 , 3 5 , 39 , 4 0 5 V S
3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 2 5 , 2 7, 2 8 , 3 0, 3 1 , 3 3, 3 4 , 3 5, 3 9 3 . 3 V S
HDMI, RJ45 B - 33
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Schematic Diagrams
AUDIO CODEC ALC269
CODEC (ALC269 & VT1802P) P V DD1 _ 2 R 26 7
* 15 m i l_ s h or t _0 6
La y out note :
1. 5 V
R3 3 1 * 0 _0 4
5 VS GN D a nd AU DG spa ce i s EMI Require
For 1 .5 V H DA Li nk. DV D D_ IO C 4 48 C 44 0 60 mi ls ~ 10 0mi ls
L38 H C B 10 0 5 K F -1 21 T 2 0
R3 1 5 0_04 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0 u _6 . 3 V _ X 5R _ 06
3 .3 V S _ A UD
J P1 *1 0 m il _ s ho rt _ 0 4
C 4 80 C 4 81
For 3 .3 V H DA Li nk. J P2 *1 0 m il _ s ho rt _ 0 4
1 0 u _6 . 3 V _ X 5 R _ 0 6 0 . 1 u _1 6 V _ Y 5 V _ 0 4
V T1 80 2P ? ? ? C 49 5 0 . 1 u_ 1 6 V _ Y 5 V _ 04
C 4 47 C4 4 1
C 51 6 0 . 1 u_ 1 6 V _ Y 5 V _ 04
* 0 . 1u _ 1 6 V _Y 5 V _ 04 *1 0 u _6 . 3 V _ X 5R _ 06
3 .3 V S L 30 3 .3 V S _ A UD
H C B 1 0 0 5K F -1 21 T 2 0 5V S _A U D L37 5 VS
H C B 1 00 5 K F -1 2 1T 2 0 A U DG
PD# C ont rol AZ_ RST# For 3. 3V
HDA Li nk De -pop C 4 46 C4 3 9 C4 6 2
5 VS_ AU D C4 4 9 C4 9 4 C5 0 4 C 5 13 C6 4 9
12/8 ? ? D 13 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0u _ 6 . 3V _X 5 R _ 0 6 0. 1 u _ 1 6V _ Y 5V _0 4
1 A 0 . 1u _ 1 6V _Y 5 V _ 04 0. 1u _ 1 6V _Y 5 V _0 4 10 u _ 6. 3 V _ X 5 R _ 0 6 * 1 0u _ 6 . 3 V _X 5 R _0 6 1u _ 6 . 3 V _ Y 5 V _ 04
18 H D A _ R S T# C 3 R 28 3
2 A
34 KBC_ M UT E#
1 0 K _ 04
ANA LO G D IG ITAL
39
46
38
25
1
9
U 19 A U DG
B A T5 4 A W G H D V DD 1
P V DD 1
D V D D -I O
P VD D2
A V DD 1
A VD D2
E A P D _ MO D E C A P D# 4 13 S E NS E _ A R3 5 5 2 0 K _ 1% _ 0 4
PD # Se n s e A J D_ S E N S E 31
B.Schematic Diagrams
D1 1 * R B 7 5 1 S -4 0C 2 14 L I N E 2 -L R3 5 6 3 9 . 2K _1 % _ 0 4
40 LI N E 2 -L 15 J D_ S E N S E _ B 31
Q2 2 S P K OU T L + L I N E 2 -R
G S P K OU T L - 41 S P K -L + L I N E 2 -R
5V S _A U D R 2 87 * 10 0 K _ 0 4 *2 N 7 0 0 2 W
S P K -L - 16 MI C 2 _L C5 0 9 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 I N T_ M I C
MI C 2 -L
D
44 17 MI C 2 _R C5 1 0 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 2 1
31 S P K O U T R -_ R S P K -R - M I C 2 -R
Q2 4 45 NE AR C OD EC VT 18 02 P 2. 2K _0 4
H D A _ R S T# G 31 S P K O U T R +_ R S P K -R + 18 S E N S E -B
*B S S 13 8 _ N L VT 18 02 P R 35 7= 5. 1K _1% _0 4
E A P D _ MO D E 47 S e n s e- B M I C 2 -V R E F O R 1 7 1 4. 7 K _ 0 4
AZ_RS T# For 1 .5 V
Sheet 33 of 49 S P D IF C2 /E A P D
S
48 19 J DRE F R3 5 7 2 0K _ 1 % _ 04 J_ I N TM I C 1
HDA Link De - pop Layout Note: S P D IF O JD R E F 20 MO N O -OU T C5 0 8 * 10 0 p _5 0 V _ N P O_ 0 4 I N T _M I C R1 7 4 1K _0 4
D M I C -D A T 2 MO N O -OU T 2
Ve ry c lo se to G P I O0 -D MI C -D A T 1
D M I C -C LK 3 21 MI C 1 -L_ R C 5 1 1 4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 MI C 1_ L AU DG
AUDIO CODEC 18
Au di o Co dec
H DA _ S D IN0 R 3 16 3 3 _ 04
G P I O1 -D MI C -C L K
DIGITAL ANALOG
MI C 1 -L
M I C 1 -R
22
23
MI C 1 -R _ R C 5 1 2
L I N E 1 -L
4 . 7 u _ 6. 3 V _ X 5 R _ 0 6 MI C 1_ R
VT 180 2P 10 u
VT 18 02 P 33 0P
C2 8 2
6 80 p _ 5 0V _ X 7 R _ 0 4 88 2 6 6- 02 0 0 1
88 2 6 6- 2L
5 LI N E 1 -L 24 L I N E 1 -R
ALC269 18
18
HD A _ S DO UT
HD A _ B IT CL K
6
S D A T A -OU T
B I T -C LK 6-03-02695-030
L I N E 1 -R
V RE F
27 V R E F -A L C 2 6 9
C4 8 2
C4 9 3
0 . 1 u _1 6 V _ Y 5 V _ 0 4
2 . 2 u _6 . 3 V _ Y 5 V _ 0 6
VT 18 02 P R3 62 ,R 36 5= 75 _1% _0 4
M IC1 _ R R3 6 2 1K _0 4
8 28 M I C 1 -R 31
A Z _ S D IN0 _ R L D O_ C A P C4 7 9 10 u _ 6. 3 V _ X 5 R _ 0 6 M IC1 _ L R3 6 5 1K _0 4
18 HD A _ S Y N C S D A T A -I N L D O_ C A P 30 MI C 1 -V R E F O -R M I C 1 -L 31
10 MI C 1 -V R E F O-R 29 MI C 2 -V R E F O VT 180 2P NC P IN
S Y NC M I C 2 -V R E F O M I C 1 -V R E F O-L
D 16 F OR V OL UM N R3 6 6 2. 2 K _ 0 4
PC BEEP B A T5 4 C W GH H D A _ R S T# 11
R ESET# H P -O U T -L
32 H E A D P H ON E -L
H E A D P H O N E -L 31
M I C 1 -V R E F O-R R3 6 3 2. 2 K _ 0 4
1 A A DJ US T 33 H E A D P H ON E -R AUD G
34 K B C _B E E P C 3 H E A D P H O N E -R 31
P CB E E P 1 2 H P -O U T -R
M I C 1-V R E F O -L
BEEP R 36 0 4 7 K_ 0 4 B EEP_ R VT 18 02 P R 36 3, R3 66 =4 .7K _1 %_ 04
2 A PC BEEP 35 C B N -A L 2 69 C 4 54 2 . 2 u_ 6 . 3 V _ Y 5 V _ 0 6
12/8
18 HD A _ S P K R R 36 1 4 .7 K _ 0 4 C 5 0 7 1 u _ 6 . 3V _X 5 R _ 0 4 CB N
36 C B P - A LC 2 69
PVSS 1
D VSS2
AVSS 1
CB P
PVSS2
AVSS2
C5 1 4 1 0 0 p_ 5 0 V _ N P O _ 04 34 OP V E E -A L C 2 6 9
GN D
OP V E E
C 4 60
A L C 26 9 Q-V B 5 -GR
42
43
49
26
31
37
2 . 2 u _ 6. 3 V _ Y 5V _ 0 6
3. 3VS _AUD
A U DG
A UD G MI C 1 -V R E F O-L
5 VS
20 ms
The rma l Pa d pla ce 9
V ia hole .
A Z_ RST#
L29
F C M1 0 0 5K F -1 21 T 0 3
S P K O UT L + S P K OU TL + _ L
P D#
C 41 7 C4 2 8 H ea dp ho ne An ti -P op C ir cu it
1 0 00 p _ 50 V _ X 7 R _ 0 4 18 0 p _5 0 V _ N P O _ 04 3 .3 V S H E A D P H O N E -L
S pe a k er wi re le ngth l e ss t han 80 00 mil s , I t don't nee d LC Fil te r. LEFT J _S P K L1 H E A D P H ON E -R
S PKOU TR + ,R- ,L+ ,L- Tra c e w idth S P K OU TL - S P K OU TL -_ L 2
1
6
D
S pe a k er 4 ohm- -- --- > 4 0mi ls L28 C4 2 7 8 52 0 4 -02 0 0 1 R 28 2 R 2 88 Q 2 3A
F C M1 0 0 5K F -1 21 T 0 3 * 22 0 K _ 0 4 2G * L 2N 7 00 2 D W 1T 1 G
S pe a k er 8 ohm- -- --- > 2 0mi ls 18 0 p _5 0 V _ N P O _ 04 S
J_SPK1
1
* 1 0K _0 4
EMI Require
S
2 1 E A P D _ MO D E G Q 21
3
* N D S 3 52 A P A U DG D
R 26 6 R 28 1 Q2 3 B
5G *L 2 N 7 0 02 D W 1 T1 G
Pl e as e Let LC Filt e r toge the r a nd cl ose t o Codec .I F
D
S
La yout note :
4
Spe a ke r w i re le ngth i s l es s t ha n 800 0m il s It don't * 4. 7 K _ 0 4 *1 0 K _ 0 4
C 4 42
ne e d the LC Fil te r. Cl ose t o code c 12/21 DEL * 1 0u _ 6 . 3V _X 5 R _ 0 6
A UD G
A UD G
3, 6 , 9 , 1 0 , 2 5, 2 9 , 3 5 , 37 , 3 8 1 . 5 V
1 1 , 1 8 , 24 , 2 5 , 2 8, 3 1 , 3 2 , 35 , 3 9 , 4 0 5 V S
3 , 9 , 1 0 , 1 1, 1 2 , 1 8 , 19 , 2 0 , 2 1, 2 2 , 2 3 , 24 , 2 5 , 2 7, 2 8 , 3 0 , 31 , 3 2 , 3 4, 3 5 , 3 9 3 . 3 V S
B - 34 AUDIO CODEC ALC269
Downloaded from www.Manualslib.com manuals search engine
Schematic Diagrams
KBC-ITE IT8518E
K BC_ A V D D L 22
H C B 1 00 5 K F -1 2 1T 2 0
V D D3
V DD 3 V D D3
C3 8 6 C 4 70 C4 5 5 C 4 43 C 5 01
C 3 68 C3 8 2 C3 6 7
0 . 1 u_ 1 6 V _ Y 5V _ 0 4
0 . 1 u_ 1 6 V _Y 5 V _0 4 10 u _ 6. 3 V _ X 5R _ 06 0 . 1 u_ 1 6 V _Y 5 V _0 4 0 . 1 u _ 16 V _ Y 5 V _ 0 4
0 . 1 u _1 6 V _ Y 5 V _ 0 4 *0 . 1 u _1 6 V _ Y 5 V _ 0 4 *0 . 1 u _1 6 V _ Y 5 V _ 04
1 24
J_KB1 R 34 8
C4 9 8
1 0 0 K _0 4
L3 6 H C B 1 0 05 K F -1 2 1 T2 0 0 . 1 u_ 1 6 V _Y 5 V _0 4 K B C_ A G ND
3 .3 V S
E C _V C C FOR W250HPQ FOR W270HU K B C _W R E S E T #
C 50 0
121
J _K B 1 J _K B 2
1 14
1 27
11
26
50
92
74
3
U 17 8 5 2 01 -2 4 05 1 * 8 52 0 1 -24 0 5 1 1 u _ 6. 3 V _ Y 5 V _ 0 4
AVC C
VST BY
VST BY
VST BY
VST BY
VST BY
VST BY
VBAT
VCC
10 58 K B -S I 0 4 K B -S I 0 4
1 8 , 28 LP C _ A D 0 9 L AD 0 K S I 0/ S TB # 59 5 5
K B -S I 1 K B -S I 1
1 8 , 28 LP C _ A D 1 8 L AD 1 K S I1 /AF D# 60 K B -S I 2 6 K B -S I 2 6
1 8 , 28
1 8 , 28
LP C _ A D 2
LP C _ A D 3 P CL K _ K B C
7
13
L AD
L AD
2
3
K S I 2 / I N I T#
K S I3 /S L IN#
61
62
K B -S I 3
K B -S I 4
8
11
K B -S I 3
K B -S I 4
8
11
Board? ?
2 2 PCL K _ KB C 6 L PC CL K KSI4 63 12 12
K B -S I 5 K B -S I 5
18 , 2 8 L P C _F R A ME # 5 LFR A ME # KSI5 64 K B -S I 6 14 K B -S I 6 14
1 8 ,2 8 S E R IRQ
22 SER IRQ LPC K/B MATRIX KSI6 65 K B -S I 7 15 K B -S I 7 15
EC MODULE CHOOSE (FOR DIFFERENCE K/B TYPE)
2 2 , 27 , 2 9 , 3 0 B U F _ P L T _ R S T # L PC RS T # /W UI4 /G PD2 ( P U ) KSI7
K B C_ W R E S E T # 14 36 K B -S O0 1 K B -S O0 1 V ER . RX VO LT AGE M OD EL_ ID
W R ST# K S O0 / P D 0 37 K B -S O1 2 K B -S O1 2
1 26 K S O1 / P D 1 38 K B -S O2 3 K B -S O2 3
2 3 G A2 0 G A 2 0/ G P B 5 K S O2 / P D 2 V 1. 0 R1 63 10 K/ R 17 1 X 3 .3 V
4 39 K B -S O3 7 K B -S O3 7
4 2 A C _I N # 16 K B R S T #/ GP B 6 ( P U ) K S O3 / P D 3 40 K B -S O4 9 K B -S O4 9 R1 63 X /R 17 1 10 K 0V
B.Schematic Diagrams
2 8 L E D_ A CIN 20 P W U R E Q # / GP C 7( P U ) K S O4 / P D 4 41 K B -S O5 10 K B -S O5 10
2 0 , 2 2 A C _P R E S E N T L 8 0L L A T / GP E 7( P U ) K S O5 / P D 5 42 K B -S O6 13 K B -S O6 13
23 K S O6 / P D 6 43 K B -S O7 16 K B -S O7 16
23 S M I# 15 E C S CI# /G P D3 ( P U ) K S O7 / P D 7 44 K B -S O8 17 K B -S O8 17 MO D E L _ I D R 23 5 1 0 K _ 04
23 S C I# E C S MI # / G P D 4 ( P U ) K S O8 / A C K # 45 K B -S O9 18 K B -S O9 18 V D D3
K S O9 / B U S Y 46 K B -S O1 0 19 K B -S O1 0 19 R 24 4 * 10 K _ 0 4
76
DAC K S O1 0 / P E 51 20 20
K B -S O1 1 K B -S O1 1
27 W LA N _ E N 77 G PJ 0 K S O 1 1/ E R R # 52 K B -S O1 2 21 K B -S O1 2 21 RX
33 K B C _ MU TE #
1 8 ME _ W E
2 8 CPU _ F A N
78
79
80
G
D
D
PJ 1
A C 2 / GP J2
A C 3 / GP J3
K S O 12 / S L C T
K S O 13
K S O 14
53
54
55
K B -S O1 3
K B -S O1 4
K B -S O1 5
22
23
24
K B -S O1 3
K B -S O1 4
K B -S O1 5
22
23
24 V D D3
Sheet 34 of 49
D A C 4 / GP J4 IT8518 K S O 15
23 C R I T_ T E MP _ R E P #
81
66
D A C 5 / GP J5
ADC 6-03-08518-0P2
FLASH 100
3 G _D E T #
C CD _ DE T #
R 24 5
R 23 6
* 10 K _ 0 4
1 0 K _ 04
KBC-ITE IT8518E
B A T _D E T
4 2 B AT _ DE T B A T _V OL T 67 AD C 0 / GP I0 F LF R A M E #/ G P G2 101 K B C_ SP I_ CE # 3 G_ P OW E R _ E N 27 S MC _ C P U _ T H E R M_ R R 28 4 4 3_ 1 % _0 4
4 2 B A T_ V O LT 68 AD C 1 / GP I1 F LA D 0 / S C E # 102 H_ P E C I 3 ,2 3
K B C_ SP I_ S I S MC _ C P U _ T H E R M_ R R 28 9 *0 _ 04
69 AD C 2 / GP I2 F L A D1 /S I 103 K B C_ SP I_ S O S MD _ C P U _ T H E R M_ R R 29 2 *0 _ 04 S M C_ CP U_ T HE R M 19
2 T H E R M_ V O L T 70 AD C 3 / GP I3 F LA D 2 / S O 104 S M D_ CP U_ T HE R M 19
R 2 46 10 _ 04
4 2 T O TA L _ C U R 71 AD C 4 / GP I4 F L A D 3/ G P G6 105 K B C _ S P I _ S C LK
2 7 3 G _D E T # 72 AD C 5 / GP I5 F L C LK / S C K 106
CC D_ DE T #
2 8 CC D_ DE T # MO D E L _ I D 73 AD C 6 / GP I6 ( P D )F L R S T # / W U I 7 / G P G0 / T M C CD_ E N 28 PCL K _ KB C P C LK _ K B C _ R
R3 4 0 * 10 _ 0 4 C 50 6 * 10 p _ 50 V _ N P O_ 04
AD C 7 / GP I7 B A T _ V OL T C 38 3 1u _ 6 . 3 V _Y 5 V _0 4
GPIO 56
S MC _B A T 1 10 SMBUS ( P D )K S O 1 6/ G P C 3 57 SU SB# 6 , 2 0, 2 9 , 3 5
T OT A L _ C U R C 37 0 *1 u _6 . 3 V _ Y 5 V _ 0 4
4 2 S M C_ B A T S MD _B A T 1 11 SM C L K 0 / GP B 3 ( P D )K S O 1 7/ G P C 5 S U S C# 2 0 ,3 8
4 2 S M D_ B A T 1 15 SM D A T 0 / GP B 4 93
S MC _V GA _ T H E R M
16 S M C _ V GA _ T H E R M S MD _V GA _ T H E R M 1 16 SM C L K 1 / GP C 1 ( P D )G P H0 /ID0 94 S U S _P W R _ A C K 2 0
16 S M D _ V GA _ T H E R M V D D3
S M C _ C P U _ TH E R M _ R 1 17 SM D A T 1 / GP C 2 ( P D )G P H1 /ID1 95 B T _ E N 2 7, 3 1
S MD _C P U _ T H E R M_ R 1 18 SM C L K 2 / GP F 6( P U ) ( P D )G P H2 /ID2 96 B K L_ E N 1 1
SM D A T 2 / GP F 7( P U ) ( P D )G P H3 /ID3 97 HS P I_ C E # 1 8
NC 3
( P D )G P H4 /ID4 98 H SP I_ S CL K 1 8
LC D _ B R I GH TN E S S 24 PWM ( P D )G P H5 /ID5 99 H S P I _ MS O 1 8
S HO RT
25 PW M 0 / GP A 0 ( PU ) ( P D )G P H6 /ID6 107 H S P I _ MS I 18 KBC_SPI_*_R = 0.1"~0.5"
0 . 1 u _1 6 V _ Y 5 V _ 0 4
31
33 K B C_ B E E P
L E D _S C R O LL #
28 PW
PW
M
M
1 / GP A 1 (
2 / GP A 2 (
PU
PU
)
)
( P D )G P G1 / I D 7 D D _ ON 3 1 , 35 , 3 6
C3 8 1 32 Mb it
29 U1 6
3 1 L E D _ NUM # 30 PW M 3 / GP A 3 ( PU ) EXT GPIO 82 S P I _ V D D _1 8 5 K B C_ SP I_ S I_ R R 26 5 4 7 _ 04 K B C_ SP I_ S I
31 LE D _ C A P # 31 PW M 4 / GP A 4 ( PU ) ( P D )E GA D / GP E 1 83 V DD SI
2 8 L ED_ B AT _ CHG 32 PW M 5 / GP A 5 ( PU ) ( P D )E GC S # / GP E 2 84 d GP U _ R S T # 1 2 2 K B C _ S P I _ S O_ R R 27 0 1 5 _ 1% _ 0 4 K B C _ S P I _ S O
2 8 L E D_ BA T _ F UL L 34 PW M 6 / GP A 6 ( PU ) ( P D )E GC L K / GP E 3 H _P R OC H O T# _ E C 3 SO
2 8 L E D_ P W R PW M 7 / GP A 7 ( PU ) R 2 42 K BC_ F L AS H 3 1 K B C_ SP I_ CE # _ R R 26 1 1 5 _ 1% _ 0 4 K B C _ S P I _ C E #
WAKE UP 35 W P# C E#
PS/2 R S MR S T# 20 1 K _0 4
85 ( P D )W U I 5 / GP E 5 17 6 K B C_ SP I_ S CL K _ R R 27 3 4 7 _ 04 K B C_ SP I_ S CL K
2 7 8 0C L K 86 PS2 C LK 0 / G PF 0 ( PU ) ( P D )LP C P D #/ W U I 6 / GP E 6 K B C _R S T # 2 3 SCK
27 B T _D E T # PS2 D A T0 / G PF 1 ( PU )
87 PWM/COUNTER R 2 57 K BC_ HO L D# 7 4 2'rd
2 7 3 IN1 88 PS2 C LK 1 / G PF 2 ( PU ) 47 H OL D # VSS
4 . 7K _ 0 4
37 d GP U _ P W R _ E N # 89 PS2 D A T1 / G PF 3 ( PU ) ( P D )T A C H 0/ G P D 6 48 C P U_ F A NS E N 28 P C T 2 5 V F 0 32 B
2 8 T P_ CL K 90 PS2 C LK 2 / G PF 4 ( PU ) ( P D )T A C H 1/ G P D 7 6-04-02532-490
2 8 T P _ DA T A PS2 D A T2 / G PF 5 ( PU ) 120
6-04-25032-491 6-04-25320-490
( P D ) TM R I 0 / W U I 2/ G P C 4 124 P M _P C H _ P W R OK 20
1 25
WAKE UP ( P D ) TM R I 1 / W U I 3/ G P C 6 A L L _S Y S _ P W R GD 1 1, 2 0 , 3 9 12 /8 ? ? ? B OM ? ? ? ?
27 3 G_ E N PW R S W /G P E 4 ( P U )
18
CIR 119
35 P W R_ S W # 21 R I 1# / W U I 0 / GP D 0( P U ) ( P D )C R X/ G P C 0 123
Co-lay SPI ROM
1 1, 2 8 L I D _S W # R I 2# / W U I 1 / GP D 1( P U ) ( P D )C T X / GP B 2 PM E# 2 2, 30 U1 5
S P I _ V D D _1 8 5 K B C _S P I _S I _R
33
GP INTERRUPT LPC/WAKE UP 19 V DD SI
20 P W R _B T N # G I N T / GP D 5 ( P U ) ( P D )L 8 0 H L A T / GP E 0 SW I# 20 2 K B C _S P I _S O _ R
112 SO
( P D )R I N G# / P W R F A I L #/ L P C R S T # / GP B 7 C H G_ R S T 42 3 1
UART ? ? ? K B C_ F L A S H K B C _S P I _C E # _R
1 08 W P# C E#
2 7, 3 1 W L A N _ LE D # 1 09 R XD / GP B 0( P U )
CLOCK 2 6
CK 3 2 KE * 0 _0 4 R3 3 9 K B C _S P I _S C L K _ R
AVSS
2 7 W L A N _D E T # T X D/G PB 1 ( PU ) CK3 2 K E N B _E N A V D D 11 , 2 1 SCK
VSS
VSS
VSS
VSS
VSS
VSS
VSS
128 C K 3 2 KR 3 38 * 1 0M _0 4
C K 32 K IC P P E # 2 3 7 4
K B C_ HO L D#
I T8 5 1 8E H OL D # VSS
VER:C
12
27
49
91
122
75
1
1 13
X 10 *3 2 . 7 68 K H z 12/06 ? ? ? ? *M X2 5 L 32 0 5 D M 2I -1 2 G
1 4 A C A - S P I -0 04 -T 0 3
2 3
R3 5 1 * 0 _0 4 E C_ V S S
C4 9 9 0 . 1 u_ 1 6 V _Y 5 V _0 4
R3 4 9 C 4 96 C4 9 7
NC 2 S H OR T * 1 0m i l _s h o rt _0 4 * 1 5p _ 5 0V _ N P O_ 0 4 *1 5 p _5 0 V _ N P O _0 4
R3 4 1 *1 0 m li _ s ho rt _ 0 4 L C D _ B R I G H T N E S S K B C _ A GN D
11 B R I GH T N E S S
C 5 05 * 0 . 1u _ 1 6V _Y 5V _0 4 1 1, 18 , 2 7 , 30 , 3 5 , 36 , 3 7 , 4 1, 4 2 V D D3
3 , 9, 10 , 1 1 , 12 , 1 8 , 19 , 2 0 , 2 1, 2 2 , 2 3, 2 4 , 2 5, 27 , 2 8 , 30 , 3 1 , 32 , 3 3 , 3 5, 3 9 3 .3 V S
KBC-ITE IT8518E B - 35
Downloaded from www.Manualslib.com manuals search engine
Schematic Diagrams
5VS, 3VS, 3.3VM, 1.5VS CPU
SYS3 V
V IN V DD 3
V IN V IN
P R 11 2
PR9 7 P U6 PR8 1
1 8 12/8 ? ? ? 1 0 K _0 4
P C1 0 6 P C1 1 1 *1 2 K _ 04 VA VA V IN1 V IN 1 *1 0 0K _0 4
2 7 P R 80 1 K _ 0 4 D D _ ON D D _O N #
V IN V IN D D _ ON _L A T C H D D_ O N# 3 1 ,3 8
0. 1 u _ 50 V _ Y 5 V _ 06
0. 1 u _ 50 V _ Y 5 V _ 06
3 6
6
PR 9 8 1 K_ 0 4 P W R_ S W # D P C 10 4
28 M _ B TN # M _B TN # P W R_ S W # P W R_ S W # 34
4 5 P R 1 14 2G * 0. 1 u _ 16 V _ Y 5 V _ 0 4
I N S T A N T -ON G ND 3 1 , 3 4, 3 6 D D _ ON
1 K_ 0 4 S P Q 27 A
1
P 28 0 8 B 0 L2 N 70 0 2 D W 1 T 1G
P R 11 3
1 0 0K _ 0 4
EMI ON
3.3V ON
5V
NMOS
NMO S
P Q 64 A
S Y S 3V
S Y S 1 5V V D D3 M TN N 2 0 N 0 3 Q8 3. 3 V
P Q6 6 A 8 2
SYS1 5 V V DD 5 MT N N 20 N 03 Q 8 5V 7 1 3A P R 11 1
8 2 P R 23 6
7 1 3A Power Plane 1 0 K _0 4
B.Schematic Diagrams
PR2 3 8 Power Plane 1 M_ 0 4 SU SB
S US B 3, 3 7 , 3 8
3
3. 3V _ E N 1
3
1M _ 04 D P C 10 3
3
P Q 64 B
5 V _E N 1 MT N N 20 N 03 Q 8 5G * 0. 1 u _ 16 V _ Y 5 V _ 0 4
6 , 2 0 , 2 9, 3 4 SU SB#
4
P Q 66 B P C 20 3 S P Q 27 B
4
M TN N 2 0 N 0 3 Q8 5 D D _ ON # L 2 N 7 0 02 D W 1T 1 G
P C 2 06 2 20 0 p _ 50 V _ X 7R _ 04
5 D D _ ON #
Sheet 35 of 49
6
22 0 0 p_ 5 0 V _X 7 R _ 0 4
1
6
P J1 1
5VS, 3VS, 3.3VM, *4 0 mi l
ON ON
2
ON
1.5VS CPU ON 1.05VS_VTT P Q 57 A
NMOS
5VS 3.3VS
NMOS
1. 0 5 V S
8
7
M TN N 2 0 N 0 3 Q8
2
1
1. 0 5 V S _ V T T
NMO S P Q6 3 A SYS1 5 V P Q 58 A
P Q 65 A S Y S 1 5V V D D3 MT N N 20 N 03 Q 8 3. 3 V S M TN N 2 0 N 0 3 Q8
10A
3
SYS1 5 V V DD 5 M TN N 2 0 N 0 3 Q8 5 VS 8 2 8 2
8 2 7 1 7 1
7 1 P R2 3 3 P C1 9 3 P C 1 91
PR2 3 7 P R 23 9 P C 20 7 P C2 0 8 P R2 3 2
10 u _ 6. 3V _ X 5 R _ 0 6
P R 1 10 1 M _0 4 *1 0 0_ 0 4
0 . 1 u_ 1 6 V _ Y 5V _0 4
3
3
1M _ 04 P C2 0 5 1 M_ 0 4 7 5 _ 04
0. 1 u _ 16 V _ Y 5 V _ 0 4
1 0 u_ 6 . 3 V _ X 5 R _ 06
3
1. 05 V S _ V T T _E N 1
5 V S _E N 1 0. 1u _ 1 6V _ Y 5V _ 0 4 3. 3V S _ E N 1
4
3 . 3V S _L O
P Q 65 B P C1 9 0
PC2 0 4 MT N N 2 0 N 0 3Q 8 P C 20 2
2 2 0 0 p_ 5 0 V _X 7 R _ 0 4
33 0 0 p_ 5 0 V _X 7 R _ 0 4 5 4 70 0 p _ 50 V _ X 7R _ 04
SU SB 3, 3 7 , 3 8
4
P Q6 3 B
D
1
4
M T N N 2 0 N 0 3 Q8 P Q 58 B P Q5 7 B
6
PJ 1 0 P Q 26 MT N N 2 0N 0 3Q 8 M TN N 2 0 N 0 3 Q8
5 S US B G
* 40 m i l 12/13 M TN 7 00 2 Z H S 3 5 5
S
2
12/13 ? BUG_18
6
6
? BUG_18 V D D3
ON
ON
1.5VS_CPU
1 .5 V 1 .5 V S _ CP U 1.5VS
R3 4 5
10 K _ 0 4
NMOS 15A
PJ 5 NM O S
P Q 24 1 . 0 5 V S _ V TT _ E N #
1 2 PJ7 MUST SHORT P 2 7 03 B A G 12/7 3 6 S Y S 3V
D
S Y S 1 5V 1 .5 V 6 1. 5 V S Q 28 4 2 VA
SYS1 5 V *OP E N - 8 m m 5 M TN 7 00 2 Z H S 3
P Q1 5 A
2 4 200mA 20 1 . 0 5V S _V T T _ E N
G 3 6 V IN1
3 1, 3 6 V D D 5
P R5 8 P R 10 8 1
2 4 1 .5 V S
S
*MT N N 2 0 N 0 3 Q8
3 , 6 1 . 5V S _C P U
PR5 9 8 2 *1 0 0 _0 4 1 M_ 0 4 P C 98 P C9 5 P R 1 09
7 1 11 , 3 6 , 3 7 S Y S 15 V
3
1 0 0 _0 4
D 1. 5 V S _ C P U _ L O
*1 M_ 0 4 1 .5 V S _ E N1 2 5, 2 8 , 2 9 , 31 , 3 7 , 38 , 4 1 5 V
1 0 u_ 6 . 3 V _ X 5 R _ 06
0. 1 u _ 16 V _ Y 5 V _ 0 4
1 8, 1 9 , 2 0 , 24 , 2 5 , 37 , 3 8 1 . 0 5 V S
P C1 8 6 P C1 8 8
11 , 3 6 , 37 , 3 8 , 3 9, 4 0 , 4 1, 42 V IN
1 . 5V S _L O
3 , 6 , 9 , 10 , 2 5 , 2 9, 3 3 , 3 7, 3 8 1 . 5 V
3
1 .5 V S _ CP U E N1 *0 . 1 u_ 1 6 V _ Y 5 V _ 04 *1 0 u_ 6 . 3 V _ X5 R _0 6 ON 1 1, 1 8 , 2 7 , 30 , 3 4 , 36 , 3 7 , 4 1, 4 2 V D D 3
1 1 , 18 , 2 4 , 2 5, 2 8 , 3 1, 3 2 , 3 3 , 39 , 4 0 5 V S
4
P Q1 5 B
2, 3 , 5 , 2 3 , 24 , 2 5 , 37 , 3 9 1 . 0 5 V S _ V TT
* MT N N 2 0N 0 3Q 8 P Q1 4 P C 93 2, 3 , 8 , 1 1 , 16 , 1 8 , 19 , 2 0 , 2 2, 2 3 , 2 4, 25 , 2 7 , 28 , 2 9 , 3 0, 3 7 , 3 8, 3 9 3 . 3 V
3
PC5 1 *M TN 7 00 2 Z H S 3 D D P Q2 5 A
5 S US B G 3, 9 , 1 0 , 1 1, 1 2 , 1 8, 19 , 2 0 , 21 , 2 2 , 2 3, 2 4 , 2 5, 2 7 , 2 8 , 30 , 3 1 , 32 , 3 3 , 3 4, 3 9 3 . 3 V S
2 20 0 p _ 50 V _ X 7R _ 04 L 2N 70 0 2 D W 1 T 1 G
*2 20 0 p _5 0 V _ X 7R _ 04 G5 S US B 2G
S
S S
6
P Q2 5 B
L2 N 70 0 2 D W 1 T 1G
ON ON
B - 36 5VS, 3VS, 3.3VM, 1.5VS CPU
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Schematic Diagrams
VDD3, VDD5
V R E F _ V DD
P R 93 * 0 _0 4 PR9 4 0_04 12 /17 PWR CHANGE
PC 7 5
1 u_ 1 0 V _ Y 5 V _ 0 6
VF B2 VFB 1
T ON S E L
PR 9 9 P R9 6
E N _ 3V E N _5 V
P C 82
1 0 0K _0 4 1 0 0 K_ 0 4 P C8 0
1 0 00 p _ 5 0V _ X 7 R _ 0 4 1 00 0 p _ 50 V _ X 7 R _ 0 4
6
PU 7
V RE G 3 ? ? ? ? ? ?
TO N SEL
VR EF
VF B2
VF B1
V IN
EN2
EN1
VI N 12/8 change
7 24
PC 8 4 PC1 9 5
to 0603 V O2 VO 1 12/8 ? ? ? BOM? ? ? ?
P C8 1 P R 10 0 * 10 K _ 0 4
4 . 7 u _ 25 V _ X 5 R _ 0 8 4. 7 u _ 2 5V _X 5 R _0 8 8 23 PO K P+C 9 9 P+C 1 0 0
SYS5 V
VDD3 1u _ 1 0V _Y 5 V _ 0 6 LD O3 PO K P C 19 8 PC1 9 9 P C 1 97
VDD5
* 1 5u _ 2 5 V _ 6. 3 * 4. 4
P Q 59 A P C8 3 P C8 5
* 15 u _ 2 5V _6 . 3 *4 . 4
1 2/17 PWR CHANGE
B OO T2 9 22 B O OT 1
2
1
P D 15 0 3 Y V S 0 . 1 u _ 50 V _ Y 5V _0 6 4. 7u _ 2 5 V _ X5 R _0 8 4 . 7 u _2 5 V _ X 5R _ 0 8
B OO T 2 B O OT 1
5
6
7
8
VDD 3 12/8 ? ? ? BOM? ? ? ? 8
0. 1u _ 1 0 V _ X7 R _0 4
U GA TE 2 10
uP6182 21
0 . 1 u _ 1 0V _ X 7 R _ 0 4
UG A T E 1 4
P Q6 2
SY S5 V V DD 5
ME 4 4 1 0 A D -G
SYS3 V PL 1 4 UG A T E 2 UG A T E1 P L 13
5A 5A 1
1
2
P J 26 T M P C 0 6 0 3H -4 R 7 M -Z 0 1 3 T MP C 0 6 03 H -4 R 7 M- Z 0 1 P J2 7
B.Schematic Diagrams
7
2 1 2 1 P HA S E 2 11 20 P HA S E 1 1 2 2
PHA S E 2 P HA S E1
Ra
P C7 8
*O P E N -5 m m P D2 3 P D2 4 *OP E N -5 m m
P R2 4 2
C
12 19
5
6
7
8
L G AT E2 L GA T E 1 PR 9 5
GN D P A D
LG A T E 2 L G AT E1
C
6
5
SK IPS EL
P D 26
P D 25
P Q5 9 B P Q6 1 P R2 4 3
P C2 0 0 P C 1 01 P R 91 PC 7 7 P D 1 5 0 3Y V S 4 3 0 K _ 1% _ 0 6
L DO 5
VCL K
G ND
+
EN0
1 00 0 p _ 50 V _ X 7 R _0 4
VIN
0 . 1 u _1 6 V _ Y 5V _ 0 4 M E 4 4 10 A D -G *5 . 1 _0 6
1
2
3
* 5. 1 _ 0 6
1 3K _1 % _ 0 6 3
2 2 0u _ 6 . 3 V _ 6 . 3* 6 . 3* 4 . 2
C S OD 1 40 S H
1 0 0p _ 5 0 V _ N P O _ 04
Sheet 36 of 49
PD 7 PD6
A
A
* SK3 4 SA
Rb
CS O D1 4 0 S H
*S K 3 4S A
13
25
15
16
17
18
A
A C C A
14
V R E G5 VR EG 5 +P C 1 0 2 P C 2 01
4
P R1 0 1 PR 8 9
EN _ AL L
VIN_ 6 1 8 2
2 2 0 u _6 . 3 V _ 6 . 3 *6 . 3 *4 . 2
P C2 1 2 0 . 1 u _1 6 V _ Y 5 V _ 0 4
P R 92 R B 0 5 40 S 2 R B 0 54 0 S 2 1 9 . 1 K _1 % _ 0 6
VDD3, VDD5
S KIP SE L
PC2 1 1
* 6 80 K _ 1 % _ 0 4
2 0K _1 % _ 0 4 12/17 PWRCHANGE PR 1 0 4 P R 10 3 M9 90 12 5 *2 2 0p _ 5 0 V _N P O _0 4
* 22 0 p _ 50 V _ N P O_ 0 4
P R1 0 2 P D 10
9/6 EMC DVT request VR EF _ VDD P R 10 7 0_ 0 4 *0 _ 04 0_04 *0 _ 0 4 1 2/17 PWR CHANGEB A T 54 S W A G H
P R1 0 6 P C9 1 1
V R E G5 P R 10 5 *0 _ 04 2. 2 _ 0 6 3 C SY S5 V 12/22
A 2 EMI? ? ,? noise? ?
12/22 0 . 0 1 u_ 5 0 V _ X7 R _ 04
S Y S 1 0V
EMI? ? ,? noise? ? V IN1 V R E G5
P C9 4
PD 9
PC 9 2 P C 90
C A PD 8 2 2 0 0 p_ 5 0 V _ X7 R _ 04
VI N
4 . 7 u _2 5 V _ X 5 R _ 0 8 1 u _1 0 V _ Y 5 V _ 0 6 B A T 54 S W G H
P C8 8 A 1
R B 0 5 4 0S 2 3 C
A 2
S YS1 5 V
0 . 0 1 u _ 50 V _ X 7 R _ 0 4
P C8 9
2 2 0 0 p_ 5 0 V _ X7 R _ 04
VR EG 5
EN_ 3 V 5 V P R 86 * 0_ 0 4 E N_ 3 V
P R 88
R1 8 6 E N_ 5 V
1 0 K _0 4 * 10 m i l _s h o rt _ 04
3
D
P Q 19 B
D D _O N _ E N _ V D D 5G L 2 N7 0 0 2 DW 1 T 1 G
S
D
4
1
P Q1 8 PR 8 7
G PJ 8 P C 73
3 1, 3 4 , 3 5 D D_ O N
MT N 7 0 0 2 Z H S 3 *4 0 m i l
S
0 . 1 u_ 1 6 V _ Y 5 V _ 0 4 1 00 K _ 0 4
6
2G
42 AC _ IN
S P Q1 9 A
1
L 2N 7 00 2 D W 1 T1 G
Support Intel V-Pro Function 3 5 SY S3 V
35 VIN 1
31 , 3 5 V D D 5
1 1 , 3 5 , 37 S Y S 15 V
1 1, 3 5 , 3 7 , 3 8, 3 9 , 4 0 , 4 1, 4 2 V IN
1 1, 18 , 2 7 , 3 0, 34 , 3 5 , 3 7 , 41 , 4 2 V D D 3
VDD3, VDD5 B - 37
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Schematic Diagrams
Power 0.85VS, 1.8VS, PEX VDD
NM O S PEX_VDD ? ? ? ? PIN6?
SYS1 5 V 1 .0 5 V S P E X _V D D
P Q 4A 1.05V@4A 5V
1.8VS
MT N N 2 0 N 0 3 Q8 3 .3 V
8 2 250 MIL P C6 1
P R1 3 7 1
PC1 9 P C1 8 2A PU 4 2 . 2u _ 6 . 3 V _Y 5 V _ 06 V 1 .8
1M _ 04 PR 1 4 P R 67 1 0K _ 0 4 5 6 1 .8 V S
1 .0 5 V _ P W R_ E N 0 . 1u _ 1 6 V _Y 5 V _ 04 1 0u _ 6 . 3V _X 5 R _ 0 6 1 0 0 _0 4
3 .3 V 9 V IN
V IN
V C NT L 2A PJ 6
3
1. 8V S _P W R G D R1 7 6 *1 0 m li _ s ho rt _ 0 4 P O K _ 6 61 0 7 4 1 2
20 1 .8 V S _ P W RG D P OK V OU T
3
4
P Q4 B *O P E N - 3m m
D
P C2 0 MT N N 2 0 N 0 3 Q8 PQ 5 P R 68 1 0 K_ 0 4 E N 1 . 8V S 1 8 V OU T
5V EN
M TN 7 00 2 Z H S 3 P C5 8 PC5 7 P C5 9
68 0 0 p_ 5 0 V _ X7 R _0 4 5 dG P U _P W R _ E N # G PC 6 6 1 2 V F B _ 6 61 0 P R 7 3 1 . 3 K _1 % _ 0 4
GN D VFB
*1 0 u _6 . 3 V _ X 5 R _ 0 6
P Q 16
10 u _ 6. 3V _ X 5 R _0 6
0 . 1u _ 1 6V _Y 5 V _ 0 4
S
MT N 70 0 2 Z H S 3 * 1 u_ 6 . 3 V _ Y 5 V _ 04
1 M _0 4 E N 1 . 8 V S G
6
P R 77 GS71 13 PC 6 5 8 2 p _ 50 V _ N P O_ 0 4
3 , 35 , 3 8 SU SB
S
P C5 5 PC 5 6
P C 67
0 . 1 u _ 16 V _ Y 5 V _ 0 4 1 0 u _6 . 3 V _ X 5R _ 06
2 2 00 p _ 50 V _ X 7 R _ 0 4 P R7 2
NM O S ON
6-02-06615-320 1K _1 % _ 04
1. 5 V P Q8 A
MT N N 2 0N 0 3Q 8 6-02-07113-320 Vout= 0.8*(PR73+PR72)/PR72=1.84V
8 2 12/14
7 1
? ? FBVDDQ
B.Schematic Diagrams
S Y S 1 5V
P Q7 A
F B V DD Q
MT N N 2 0 N 0 3 Q8 1.5V@6A
3
P R 45 8 2 12/20
7 1 F B V D DQ 240MIL ? ?
1 M_ 0 4
PC 5 0 P C4 3
Sheet 37 of 49 PR 5 1
3
F B V D D Q _P W R _ E N 0 . 1 u _1 6 V _ Y 5 V _ 0 4 1 0u _ 6 . 3V _X 5 R _ 0 6
1 0 0 _0 4 V IN
P R 1 72 P R 17 1
Power 0.85VS, S S _ 0 .8 5 V S 3 .3 V 0 . 8 5V S _P W R G D 20
4
9 . 3 1 K _1 % _ 0 4 9 . 3 1K _1 % _ 04
PQ 8 B
4 . 7 u _ 25 V _ X 5 R _ 0 8
M TN N 2 0 N 0 3 Q8
0 . 1 u _5 0 V _ Y 5 V _ 06
4 . 7u _ 2 5 V _X 5R _ 08
0 . 1 u_ 5 0 V _ Y 5 V _0 6
5 P R1 6 7 5V
1.8VS, PEX VDD P C 1 50
4
P C 44 P R 1 74 P R 17 3 0 _0 4
0 . 0 2 2u _ 1 6V _X 7 R _0 4
D
6
PQ 9 1 2 K _ 1% _ 0 4 1 0 K _ 1% _ 0 4
A
6 8 00 p _ 50 V _ X 7 R _ 0 4 M TN 7 00 2 Z H S 3 P R1 6 9
5 P S _ N V V D D _ P GO OD # G 10 K _ 0 4 P D1 9
P R1 7 0
S
P S _N V V D D _ P GO OD # 41 R B 0 54 0 S 2
6
P C1 4 4
P R 1 76 P R 17 5 1 00 _ 0 4
P C 1 53
PC1 4 5
P C 15 4
C
P Q7 B 9 . 1 K _ 1% _ 0 4 1 0 . 7K _1 % _ 04
MT N N 2 0 N 0 3 Q8 E A P _ 0 . 8 5V S
B OO T _0 . 8 5 V S
1
2
P R 1 79 P R 17 8
P C 15 5
P C 1 49
8
P Q4 4 A
P D 1 5 0 3Y V S
0.85VS
5
4
3
2
1
1 u _ 6. 3 V _ Y 5 V _ 0 4
1 5 K _ 1% _ 0 4 1 0 K _ 1% _ 0 4 PU 1 0
NM O S ON 0 . 1 u _1 0 V _ X 7R _ 04
U G
B OO T
EAP
SS
P OK
P Q3 5 PL 1 0 V 0 .8 5 PJ 2 0 0 .8 5 V S
6A
7
SYS1 5 V 3. 3 V P 2 70 3 B A G 3 V 3 _ RU N 21 T MP C 06 0 3 H -1 R 0M -Z 0 1 * OP E N -5 m m
6 S E T 3_ 0 . 8 5 V S 6 GN D 20 P H A S E _ 0. 8 5 V S 1 2 1 2
5 S E T 2_ 0 . 8 5 V S 7 SET3 PH ASE 19 L G_ 0 . 8 5V S
2
1
4 1A P R 19 0 S E T 1_ 0 . 8 5 V S 8
S E T 0_ 0 . 8 5 V S 9
SET2
SET1
LG
VC C
18
17 R T _0 . 8 5 V S
P R1 4 7 1 K _ 1% _ 0 4 +P C 1 68 P C1 6 6
P C6 F B _ 0. 85 V S 10 SET0 RT 16
E N /P S M
FB C SP
C OM P
1M _ 04 P R 1 48 PR 1 8 7 P R 1 85
C S P _0 . 8 5 V S
V ID 0
3
V ID1
5
6
5 6 0 u_ 2 . 5 V _ 6 . 6* 6 . 6* 5 . 9
CS N
4 . 7u _ 6 . 3 V _X 5 R _ 0 6 1 0 0 _0 4 0_04 0 _ 04
0 . 1u _ 1 6 V _Y 5V _ 0 4
d GP U _P W R _ E N
P R 19 2 P C1 6 4 uP 61 2 2
3
12
13
14
15
P Q 36 A 2 2 _0 4 0 . 01 u _ 50 V _ X 7 R _ 0 4
11
C O MP _ 0 . 8 5V S
6
P C1 2 4 D L 2 N 7 0 02 D W 1 T1 G D P Q3 6 B PR 1 8 4
1
L 2N 7 00 2 D W 1T 1 G C S N _ 0. 85 V S P Q 44 B P J 19 P R 19 6
4
22 0 0 p_ 5 0 V _ X7 R _0 4 G2 d GP U _ P W R _ E N # 5G 3 .3 V P R 1 77 P D 15 0 3 Y V S 1 2 K _ 1 %_ 0 4
S S P C1 6 2 P C1 6 3 3 3 K _ 1% _ 0 4 *4 0 m li
0. 85 V _ ON
P C1 5 9
1
P R 18 8 1 0 _0 4
d GP U _P W R _ E N # 34
2
*0 _ 04 4 7p _ 5 0 V _N P O_ 0 4
0 . 01 u _ 5 0V _ X 7 R _0 4
P R 18 9
1 00 K _ 0 4 P C 1 58
0 . 1u _ 2 5 V _X 7 R _ 0 6
P R 19 1 PJ 1 7 * 0. 1u _ 1 0V _ X 5 R _ 0 4
1 0 0K _ 1 % _ 04 2 1 CS P _ 0 .8 5 V S
5V
ON * 40 m i l C S N _ 0. 8 5 V S
V C C S A _V I D 0 PJ 1 6
6 V CC S A _ V ID0
V C C S A _V I D 1 2 1 P R 18 6
VD D3 6 V CC S A _ V ID1
P R1 9 5 1 . 3 K _1 % _ 0 4
* 40 m i l P R 19 3 0_04
10 0 K _ 0 4 V CC S A _ S E NS E 6
P R 1 94 0.9 V 0 .8 V 0. 72 5V 0 .6 75 V
1 0 K_ 0 4
0 . 8 5 V _ ON V CC SA _V ID 0 0 0 1 1
P Q4 6
D
M TN 7 00 2 Z H S 3 V CC SA _V ID 1 0 1 0 1 1 2 , 16 , 4 1 3 V 3 _ R U N
2, 3 , 5 , 2 3 , 2 4, 2 5 , 3 5, 39 1. 0 5 V S _ V T T
G P C1 6 1 SET0 SET2 SET1 SET3 3, 6 , 9 , 1 0 , 2 5, 2 9 , 3 3 , 35 , 3 8 1 . 5 V
S
*1 u _ 6. 3 V _ X 5 R _ 0 4 V CC S A _ V ID0 R 4 27 1 0 K _ 04 1 1, 18 , 2 7 , 3 0, 3 4 , 3 5, 36 , 4 1 , 4 2 V D D 3
6 0 . 85 V S
C
P R 1 97 1 0K _0 4
B P J 18 6 , 2 3, 2 4 1. 8 V S
1 .0 5 V S _ V T T 11 , 3 5 , 3 6 S Y S 15 V
R 4 23 *1 0 K _ 0 4
V CC S A _ V ID1 1 . 0 5V S _V TT 1 2 , 13 P E X _ V DD
P Q 48 *4 0 m li R 4 24 1 0 K _ 04 1 3, 1 4 , 1 5 F B V D D Q
E
B T N 3 9 0 4N 3
25 , 2 8 , 2 9, 3 1 , 3 5 , 38 , 4 1 5 V
11 , 3 5 , 3 6, 3 8 , 3 9 , 40 , 4 1 , 4 2 V I N
1 8 , 19 , 2 0 , 2 4, 2 5 , 3 5 , 38 1 . 05 V S
2, 3 , 8 , 1 1 , 16 , 1 8 , 1 9, 20 , 2 2 , 2 3, 2 4 , 2 5, 27 , 2 8 , 2 9, 3 0 , 3 5 , 38 , 3 9 3 . 3 V
B - 38 Power 0.85VS, 1.8VS, PEX VDD
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Schematic Diagrams
POWER 1.5V/1.05VS/0.75V
PD 3 V IN
A C P C7 6 P C7 4 PC 1 9 4 P C 19 6
5V
5
6
7
8
P Q2 3
4 . 7 u _ 2 5V _ X 5 R _ 0 8
M E 4 8 9 4- G
4. 7u _ 2 5 V _ X 5 R _ 0 8
0 . 1 u _ 50 V _ Y 5 V _0 6
0 . 1 u_ 5 0 V _ Y 5 V _ 0 6
R B 05 4 0 S 2 4
PU 5
V D DQ
VTT_MEM
2
3
1
P C6 9
1 0 u _ 6 . 3 V _ X5 R _ 0 6
23
V L D OI N VB ST
22 V BST P C1 9 2 0 . 1 u _ 1 0 V _ X 7R _ 0 4 12/21 PWR CHANGE
VD D Q
1.5V
PJ 7 PL 1
VTT_ M EM
2 1 VTT 24
VTT DR V H
21 D RV H PR 8 3
TM P C 1 00 4 H -R 5 6 M -Z 0 1
1 2
15A 1
PJ 9
2
3 .3 _ 0 6 1 .5 V
*O P E N -2 mm
P R 84 1 20 LL P C 79 *O P E N -8 m m
P C7 2 PC 7 1 P C7 0 0 _0 6 V T T G ND LL
P R8 2 *1 0 0 0 p_ 5 0 V _ X 7 R _ 0 4 PC 9 6 PC 9 7
C
10 u _ 6 . 3 V _ X 5 R _ 0 6 1 0 u _ 6. 3 V _X 5 R _0 6 *1 0 u _6 . 3 V _ X 5 R _0 6 VTTSN S 2 19 D RV L P D4 PD 5
VTTSN S D R VL + P C8 6
1 2/17 PWRCHANGE
0_06
5 6 0u _ 2 . 5 V _ 6 . 6 *6 . 6 * 5. 9
0 . 1u _ 1 6 V _ Y 5 V _ 0 4
0 .1 u _ 1 6 V _ Y 5 V _ 0 4
3 18
5
6
7
8
5
6
7
8
PQ 2 1
G ND P GN D 17
C S OD 1 4 0 S H
* SK3 4 SA
VD D Q P R 76 0 _ 04 PR 7 5 0 _0 6 M E 4 62 6 -G
A
C S _ GN D 5V 4 4
P R 74 *0 _ 0 4 MO D E 4 16 C S PR 7 1 1 0 K _ 1 % _0 6 P R 90
5V M OD E CS
2
3
1
2
3
1
P R 70 *0 _ 0 4 15 P Q2 2 *5 . 1 _ 0 6
P C6 4 V T TR E F 5 P V CC 5 14 PR 6 9 2 .2 _ 0 6 *M E 4 62 6 -G
VTTR EF V CC 5
0 . 1 u _ 1 0 V _ X7 R _ 0 4
PR 6 2 0_06 C OM P _ V D D 6 13 P C 63 PC 6 0 12 /21 PWR CHANGE
5V C OM P P G OO D 3 .3 V
B.Schematic Diagrams
1 u _ 6 . 3V _ Y 5 V _ 04
1u _ 6 . 3 V _ Y 5 V _ 0 4
PR 5 4 *2 2 _ 0 4 V D DQ S N S 8 11 S5 _ 6 1 6 3
V T T _ ME M V D DQ S N S S5
P C6 2 PR 2 3 1
PR 6 3
D
*1 0 0 0p _ 5 0 V _ X 7R _ 0 4 P R 66 9 10 1 0 0 K _ 04 0_06
V D DQ S E T S3
PQ 1 0 *1 0 _ 0 4 V D D QS E T
SU SB G
G ND
3 ,3 5 ,3 7 S US B * MT N 70 0 2 Z H S 3 D D R1 .5 V _ P W RG D
Sheet 38 of 49
N C
NC
DD R1 .5 V _ P W RG D 20
S
PC 5 4
u P6 1 6 3
7
25
*1 0 0 0 p _5 0 V _ X 7 R _ 0 4
12
POWER 1.5V/
PR 6 5 *1 0 K _ 1 % _ 04 P R 23 0 1 0 .7 K _ 1 % _ 0 4
5V
PR 6 1 1 0K _1 % _ 0 4
5V PR 6 0 4 7 K _ 04 R1
Vo u t=( R1/ R2+ 1)*0.75
1.05VS/0.75V
D
6
R2 P Q 11 A D P Q1 3 P C5 2
P R6 4 1 0 0 K_ 0 4 L 2 N 7 0 0 2 D W 1T 1 G *M T N 7 0 0 2 Z H S 3
5V 2G G
PR 5 5 1 0 0K _0 4 0 .1 u _ 1 6 V _ Y 5 V _ 0 4
P R5 6 * 1 00 K _ 0 4 VTTEN S
3 1 .5 V S _ CP U_ P W RG D
1
D
S
PJ 4
3
P C5 3
D
5G P Q 1 1B *4 0 m i l
2 0 ,3 4 S US C#
P Q1 2 0. 1 u _ 1 6 V _ Y 5 V _ 0 4 S L 2 N7 0 0 2 DW 1 T 1 G
3 1, 3 5 D D _ ON #
4
S US B G
MT N 70 0 2 Z H S 3
S
5V
VI N
A
5V
12/8 P D2 0
P R2 0 4
1. 05 V _ O N R B0 5 4 0 S2 P C1 7 7 P C1 7 5 PC 1 7 4 P C 17 6 P C1 4 6
+
PR 2 0 3 5 . 1 K _ 1 % _0 4
1 0 0K _0 4
D
4 .7 u _ 2 5 V _ X 5 R_ 0 8
4 . 7 u _ 25 V _ X 5R _ 0 8
0. 1u _ 5 0 V _ Y 5 V _ 0 6
0 . 1 u_ 5 0 V _ Y 5 V _ 0 6
*1 5 u _2 5 V _ 6 . 3 *4 . 4
PQ 6 7
G
5
6
7
8
SU SB P Q 53
M T N7 0 0 2 Z H S 3 ME 48 9 4 -G
1.05VS
S
PC 1 7 3 4
2
3
1
IL IM
* 0. 1u _ 1 6 V _ Y 5 V _ 0 4
DH
P C1 7 2
V 1 .0 5 1 .0 5 V S
0 . 1 u _ 1 0 V _ X 7R _ 0 4 PL 1 2 P J 25
13
14
15
16
P U1 1 T M P C 1 0 0 4 H -1 R 0 M-Z 01
P R2 0 2 1 0 K_ 0 4 LX 1 2 1 2 15A
N .C
D H
3 .3 V
IL IM
N.C
12 1
EN LX
*O P E N -8 m m
1 . 0 5 V S _ P W R GD 11 2 BST
20 1. 05 V S _ P W R GD P GD BST P C 1 84 P C 18 9 PC 1 8 7
+ +
C
P K 3 90 6 10 3
5
6
7
8
5
6
7
8
P Q5 1 P Q5 2
V OU T V CC
5 6 0 u _ 2. 5V _6 . 6 * 6 . 6 *5 . 9
ME 4 6 2 6 -G *M E 4 6 26 -G PD 2 2
*5 6 0 u _2 . 5 V _ 6 . 6 * 6. 6 * 5 . 9
12/17 PWR CHANGE
0 . 1 u _ 16 V _Y 5V _0 4
9 4 DL 4 4
FB DL
S K 34 S A
G N D
R TN
2
3
1
2
3
1
N .C
17
N.C
PAD
UP 6 1 2 7 ? ? ? ? PIN3?
8
P C 17 0
R TN 1 u_ 6 . 3 V _ Y 5 V _ 04
V C C P _ S E N S E _6 1 2 7
P R2 0 0 P R1 9 9 PC 1 6 9
R1
0_ 0 4 4. 0 2 K _ 1 % _ 0 4 *1 5 p _ 5 0 V _ N P O _ 0 4
PR 2 0 1 * 90 . 9 K _ 0 4 F B _ 1 . 0 5 V S _ 6 1 27
5V
9 ,1 0 V T T _M E M
Vo ut =( R1/R2+1 )*0.75 1 3 ,1 4 ,1 5 ,3 7 F B V DD Q
P C1 7 1 P C1 6 7 R2 P R1 9 8
2 5 , 2 8, 2 9 , 3 1 , 3 5 , 3 7 , 41 5V
1 1 , 3 5 , 3 6 , 3 7 , 39 , 4 0 , 4 1 , 4 2 V I N
0. 0 1 u _ 1 6 V _ X7 R _ 0 4 * 2 0 p_ 5 0 V _ N P O_ 0 4 9. 3 1 K _ 1 % _ 0 4
1 8 , 1 9 , 2 0, 24 , 2 5 , 3 5 , 3 7 1 . 0 5 V S
3 , 6 , 9 , 1 0 , 2 5 , 29 , 3 3 , 3 5 , 3 7 1 . 5 V
POWER 1.5V/1.05VS/0.75V B - 39
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Schematic Diagrams
POWER VCORE1
P C1 8 0 6 80 p _5 0 V _ X 7R _0 4
1.05 VS_VTT
P R 21 2 P R 2 09
VCORE_1 CLOSE TO VR
TR BST
1 0 _0 4 1. 2 k _1 % _ 04
B~ 43 50
PR1 2 P R3 7 P R 21 0 P C 17 8
PUT COLSE
PRT 2 12/17 PWRCHANGE
12/1 ? ? 2 4 . 9K _ 1 % _0 4 TO VCORE
13 0 _ 1% _ 0 4 5 4 . 9 _1 % _ 04 3 3 00 p _ 50 V _ X 7R _0 4 1 2
A_G ND Phase 1
5 H_ CP U _ S V IDD A T H_ CP U _ S V IDD A T 1 0 0K _ N TC _0 6 _ B Inductor
5 H _ C P U _ S V I D A L R T# H _ C P U _S V I D A L R T # P C3 0 10 0 p_ 5 0 V _N P O_ 0 4 P C2 9 22 p _5 0 V _ N P O _0 4
Qua d 45 W CPU
DIFFO UT
5 H _ C P U _ S V I D C LK H_ C PU_ SV IDC L K P R3 3 1 0 0_ 0 4 12 /17 PWRCHANGE P R2 3 10 0 K _ 1% _ 0 6
FB
CSP 1 40
PR 2 6 P C2 7 33 0 0p _ 5 0V _ X 7 R _ 0 4 P R 18 7 5K _1 % _ 04 VID1 =0 .9 V
P R2 9 1 K_ 0 4 4 . 02 K _ 1 %_ 0 4 PR 1 7
TSEN SE 1 6 5K _1 % _0 6 Icc M ax = 94 A
P R1 8 2 10 0 _ 04 P R2 5 2 0K _1 % _ 04 P C2 3 2 2 0 0p _ 5 0V _ X 7 R _ 0 4
P R1 9 10 0 K _ 1% _ 0 6
CSP 3 40 R_LL=1 .9 m ohm
OCP~ 1 20A
P R 30 0_04 V S S _ S E N S E _6 1 3 1 P C2 4 1 0 0 p_ 5 0 V _X 7 R _ 0 4
5 V C OR E _ V S S _ S E N S E
C OM P_CPU
T RBS T
PC3 6 C SSUM
P R 16 8
PR T1
P C 32
P R2 0 8 1 0_ 0 4
CSN 1 40
0 . 1u _ 1 0V _ X 7 R _ 0 4
1 0 00 p _ 50 V _ X 7R _ 04
CSC OM P
P R 35 0_04 VR1 _CSR EF
B~ 39 64 5 V C OR E _ V C C _ S E N S E
I M ON
1 0 0K _ N T C _ 0 6_ B
P R1 8 3 10 0 _ 04 P R 49 *1 5 m li _ s ho rt _ 0 6 P R2 0 1 0_ 0 4
9 3 . 1K _1 % _ 06
5 , 40 VCO RE
2
CSN 3 40 C SN3 40
V C C _ S E N S E _ 6 1 31
P R 21 7 0 _0 4 PC2 5
3.3VS
A_ GN D 1 00 0 p _5 0 V _ X7 R _ 0 4 PC 2 6 0 . 0 47 u _ 10 V _ X 7R _ 04
P R 21 6 *0 _ 04
3.3V
B.Schematic Diagrams
53
52
50
48
46
44
43
42
41
40
51
49
47
45
A_GN D P U3 PR2 2 5. 4 9 K _ 1% _ 0 4
A_ GN D A_GN D CS P 3 40
6-13-93121-28B
F B
CO M P
D R OO P
C S C O MP
D I F F OU T
T RB ST
IO UT
CS R E F
N C2
NC 1
IL IM
CS S U M
EPAD
VSN
PUT COLSE PR 4 2 P R3 9 5VS C SN1
PR2 1 0_04 C SN1 40
TO VCORE 1 0 K _ 04 10 K _ 0 4 1 39 C S N 2 _5 V S
TSEN SE 2 VSP CS N2 38 PC 2 8 0 . 0 47 u _ 10 V _ X 7R _ 04
HOT SPOT P R2 1 8 0 _0 4 3 TSEN SE
N C P 6 1 31 S
CS P 2 37 CS N 3
3 H _ P R O C H OT # H _C PU_ SVID DAT 4 V R H O T# CS N3 36 CS P P3
Sheet 39 of 49 20 D E L A Y _P W R GD
H _C PU_ SVID CLK
H _C PU_ SVID ALR T#
VR _R DY
5
6
7
SD IO
SC L K
A L E R T#
CS P 3
CS N1
CS P 1
35
34
33
CSN 1
CS P P1
D R ON
PR 2 4 5. 4 9 K _ 1% _ 0 4
CS P 1 40
VR _R DY A 8 V R _ RDY D RO N 32 D R ON 40
POWER VCORE1 5VS P R2 2 6 2 . 2 _0 6 12/1 PR222 del
A_GN D
V R _O N
P R4 3
6131 _ VCC
1 0 K _ 04
9
10
11
V R _ RDY A
EN ABL E
VC C
P W M1 / A D D R
P W M 3/ V B OOT
P W M2 / I S H E D
31
30
29
P W M 2_ 6 1 31
I MA X_ 6 1 31 P R3 1 0 _0 4
5VS
V R 1_ P W M 3 40
P R 2 11
V R 1 _ P W M1 40
TSEN SEA VIN P R 2 2 4 VRM P _ V IN 12 R OS C I MA X 28 VR 1_ PWM A P R2 1 3
D IF F O UT A
V R MP P W M A / I MA X A V R 1 _P W MA 40
C S C OM P A
T S E NS E A 13 27 P R3 4 1 0 K _ 04
D R O OP A
CSS U M A
5VS
T RB S T A
TSEN SEA V B OOT A
C OM P A
1 K _1 % _ 04 * 10 K _ 0 4 10 K _ 0 4
IO UT A
VSN A
C SPA
CSN A
VSPA
I L I MA
P C4 0 PR2 8 P R2 7
F BA
P R 22 3 PC4 5 P R2 1 4
1 u _6 . 3 V _ X5 R _0 4 PR 3 2 1 1 3K _1 % _ 04 10 K _ 0 4 76 . 8 K _ 1% _ 0 4
2
PC4 7 *1 4 K _ 1% _ 0 4 0 . 01 u _ 50 V _ X 7R _0 4 1 8. 7 K _ 1 %_ 0 4 P R2 1 5
PR T 4
14
16
18
20
22
23
24
25
26
P J2 3
15
17
19
21
2 1
OPTION:
11 3 K _ 1% _ 0 4
1
DISALBE *O P E N -1 m m
0 . 1u _ 1 0V _ X 7 R _ 0 4
P R 22 9
V S N A _ 6 13 1
V S P A _ 6 1 31
1
PJ 2 *OP E N -1 m m
B~ 39 64 A _G ND A_ GN D V_GT ICC_ M AX_2 1h A_GN D A_G ND
A_ G ND
IM ON A
= R*1 0uA*25 6A/ 2V
1 0 0K _ N T C _ 0 6_ B
A_ G ND
2
PC3 3 2 2 0 0p _ 50 V _ X 7R _ 04 A_ GND
A_ GN D CSN A
8 . 2 5K _1 % _ 04
IM ON A I M ON CSPPA P C3 5
P R 22 1 0 . 0 4 7u _ 10 V _ X 7 R _ 04 C S NA 40
CSSU MA
C SPA 40
PR4 1 PC 3 8 P R 20 7 PC1 7 9 CSCO MPA P C 37 4 70 p _ 50 V _ X 7R _0 4 6 4 . 9K _ 1 % _0 6 P R3 6
4 . 87 K _ 1 %_ 0 6 C SPA 40
24 . 9 K _ 1% _ 0 4 2 2 K _1 % _ 04 0 . 1 u _1 0 V _ X5 R _0 4 P R4 0
A_ GN D 0 . 1 u _1 0 V _ X5 R _0 4 13 . 7 K _ 1% _ 0 4
PUT COLSE COM PA P C 39 1 00 0 p _5 0 V _ X7 R _ 0 4 12/17 PWR CHANGE
TO V_GT DIFFO UTA
A_GND A _G ND A_ GN D A_G ND PR3 8 P R 2 19
HOT SPOT P R 44 1 0 _ 1% _ 0 4 7 5K _ 1 % _0 4 16 5 K _ 1% _ 0 6
P R 1 80 10 0 _ 04 PC4 2 6 8 p_ 5 0 V _N P O_ 0 4
P RT 3
P R4 6 1 2 Q ua d VC CAXG
P R5 2 0 _ 0 4 1 K _ 04 VI D1= 1. 15 V
6 V S S _ GT _ S E N S E FBA P C4 6 10 0 K _ N T C _ 0 6_ B B~ 43 50 I ccM a x = 26A
P C4 8
P R4 8 0 _ 0 4 10 0 0 p_ 5 0 V _X 7 R _ 0 4
1 0 0 p_ 5 0 V _N P O_ 0 4 R_ LL= 3. 9m ohm
6 V C C _ GT _S E N S E P C4 9 PUT COLSE O CP~ 31 A
PR4 7 3 . 0 1K _1 % _0 4 3 3 0 0p _ 5 0V _ X 7 R _ 0 4
P R 1 81 10 0 _ 04 TO V_GT
40 V _G T Inductor
3. 3 V S
1 0 K _0 4
P R 50
1
12/7 PJ 3
* 40 m i l
2
PR5 3 * 1 5m i _l s h ort _ 0 6
V R _ ON
1 1, 2 0 , 3 4 A L L_ S Y S _P W R G D
1 1, 35 , 3 6 , 37 , 3 8 , 40 , 4 1 , 42 V IN
2, 3 , 8 , 1 1, 1 6 , 1 8, 1 9 , 2 0, 2 2 , 2 3, 24 , 2 5, 27 , 2 8 , 29 , 3 0 , 35 , 3 7 , 38 3. 3 V
2, 3, 5 , 2 3 , 24 , 2 5 , 35 , 3 7 1 . 0 5V S _ V T T
1 1, 35 , 3 6 , 37 , 3 8 , 40 , 4 1 , 42 V IN
1 1, 18 , 2 4, 25 , 2 8 , 31 , 3 2 , 33 , 3 5 , 40 5V S
3 , 9, 1 0 , 1 1, 1 2 , 1 8, 1 9 , 2 0, 2 1 , 2 2, 2 3 , 2 4, 25 , 2 7, 28 , 3 0 , 31 , 3 2 , 33 , 3 4 , 35 3. 3 V S
B - 40 POWER VCORE1
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Schematic Diagrams
POWER VCORE2
V IN
VCORE_2 P C 1 34 P C1 4 8 P C1 6 5
+
P C 1 31
* 4 . 7u _ 2 5V _ X 5 R _ 0 8
* 33 0 u _C A R 3 1 5 L
*4 . 7 u _2 5 V _ X 5 R _ 08
0 . 1 u _5 0 V _ Y 5 V _0 6
P R 15 2 . 2 _ 06 P C2 2 0 . 22 u _ 10 V _ X 7R _ 06 P Q4 5 P Q 47
MD U 2 6 57 M DU2 6 5 7
D
PU 2 N CP 5 9 1 1 G G
S
1 8 V R E G _S W 1_ H G P L8 V C OR E
BST HG T M P B 1 23 5 MP -R 3 6M -Z 0 1
2 7 V R E G _S W 1_ O U T 1 2
39 V R 1_ P W M 1 P WM SW P Q4 9 P Q5 0 PQ 6
C
39 D R ON P R 16 3 G ND 6 MD U 2 6 54 MD U 2 65 4 M DU2 6 5 4 P D2
D
4 9 . 9_ 1 % _0 4 EN 1 2
4 5 V R E G _S W 1_ L G
5 VS V CC LG G G G PL 9
PAD
S K 34 S A
*T M P C 1 0 04 H -R 3 6 M-Z 0 1 P R 9 *1 5 m il _ sh o rt _ 0 6 C SN1 39
S
P C 21 9
1 u_ 6 . 3 V _ X 5R _ 04
PR 1 0 *1 5 m il _ sh o rt _ 0 6 CS P 1 39
P +C 1 4 0 P C1 3 9 P C1 4 3 P C1 6 0
4 . 7 u _2 5 V _ X 5 R _ 0 8
4 . 7 u _2 5 V _ X 5 R _ 0 8
1 5u _ 2 5V _6 . 3 *4 . 4
0 . 1 u _5 0 V _ Y 5 V _0 6
V IN
PR 6 2 . 2 _ 06 P C1 6 0 . 22 u _ 10 V _ X 7R _ 06
B.Schematic Diagrams
P Q4 0 P Q 41
MD U 2 6 57 M DU2 6 5 7
D
PU 1 N CP 5 9 1 1 G G
S
1 8 V R E G_ S W 3 _ H G P L6 V C OR E
BST HG T M P B 1 23 5 MP -R 3 6M -Z 0 1
39 V R 1_ P W M 3
P R5 3
P WM
2
SW
7 V R E G_ S W 3 _ OU T
P Q4 2
MD U 2 6 54
P Q3
MD U 2 65 4
P Q 43
M DU2 6 5 4
1 2
Sheet 40 of 49
39 D R ON G ND 6
D
49 . 9 _ 1% _ 0 4 E N
5V S
4
V CC
PAD
LG
5 V R E G_ S W 3 _ LG
G G G
PD 1
PL 7
1
PR 8
2
*1 5 m il _ sh o rt _ 0 6
POWER VCORE2
CS N 3 39
S
SK3 4 SA
P C1 5 9 *T M P C 1 0 04 H -R 3 6 M-Z 0 1
A
1u _ 6. 3V _ X 5 R _ 0 4
PR 7 *1 5 m il _ sh o rt _ 0 6
CS P 3 39
12/23
V IN
P C1 8 5 P C2 1 8 P C3 1 P C3 4 PC1 5 7
VGFX_CORE
* 4. 7 u _ 25 V _ X 5 R _ 0 8
* 4. 7 u _ 25 V _ X 5 R _ 0 8
4 . 7 u_ 2 5 V _ X 5R _ 08
4 . 7 u_ 2 5 V _X 5R _ 08
0 . 1 u_ 5 0 V _Y 5V _ 0 6
P R 22 8 2 .2 _ 0 6 P C 1 81 0 . 22 u _ 10 V _ X 7 R _ 06 P Q5 6
MD U 2 6 57
D
PR1 1 * 15 m i l_ s h ort _ 0 6
V _ GT 39
G
P U 1 2 N CP 5 9 1 1
S
1 8 VR EG_ SWA_ HG P L1 1 V G F X _C OR E
BST HG TM P C 1 0 0 4H -R 3 6 M-Z 0 1
2 7 VR EG_ SWA 1 2 V GFX_ CO RE
39 V R 1_ P W M A P WM SW P Q5 5 P Q 54
P R 22 7 3 6 MD U 2 6 54 * MD U 2 65 4
D
39 D R ON 49 . 9 _ 1% _ 0 4 E N G ND P D 21
4 5 VR EG_ SWA_ L G
5 VS V CC LG G G P C 1 83 P C4 1
PAD P R2 0 6 *1 5 m il _ s ho rt _ 0 6 CS N A 39 + +
S
SK3 4 SA
P C 18 2 9
A
5 6 0 u_ 2 . 5 V _6 . 6 *6 . 6 *5 . 9
5 60 u _2 . 5 V _ 6 . 6* 6 . 6* 5. 9
1u _ 6 . 3V _ X 5 R _ 0 4
Colay
P R2 0 5 *1 5 m il _ s ho rt _ 0 6 CS P A 39
12/17 PWR CHANGE
V CO RE
P C1 4 7 P C1 5 6 P C 1 42 P C 1 51 P C 1 41 P C 1 52 PC 1 4 PC 1 7
5 60 u _ 2. 5V _ 6 . 6 *6 . 6 *5 . 9
5 60 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9
5 60 u _ 2. 5 V _ 6 . 6 *6 . 6 *5 . 9
5 60 u _ 2. 5 V _ 6 . 6 *6 . 6* 5 . 9
5 60 u _ 2. 5 V _ 6 . 6 *6 . 6* 5 . 9
*5 6 0u _ 2 . 5 V _6 . 6 *6 . 6 *5 . 9
+ + + + + + + +
*3 3 0u _ 2 . 5V _V _ A
*3 3 0u _ 2 . 5V _V _ A
6 V GF X _ C O R E
5 , 39 V CO RE
1 1 , 3 5, 3 6 , 3 7, 38 , 3 9 , 41 , 4 2 V I N
1 1 , 1 8, 2 4 , 2 5, 2 8 , 3 1, 32 , 3 3 , 35 , 3 9 5 V S
POWER VCORE2 B - 41
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Schematic Diagrams
Power VGA NVVDD
1.N12P-GS? ,? ? 0.975V 2.N12P-GV2 Default? ? 0.95V
N 12 P- GS 0. 97 5V 1. 0V 0 .8 25 V 0. 8V N 12 P- GV 2 0 .9 5V 0. 97 5V 0. 85 V 0 .8 V
N VV DD _VI D0 0 0 1 1 N VV DD _V ID 0 0 0 1 1
N VV DD _VI D1 0 1 0 1 N VV DD _V ID 1 0 1 0 1
VDD 3 SE T0 SE T2 S ET 1 SE T3 S ET 0 SE T2 S ET 1 S ET 3
N12P-GS PR139 PR141 PR140 PR142 N12P-GV2 PR139 PR141 PR140 PR142
3 V 3_ R U N P R 57
11.8K 12.7K 10K 10K 10K 11.8K 11.5K 10K
1 0 K _ 04 PR134 PR136 PR135 PR137 PR134 PR136 PR135 PR137
P C 11 6 0 . 0 2 2u _ 1 6 V _ X7 R _0 4
15K 15K 12.7K 12K 16.2K 15K 12K 12K
P S _ N V V D D _ P GO OD # 37
P R1 2 0
P Q3 1
D
1 0 K_ 0 4 MT N 70 0 2 Z H S 3
P R 12 7 G
VI N
S
0 _ 04 5V
P R1 4 2 1 0 K _ 1% _ 0 4 P R1 3 7 1 2 K _ 1% _ 0 4
B.Schematic Diagrams
P C1 1 5
A
* 1 00 p _ 5 0V _ N P O_ 0 4
PD 1 1 PC2 PC1 PC5 P C3 P C4
P R1 4 1 1 1 . 8 K _1 % _ 0 4 P R1 3 6 1 5 K _ 1% _ 0 4
R B 0 5 4 0S 2 4. 7 u _ 25 V _ X 5 R _ 0 8 4. 7 u _ 2 5V _ X 5 R _ 0 8 4. 7 u _ 2 5V _ X 5 R _ 0 8 4. 7u _ 2 5V _X 5 R _ 0 8 4. 7u _ 2 5V _X 5 R _ 0 8
C
Sheet 41 of 49
P R 12 8 PR 2 4 1 0_ 0 6
0 _ 04
P R1 4 0 1 1 . 5 K _1 % _ 0 4 P R1 3 5 1 2 K _ 1% _ 0 4
12/22 P Q3 0 P Q2 9
Power VGA NVVDD EMI? ? ? ? ,?
MD U 2 6noise
57 M D U 2 65 7
D
D
P U8 P C1 1 0 P C1 1 3 G G
uP 61 2 2
5
4
3
2
1
S
1 u_ 6 . 3 V _ Y 5 V _0 4
P R1 3 9 1 0 K _ 1% _ 0 4 P R1 3 4 1 6 . 2 K _1 % _ 0 4 0 . 1u _ 1 0V _X 7 R _ 0 4
B OO T
SS
PO K
UG
EAP
PL 4
S E T3 6
SET 3
G ND
P HA S E
21
20
* TM P C 1 0 0 4 H -R 36 M -Z 0 1
1 2
12/22
N12P_VGA
S E T2 7 19
S E T1 8 SET 2 LG 18 PL 3 V G A _ V CO RE ? ripple PJ 1 NV V D D
PR1 3 3 1 K _ 1 %_ 0 4
S E T0 9
10
SET 1
SET 0
VCC
RT
17
16
B C I H 1 3 6 7H C -R 8 2 M
1 2 31A noise 1 2
EN /PSM
FB C SP
C OM P
CS P _ N V V D D
VI D1
C SN
VID0
P Q3 3 P Q3 4 P Q3 2 *O P E N -8m m
P C 12 1
P C 1 19
P C 12 2
P R 1 16 MD U 2 6 54 M D U 2 65 4 M D U 2 65 4 P D 1 2 P D 13
D
P R1 1 7
11
12
13
14
P C 12 0 0 . 0 1 u_ 5 0 V _ X7 R _0 4 5 .1 _ 0 6
15
P R 13 8 3 3 K _ 1% _ 0 4 G G G
+ +P C 2 1 3 + PC2 1 4 P C2 1 5 P C 2 16 +
2 2_ 0 4 C S N _N V V D D P R1 3 0 P R 1 31
S
* 10 0 u _6 . 3 V _ B _ A
*1 0 0 u_ 6 . 3 V _ B _ A
*2 2 u_ 6 . 3 V _ X 5 R _ 0 8
* 2 2u _ 6 . 3 V _ X 5R _ 0 8
PC1 1 7 0_ 0 4 0_04
C S O D 1 4 0S H
5 6 0u _ 2 . 5 V _6 . 6 * 6. 6 * 5. 9
0 . 1 u _1 6 V _ Y 5 V _ 0 4
5 6 0u _ 2 . 5V _6 . 6 *6 . 6 * 5. 9
A
* SK3 4 SA
A
PC 1 1 8 V D D3 C9 90 31 7 P C1 0 9
PR1 3 2
0. 0 1 u _5 0 V _ X 7 R _ 0 4
*0 _ 04 4 7 p _5 0 V _ N P O_ 0 4 22 0 p _ 50 V _ N P O_ 0 4
P R1 2 4
P R 1 25 12 K _ 1 % _ 04
PR 1 2 9 1 0 0 K _1 % _ 0 4
1 0 0 K _ 04
P J1 4 PC1 0 7
2 1
9/6 EMC DVT request
* 4 0m i l C SP _ N VVDD
P J1 3 0 . 1 u _2 5 V _ X 7R _ 06 PC1 1 2
2 1 P R 1 26
1 0 0 K _ 04 *0 . 1 u _1 0 V _ X 5 R _ 0 4
* 4 0m i l
16 N V V D D _V I D 0
C S N _N V V D D
16 N V V D D _V I D 1
P R 1 22 PJ 1 5 P R1 1 8 2 K _ 1% _ 0 4
1 0 0 K _ 04 2 1
E N _ V GA _C OR E
* 40 m i l
PR1 4 6 0 _0 4
3 V 3_ R U N
PR1 4 5 *0 _ 0 4
P S 1 _ V D D_ S E N S E 12
P R 11 9 1 0 K_ 0 4
PR1 4 4 *0 _ 0 4
V D D3 P S 1 _ GN D _ S E N S E 12
P R1 2 1 P J 12 12/17 PWRCHANGE
PR1 4 3 *0 _ 0 4
1 2
PC1 1 4
10 K _ 0 4 *4 0 m li
*2 2 0 0p _ 5 0 V _X 7 R _ 0 6
1 7 NV V DD
1 2 , 1 6 , 3 7 3 V 3 _R U N
2 5 , 2 8 , 29 , 3 1 , 3 5, 37 , 3 8 5 V
1 1, 1 8 , 2 7 , 30 , 3 4 , 3 5, 3 6 , 3 7 , 4 2 V D D 3
1 1, 3 5 , 3 6 , 37 , 3 8 , 3 9, 40 , 4 2 V I N
B - 42 Power VGA NVVDD
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Schematic Diagrams
AC IN, CHARGER
P R 1 61 0 _ 04
VA
P R 1 55 * 47 0 K _ 04
PQ 2
4
VIN M E P 4 43 5 Q8 V _B A T
1 5
2 6
3 7
12/17 PWR CHANGE
8
12/ 22
J _ D C _J A C K 1
5 0 9 32 -0 0 30 1 -0 01 PL 2 VA P Q2 8
12/17 PWRCHANGE EMI ? ? ,? n oi se ? ?
6. 8U H_7 .3 *6 .6* 2. 8M M
? ? JB AT TA 1
H C B 4 5 32 K - 8 0 0T 9 0 M E P 4 4 35 Q8 P Q1 A
P C 1 05 8 P R 1 23 P D 1 5 0 3Y V S P Q1 B PL 5 P R4
1 12 /17 PWRCHANGE
7 3 0 . 02 _ 1 %_ 3 2 2 P D 1 5 03 Y V S T MP C 0 6 0 3H -6 R 8 M-Z 0 1 0 . 0 2_ 1 % _3 2
2 6 2 1 7
0 . 1 u _5 0 V _ Y 5V _0 6
GN D 1
* 4. 7 u _ 25 V _ X 5 R _ 0 8
5 1
4 . 7 u_ 2 5 V _X 5 R _0 8
1 0_ 0 6
10 _ 0 6
4. 7 u _ 25 V _ X 5 R _ 0 8
4. 7 u _ 25 V _ X 5 R _ 0 8
4 . 7 u_ 2 5 V _X 5 R _0 8
4 . 7 u _2 5 V _ X 5 R _ 08
4 . 7u _ 2 5V _ X 5 R _ 0 8
4 . 7 u _2 5 V _ X 5R _ 08
1 0 _0 6
1 0_ 0 6
*4 . 7 u_ 2 5V _X 5 R _0 8
0. 1 u _ 50 V _ Y 5 V _0 6
GN D 2
5
6
P R1 1 5
10 K _ 0 4 P R 2 40
4
* 5 . 1_ 0 6
P R2 3
10 0 K _ 0 4
PR 3
PC 8
P C1 3 3 P C 2 10
P R1 5 7
P C 13
P C1 2
P C1 1
P R 16 5
P R1 6 6
P C 13 5
* 2 20 p _5 0 V _ N P O _0 4
P C 10 8
P C9
P C1 0
P C 12 9
P C1 2 8
P C1 3 0
A
P D 14 P R1 0 . 04 7 u _1 0 V _ X7 R _0 4 0 . 0 47 u _ 10 V _ X 7R _0 4
R B 05 4 0 S 2 15 K _ 0 4 P C 12 6
0 . 1 u_ 5 0V _Y 5V _0 6
B.Schematic Diagrams
L X_ C H G 1 4 13
LX H DR
C
L DR 16 5 IC HP
L DR ICHP
BST _ 12 4 IC HM
B S TOZ8681 I C H M
P R 14 9 J BATTA1
VAC 1 11 V_ BAT
VAC S DA 5
1 0_ 0 6 C
P D 15 R B 0 54 0 S 2
A V DD P
IA CM
15
3
V DD P
IA CM
SC L
IA C
10
7 IA C1
34 B A T_ D E T
S M C _ B A T _R
S M D _ B A T _R
BAT _ DET
4
3
2
Sheet 42 of 49
AC IN, CHARGER
D
IA CP 2 8 C OM P 12/06 net? ? 1
PQ 3 9 IA CP C OMP P R2 3 5 0 _0 4 t B T D -10 1 0 00 9
G 9 6 S M C_ B A T 34
M T N 7 0 02 Z H S 3 AC A V
BASE
A CA V V DDA P R2 3 4 0 _0 4
S M D_ B A T 34
S
P R 1 63
PU 9 0_04
TO T A L_ C U R 34
17
P R1 6 4
*1 5 mi l _ sh o rt _ 06 C3 6 9 4 7P _5 0 V _ N P O _0 4
P R1 6 0 P C 13 2 P C 12 7 P C 1 36 PC1 2 5
*1 u _ 25 V _ 0 8 * 1u _ 2 5V _ 0 8 1u _ 2 5V _ 0 8
1 00 K _ 0 4
1 00 0 P _ 50 V _ X 7 R _ 0 4
P C 1 37 1 2/17 PWRCHANGE
P R1 6 2
P C 1 23 1 00 _ 0 4 P C 13 8 0 . 4 7 u_ 1 0 V _Y 5 V _0 4
1 u _ 10 V _ 0 6 1 u _1 0 V _ 06
Reset circuit S M C_ B A T
V DD 3
P R 1 59
1 0 0 _0 4 PR1 5 6
1 0K _ 0 4
D
P R1 5 8 10 0 K _ 04 P Q3 8 12/21 A C_ IN # 34
D
G P Q 17 P R7 8
34 C H G_ R S T
M T N 7 0 02 Z H S 3 M TP 3 4 0 3N 3 30 0 K _ 1% _ 0 4 PQ 3 7
S
V_ BAT S D P R1 5 3 1 M_ 04 G M T N 7 00 2 Z H S 3
B A T _V O L T 34 VA
S
P R 85 PR 7 9 P C 68 P R 1 54
G
PCB Lay out no tes 1 0 0K _ 1 % _0 4 6 0 . 4 K _1 % _ 04 0 . 1 u_ 1 6 V _Y 5V _0 4
2 0 0 K _1 % _ 04
D
V DD3
1) Allp ower traces s hould be routed on the outer a
l yers 12/21
GNDP, VAD, VSYS, LX, VCHG, VBATT G P Q2 0 P R1 5 2 10 K _ 0 4
V D D3 A C_ IN 36
M TN 7 00 2 Z H S 3 P R1 5 1 4. 7 K _ 0 4
S
2) Use Kelvin connec tions for R3, R4 P R1 5 0 4. 7 K _ 0 4
(sepe rate f orce and meas urement tr aces) C
S M C_ B A T AC
P D1 6 A
3) R23 and R24 are d ummy r esistors, f or layout pur poses only B A V 99 R E C T I F I E R
C 3 5 , 36 SYS3 V
(ser ves as single point connec tion b etween GNDP& GNDA) 3 5 VA
S M D_ B A T AC
P D1 7 A 1 1 , 1 8, 2 7 , 3 0, 3 4 , 3 5, 3 6 , 3 7, 4 1 V D D 3
1 1, 35 , 3 6, 37 , 3 8 , 39 , 4 0 , 41 V IN
4) Foo tprint TO-236 is equivalent to SOT-23 B A V 99 R E C T I F I E R
C
B A T_ D E T AC
5) Foo tprint SIP/1Pis a single hole axial pad P D1 8 A
B A V 99 R E C T I F I E R
6) Allr esisitors, capa citor s and semiconductor s are SMD
7) Pote ntiometer s, and test poin ts are axial devices
AC IN, CHARGER B - 43
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Schematic Diagrams
AUDIO BOARD
USB PORT
A _U S B V C C AL 5 A _ US B V C C2
H C B 1 6 0 8K F - 12 1 T2 5 60 mil
+A C 1 AC7
1 0 0u _ 6 . 3V _ B _ A 0 . 1u _ 1 6V _ Y 5V _ 0 4
A J _ USB 1
A R1 0 *1 0 mi l _ sh o rt _ 04 1
Port1 AL 9 A G ND V+
A US B _ P N1 4 3 AUSB _ PN1 _ R 2
D A TA _ L
A US B _ P P 1 1 2 AUSB _ PP 1 _ R 3
*A W C M2 0 1 2F 2 S -1 6 1T 0 3 D A TA _ H
G ND 1
G ND 3
4
GN D 2
GN D 4
A R1 1 *1 0 mi l _ sh o rt _ 04 G ND
U S 0 4 03 6 B C A 0 8 1
PIN SWAP
G ND 3
GN D 1
GN D 2
GN D 4
6-21-B49C0-104
6-21-B49B0-104
B.Schematic Diagrams
A G ND
TO M/B AUDIO JACK
Sheet 43 of 49 5 A J _ MI C 1
AUDIO BOARD A MI C _ S E N S E
A M I C 1 -R AL 4 F C M1 00 5 K F -1 2 1T 0 3
4
3 R
A M I C 1 -L AL 6 F C M1 00 5 K F -1 2 1T 0 3 2
6 L
1
AC1 0 AC 4 2S J -T 3 51 -S 2 3
A _ US B V CC A J _ A U D I O1
10 0 p_ 5 0 V _N P O_ 0 4 1 0 0p _ 5 0V _ N P O_ 04 6-20-B2800-106
MIC IN
A M I C 1 -R 1
A M I C 1 -L 2
3
BLACK
A H E A D P H ON E -R 4
A _ AUD G
A H E A D P H ON E -L 5 A H P _S E N S E
A M IC_ S E N S E 6 ASPK_ H P# 5 A J _ HP 1
A S P K _H P # 7 4
A H P_ SENSE 8 A H E A D P H O N E -R A R3 6 8_ 0 4 AL 2 F C M1 0 0 5K F -12 1 T 03 3 R
A U SB _ PN1 9
AU SB_ PP1 10 A H E A D P H O N E -L A R5 6 8_ 0 4 AL 3 F C M1 0 0 5K F -12 1 T 03 2
11 6 L
A S P K OU T R + 12 1
A S P K OU T R - 13
A R9 AR 8 A C3 AC2 2S J -T 3 51 -S 2 3
14
8 72 1 3 -14 0 0 G *1 K _ 0 4 * 1K _ 0 4 1 00 p _ 50 V _ N P O _ 04 1 00 p _5 0 V _ N P O _0 4
A _ A U DG A GN D HEADPHONE 6-20-B2800-106
6-20-53A00-114 BLACK
A _ AUD G
AL 7
AC1 4 0 . 1 u_ 1 6V _Y 5V _ 0 4 F C M1 0 05 K F -1 2 1T 0 3
A S P K O UT R+
AC1 5 0 . 1 u_ 1 6V _Y 5V _ 0 4
AC1 3 0 . 1 u_ 1 6V _Y 5V _ 0 4 A L8 AC1 1 A J _ S P K R 1 J_SPK1
F C M1 0 05 K F -1 2 1T 0 3 1 0 00 p _ 50 V _ X 7R _ 04 A S P K O UT R+ _ R
AC1 6 0 . 1 u_ 1 6V _Y 5V _ 0 4 A S P K OU T R - A S P K O U T R -_ R 1 2 1
2
85 2 04 -0 2 00 1
AC8 A C1 7 8 5 20 4 -0 2R
A GN D A _ A UDG 1 80 p _ 50 V _ N P O _0 4 1 80 p _ 50 V _ N P O _ 04
6-20-43150-102
A _ A UD G
6-20-43110-102
AH 1 A H3
C 59 D 59 C5 9 D5 9 A H2 A H4
2 9 2 9
3 8 3 8
4 1 7 4 1 7
5 6 5 6
M TH 2 76 D 1 1 1 MT H 2 7 6 D 1 11
A GN D A GN D A G N D A G ND
B - 44 AUDIO BOARD
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Schematic Diagrams
CLICK BOARD
CLICK BOARD
CLED_PWR CLED_BAT_FULL
CLED_ACIN CLED_BAT_CHG
CR360 CR359 CR361 CR358
CC2 CC1 CC3
0. 1u_16V_Y5V_04 *0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04 220_04 220_04 POW ER ON 22 0_04 220_04
C5VS C5VS CVDD3 B AT L ED
3
1 LED
B.Schematic Diagrams
CD27 CD26
2
SG
CGND CGND CGND
SG
Y
Y
CJ_TP1 CJ_TP2 CJ_TP3 RY- SP155HYYG4-1 RY-SP155HYYG4- 1
4
1 CTP_DATA 1 CTP_CLK 1 CLED_PWR
2 CTP_CLK 2 CTP_DATA 2 CLED_ACIN
3 3 CTPBUTTON_L 3 CLED_BAT_FULL
4 4 CTPBUTTON_R 4 CLED_BAT_CHG
85201- 04051
CGND
5
6
85201-06051
5
6
85201-06051 CGND CGND CGND CGND
Sheet 44 of 49
6- 20-9 4A50- 104
6- 20-9 4AA0- 104
CGND CGND 6-52- 5500 2-04B
6-52- 5500 1-040
6 -52-5 5002 -04B
6 -52-5 5001 -040
CLICK BOARD
6- 20-9 4A70- 104 6-2 1-91A 00-1 06 6-21 -91A 00-10 6 6-52- 5500 2-042 6 -52-5 5002 -042
6-2 1-91A 10-1 06 6-21 -91A 10-10 6
6-2 0-94A 70-1 04 6-20 -94A 70-10 4
E5120Q
CSW1~4
2 4
1 3
LI FT RIG HT
KE Y KE Y
CSW1 CSW2
TJG-532-V-T/R TJG-532-V-T/R
1 2 1 2
3 4 CTPBUTTON_L 3 4 CTPBUTTON_R
5
6
5
6
CGND CGND
6- 53-31 50B- 245 6-5 3-315 0B-24 5
6- 53-30 50B- 240 6-5 3-305 0B-24 0
6- 53-30 50B- 241 6-5 3-305 0B-24 1
2 CH3 9 2 CH1 9 2 CH4 9 2 CH2 9
3 8 3 8 3 8 3 8
4 1 7 4 1 7 4 1 7 4 1 7
5 6 5 6 5 6 5 6
MTH237D91 MTH237D91 MTH23 7D91 MTH237D91
CGND CGND CGND CGND CGND CGND CGND CGND
CLICK BOARD B - 45
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Schematic Diagrams
W251HPQ POWER SW BOARD
S _ 3. 3 V S
POWER
POWER SW & LED S R2
SWITCH
LED
LID SWITCH IC
S _ 3 .3 V
SD 2
22 0 _ 0 4
C
*B A V 9 9 R E C T I F I E R
S _ 3 .3 V
20mil 20mil Z 43 0 1 12/1 ? ?
S _ 3 .3 V S S _3 . 3 V S R1 1 0 0K _0 4 AC
S C6
S U1
A
SJ _ SW 2 0 . 1u _ 1 6 V _ Y 5 V _ 0 4 1 2 S LI D _ S W #
20mil V CC OU T
G ND
A
1 SD 3 S D1
2 S M _ B T N# * H T -1 5 0 N B - D T S M GN D SC 2 S C1
3 SW EB_ W W W # H T - 15 0 N B -D T MH 2 4 8- A L F A -E S O
4
3
S W E B _ E MA I L # 0 . 1 u _1 6 V _ Y 5V _0 4 *1 0 0 p_ 5 0 V _ N P O_ 0 4
5
C
S L ID _ S W # S MG N D
6 6-52-56001-023 6-52-56001-023
7 S M GN D 6-52-56001-028 6-52-56001-028
S A P _O N 6-52-56000-020 6-52-56000-020
8
6-52-56001-022 6-52-56001-022 S M GN D S M GN D S MG N D
8 84 8 6 -0 80 1 S MG N D S M GN D
6-02-00248-LC2 SU1, SU2
6-20-94K10-108 6-02-00268-LC1 3
FOR W251HNQ/W255HN FOR 1 2
W251HPQ/W255HP/E5125Q
B.Schematic Diagrams
6-53-3150B-245 6-53-3150B-245
6-53-3050B-241 6-53-3050B-240
6-53-3050B-240 6-53-3050B-241
Sheet 45 of 49 3
PSW1~2
1
POWER BUTTON POWER BUTTON
W251HPQ POWER 4 2
1
3
S P W R _S W 1
* T JG -5 3 3 -S -T / R
2
4
S M_ B T N # 1
3
S P W R_ S W 2
T J G-5 3 2 -V -T / R
2
4
S M_ B T N #
SW BOARD
1
1
5
6
5
6
SC 7 SC 8
SD4 S D5
*0 . 1 u _ 5 0V _Y 5 V _ 0 6 0 . 1 u_ 5 0 V _ Y 5 V _ 0 6
* V 1 5 A V L C0 4 0 2 * V 1 5A V L C 0 4 0 2
12/1 ? ? ?
2
2
VARIST OR VARIST OR
6-24 -3000 3-00 6 6 -24- 3000 3-00 6
S MG N D S MG N D S M GN D S MG N D
FOR
FOR W251HNQ/W255HN
W251HPQ/W255HP/E5125Q
S M H1 S M H2 S MH 3 S MH 4 S MH 5
H 6 _ 0 B 7 _ 0D 2 _ 3 H 6 _ 0 B 7 _ 0D 2 _ 3 H 6 _ 0B 7_ 0 D 2_ 3 H 7 _ 0 B 6 _0 D 3 _0 H 6 _ 0 B 7 _0 D 2 _3
S M GN D S M GN D S MG N D S MG N D S M GN D
B - 46 W251HPQ POWER SW BOARD
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Schematic Diagrams
W270HU BRIDGE ODD BOARD
ODD BOARD FOR W270HU
M/B ? ODDQJ_O
board ?
Q J_ODD1 DD2
S1 S1
S2 Q_SATA_TXP1 S2
S3 Q_SATA_TXN 1 S3
S4 S4
B.Schematic Diagrams
S5 Q_SATA_RXN1 S5
S6 Q_SATA_RXP1 S6
S7 S7
QGND Q GND
P1
P2
P3
Q_5VS
Q_OD D_DETECT#
Q_5VS
P1
P2
P3
Sheet 46 of 49
P4
P5
P6
Q_SATA_ODD_ DA# P4
P5
P6
W270HU BRIDGE
2 4200 1-1 202 001- 1
ODD BOARD
PIN PIN
GN D1~2=WGND QGND Q GND GN D1~3=QGND
6-21-14010-013 6-21-13010-013(DIP)
Q_5VS
+ QC1 QC2 QC3
*2 20u_ 6.3V_6 .3*6. 3*4.2 0.1u _16V_Y 5V_04 0.1 u_16 V_Y 5V_04
QGND
QH1 QH2 QH3 QH 4
C23 7D91 C23 7D91 C67D 67 C6 7D67
QG ND Q GND
W270HU BRIDGE ODD BOARD B - 47
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Schematic Diagrams
W270HU POWER SW BOARD
POWER SW & LED
POW ER
SWI TCH
W_ 3.3VS W_3.3VS
LED
W_3. 3V
WC1
LID SWITCH IC WD1
C
*BAV99 RECTI FIER
0. 1u_16V_Y5V_04 W_3.3V
WR1 WR2 WR3 WR4
WR5 100K_1%_04 AC
220_04 220_04 220_04 2 20_04 WMGND
WU1
1 2 WLI D_SW#
20mil 20mil 20mi l 20mil VCC OUT
GND
A
WC2 WC3
B.Schematic Diagrams
MH248-ALFA- ESO
3
A
A
*100p_50 V_NPO_04
0.1u_1 6V_Y5V_04 WMGND
WD2 WD3 WD4 WD5
HT-150NB-DT HT-150 NB-DT HT-150NB- DT HT- 150NB-DT
WMGND WMGND WMGND
C
Sheet 47 of 49 6-02 -00 248- LC2
6-02 -00 268- LC1
LU1
3
W270HU POWER 1 2
SW BOARD WMGND 6- 52-5 600 1-02 3
6- 52-5 600 1-02 8
6- 52-5 600 0-02 0
6- 52-5 600 1-02 2
WSW1
POW ER B UTT ON
3 1
4 2 WPWR_SW1
TJG-532-V-T/R
1 2 WM_BTN#
W_3.3VS W_3.3V 3 4
1
WMH4 WMH5 WMH1 WMH2
5
6
WJ_SW1 WC4 WD6 H7_0D2_3 H7_0D2_3 C91D91N C91D91N
20mi l
1
0.1u_ 50V_Y5V_0 6
2
WM_BTN# *V15AVLC0402
3
WWEB_WWW#
2
4
WWEB_EMAIL# VA RISTO R
5 WLID_SW#
6
7 WMGND 6 -2 4- 30 00 3- 00 6
WAP_ON
8
WMGND WMGND WMGND
WMGND
88486-0801
6-5 3-31 50B- 245
6-20 -94 K10- 108 6-5 3-30 50B- 241
B - 48 W270HU POWER SW BOARD
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Schematic Diagrams
Power Diagram
3.3V 2.92A 1.05VS
PW R SW B'd 1
M_BTN# RTCVCC 3.3VS
U34 48A VCORE
1.05VS_VTT 1.5VS
U29 1.05VS_VTT
Cougar 8.5A
3.3VS VDD3
Point CPU VGFX_CORE
33A 1.5V
9 ALL_SYS_PWRGD
2 4a RSMRST# RSMRST#, 1.8VS SO-DIMM
U17 11 PMSYS_PWRGD_BUF 1.2A
PWR_SW# DPWROK DRAMPWROK SM_DRAMPWROK
PU6 IT8518 4b PWR_BTN# 1.5VS_CPU
P2808B PWRBTN# 12A
12 H_CPUPWRGD
10 PM_PCH_PWROK PWROK, PWOCPWRGD UNCOREPWRGOOD 0.85VS
6A
APWROK 15 PLT_RST#
PLTRST# RESET#
VIN
0a 14 SYS_PWROK
PU7 SYS_PWROK
uP6182 VDD3
PJ26 5b 3.3V
SLP_S3# SLP_S4# VIN
Alway s
0b 5a 1.5VS_CPU 1.5V U11
enabl e 1.5V 5c
VDD5 PJ5 1.05V USB 3.0
EN_5V PJ27 0c 5 SUSC# 5V PU5 PJ9
uP6163 U9 uPD720200
USBVCC01 EN GS7113
6e
B.Schematic Diagrams
DD_ON_EN_VDD 5V EN
VTT_MEM
U37 USB PJ7
VDD3 7
TPS2540 PORT1 SUSB U22A
0 DDR1.5V_PWRGD 1.05VS 1.05VS_VTT
EN EN PG
VIN
PQ11
VIN
6 SUSB#
VIN
6d
1.05VS
PQ57
Sheet 48 of 49
PU11 PJ25
VDD3
3a
3.3V
PQ27B uP6127 1.05VS_PWRGD
EN PG U22B
1.05VS_VTT_EN
Power Diagram
3c
PQ64 3b USBVCC3.0 3.3V 6f 10
VDD5 5V 1.8VS 14
DD_ON# EC PM_PCH_PWROK
PU4 PJ6 VIN 8 SYS_PWROK
3 U14 0.85VS
PQ66 RT9715BGS AX6615
DD_ON USB USB 1.8VS_PWRGD PJ20
EN EN PG PU3 13b U22D
PORT0 PORT3 PU10 U22C
PQ27A uP6122 0.85VS_PWRGD 9 NCP6131S DELAY_PWRGD
EN PG
6a PG ALL_SYS_PWRGD
EN
VDD5 5VS 13a
VCORE
? PU1,PU2
PQ65 NCP5199
3.3V PLVDD VIN 18
VGFX_CORE
PU12
Q6
NCP5199
6c 16c
? PANEL VDD3 3.3VS
NB_ENAVDD 1.05VS PEX_VDD
SB
PQ63
16 PQ4
?
dGPU_PWR_EN#
5VS 5VS_ODD EC
P0
? U32 Mode: 6b
SATA_ODD_PWRGT G5243 NVVDD
EN 23A 1.5V 1.5VS 16d
U26 PEX_VDD 16a 1.5V FBVDDQ
ODD 1.5A
GPU PQ24 3V3_RUN 16b
0.1A 3V3_RUN 3.3V NVVDD PQ7
PLT_RST# 17 PU8 PJ1
PERSTB# uP6122
dGPU_RST# U4 PEXRST# 4A FBVDDQ EN PS_NVVDD_PGOOD#
PQ35 PG
?
3.3V 3G_3.3V
VGA Frame
Buffer A U7,U8,U30,U31
Q30
?
3G_POWER 3G MINI CARD VGA Frame
EC Buffer c U3,U5,U25,U28
?
DVDD(1.2V) 3.3VS 3.3V 5VS 5VS 3.3VS 5VS 3.3VS
5V 5V_CCD
?
U1 U18
CCD_EN G5243 U19
EN CardReader WLAN MINI CARD Touch Pad SATA HDD
JMC251C CODEC ALC269
CCD
Power Diagram B - 49
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Schematic Diagrams
Power On SEQ
TOP BOT
2 PWR_SW# 308ms
2 PWR_SW# (PU6.6)
3 DD_ON 84ms
3 DD_ON (PQ27.2)
1.3ms
3a 3.3V 3.3V rise time=960us
2.12ms
3a 3.3V (PU4.5) (PQ64.1)
5V rise time=1.7ms
3b 5V
3b 5V (U14.3) (PQ66.1)
4a RSMRST# 91.6ms
4a RSMRST# (U17.35)
4b PWR_BTN# 173ms 123ms
4b PWR_BTN# (U17.33)
5 SUSC# TOP BOT 204ms
5 SUSC# (PQ11.5)
1.026ms
5a 1.5V (PJ9) (C644.1)
1.026ms
5b 1.5VS_CPU (PJ5) (C636.1)
B.Schematic Diagrams
5.898ms
5b 1.05V (U9.4) 1.05V rise time=2.372ms
6 SUSB# (PQ27.5) 6 SUSB# 36us
749us
6a 5VS (J_MB1.1) (PQ65.1) 6a 5VS 5VS rise time=376us 5VS? ? ? ? ? 1V
Sheet 49 of 49 6b 1.5VS (PQ24.4) 6b 1.5VS 984us
Power On SEQ
1.31ms
6c 3.3VS (L35.2) (PQ63.1) 6c 3.3VS 1.05VS rise time=753us
1.34ms
6d 1.05VS (PQ4.8) (PJ25) 6d 1.05VS 1.05VS rise time=932us
6e VTT_MEM (PJ7) (JDIMM2.203) 6e VTT_MEM 1.5ms
2.2ms
1.8VS rise time=442us
6f 1.8VS (PJ6) (C633.1) 6f 1.8VS
4.75ms
7 1.05VS_VTT(C232.1) (PQ57.1) 7 1.05VS_VTT 1.05VS_VTT rise time=336us
5.694ms
8 0.85VS (C148.1) (PJ20) 8 0.85VS 1.05VS_VTT rise time=672us
9 ALL_SYS_PWRGD (U22.8)(U27.13) 9 ALL_SYS_PWRGD 6.5ms
99ms
10 PM_PCH_PWROK (U22.13) 10 PM_PCH_PWROK
11 PMSYS_PWRGD_BUF(U10.4) 11 PMSYS_PWRGD_BUF
166ms
12 H_CPUPWRGD (R82) 12 H_CPUPWRGD
201ms
13a VCORE (C156.1) (PC147.1) (? SVID? ? ? ? ? ? ? ) 13a VCORE 212.8ms
214ms
13b DELAY_PWRGD(U22.12) 13b DELAY_PWRGD
14 SYS_PWROK (U22.11) 14 SYS_PWROK
214ms
15 PLT_RST# (U20.16) (U33.1) 15 PLT_RST#
216.2
16 dGPU_PWR_EN# (PQ5.G) (PQ36.2) 16 dGPU_PWR_EN#
1.78s
75us
16a 3V3_RUN (Q7.5) (PQ35.4) 16a 3V3_RUN
1.087ms
16b NVVDD (PJ1) (PC122.1) 16b NVVDD
NVVDD rise time=677us
1.87ms
16c PEX_VDD (PQ4.1) (L8.1) 16c PEX_VDD PEX_VDD rise time=652us
4.6ms
16d FBVDDQ (PQ8.1)) (C601.1) 16d FBVDDQ FBVDDQ rise time=1.23ms
17 PERSTB# (U44.4) 17 PERSTB# 188ms
530ms
18 VGFX_CORE (C166.1) (C575.1) (? SVID? ? ? ? ? ? ? ) 18 VGFX_CORE 3.54s
1.5V 1.05V
B - 50 Power On SEQ
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BIOS Update
Appendix C:Updating the FLASH ROM BIOS
BIOS Version
To update the FLASH ROM BIOS you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.
C:BIOS Update
V1.01.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD/ or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.01.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.01.04).
Set the computer to boot from the external drive
1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
C - 1
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BIOS Update
Use the flash tools to update the BIOS
1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “Starting MS-DOS”. You will then be prompted to give “Y” or “N” responses to the programs
being loaded by DOS. Choose “N” for any memory management programs.
2. You should now be at the DOS prompt e.g: DISK C:\> (C is the designated drive letter for the CD/DVD drive/USB
flash drive).
3. Type the following command at the DOS prompt:
C:\> Flash.bat
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
C:BIOS Update
restarts.
Restart the computer (booting from the HDD)
1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS
You may now enter the BIOS and make any changes you require to the default settings.
C-2
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www.s-manuals.com
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