Prelab 4: Single Stage BJT Amplifiers: Common

Emitter
Name:
Lab Section:

VCC

RC

+
+ vout
vin −
−
VIN +
−

Figure 1: Common emitter amplifier

1. Let us analyze the common emitter amplifier illustrated in Figure 1. Let VCC = 5 V, VT = 26 mV,
IS = 26.03 fA, VA = 90.7 V, RC = 1 kΩ, and β = 270.

(a) For the transistor in Figure 1, draw a graph of IC vs. VCE for each of the following values of VBE :
600 mV, 620 mV, 640 mV, 660 mV, 680 mV, and 700 mV. (A grid is provided for your response.)
Please take care in drawing these plots as they will be used to answer some of the questions below.
Assume the boundary between deep saturation and forward active occurs at VCE = 400 mV. You
may use a piecewise linear model for this graph.
(b) Also on this graph, draw the load line for the resistor, RC . Hint: As a reminder, load line analysis
is the application of Ohm’s Law to relate current (I) and voltage (V) via the resistance of a given
resistor (R) (i.e. △V
R = I, where △V is the voltage across the resistor).
(c) Using the intersection points of the graphs from (a) and (b), plot a graph of VOUT vs. VIN on the
designated grid. How might the VOUT vs. VIN graph be useful? (For a hint, please see Figure 2.)

(d) At VIN = 650 mV, what is the region of operation for the transistor and what is the gain of the
amplifier? Hint: The small signal gain, for a given VIN , corresponds to the slope of the VOUT vs.
VIN curve at that particular VIN value.

1
 2

15

12

9
IC (mA)

0
0 1 2 3 4 5
VCE (V)

3
VOU T (V)

0
600 610 620 630 640 650 660 670 680 690 700
VIN (mV)

2. Now, let us further analyze some more properties of the amplifier shown in Figure 1. Assume VIN =
650 mV for the rest of the prelab.

(a) Draw the small signal model of the amplifier (space for your response is provided on the next
page).
 3

Figure 2: Illustration of how a small input signal coupled to VIN can yield an amplified output signal
coupled at VOUT

(b) Calculate the following parameter values (be sure to take the Early effect into account):
• VOUT
• IC
• Transconductance gm
• Output impedance Rout
• Input impedance Rin
• Gain Av . Does this gain match your answer to question 1(d)?
 4

(c) If we change the bias point, which of the above properties will also change?

3. Let’s explore what happens when we change the bias point by adding a load resistor.

(a) Add a load of 5 kΩ to the output of the circuit. Intuitively, how do you think this will affect the
gain? Explain why.

(b) On the same graph you made for question 1(a), draw the load line for this modified circuit. (Be
sure to label which load line goes with which question.)
(c) Given the added 5 kΩ resistor, will the transistor continue to stay in forward active mode if we
maintain the same bias point (i.e. the same VBE value)?

(d) How does the load resistor affect the output voltage swing of the amplifier? Note: The output
voltage swing is the range of values of vOUT for which all transistors stay in forward active mode.

(e) For what load resistance does the amplifier’s BJT begin to transition between forward active mode
and deep saturation (i.e. where VCE = 400 mV)?

c
University of California, Berkeley 2008
Reproduced with Permission
Courtesy of the University of California, Berkeley and of Agilent Technologies, Inc.

This experiment has been submitted by the Contributor for posting on Agilents Educators Corner. Agi-
lent has not tested it. All who offer or perform this experiment do so solely at their own risk. The Contributor
and Agilent are providing this experiment solely as an informational facility and without review.
 5

NEITHER AGILENT NOR CONTRIBUTOR MAKES ANY WARRANTY OF ANY KIND WITH
REGARD TO THIS EXPERIMENT, AND NEITHER SHALL BE LIABLE FOR ANY DIRECT, INDI-
RECT, GENERAL, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES IN CONNECTION
WITH THE USE OF THIS EXPERIMENT.
Experiment 4: Single Stage BJT Amplifiers: Common
Emitter
1 Objective
Design and analysis of analog amplifiers is not usually done at the single transistor level, but instead, it
is done by grouping together known configurations of single transistor amplifiers to create a new amplifier
with just the right properties for the particular application. Such properties include input impedance, gain,
and output impedance. However, before presenting to you the analysis and implementation of these robust
multi-transistor amplifiers, we will present to you the fundamentals of a single transistor amplifier.
The objective of this lab is to teach you about the single stage BJT common emitter (CE) amplifier
and all its wonderful properties. The next lab will cover the properties of the common collector (a.k.a.
emitter follower) and common base amplifiers. By the end of this lab and the next, you will begin to see
why these different configurations are useful and how they can be connected together to fulfill certain design
specifications.

2 Materials
The items listed in table 1 will be needed. Note: Be sure to answer the questions on the report as you proceed
through this lab. The report questions are labeled according to the sections in the experiment. Also, note
that there is an accompanying post-lab appended to the end of the lab report. CAUTION: FOR THIS
EXPERIMENT, THE TRANSISTORS CAN BECOME EXTREMELY HOT!!!

Component Quantity
2N4401 NPN BJT 1
8 Ω speaker 1
1 kΩ resistor 1
10 kΩ resistor 1
10 µF capacitor 1
10 kΩ potentiometer 1

Table 1: Components used in this lab

3 Procedure
Note: All voltages mentioned in the following instructions are the effective voltages delivered, not the one
shown on the function generator’s display. This discrepany is further explained in section 3: Voltage Divider
Discussion from the function generator tutorial.

1
3 PROCEDURE 2

3.1 Biasing for Maximum Gain

We begin by finding the proper biasing point for the common emitter (CE) amplifier shown in Figure 1.
Given the properties of the CE amplifier are greatly affected by the DC bias point, we are using a voltage
source and a pull up resistor to bias the collector while using the DC offset from the function generator to
bias the base. Note that this setup is quite different from multi-transistor amplifiers, which generally feature
transistors being biased by other transistors to achieve the largest small signal gain.

1. To start off, build the circuit shown in Figure 1, a simple common emitter amplifier with no load
attached. Let RC = 1 kΩ and VCC = 5 V. Also, please set up the parameter analyzer at this point
because you will be using it to analyze the circuit. Note: If you need a review of how to use the
parameter analyzer, please refer to the parameter analyzer tutorial.

VCC

RC

IIN +
+ vout
vin −
−
VIN +
−

Figure 1: CE amplifier using an NPN BJT: the input is applied to the base and the output is taken from
the collector

2. Using ICS, perform a sweep of VIN from 0 to 1 V with 101 datapoints spanning the interval. Then,
graph VOUT vs. VIN . Now, using this plot, find the DC bias that achieves the maximum small signal
gain. What is this gain? What are the corresponding values of VIN and VOUT ? Hint: If you need help
locating the DC bias point, please take a look at the VOUT vs. VIN curve of Figure 2 from the prelab.
3. Using load line analysis for the pull up resistor (i.e. finding the intersection point of the load line and
the BJT IC vs. VCE curve) as well as the VOUT vs. VIN curve, explain why the BJT will yield very
low gain if it is not biased into forward active mode.

3.2 Amplifier Properties (a.k.a. Two-Port Parameters)

The operational characteristics of an amplifier can be quantified by three properties: input impedance, gain,
and output impedance. These three properties are called the two-port parameters of an amplifier. The goal
is now to measure and learn about these properties for the CE amplifier so that we may use this general
knowledge later on in our design of multistage amplifiers.

1. Measuring Input Resistance: Sweep VIN from 0 to 1 V using 101 datapoints, and plot IIN vs. VIN
using ICS. What is the input resistance of the amplifier when VIN is set to achieve maximum gain?
Hint: The inverse slope of the IIN vs. VIN curve (at a particular VIN value) corresponds to the input
resistance of the amplifier (when biased to that value of VIN ). If necessary, please zoom in on your
plot to get a proper reading of the input resistance.

2. Measuring Gain: Connect the function generator to the input and apply a 20 mVpp amplitude sine
wave with a DC offset corresponding to the DC bias point that yields the maximum gain. Now measure
the peak-to-peak amplitude of the output signal using the oscilloscope. What is the gain according
3 PROCEDURE 3

to this measurement? Is this gain roughly the same as the gain you had previously measured (using
ICS)? Hint: Recall that the actual output voltage from the function generator is roughly doubled the
amount on the display.
3. Measuring Output Voltage Swing: Increase the amplitude of the input signal until the output waveform
is clipped (flattened) on the top and bottom. Why does clipping happen at the top? Why does it
happen at the bottom? Approximately how large can the output waveform be without clipping? This
maximum peak-to-peak amplitude is called the output voltage swing. Note: Given you have set the
proper VIN value, you can also read off the output voltage swing from your VOUT vs. VIN curve; it is
just the range of VOUT values for which the curve is linear.

VCC

RC

C +
+ RL vout
vin −
−
VIN +
−

Figure 2: CE amplifier with load attached

4. Now, attach a 10 µF AC coupling capacitor and a 10 kΩ potentiometer at the output as shown in

Figure 2. (If you have never used a potentiometer before, please refer to Figure 3.) In this example,
the potentiometer is used to simulate a load for the amplifier to drive. Why is the capacitor necessary?
Hint: Consider the DC bias.
5. Measuring Output Resistance: Decrease the amplitude of the input signal until it is back to 20 mVpp .
Adjust the resistance of the potentiometer so that the amplitude of the signal across the potentiometer
is exactly half of the output amplitude when no load is attached. The resistance of the potentiometer
at this point will be equal to the output resistance of the amplifier. What is the value of the output
resistance? Why does this method work in measuring the output resistance? (Hint: Model the output
resistance as being in series with the potentiometer and then apply the voltage divider formula.)

Figure 3: A typical 10 kΩ potentiometer: the variable resistance can only be measured between two adjacent
pins; the resistance measured between the leftmost and rightmost pins is constant.
3 PROCEDURE 4

3.3 The World’s Worst Speaker Amplifier

This part will demonstrate the capabilities of your CE amplifier on a physically observable load.
1. Using the function generator, apply a 1 kHz, 20 mVpp sine wave (with no DC offset) directly to the
two terminals of the speaker. Qualitatively observe the sound from the speaker.
2. Now build the circuit shown in Figure 2 (if you do not already have it available from the end of section
3.2). Let RC = 1 kΩ and C = 10 µF.
3. Using the function generator again, bias VIN for maximum amplifier gain (you should have the bias
voltage value from a previous section) and also apply a 1 kHz, 20 mVpp sine wave for vin . Attach the
speaker to the output and qualitatively observe the sound. Do you hear anything? If so, is it louder,
softer, or just as loud as when the speaker was directly connected to the function generator? Explain
this result. Hint: Consider the output impedance of the amplifier.

3.4 Emitter Degeneration

Emitter degeneration refers to the placement of a resistor on the emitter terminal of a common emitter
amplifier. We will now analyze the effects of this resistor:

1. Build the circuit in Figure 4; let VCC = 5 V, RC = 10 kΩ, and RE = 1 kΩ.

VCC

RC

+
+ vout
vin −
−
VIN +
− RE

Figure 4: CE amplifier with emitter degeneration

2. With the help of ICS, find the bias point that will allow the circuit to achieve maximum gain. A
suitable range to sweep VIN is 0 to 3 V. What is the DC operating point that you found? What is
the gain, Av , at this operating point? How does the gain without emitter degeneration compare to the
gain with emitter degeneration (i.e. is it smaller or larger)? Give a qualitative explanation for your
observation.
3. Measure the input and output impedances of the circuit using the technique described in section 3.2.
How are these impedance values affected by emitter degeneration? Explain.
4. Using the appropriate equations, calculate the theoretical values of the input and output impedances
as well as the gain. Use β = 270, which is about what you should have measured in Experiment 3.
5. How might emitter degeneration be useful?
3 PROCEDURE 5

c
University of California, Berkeley 2008
Reproduced with Permission
Courtesy of the University of California, Berkeley and of Agilent Technologies, Inc.

This experiment has been submitted by the Contributor for posting on Agilents Educators Corner. Agi-
lent has not tested it. All who offer or perform this experiment do so solely at their own risk. The Contributor
and Agilent are providing this experiment solely as an informational facility and without review.

NEITHER AGILENT NOR CONTRIBUTOR MAKES ANY WARRANTY OF ANY KIND WITH
REGARD TO THIS EXPERIMENT, AND NEITHER SHALL BE LIABLE FOR ANY DIRECT, INDI-
RECT, GENERAL, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES IN CONNECTION
WITH THE USE OF THIS EXPERIMENT.
 Report 4: Single Stage BJT Amplifiers: Common
Emitter
Name:
Lab Section:

1 Lab Questions
3.1.2 DC values and gain when the circuit is biased for maximum small signal gain:

VIN =

VOUT =

Av =

3.1.3 Using load line analysis for the pull up resistor (i.e. finding the intersection point of the load line and
BJT I-V curve), explain why the BJT will yield very low gain if it is not biased into forward active
mode.

3.2.1 What is the input resistance?

Rin =
3.2.2 What is the measured gain? Is this measured value roughly the same as the gain you measured using
ICS?

Av =

1
1 LAB QUESTIONS 2

3.2.3 Why does clipping happen at the top of the output waveform? Why does it happen at the bottom?
What is the output voltage swing?

Output Voltage Swing =

3.2.4 Why is the capacitor needed when we attach the load?

3.2.5 What is the output resistance of the amplifier?

Rout =

Why does the method work in measuring output resistance? (Hint: Model the output resistance as
being in series with the potentiometer and then apply the voltage divider formula.)

3.3.3 Compare the respective volumes of the 1 kHz tones produced by the speaker for the following two cases:
20 mVpp , 1 kHz sine wave applied directly to speaker; and the output of the CE amplifier applied to
the speaker. Do you hear anything from the latter case? If so, is it louder, softer, or just as loud as
the former case? Explain this result. Hint: Consider the output impedance of the amplifier.

3.4.2 DC values and gain when the circuit is biased for maximum small signal gain:

VIN =

VOUT =

Av =

How does the gain without emitter degeneration compare to the gain with emitter degeneration (i.e.
is it smaller or larger)? Give a qualitative explanation for your observation.
1 LAB QUESTIONS 3

3.4.3 Measured impedances for the amplifier:

Rin =

Rout =

How are these values affected by emitter degeneration (i.e. do they increase, decrease, or stay the
same)? Why?

3.4.4 Theoretical amplifier parameters:

Rin =

Rout =

Av =

3.4.5 How might emitter degeneration be useful?

2 POST-LAB QUESTIONS 4

2 Post-Lab Questions
2.1 Amplifier Two-Port Model

Rout
+ + +
+
vin Rin va Av va vout
−
− − −

Figure 1: Generalized voltage amplifier

1. A CE amplifier can be modeled as the generalized voltage amplifier shown in Figure 1, where Rin , Rout ,
and Av are the values you found for input resistance, output resistance, and voltage gain, respectively.
This generalization was accomplished by applying the concept of Thévenin equivalent circuit to
the CE small signal model. Now suppose that vin is an ideal source that supplies a 1 kHz, 20 mVpp
sine wave. What is vout ? Use the values obtained from the lab for Rin , Rout , and Av (i.e. use data
from the no emitter degeneration, 1 kΩ biasing resistor case).
2 POST-LAB QUESTIONS 5

1 kΩ Rout

+ +
+
vin Rin va Av va 1 kΩ vout
−
− −

Figure 2: Voltage amplifier with non-ideal source and load attached

2. Now suppose a non-ideal voltage source with an internal source resistance of 1 kΩ is attached at vin ,
and a load resistance of 1 kΩ is attached at the output (Figure 2). If a 20 mV peak-to-peak amplitude
sine wave is applied at the input, what should be the signal across the load?

3. For a given input, a good voltage amplifier is one that can create the greatest possible voltage swing
across the load. Assuming the gain stays constant, what input and output impedances should the ideal
voltage amplifier have? Why?

c
University of California, Berkeley 2008
Reproduced with Permission
Courtesy of the University of California, Berkeley and of Agilent Technologies, Inc.

This experiment has been submitted by the Contributor for posting on Agilents Educators Corner. Agi-
lent has not tested it. All who offer or perform this experiment do so solely at their own risk. The Contributor
2 POST-LAB QUESTIONS 6

and Agilent are providing this experiment solely as an informational facility and without review.

NEITHER AGILENT NOR CONTRIBUTOR MAKES ANY WARRANTY OF ANY KIND WITH
REGARD TO THIS EXPERIMENT, AND NEITHER SHALL BE LIABLE FOR ANY DIRECT, INDI-
RECT, GENERAL, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES IN CONNECTION
WITH THE USE OF THIS EXPERIMENT.