DIgSILENT PowerFactory

Relay model description

SEL 700G

Version 001
 DIgSILENT GmbH

Heinrich-Hertz-Str. 9
72810 - Gomaringen
Germany

T: +49 7072 9168 00

F: +49 7072 9168 88

http://www.digsilent.de
info@digsilent.de

Format rev. 1, Copyright ©2012, DIgSILENT GmbH. Copyright of this document belongs to DIgSILENT
GmbH. No part of this document may be reproduced, copied, or transmitted in any form, by any means
electronic or mechanical, without the prior written permission of DIgSILENT GmbH.

SEL 700G Version: 001 1

Contents

Contents

List of Figures 4

1 Model information 6

2 General description 6

3 Supported features 7

3.1 Measurement and acquisition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Ground Differential and REF subrelay . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.2.4 Ground Differential subrelay scheme . . . . . . . . . . . . . . . . . . . . . 9

3.3 Impedance subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.3.4 Impedance subrelay scheme . . . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 Neutral Overcurrent subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.4.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.4.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.4.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

3.4.4 Neutral Overcurrent subrelay scheme . . . . . . . . . . . . . . . . . . . . 14

3.5 Overflux subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.5.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.5.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.5.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.5.4 Overflux subrelay scheme . . . . . . . . . . . . . . . . . . . . . . . . . . 16

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Contents

3.6 Thermal Image V Toc and Neg seq subrelay . . . . . . . . . . . . . . . . . . . . 17

3.6.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.6.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.6.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.6.4 Thermal Image V Toc and Neg seq subrelay scheme . . . . . . . . . . . 19

3.7 Phase Differential subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.7.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.7.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.7.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.7.4 Phase Differential subrelay scheme . . . . . . . . . . . . . . . . . . . . . 21

3.8 Power subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.8.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.8.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.8.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.8.4 Power subrelay scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.9 X-Side Frequency subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.9.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.9.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.9.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.9.4 X-Side Frequency subrelay scheme . . . . . . . . . . . . . . . . . . . . . 26

3.10 X-Side Overcurrent subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.10.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.10.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

3.10.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

3.10.4 X-Side Overcurrent subrelay scheme . . . . . . . . . . . . . . . . . . . . 31

3.11 X-Side Voltage subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.11.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.11.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.11.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.11.4 X-Side Voltage subrelay scheme . . . . . . . . . . . . . . . . . . . . . . . 34

3.12 Y-Side Frequency subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

SEL 700G Version: 001 3

List of Figures

3.12.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3.12.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3.12.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3.12.4 Y-Side Frequency subrelay scheme . . . . . . . . . . . . . . . . . . . . . 36

3.13 Y-Side Overcurrent subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.13.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.13.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.13.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

3.13.4 Y-Side Overcurrent subrelay scheme . . . . . . . . . . . . . . . . . . . . 41

3.14 Y-Side Voltage subrelay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

3.14.1 Available Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

3.14.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

3.14.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

3.14.4 Y-Side Voltage subrelay scheme . . . . . . . . . . . . . . . . . . . . . . . 44

3.15 Output logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.15.1 Available Units and Signals . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.15.2 Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.15.3 Data input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

4 Main relay scheme 46

5 Features not supported 47

6 References 48

7 Change Log 49

List of Figures

3.1 Phase Differential subrelay connection scheme . . . . . . . . . . . . . . . . . . . 9

3.2 Impedance subrelay connection scheme . . . . . . . . . . . . . . . . . . . . . . 12

3.3 Neutral Overcurrent subrelay connection scheme . . . . . . . . . . . . . . . . . 14

3.4 Overflux subrelay connection scheme . . . . . . . . . . . . . . . . . . . . . . . . 16

SEL 700G Version: 001 4

List of Figures

3.5 Thermal Image V Toc and Neg seq subrelay connection scheme . . . . . . . . . 19

3.6 Phase Differential subrelay connection scheme . . . . . . . . . . . . . . . . . . . 21

3.7 Power subrelay connection scheme . . . . . . . . . . . . . . . . . . . . . . . . . 24

3.8 X-Side Frequency subrelay connection scheme . . . . . . . . . . . . . . . . . . 26

3.9 X-side Overcurrent subrelay connection scheme . . . . . . . . . . . . . . . . . . 31

3.10 X-Side Voltage subrelay connection scheme . . . . . . . . . . . . . . . . . . . . 34

3.11 Y-Side Frequency subrelay connection scheme . . . . . . . . . . . . . . . . . . . 36

3.12 Y-side Overcurrent subrelay connection scheme . . . . . . . . . . . . . . . . . . 41

3.13 Y-Side Voltage subrelay connection scheme . . . . . . . . . . . . . . . . . . . . 44

4.1 SEL 700G relay connection scheme . . . . . . . . . . . . . . . . . . . . . . . . 46

SEL 700G Version: 001 5

2 General description

1 Model information

Manufacturer SEL

Model 700G

Variants The SEL 700G PowerFactory relay models can be used to simulate the Schweitzer
SEL-700G0, SEL-700G1, SEL-700GT, SEL-700GW relay. However please consider that the
models have been implemented with a reduced set of the features available in the relays.

Minimum requirements PowerFactory V 15.1

2 General description

The SEL-700G Relay is designed to provide comprehensive protection, integration and control
features in a flexible, compact, and cost-effective package. The SEL-700G0 and SEL-700G1
relays provide basic to full generator protection for small to large machines. The SEL-700GT
relay provides complete intertie and generator protection. The SEL-700GW relay provides dual
feeder protection for a multimachine wind generator network application, including overcurrent
protection to feeders, transformers, etc.

The SEL 700G PowerFactory relay models consist of a main relay and thirteen sub relays:

• Ground differential and REF • X-Side Frequency

• Impedance • X-Side Overcurrent
• Neutral Overcurrent
• X-Side Voltage
• Overflux
• Y-Side Frequency
• Phase Differential
• Power • Y-Side Overcurrent

• Thermal Image V Toc and Neg seq • Y-Side Voltage

Two model versions are available, one for each available rated currennt; the two versions are
identical except for the current setting ranges. The model versions are:

• SEL 700G 1A
• SEL 700G 5A

The SEL 700G PowerFactory relay models have been implemented trying to simulate the most
commonly used protective functions. The main relay model contains the measurement and
acquisition units,the output logic and all other sub relays. The model implementation has been
based on the information available in the relay manual [?].

SEL 700G Version: 001 6

3 Supported features

3 Supported features

3.1 Measurement and acquisition

The currents are converted by two three phase current transformer (”Ct X” and ”Ct Y” block), and
one single phase current transformer (”Ct In” block); the voltages are converted by three 3 phase
voltage transformers (”Vt X”, ”Vt Y”, and ”Vt Open Delta” block).

Eight measurement units (”X-Side Measurement”, ”Y-Side Measurement”, ”X- Side Measurement
Seq”, ”Y- Side Measurement Seq”, ”X-Side Phase-Phase Measurement”, ”Y-Side Phase-Phase
Measurement”, ”Meas Neutral I”, and ”Measurement VT open Delta” block) are fed by these CTs
and these VTs.

3.1.1 Available Units

• Two three phase current transformers (”Ct X” and ”Ct Y” block).

• Three three phase voltage transformers (”Vt X”, ”Vt Y”, and ”Vt Open Delta” block).
• One single phase current transformer (”Ct In” block).
• Two three phase measurement elements calculating both the current and voltage values
(”X-Side Measurement”, and ”Y-Side Measurement” block).

• Two three phase measurement elements calculating phase-phase voltage values (”X-Side
Phase-Phase Measurement”, and ”Y-Side Phase-Phase Measurement” block).
• Two three phase measurement elements calculating the current and the voltage sequence
vectors (”X- Side Measurement Seq”, and ”Y- Side Measurement Seq” block).
• One single phase measurement element (”Meas Neutral I” block).

3.1.2 Functionality

Two separated Vt/CT and measurement sets are available in the relay model to simulate the
voltage and current conversion and measurement which is performed by the relay at the X-Side
and at the Y-Side of the generator windings.

The input current and voltage values are sampled at 32 samples/cycle. The average values are
processed by a DFT filter, operating over a cycle, which then calculates the voltage and current
values used by the protective elements.

3.1.3 Data input

Specific relay model versions are available for the 1A and the 5A secondary rated current relay
versions so no user input is required for the rated current value but the right relay model version
must be used. The nominal voltage values MUST be entered in any measurement block which
models a voltage measurement.

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3 Supported features

3.2 Ground Differential and REF subrelay

The Ground Differential and REF subrelay models the restricted earth fault feature and the
ground differential feature.

3.2.1 Available Units

• Two single phase time delayed differential element (”Ground Differential 1” and ”Ground
Differential 2” block).
• One single phase differential element (’REF” block).
• Three differential ancillary single phase measurement elements (”Ground Differential 1
RMS Measure”, ”Ground Differential 2 RMS Measure”, and ”REF RMS Measure” block).

• One single phase directional element (”REF angle” block).

• One subrelay trip element (”Output logic” block).

3.2.2 Functionality

The Ground Differential and REF subrelay contains a restricted earth fault (REF)element and
two ground differential elements. The elements compare the residual current calculated by the
measurement block adding the phase currents with the neutral current measured buy the single
phase CT. The REF element discriminates the internal fault using a directional element which
compares the angle between the residual current and the neutral current.

3.2.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

GND DIFF EN (Y, N) E87N Ground Differential 1 Out of Service (outserv)
Ground Differential 2 Out of Service (outserv)
LVL1 GND DIFF PU 87N1P Ground Differential 1 Release Threshold (Idiff)
LVL1 GND DIFF DLY 87N1D Ground Differential 1 Time Setting (Tset)
LVL2 GND DIFF PU 87N2P Ground Differential 2 Release Threshold (Idiff)
LVL2 GND DIFF DLY 87N2D Ground Differential 2 Time Setting (Tset)
REF ENABLE (Y, N) EREF REF Out of Service (outserv)
REF1 CURR LEVEL 50REF1P REF Release Threshold (Idiff)
REF1 TRQCTRL REF1TC REF angle Out of Service (outserv)

SEL 700G Version: 001 8

3 Supported features

3.2.4 Ground Differential subrelay scheme

Figure 3.1: Phase Differential subrelay connection scheme

SEL 700G Version: 001 9

3 Supported features

3.3 Impedance subrelay

The Impedance subrelay subrelay simulate a set of polarizing elements, blinders and mho
distance elements connected together to model the SEL 700G relay loss of field, underimpedance
and out of step features.

3.3.1 Available Units

• Two under impedance elements (”Z1” and ”Z2” block).

• Two under impedance minimum current elements (”Z1 CURRENT FD”, and ”Z2 CURRENT
FD” block).
• Two under impedance timers (”Z1 TIME DLY”, ”Z2 TIME DLY” block).

• Two loss of field elements (”LOSS OF FIELD Z1” and ”LOSS OF FIELD Z2” block).
• Two loss of field timers (”LOSS OF FIELD Z1 TIME DELAY” and ”LOSS OF FIELD Z2
TIME DELAY” block).
• One out of step mho detection element (”OOS mho” block).

• Six out of step blinder detection elements ( ”Right blinder”, ”Left blinder”, ”Outer blin-
der”,”Inner blinder”, ”Outer blinder-”, and ”Inner blinder-” block).
• Four timers (”OSS DELAY 1”, ”OSS DELAY 2”, ”OSS TRIP DELAY”, and ”OOS TRIP DUR”
block).

• One out of step logic element (”oos logic”’ block).

• Two polarizing elements (”Polarizing distance backup” and ”Polarizing field failure/oos”block).
• One subrelay output logic element (”Output Logic” block).

3.3.2 Functionality

Underimpedance elements The Underimpedance elements are modeled by two PowerFac-

tory impedance elements which simulate two mho elements with user configurable offset and
minimum operation current. The elements are fed by the ”Polarizing distance backup” element
which calculates the phase-ground loop operating voltages and currents used to calculate the
impedance value. A separate timer is associated to each impedance element.
The impedance elements are blocked by the X-Side load encroachment element (”X-Side Over-
current” subrelay).

Loss of field elements The Loss of field elements are modeled by two PowerFactory mho
elements which simulate two offset mho with offset set along the negative part of the X axis in the
R-X diagram. The elements are fed by the ”Polarizing field failure/oos” block which calculates the
single phase operating current and voltage and the polarizing voltage used by the mho vectorial
calculation. A separate timer is associated to each mho element.

SEL 700G Version: 001 10

3 Supported features

Power swing detection elements The power swing detection area is modeled by one Power-
Factory mho element and by six impedance blinders. Both the Single-Blinder Scheme and the
Double-Blinder Scheme is supported.

The elements are fed by the ”Polarizing field failureoos” block which calculates the single phase
operating current and voltage and the polarizing voltage used by the mho and the blinders
vectorial calculation.

The trip signals of the mho element and of the impedance blinders are combined by the ”oos
logic” element which calculates the trip signal of zone A and C and of zone B. The mho and the
blinder elements are controlled by a minimum current release element. The zone trip signals
are them processed by the ”OOS” element which implements the out of step logic. The output
signal is on when an out of step has been detected. An user configurable trip delay and an user
configurable trip reset delay are available. The Single Blinder and the Double Blinder scheme is
supported. Please notice that when the Single Blinder scheme is used the ”Outer blinder”,”Inner
blinder”, ”Outer blinder-”, and”Inner blinder-” blocks must be disabled. When the Double Blinder
scheme is used the ”Right blinder”, and the ”Left blinder” block must be disabled.

3.3.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following tables (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

BACKUP PROT EN Z1 Out of Service (outserv)
Z2 Out of Service (outserv)
Z1 COMP REACH Z1 Replica Impedance (Zm)
Z1 COMP OFFSET Z1 Offset Impedance (Zoff)
Z1 COMP TIME DLY LOSS OF FIELD Z1 Time Setting (Tdelay)
TIME DELAY
Z1 CURRENT FD Z1 Current I > >(Ip2)
Z1 POS-SEQ AN- Z1 Relay Angle (phi)
GLE
Z2 COMP REACH Z2 Replica Impedance (Zm)
Z2 COMP OFFSET Z2 Offset Impedance (Zoff)
Z2 COMP TIME DLY LOSS OF FIELD Z2 Time Setting (Tdelay)
TIME DELAY
Z2 CURRENT FD Z2 Current I > >(Ip2)
Z2 POS-SEQ AN- Z2 Relay Angle (phi)
GLE
LOSS OF FIELD EN LOSS OF FIELD Z1 Out of Service (outserv)
E40
LOSS OF FIELD Z2 Out of Service (outserv)
Z1 MHO DIAME- LOSS OF FIELD Z1 Replica Impedance (Zm)
TER 40Z1P
Z1 OFFSET 40XD1 LOSS OF FIELD Z1 Offset Impedance (Zoff) 40XD1 = -Zoff
Z1 TIME DELAY LOSS OF FIELD Z1 Time Setting (Tdelay)
40Z1D
Z2 MHO DIAME- LOSS OF FIELD Z2 Replica Impedance (Zm)
TER 40Z2P
Z2 OFFSET 40XD2 LOSS OF FIELD Z2 Offset Impedance (Zoff) 40XD2 = -Zoff
Z2 TIME DELAY LOSS OF FIELD Z2 Time Setting (Tdelay)
40Z2D
Z2 DIR ANGLE LOSS OF FIELD Z2 Directional Angle (phi)
DIR ANGLE
OUT-OF-STEP OOS mho Out of Service (outserv) Activation of some blinders
PROT E78 if 1B or 2B
Left Blinder Out of Service (outserv)
Right Blinder Out of Service (outserv)
Inner Blinder Out of Service (outserv)
Outer Blinder Out of Service (outserv)
Inner Blinder- Out of Service (outserv)
Outer Blinder- Out of Service (outserv)

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3 Supported features

Address Relay Setting Model block Model setting Note

FORWARD REACH OOS mho Replica Impedance (Zm)
78FWD
REVERSE REACH OOS mho Offset Impedance (Zoff)
78REV
RIGHT BLINDER Right blinder Resistance (R)
78R1
LEFT BLINDER Left blinder Resistance (R)
78R2
OUTER BLINDER Outer Blinder Resistance (R)
78R1
Outer Blinder- Resistance (R)
INNER BLINDER Inner Blinder Resistance (R)
78R2
Inner Blinder- Resistance (R)
OOS DELAY 78D OSS DELAY 1 Time Setting (Tdelay)
OSS DELAY 2 Time Setting (Tdelay)
OOS TRIP DELAY OSS TRIP DELAY Time Setting (Tdelay)
78TD
OOS TRIP DUR OOS TRIP DUR Time Setting (Tdelay)
78TDURD
POS-SEQ CUR-
RENT 50ABC

3.3.4 Impedance subrelay scheme

Figure 3.2: Impedance subrelay connection scheme

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3 Supported features

3.4 Neutral Overcurrent subrelay

The Neutral Overcurrent sub relay model simulates the inverse time and definite time neutral
overcurrent elements fed by the current measured in the neutral connection at the generator
X-side.

3.4.1 Available Units

• One single phase (neutral) directional inverse time overcurrent element (”Neut Toc” block).
• Two single phase (neutral) directional definite time overcurrent elements (”Neut Ioc1”, and
”Neut Ioc2” block).
• One output logic element (”Output Logic” block).

3.4.2 Functionality

The Neutral Overcurrent sub relay simulates the complete set of neutral overcurrent elements
available in the SEL 700G relay. The neutral current is converted by the ”Ct In” Ct and measured
by the ”Meas Neutral I” measurement block.

The inverse time element supports the following inverse time and definite time trip characteristics
(each characteristic is also associate to an inverse time reset characteristic):

• C1 - IEC Class A (Standard Inverse)

• C2 - IEC Class B (Very Inverse)

• C3 - IEC Class C (Extremely Inverse)
• C4 - IEC Long Time Inverse
• C5 - IEC Short Time Inverse

• U1 - U.S. Moderately Inverse

• U2 - U.S. Inverse
• U3 - U.S. Very Inverse

• U4 - U.S. Extremly Inverse

• U5 - U.S. Short Time Inverse

The delayed reset characteristic can be enabled or disabled by the user for each inverse time
overcurrent element. The inverse time element trip characteristic equations comply with the IEC
60255-3 and the ANSI standards.

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3 Supported features

3.4.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

NEUT IOC LEVEL 50N1P Res Ioc1 Pickup Current (Ipsetr)
Out of Service (outserv) outserv=1 when 50N1P = OFF
NEUT IOC DELAY 50N1D Res Ioc1 Time Setting (Tset)
NEUT IOC TRQCTRL 50N1TC Res Ioc1 Tripping Direction (idir)
NEUT IOC LEVEL 50N2P Res Ioc2 Pickup Current (Ipsetr)
Out of Service (outserv) outserv=1 when 50N2P = OFF
NEUT IOC DELAY 50N2D Res Ioc2 Time Setting (Tset)
NEUT IOC TRQCTRL 50N2TC Res Ioc2 Tripping Direction (idir)
NEUT TOC LEVEL 51NP Res Toc Current Setting (Ipsetr)
Out of Service (outserv) outserv=1 when 51NP = OFF
NEUT TOC CURVE 51NC Res Toc Characteristic (pcharac)
RNEUTES TOC TDIAL 51NTD Res Toc Time Dial (Tpset)
EM RESET DELAY 51NRS Res Toc Reset Characteristic (re-
setdis)
CONST TIME ADDER 51NCT Res Toc Time Adder (Tadder)
MIN RESPONSE TIM 51NMR Res Toc Min. Response Time (min-
resptime)
NEUT TOC TRQCTRL 51NTC Res Toc Tripping Direction (idir)

3.4.4 Neutral Overcurrent subrelay scheme

Figure 3.3: Neutral Overcurrent subrelay connection scheme

SEL 700G Version: 001 14

3 Supported features

3.5 Overflux subrelay

The Overflux subrelay simulates the overfluxing protective elements.

3.5.1 Available Units

• One inverse time over flux elements (”LVL2 INV” block).

• Three definite time over flux elements (”LVL1”, ”LVL2 DT1”, and ”LVL2 DT2” block).
• One frequency calculation element (”Meas Freq” block).
• One flux calculation element (”V/Hz calculator” block).

• One max voltage selector element (”Max U” block).

• One sub relay output logic element (”Output Logic” block).

3.5.2 Functionality

The frequency is calculated by the ”Meas Freq”block which uses by default the phase A-phase B
voltage for its calculation (the parameter is user configurable). The calculated frequency value is
then used by the ”V/Hz calculator” block to calculate the flux value.
The flux is calculated using the highest voltage value.

An user configurable characteristic is available and can be used in the ”LVL2 INV” block.

3.5.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

ENABLE V/HZ PROT E24 LVL1 Out of Service (outserv)
LVL2 INV Out of Service (outserv)
LVL2 DT1 Out of Service (outserv)
LVL2 DT2 Out of Service (outserv)
LVL1 V/HZ PICKUP 24D1P LVL1 Input Setting (Ipset)
LVL1 TIME DLY 24D1D LVL1 Time Dial (Tpset)
LVL2 INV-TM PU 24IP LVL2 INV Input Setting (Ipset)
LVL2 INV-TM CURV 24IC LVL2 INV Characteristic (pcharac)
LVL2 INV-TM FCTR 24ITD LVL2 INV Time Dial (Tpset)
LVL2 PICKUP 1 24D2P1 LVL2 DT1 Input Setting (Ipset)
LVL2 TIME DLY 1 24D2D1 LVL2 DT1 Time Dial (Tpset)
LVL2 PICKUP 2 LVL2 DT2 Input Setting (Ipset)
LVL2 TIME DLY 2 LVL2 DT2 Time Dial (Tpset)
LVL2 RESET TIME 24CR LVL2 INV Reset Delay (ResetT)
LVL2 DT1 Reset Delay (ResetT)
LVL2 DT2 Reset Delay (ResetT)

The LVL2 element s must be enabled or disabled accordingly with the LVL2 CURVE SHAPE
24CCS value. When LVL2 CURVE SHAPE 24CCS is equal to ’U’ disable the ” LVL2 DT1 ” block
and the ” LVL2 DT2” block and select the 24IC U characteristic in the ”LVL2 INV” block. When
LVL2 CURVE SHAPE 24CCS is equal to ’DD’ disable the ”LVL2 INV” block and enable the ”LVL2
DT1” block and the ” LVL2 DT2” block. When LVL2 CURVE SHAPE 24CCS is equal to ’ID’

SEL 700G Version: 001 15

3 Supported features

disable the ”LVL2 DT2” block and enable the ”LVL2 INV” block and the ” LVL2 DT1” block. When
LVL2 CURVE SHAPE 24CCS is equal to ’I’ disable the ”LVL2 DT1” block and the ”LVL2 DT2”
block and enable the ”LVL2 INV” block .

3.5.4 Overflux subrelay scheme

Figure 3.4: Overflux subrelay connection scheme

SEL 700G Version: 001 16

3 Supported features

3.6 Thermal Image V Toc and Neg seq subrelay

The Thermal Image V Toc and Neg seq sub relay model simulates the thermal image protective
function, the voltage control/voltage restrained inverse time overcurrent element and the negative
sequence overcurrent elements.

3.6.1 Available Units

• Two thermal image overcurrent elements (”Thermal image 1” , and ”Thermal image 2”
block).
• One negative sequence inverse time overcurrent element (”Current Unbalance Level 2”
block).
• One negative sequence definite time overcurrent element (”Current Unbalance Level 1”
block).
• One 3 phase inverse time overcurrent element with voltage restrained feature(”Volt-
Restrained TOC”, and ”V restraint” block).
• One 3 phase inverse time overcurrent element with voltage control feature(”Volt-Control
TOC”, and ”V control” block).
• One output logic element (”Output Logic” block).

3.6.2 Functionality

The Thermal Image V Toc and Neg sub relay simulates the thermal image feature using two
block: one for each thermal image constant.

The inverse time element supports the following inverse time and definite time trip characteristics
(each characteristic is also associate to an inverse time reset characteristic):

• C1 - IEC Class A (Standard Inverse)

• C2 - IEC Class B (Very Inverse)
• C3 - IEC Class C (Extremely Inverse)
• C4 - IEC Long Time Inverse
• C5 - IEC Short Time Inverse
• U1 - U.S. Moderately Inverse
• U2 - U.S. Inverse
• U3 - U.S. Very Inverse
• U4 - U.S. Extremly Inverse
• U5 - U.S. Short Time Inverse

The delayed reset characteristic can be enabled or disabled by the user for each inverse time
overcurrent element. The inverse time element trip characteristic equations comply with the IEC
60255-3 and the ANSI standards.

SEL 700G Version: 001 17

3 Supported features

3.6.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

THERM OVERLD EN E49T Thermal image 1 Out of Service (outserv)
Thermal image 2 Out of Service (outserv)
THERM OL TRIP PU 49TTP Thermal image 1 Current Setting (Ipsetr)
TIME CONSTANT1 GTC1 Thermal image 1 Time Dial (Tpset)
TIME CONSTANT2 GTC2 Thermal image 2 Time Dial (Tpset)
NEG-SEQ OC ENBL E46 Current Unbalance Out of Service (outserv)
Level 1
Current Unbalance Out of Service (outserv)
Level 2
LVL1 NEQ-SEQ O/C 46Q1P Current Unbalance Pickup Current (Ipsetr)
Level 1
Out of Service (outserv) Set outserv=1 when
46Q1P = OFF
LVL1 TIME DELAY 46Q1D Current Unbalance Time Setting (Tset)
Level 1
LVL2 NEQ-SEQ O/C 46Q2P Current Unbalance Current Setting (Ipsetr)
Level 2
Out of Service (outserv) Set outserv=1 when
46Q2P = OFF
LVL2 TIME DIAL 46Q2K Current Unbalance Time Dial (Tpset)
Level 2
46Q TRQCTRL 46QTC Current Unbalance Tripping Direction (idir)
Level 1
Current Unbalance Tripping Direction (idir)
Level 2
V-CTRL TOC LVL 51CP Volt-Control TOC Current Setting (Ipsetr)
Out of Service (outserv) Set outserv=1 when 51CP
= OFF
V-CTRL TOC CURVE 51CC Volt-Control TOC Characteristic (pcharac)
V-CTRL TOC TDIAL 51CTD Volt-Control TOC Time Dial (Tpset)
V-CTR TOC EM RST 51CRS Volt-Control TOC Reset Characteristic (re-
setdis)
51C TOC TRQCTRL 51CTC Volt-Control TOC Tripping direction (idir)
V-RESTR TOC LVL 51VP Volt-Restrained Current Setting (Ipsetr)
TOC
Out of Service (outserv) Set outserv=1 when 51VP
= OFF
V-RESTR TOC CURV 51VC Volt-Restrained Characteristic (pcharac)
TOC
V-RESTR TOC TDIAL Volt-Restrained Time Dial (Tpset)
51VTD TOC
V-RES TOC EM RST 51VRS Volt-Restrained Reset Characteristic (re-
TOC setdis)
51V TOC TRQCTRL 51VTC Volt-Restrained Tripping direction (idir)
TOC

SEL 700G Version: 001 18

3 Supported features

3.6.4 Thermal Image V Toc and Neg seq subrelay scheme

Figure 3.5: Thermal Image V Toc and Neg seq subrelay connection scheme

SEL 700G Version: 001 19

3 Supported features

3.7 Phase Differential subrelay

The Phase Differential subrelay contains one 3 phase differential with double slope current
restrained threshold, 2nd unrestrained differential threshold and 2nd , 4th and 5th harmonic
blocking. The Ct ratios, voltage levels and winding connections can be compensated using two
Ct adapter elements. The 2nd , and the 4th harmonic blocking have a phase interblocking feature
(Common blocking prevents all restrained elements (87Rn) from tripping if any blocking element
is picked up). An independent blocking is used for the fifth harmonic current.
For harmonic restraint, the values of the second- and fourth-harmonic currents are summed, and
that value is used in the relay characteristic.

3.7.1 Available Units

• One 3 phase differential element (”Generator Differential” block).

• One differential ancillary 3 phase measurement element (”Diff RMS Measure” block).
• Three harmonic measurement elements (”Diff 2nd Harmonic Measure”, ”Diff 4th Harmonic
Measure”, and ”Diff 5th Harmonic Measure” block).

• Two ct adaption elements (”Adapter 1”, and ”Adapter 2” block).

• One subrelay output logic element (”Output Logic” block).

3.7.2 Functionality

The Differential subrelay implements a segregated 3 phase differential element with double slope
bias restraint characteristic, with 2nd , 4th and 5th harmonic blocking and restraint. An additional
unrestrained differential threshold is also available.

3.7.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

PHASE DIFF EN E87 Differential Out of Service (outserv) outserv=1 when NONE
MAX XFMR CAP MVA Differential Max Rated Power (maxpower)
X PH CT RATIO CTRX Adapter 1 Current Transformer Ratio (CTratio)
X SIDE PT CONN Adapter 1 Current Transformer Connec-
DELTAY_X tion(icontype)
WDG-X L-L VOLTS Adapter 1 Nominal Terminal Line-Line Voltage
VWDGX (LLVolt)
Y PH CT RATIO CTRY Adapter 2 Current Transformer Ratio (CTratio)
Y SIDE PT CONN Adapter 2 Current Transformer Connec-
DELTAY_Y tion(icontype)
WDG-Y L-L VOLTS Adapter 2 Nominal Terminal Line-Line Voltage
VWDGY (LLVolt)
Y SIDE CT COMP CTCY Adapter 2 Transformer Group (trasfgroup)
X SIDE CURR TAP TAPX Differential Tap 1 (tap1) In the Tap tab page
Y SIDE CURR TAP TAPY Differential Tap 2 (tap2) In the Tap tab page
OPERATE CURR LVL Differential Release Threshold (Idiffr2)
O87P
UNRES CURR LVL Differential Unrestrained Differential Threshold
U87P (Idiffunrestr2)
RESTRAINT SLOPE1 Differential Restraint 1st Slope (Irestrpercent1)
SLP1

SEL 700G Version: 001 20

3 Supported features

Address Relay Setting Model block Model setting Note

RESTRAINT SLOPE2 Differential Restraint 2nd Slope (Irestrpercent2)
SLP2
RES SLOPE1 LIMIT Differential Restraint 2nd Slope Threshold
IRS1
2ND HARM BLOCK Differential 2nd Harmonic Blocking Threshold In the Harmonic Block-
PCT2 (H2threshold) ing tab page
4TH HARM BLOCK Differential 4th Harmonic Blocking Threshold In the Harmonic Block-
PCT4 (H4threshold) ing tab page
5TH HARM BLOCK Differential 5th Harmonic Blocking Threshold In the Harmonic Block-
PCT5 (H5threshold) ing tab page
HARMONIC BLOCK Differential Disable Harmonic blocking (harm- In the Harmonic Block-
HBLK blockdisable) ing tab page
HARMONIC RESTRNT C calculator HARMONIC_RESTRNT In the Logic tab page
HRSTR

3.7.4 Phase Differential subrelay scheme

Figure 3.6: Phase Differential subrelay connection scheme

SEL 700G Version: 001 21

3 Supported features

3.8 Power subrelay

The Power subrelay simulates the complete set of forward/reverse active overpower, and for-
ward/reverse active underpower, forward/reverse reactive overpower, and forward/reverse reac-
tive underpower elements which are available in the relay.

3.8.1 Available Units

• Four forward active over power definite time elements (”PWR ELEM P FWD 1”, ”PWR
ELEM P FWD 2”, ”PWR ELEM P FWD 3”, and ”PWR ELEM P FWD 4” block).
• Four reverse active over power definite time elements (”PWR ELEM P REV 1”, ”PWR
ELEM P REV 2”, ”PWR ELEM P REV 3” and ”PWR ELEM P REV 4” block).

• Four forward reactive over power definite time elements (”PWR ELEM Q FWD 1”, ”PWR
ELEM Q FWD 2”, ”PWR ELEM Q FWD 3”, and ”PWR ELEM Q FWD 4” block).
• Four reverse reactive over power definite time elements (”PWR ELEM Q REV 1”, ”PWR
ELEM Q REV 2”, ”PWR ELEM Q REV 3” and ”PWR ELEM Q REV 4” block).

• One output logic element (”Output Logic” block).

3.8.2 Functionality

Four stages of 3 phase power protection are present in the relay, these can be independently
selected as either reverse or forward, active or reactive power, over power or under power
protective elements.

In the relay model for each power protective element 4 blocks have been implemented: an active
forward over power element, a reactive forward over power element, an active reverse over power
element, and a reactive reverse over power element. The overpower/underpower logic can be
simulated in the ”Output Logic” block: in the ”Logic” tab page any output logic can be inserted;
to simulate an under power element simply negate the output value of the relevant overpower
element.

The forward active power and the reverse active power are calculated by the ”PQ calc” block which
processes the 3 phase active and reactive power values calculated by the ”Power Calculator’
block.

3.8.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

ENABLE PWR ELEM EPWRX PWR ELEM j1 1 Out of Service (outserv)
PWR ELEM j1 2 Out of Service (outserv)
PWR ELEM j1 3 Out of Service (outserv)
PWR ELEM j1 4 Out of Service (outserv)
3PH PWR ELEM PU 3PWRX1P PWR ELEM j1 1 Input Setting (Ipsetr)

1j = P FWD, P REV, Q FWD, Q REV

SEL 700G Version: 001 22

3 Supported features

Address Relay Setting Model block Model setting Note

PWR ELEM TYPE PWRX1T PWR ELEM j1 1 Out of Service (outserv) Enable PWR ELEM P
FWD 1 when PWRX1T
= WATTS, PWR
ELEM P REV 1 when
PWRX1T = -WATTS,
PWR ELEM Q FWD
1 when PWRX1T =
VARS, PWR ELEM Q
REV 1 when PWRX1T
= -VARS
PWR ELEM DELAY PWRX1D PWR ELEM j1 1 Time Dial (Tpset)
3PH PWR ELEM PU 3PWRX2P PWR ELEM j1 2 Input Setting (Ipsetr)
PWR ELEM TYPE PWRX2T PWR ELEM j1 2 Out of Service (outserv) Enable PWR ELEM P
FWD 2 when PWRX1T
= WATTS, PWR
ELEM P REV 2 when
PWRX1T = -WATTS,
PWR ELEM Q FWD
2 when PWRX1T =
VARS, PWR ELEM Q
REV 2 when PWRX1T
= -VARS
PWR ELEM DELAY PWRX2D PWR ELEM j1 2 Time Dial (Tpset)
3PH PWR ELEM PU 3PWRX3P PWR ELEM j1 3 Input Setting (Ipsetr)
PWR ELEM TYPE PWRX3T PWR ELEM j1 3 Out of Service (outserv) Enable PWR ELEM P
FWD 3 when PWRX1T
= WATTS, PWR
ELEM P REV 3 when
PWRX1T = -WATTS,
PWR ELEM Q FWD
3 when PWRX1T =
VARS, PWR ELEM Q
REV 3 when PWRX1T
= -VARS
PWR ELEM DELAY PWRX3D PWR ELEM j1 3 Time Dial (Tpset)
3PH PWR ELEM PU 3PWRX4P PWR ELEM j1 4 Input Setting (Ipsetr)
PWR ELEM TYPE PWRX4T PWR ELEM j1 4 Out of Service (outserv) Enable PWR ELEM P
FWD 4 when PWRX1T
= WATTS, PWR
ELEM P REV 4 when
PWRX1T = -WATTS,
PWR ELEM Q FWD
4 when PWRX1T =
VARS, PWR ELEM Q
REV 4 when PWRX1T
= -VARS
PWR ELEM DELAY PWRX4D PWR ELEM j1 4 Time Dial (Tpset)

SEL 700G Version: 001 23

3 Supported features

3.8.4 Power subrelay scheme

Figure 3.7: Power subrelay connection scheme

SEL 700G Version: 001 24

3 Supported features

3.9 X-Side Frequency subrelay

The X-Side Frequency subrelay simulates the set of overfrequency , underfrequency, and rate of
change of frequency protective elements which monitor the frequency measured at the generator
X winding side.

3.9.1 Available Units

• Six definite time over/under frequency elements (”FREQ TRIP1”, ”FREQ TRIP2”, ”FREQ
TRIP3”, ”FREQ TRIP4”, ”FREQ TRIP5” and ”FREQ TRIP6” block).
• Four definite time rate of change of frequency elements (”FREQX ROC1”, ”FREQX ROC2”,
”FREQX ROC3”, and ”FREQX ROC4” block).

• One frequency calculation element (”Meas Freq” block).

• One output logic element (”Output Logic” block).

3.9.2 Functionality

The frequency is calculated by the ”Meas Freq”block which uses by default the phase A-phase B
voltage for its calculation (the parameter is user configurable). The calculated frequency value is
then used by the overfrequency/underfrequency elements and by the rate of change of frequency
elements.
The each frequency element operates as over frequency elements when the frequency threshold
is greater than the system rated frequency, as under frequency element when the frequency
threshold is smaller than the system rated frequency.

3.9.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

ENABLE 81X FREQ TRIP y2 Out of Service (outserv)
FREQX TRIPy2 L FREQ TRIP y2 Frequency (Fset)
FREQX TRIPy2 Y FREQ TRIP y2 Time Delay (Tdel)
ENABLE 81RX E81RX FREQX ROC x3 Out of Service (outserv)
FREQX ROC LEVEL 81RXx3 FREQX ROC x3 Gradient df/dt (dFset)
FREQX ROC PU DLY 81RXx3 FREQX ROC x3 Time Delay (Tdel)

2y = 1,2,3,4,5,6
3x = 1,2,3,4

SEL 700G Version: 001 25

3 Supported features

3.9.4 X-Side Frequency subrelay scheme

Figure 3.8: X-Side Frequency subrelay connection scheme

SEL 700G Version: 001 26

3 Supported features

3.10 X-Side Overcurrent subrelay

The X-Side Overcurrent sub relay model simulates the phase, residual, and negative sequence
overcurrent elements which protect the ”X” winding side of the generator.

3.10.1 Available Units

• One 3phase directional inverse time overcurrent element (”Phase Toc” block).
• Three 3phase directional definite time overcurrent elements (”Phase Ioc1”, ”Phase Ioc2”,
and ”Phase Ioc3” block).
• One residual directional inverse time overcurrent element (”Res Toc” block).

• Two residual directional definite time overcurrent elements (”Res Ioc1”, and ”Res Ioc2”
block).
• One residual directional inverse time overcurrent element (”Res Toc” block).
• Two residual directional definite time overcurrent elements (”Res Ioc1”, and ”Res Ioc2”
block).

• One negative sequence directional inverse time overcurrent element (”Nseq Toc” block).
• Two negative sequence directional definite time overcurrent elements (”Nseq Ioc1”, and
”Nseq Ioc2” block).
• One directional element (”Sel Dir” block).

• One 3 phase load encroachment block (”Load encroachment” block).

• One 3 phase polarizing block (”Polarizing” block).
• One output logic element (”Output Logic” block).

3.10.2 Functionality

The X-Side Overcurrent sub relay simulate the complete set of 3phase , residual current and
negative sequence current available in the SEL 700G relay. Any element can be set as forward
or reverse directional or as non directional. Each overcurrent element can be separately set to
be blocked or not by the load encroachment feature.

The inverse time elements support the following inverse time and definite time trip characteristics
(each characteristic is also associate to an inverse time reset characteristic):

• C1 - IEC Class A (Standard Inverse)

• C2 - IEC Class B (Very Inverse)

• C3 - IEC Class C (Extremely Inverse)
• C4 - IEC Long Time Inverse
• C5 - IEC Short Time Inverse

• U1 - U.S. Moderately Inverse

• U2 - U.S. Inverse

SEL 700G Version: 001 27

3 Supported features

• U3 - U.S. Very Inverse

• U4 - U.S. Extremly Inverse

• U5 - U.S. Short Time Inverse

The delayed reset characteristic can be enabled or disabled by the user for each inverse time
overcurrent element. The inverse time element trip characteristic equations comply with the IEC
60255-3 and the ANSI standards.

3.10.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

PHASE IOC LEVEL Phase Ioc1 Pickup Current (Ipsetr)
50PX1P
Out of Service (outserv) outserv=1 when 50PX1P = OFF
PHASE IOC DELAY Phase Ioc1 Time Setting (Tset)
50PX1D
PH IOC TRQCTRL Phase Ioc1 Tripping Direction (idir)
50PX1TC
PHASE IOC LEVEL Phase Ioc2 Pickup Current (Ipsetr)
50PX2P
Out of Service (outserv) outserv=1 when 50PX2P = OFF
PHASE IOC DELAY Phase Ioc2 Time Setting (Tset)
50PX2D
PH IOC TRQCTRL Phase Ioc2 Tripping Direction (idir)
50PX2TC
PHASE IOC LEVEL Phase Ioc3 Pickup Current (Ipsetr)
50PX3P
Out of Service (outserv) outserv=1 when 50PX3P = OFF
PHASE IOC DELAY Phase Ioc3 Time Setting (Tset)
50PX3D
PH IOC TRQCTRL Phase Ioc3 Tripping Direction (idir)
50PX3TC
RES IOC LEVEL Res Ioc1 Pickup Current (Ipsetr)
50GX1P
Out of Service (outserv) outserv=1 when 50GX1P = OFF
RES IOC DELAY Res Ioc1 Time Setting (Tset)
50GX1D
RES IOC TRQCTRL Res Ioc1 Tripping Direction (idir)
50GX1TC
RES IOC LEVEL Res Ioc2 Pickup Current (Ipsetr)
50GX2P
Out of Service (outserv) outserv=1 when 50GX2P = OFF
RES IOC DELAY Res Ioc2 Time Setting (Tset)
50GX2D
RES IOC TRQCTRL Res Ioc2 Tripping Direction (idir)
50GX2TC
NSEQ IOC LEVEL Nseq Ioc1 Pickup Current (Ipsetr)
50QX1P
Out of Service (outserv) outserv=1 when 50QX1P = OFF
NSEQ IOC DELAY Nseq Ioc1 Time Setting (Tset)
50QX1D
NSEQ IOC TRQCTRL Nseq Ioc1 Tripping Direction (idir)
50QX1TC
NSEQ IOC LEVEL Nseq Ioc2 Pickup Current (Ipsetr)
50QX2P
Out of Service (outserv) outserv=1 when 50QX2P = OFF
NSEQ IOC DELAY Nseq Ioc2 Time Setting (Tset)
50QX2D
NSEQ IOC TRQCTRL Nseq Ioc2 Tripping Direction (idir)
50QX2TC

SEL 700G Version: 001 28

3 Supported features

Address Relay Setting Model block Model setting Note

PHASE TOC LEVEL Phase Toc Current Setting (Ipsetr)
51PXP
Out of Service (outserv) outserv=1 when 51PX1P = OFF
PHASE TOC CURVE Phase Toc Characteristic (pcharac)
51PXC
PHASE TOC TDIAL Phase Toc Time Dial (Tpset)
51PXTD
EM RESET DELAY Phase Toc Reset Characteristic (re-
51PXRS setdis)
CONST TIME ADDER Phase Toc Time Adder (Tadder)
51PXCT
MIN RESPONSE TIM Phase Toc Min. Response Time (min-
51PXMR resptime)
PH TOC TRQCTRL Phase Toc Tripping Direction (idir)
51PXTC
RES TOC LEVEL Res Toc Current Setting (Ipsetr)
51GXP
Out of Service (outserv) outserv=1 when 51GX1P = OFF
RES TOC CURVE Res Toc Characteristic (pcharac)
51GXC
RES TOC TDIAL Res Toc Time Dial (Tpset)
51GXTD
EM RESET DELAY Res Toc Reset Characteristic (re-
51GXRS setdis)
CONST TIME ADDER Res Toc Time Adder (Tadder)
51GXCT
MIN RESPONSE TIM Res Toc Min. Response Time (min-
51GXMR resptime)
RES TOC TRQCTRL Res Toc Tripping Direction (idir)
51GXTC
NSEQ TOC LEVEL Nseq Toc Current Setting (Ipsetr)
51QXP
Out of Service (outserv) outserv=1 when 51QX1P = OFF
NSEQ TOC CURVE Nseq Toc Characteristic (pcharac)
51QXC
NSEQ TOC TDIAL Nseq Toc Time Dial (Tpset)
51QXTD
EM RESET DELAY Nseq Toc Reset Characteristic (re-
51QXRS setdis)
CONST TIME ADDER Nseq Toc Time Adder (Tadder)
51QXCT
MIN RESPONSE TIM Nseq Toc Min. Response Time (min-
51QXMR resptime)
NSEQ TOC TRQCTRL Nseq Toc Tripping Direction (idir)
51QXTC
LOAD ENCROACH Load encroach- Out of Service (outserv)
EN ment
FWD LD IMPEDANCE Load encroach- ZLF (ZLF)
ZLFX ment
POS-FWD LD ANGLE Load encroach- PLAF (PLAF)
PLAFX ment
NEG-FWD LD ANGLE Load encroach- NLAF (NLAF)
NLAFX ment
POS SQ LN Z MAG Sel Dir Positive Sequence Line In the ”Negative sequence” tab
Z1MAGX Impedance Magnitude page
Z1MAG (Zm)
POS SQ LN Z ANG Sel Dir Positive sequence line In the ”Negative sequence” tab
Z1ANGX impedance angle Z1ANG page
(phi)
ZERO SQ LN Z MAG Sel Dir Zero sequence line In the ”Ground” tab page
Z0MAGX impedance magnitude
Z0MAG (Z0)
ZERO SQ LN Z ANG Sel Dir Zero sequence line In the ”Ground” tab page
Z0ANGX impedance angle Z0ANG
(phi0)
DIR CONTROL LVL1 Sel Dir Level 1 direction (DIR1) In the ”Basic settings" tab page
DIR1X
DIR CONTROL LVL2 Sel Dir Level 2 direction (DIR2) In the ”Basic settings" tab page
DIR2X

SEL 700G Version: 001 29

3 Supported features

Address Relay Setting Model block Model setting Note

GND DIR PRIORITY Sel Dir Ground directional ele- In the ”Basic settings” tab page
ORDERX ment priority(ORDER)
PH DIR 3PH LVL Sel Dir Phase directional element In the ”Phase” tab page
50PDIRPX 3-phase pickup 50P32P
(s50P32P)
FWD DIR Z2 LVL Sel Dir Forward directional Z2 In the ”Negative sequence” tab
Z2FX threshold Z2F page
REV DIR Z2 LVL Z2RX Sel Dir Reverse directional Z2 In the ”Negative sequence” tab
threshold Z2R page
FWD DIR NSEQ LVL Sel Dir Forward directional current In the ”Negative sequence” tab
50QFPX threshold (s50QF) page
REV DIR NSEQ LVL Sel Dir Reverse directional cur- In the ”Negative sequence” tab
50QRPX rent threshold (s50QR) page
I1 RST FAC I2/I1 a2X Sel Dir Positive sequence current In the ”Negative sequence” tab
restraint factor a2=I2/I1 page
I0 RST FAC I2/I0 k2X Sel Dir Zero sequence current re- In the ”Negative sequence” tab
straint factor k2=I2/I0 page
FWD DIR RES LVL Sel Dir Forward directional resid- In the ”Ground” tab page
50GFPX ual ground pickup 50GFP
(s50GFP)
REV DIR RES LVL Sel Dir Reverse directional resid- In the ”Ground” tab page
50GRPX ual ground pickup 50GRP
(s50GRP)
I1 RST FAC I0/I1 a0X Sel Dir Zero sequence current re- In the ”Ground” tab page
straint factor a0=I0/I1
FWD DIR Z0 LVL Sel Dir Forward directional Z0 In the ”Ground” tab page
Z0FX threshold Z0F
REV DIR Z0 LVL Z0RX Sel Dir Reverse directional Z0 In the ”Ground” tab page
threshold Z0R

SEL 700G Version: 001 30

3 Supported features

3.10.4 X-Side Overcurrent subrelay scheme

Figure 3.9: X-side Overcurrent subrelay connection scheme

SEL 700G Version: 001 31

3 Supported features

3.11 X-Side Voltage subrelay

The X-Side Voltage subrelay simulates the set of definite time three phase-ground, phase-phase,
positive sequence, neutral and negative sequence overvoltage elements and the set of three
phase and positive sequence undervoltage elements fed by a VT which measures the voltage at
the generator X-Side.

3.11.1 Available Units

• Two definite time phase-phase undervoltage elements (”Ph_Ph UV 1”, and ”Ph_Ph UV 2”
block).
• Two definite time phase-phase overvoltage elements (”Ph_Ph OV 1”, and ”Ph_Ph OV 2”
block).
• Two definite time phase-ground undervoltage elements (”Phase UV 1”, and ”Phase UV 2”
block).
• Two definite time phase-ground overvoltage elements (”Phase OV 1”, and ”Phase OV 2”
block).

• Six definite time positive sequence undervoltage elements (”POS SEQ UV 1”, ”POS SEQ
UV 2”, ”POS SEQ UV 3”, ”POS SEQ UV 4”, ”POS SEQ UV 5”, and ”POS SEQ UV 6” block).
• Six definite time positive sequence overvoltage elements (”POS SEQ OV 1”, ”POS SEQ
OV 2”, ”POS SEQ OV 3”, ”POS SEQ OV 4”, ”POS SEQ OV 5”, and ”PhS SEQ OV 6” block).

• Two definite time neutral voltage displacements elements (”GND OV 1”, and ”GND OV 2”
block).
• Two definite time negative sequence voltage displacements elements (”NSEQ OV 1”, and
”NSEQ OV 2” block).
• One output logic element (”Output Logic” block).

3.11.2 Functionality

The X-Side Voltage subrelay models a whole set of phase-phase and phase-gound over/undervoltage
elements irrespective of the delta or wye VT connections. When the delta VT connections is
used the phase-ground over/undervoltage elements should be manually disabled in the model.

The neutral voltage displacements elements can be fed by the zero sequence voltage calculated
using the phase-ground phase voltage or by the zero sequence voltage calculated by an open
delta Vt (EXT3V0_X := VS or VN).

3.11.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

PHASE UV LEVEL 27PX1P Phase UV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 27PX1P is OFF
PHASE UV DELAY 27PX1D Phase UV 1 Time Dial (Tpset)
PHASE UV LEVEL 27PX2P Phase UV 2 Input Setting (Ipsetr)

SEL 700G Version: 001 32

3 Supported features

Address Relay Setting Model block Model setting Note

Out of Service (outserv) Set when 27PX2P is OFF
PHASE UV DELAY 27PX2D Phase UV 2 Time Dial (Tpset)
PHASE UV LEVEL 27PPX1P Ph_Ph UV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 27PPX1P is OFF
PHASE UV DELAY 27PPX1D Ph_Ph UV 1 Time Dial (Tpset)
PHASE UV LEVEL 27PPX2P Ph_Ph UV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 27PPX2P is OFF
PHASE UV DELAY 27PPX2D Ph_Ph UV 2 Time Dial (Tpset)
PHASE OV LEVEL 59PX1P Phase OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PX1P is OFF
PHASE OV DELAY 59PX1D Phase OV 1 Time Dial (Tpset)
PHASE OV LEVEL 59PX2P Phase OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PX2P is OFF
PHASE OV DELAY 59PX2D Phase OV 2 Time Dial (Tpset)
PHASE OV LEVEL 59PPX1P Ph_Ph OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PPX1P is OFF
PHASE OV DELAY 59PPX1D Ph_Ph OV 1 Time Dial (Tpset)
PHASE OV LEVEL 59PPX2P Ph_Ph OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PPX2P is OFF
PHASE OV DELAY 59PPX2D Ph_Ph OV 2 Time Dial (Tpset)
ENABLE P-SEQ UV E27V1X POS SEQ UV 1 Out of Service (outserv)
POS SEQ UV 2 Out of Service (outserv)
POS SEQ UV 3 Out of Service (outserv)
POS SEQ UV 4 Out of Service (outserv)
POS SEQ UV 5 Out of Service (outserv)
POS SEQ UV 6 Out of Service (outserv)
POS SEQ UV LEVEL 27V1X1P POS SEQ UV 1 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1X1D POS SEQ UV 1 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1X2P POS SEQ UV 2 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1X2D POS SEQ UV 2 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1X3P POS SEQ UV 3 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1X3D POS SEQ UV 3 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1X4P POS SEQ UV 4 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1X4D POS SEQ UV 4 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1X5P POS SEQ UV 5 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1X5D POS SEQ UV 5 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1X6P POS SEQ UV 6 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1X6D POS SEQ UV 6 Time Dial (Tpset)
ENABLE P-SEQ OV E59V1X POS SEQ OV 1 Out of Service (outserv)
POS SEQ OV 2 Out of Service (outserv)
POS SEQ OV 3 Out of Service (outserv)
POS SEQ OV 4 Out of Service (outserv)
POS SEQ OV 5 Out of Service (outserv)
POS SEQ OV 6 Out of Service (outserv)
POS SEQ OV LEVEL 59V1X1P POS SEQ OV 1 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1X1D POS SEQ OV 1 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1X2P POS SEQ OV 2 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1X2D POS SEQ OV 2 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1X3P POS SEQ OV 3 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1X3D POS SEQ OV 3 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1X4P POS SEQ OV 4 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1X4D POS SEQ OV 4 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1X5P POS SEQ OV 5 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1X5D POS SEQ OV 5 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1X6P POS SEQ OV 6 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1X6D POS SEQ OV 6 Time Dial (Tpset)
NSEQ OV LEVEL 59QX1P NSEQ OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59QX1P is OFF
NSEQ OV DELAY 59QX1D NSEQ OV 1 Time Dial (Tpset)
NSEQ OV LEVEL 59QX2P NSEQ OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59QX2P is OFF
NSEQ OV DELAY 59QX2D NSEQ OV 2 Time Dial (Tpset)
GND OV LEVEL 59GX1P GND OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59GX1P is OFF
GND OV DELAY 59GX1D GND OV 1 Time Dial (Tpset)
GND OV LEVEL 59GX2P GND OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59GX2P is OFF
GND OV DELAY 59GX2D GND OV 2 Time Dial (Tpset)

SEL 700G Version: 001 33

3 Supported features

3.11.4 X-Side Voltage subrelay scheme

Figure 3.10: X-Side Voltage subrelay connection scheme

SEL 700G Version: 001 34

3 Supported features

3.12 Y-Side Frequency subrelay

The Y-Side Frequency subrelay simulates the set of overfrequency , underfrequency, and rate of
change of frequency protective elements which monitor the frequency measured at the generator
Y winding side. It’s identical to the X-Side Frequency subrelay.

3.12.1 Available Units

• Six definite time over/under frequency elements (”FREQ TRIP1”, ”FREQ TRIP2”, ”FREQ
TRIP3”, ”FREQ TRIP4”, ”FREQ TRIP5” and ”FREQ TRIP6” block).
• Four definite time rate of change of frequency elements (”FREQX ROC1”, ”FREQX ROC2”,
”FREQX ROC3”, and ”FREQX ROC4” block).

• One frequency calculation element (”Meas Freq” block).

• One output logic element (”Output Logic” block).

3.12.2 Functionality

The frequency is calculated by the ”Meas Freq”block which uses by default the phase A-phase B
voltage for its calculation (the parameter is user configurable). The calculated frequency value is
then used by the overfrequency/underfrequency elements and by the rate of change of frequency
elements.
The each frequency element operates as over frequency elements when the frequency threshold
is greater than the system rated frequency, as under frequency element when the frequency
threshold is smaller than the system rated frequency.

3.12.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

ENABLE 81Y FREQ TRIP y4 Out of Service (outserv)
FREQY TRIPy 4 L FREQ TRIP y4 Frequency (Fset)
FREQY TRIPy 4 Y FREQ TRIP y4 Time Delay (Tdel)
ENABLE 81RY E81RY FREQX ROC x5 Out of Service (outserv)
FREQY ROC LEVEL 81RYx5 FREQX ROC x Gradient df/dt (dFset)
FREQY ROC PU DLY 81RYx5 FREQX ROC x Time Delay (Tdel)

4y = 1,2,3,4,5,6
5x = 1,2,3,4

SEL 700G Version: 001 35

3 Supported features

3.12.4 Y-Side Frequency subrelay scheme

Figure 3.11: Y-Side Frequency subrelay connection scheme

SEL 700G Version: 001 36

3 Supported features

3.13 Y-Side Overcurrent subrelay

The Y-Side Overcurrent sub relay model simulates the phase, residual, and negative sequence
overcurrent elements which protect the ”Y” winding side of the generator. It’s identical to the
Y-Side Overcurrent sub relay except for the ”Load encroachment” block which contains some
additional parameters.

3.13.1 Available Units

• One 3phase directional inverse time overcurrent element (”Phase Toc” block).
• Three 3phase directional definite time overcurrent elements (”Phase Ioc1”, ”Phase Ioc2”,
and ”Phase Ioc3” block).
• One residual directional inverse time overcurrent element (”Res Toc” block).
• Two residual directional definite time overcurrent elements (”Res Ioc1”, and ”Res Ioc2”
block).
• One residual directional inverse time overcurrent element (”Res Toc” block).
• Two residual directional definite time overcurrent elements (”Res Ioc1”, and ”Res Ioc2”
block).
• One negative sequence directional inverse time overcurrent element (”Nseq Toc” block).
• Two negative sequence directional definite time overcurrent elements (”Nseq Ioc1”, and
”Nseq Ioc2” block).
• One directional element (”Sel Dir” block).
• One 3 phase load encroachment block (”Load encroachment” block).
• One 3 phase polarizing block (”Polarizing” block).
• One output logic element (”Output Logic” block).

3.13.2 Functionality

The Y-Side Overcurrent sub relay simulates the complete set of 3phase , residual current and
negative sequence overcurrent current available in the SEL 700G relay. Any element can be
set as forward or reverse directional or as non directional. Each overcurrent element can be
separately set to be blocked or not by the load encroachment feature.

The inverse time elements are supporting the following inverse time and definite time trip
characteristics (each characteristic is also associate to an inverse time reset characteristic):

• C1 - IEC Class A (Standard Inverse)

• C2 - IEC Class B (Very Inverse)
• C3 - IEC Class C (Extremely Inverse)
• C4 - IEC Long Time Inverse
• C5 - IEC Short Time Inverse
• U1 - U.S. Moderately Inverse

SEL 700G Version: 001 37

3 Supported features

• U2 - U.S. Inverse

• U3 - U.S. Very Inverse

• U4 - U.S. Extremly Inverse
• U5 - U.S. Short Time Inverse

The delayed reset characteristic can be enabled or disabled by the user for each inverse time
overcurrent element. The inverse time element trip characteristic equations comply with the IEC
60255-3 and the ANSI standards.

3.13.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

PHASE IOC LEVEL Phase Ioc1 Pickup Current (Ipsetr)
50PY1P
Out of Service (outserv) outserv=1 when 50PY1P = OFF
PHASE IOC DELAY Phase Ioc1 Time Setting (Tset)
50PY1D
PH IOC TRQCTRL Phase Ioc1 Tripping Direction (idir)
50PY1TC
PHASE IOC LEVEL Phase Ioc2 Pickup Current (Ipsetr)
50PY2P
Out of Service (outserv) outserv=1 when 50PY2P = OFF
PHASE IOC DELAY Phase Ioc2 Time Setting (Tset)
50PY2D
PH IOC TRQCTRL Phase Ioc2 Tripping Direction (idir)
50PY2TC
PHASE IOC LEVEL Phase Ioc3 Pickup Current (Ipsetr)
50PY3P
Out of Service (outserv) outserv=1 when 50PY3P = OFF
PHASE IOC DELAY Phase Ioc3 Time Setting (Tset)
50PY3D
PH IOC TRQCTRL Phase Ioc3 Tripping Direction (idir)
50PY3TC
RES IOC LEVEL Res Ioc1 Pickup Current (Ipsetr)
50GY1P
Out of Service (outserv) outserv=1 when 50GY1P = OFF
RES IOC DELAY Res Ioc1 Time Setting (Tset)
50GY1D
RES IOC TRQCTRL Res Ioc1 Tripping Direction (idir)
50GY1TC
RES IOC LEVEL Res Ioc2 Pickup Current (Ipsetr)
50GY2P
Out of Service (outserv) outserv=1 when 50GY2P = OFF
RES IOC DELAY Res Ioc2 Time Setting (Tset)
50GY2D
RES IOC TRQCTRL Res Ioc2 Tripping Direction (idir)
50GY2TC
NSEQ IOC LEVEL Nseq Ioc1 Pickup Current (Ipsetr)
50QY1P
Out of Service (outserv) outserv=1 when 50QY1P = OFF
NSEQ IOC DELAY Nseq Ioc1 Time Setting (Tset)
50QY1D
NSEQ IOC TRQCTRL Nseq Ioc1 Tripping Direction (idir)
50QY1TC
NSEQ IOC LEVEL Nseq Ioc2 Pickup Current (Ipsetr)
50QY2P
Out of Service (outserv) outserv=1 when 50QY2P = OFF
NSEQ IOC DELAY Nseq Ioc2 Time Setting (Tset)
50QY2D

SEL 700G Version: 001 38

3 Supported features

Address Relay Setting Model block Model setting Note

NSEQ IOC TRQCTRL Nseq Ioc2 Tripping Direction (idir)
50QY2TC
PHASE TOC LEVEL Phase Toc Current Setting (Ipsetr)
51PYP
Out of Service (outserv) outserv=1 when 51PY1P = OFF
PHASE TOC CURVE Phase Toc Characteristic (pcharac)
51PYC
PHASE TOC TDIAL Phase Toc Time Dial (Tpset)
51PYTD
EM RESET DELAY Phase Toc Reset Characteristic (re-
51PYRS setdis)
CONST TIME ADDER Phase Toc Time Adder (Tadder)
51PYCT
MIN RESPONSE TIM Phase Toc Min. Response Time (min-
51PYMR resptime)
PH TOC TRQCTRL Phase Toc Tripping Direction (idir)
51PYTC
RES TOC LEVEL Res Toc Current Setting (Ipsetr)
51GYP
Out of Service (outserv) outserv=1 when 51GY1P = OFF
RES TOC CURVE Res Toc Characteristic (pcharac)
51GYC
RES TOC TDIAL Res Toc Time Dial (Tpset)
51GYTD
EM RESET DELAY Res Toc Reset Characteristic (re-
51GYRS setdis)
CONST TIME ADDER Res Toc Time Adder (Tadder)
51GYCT
MIN RESPONSE TIM Res Toc Min. Response Time (min-
51GYMR resptime)
RES TOC TRQCTRL Res Toc Tripping Direction (idir)
51GYTC
NSEQ TOC LEVEL Nseq Toc Current Setting (Ipsetr)
51QYP
Out of Service (outserv) outserv=1 when 51QY1P = OFF
NSEQ TOC CURVE Nseq Toc Characteristic (pcharac)
51QYC
NSEQ TOC TDIAL Nseq Toc Time Dial (Tpset)
51QYTD
EM RESET DELAY Nseq Toc Reset Characteristic (re-
51QYRS setdis)
CONST TIME ADDER Nseq Toc Time Adder (Tadder)
51QYCT
MIN RESPONSE TIM Nseq Toc Min. Response Time (min-
51QYMR resptime)
NSEQ TOC TRQCTRL Nseq Toc Tripping Direction (idir)
51QYTC
LOAD ENCROACH Load encroach- Out of Service (outserv)
EN ment
FWD LD IMPEDANCE Load encroach- ZLF (ZLF)
ZLFY ment
POS-FWD LD ANGLE Load encroach- PLAF (PLAF)
PLAFY ment
NEG-FWD LD ANGLE Load encroach- NLAF (NLAF)
NLAFY ment
REV LD IMPEDANCE Load encroach- ZLR (ZLR)
ZLRY ment
POS-REV LD ANGLE Load encroach- PLAR (PLAR)
PLARY ment
NEG-REV LD ANGLE Load encroach- NLAR (NLAR)
NLARY ment
POS SQ LN Z MAG Sel Dir Positive Sequence Line In the ”Negative sequence” tab
Z1MAGY Impedance Magnitude page
Z1MAG (Zm)
POS SQ LN Z ANG Sel Dir Positive sequence line In the ”Negative sequence” tab
Z1ANGY impedance angle Z1ANG page
(phi)
ZERO SQ LN Z MAG Sel Dir Zero sequence line In the ”Ground” tab page
Z0MAGY impedance magnitude
Z0MAG (Z0)

SEL 700G Version: 001 39

3 Supported features

Address Relay Setting Model block Model setting Note

ZERO SQ LN Z ANG Sel Dir Zero sequence line In the ”Ground” tab page
Z0ANGY impedance angle Z0ANG
(phi0)
DIR CONTROL LVL1 Sel Dir Level 1 direction (DIR1) In the ”Basic settings" tab page
DIR1Y
DIR CONTROL LVL2 Sel Dir Level 2 direction (DIR2) In the ”Basic settings" tab page
DIR2Y
GND DIR PRIORITY Sel Dir Ground directional ele- In the ”Basic settings” tab page
ORDERY ment priority(ORDER)
PH DIR 3PH LVL Sel Dir Phase directional element In the ”Phase” tab page
50PDIRPY 3-phase pickup 50P32P
(s50P32P)
FWD DIR Z2 LVL Sel Dir Forward directional Z2 In the ”Negative sequence” tab
Z2FY threshold Z2F page
REV DIR Z2 LVL Z2RY Sel Dir Reverse directional Z2 In the ”Negative sequence” tab
threshold Z2R page
FWD DIR NSEQ LVL Sel Dir Forward directional current In the ”Negative sequence” tab
50QFPY threshold (s50QF) page
REV DIR NSEQ LVL Sel Dir Reverse directional cur- In the ”Negative sequence” tab
50QRPY rent threshold (s50QR) page
I1 RST FAC I2/I1 a2Y Sel Dir Positive sequence current In the ”Negative sequence” tab
restraint factor a2=I2/I1 page
I0 RST FAC I2/I0 k2Y Sel Dir Zero sequence current re- In the ”Negative sequence” tab
straint factor k2=I2/I0 page
FWD DIR RES LVL Sel Dir Forward directional resid- In the ”Ground” tab page
50GFPY ual ground pickup 50GFP
(s50GFP)
REV DIR RES LVL Sel Dir Reverse directional resid- In the ”Ground” tab page
50GRPY ual ground pickup 50GRP
(s50GRP)
I1 RST FAC I0/I1 a0Y Sel Dir Zero sequence current re- In the ”Ground” tab page
straint factor a0=I0/I1
FWD DIR Z0 LVL Sel Dir Forward directional Z0 In the ”Ground” tab page
Z0FY threshold Z0F
REV DIR Z0 LVL Z0RY Sel Dir Reverse directional Z0 In the ”Ground” tab page
threshold Z0R

SEL 700G Version: 001 40

3 Supported features

3.13.4 Y-Side Overcurrent subrelay scheme

Figure 3.12: Y-side Overcurrent subrelay connection scheme

SEL 700G Version: 001 41

3 Supported features

3.14 Y-Side Voltage subrelay

The Y-Side Voltage subrelay simulates the set of definite time three phase-ground, phase-phase,
positive sequence, neutral and negative sequence overvoltage elements and the set of three
phase and positive sequence undervoltage elements fed by a VT which measures the voltage at
the generator ”Y” winding side. The subrelay is identical to the X-Side Voltage subrelay except
for the neutral voltage displacements elements which can be fed only by the neutral voltage
calculated by the phase-ground phase voltages.

3.14.1 Available Units

• Two definite time phase-phase undervoltage elements (”Ph_Ph UV 1”, and ”Ph_Ph UV 2”
block).

• Two definite time phase-phase overvoltage elements (”Ph_Ph OV 1”, and ”Ph_Ph OV 2”
block).
• Two definite time phase-ground undervoltage elements (”Phase UV 1”, and ”Phase UV 2”
block).

• Two definite time phase-ground overvoltage elements (”Phase OV 1”, and ”Phase OV 2”
block).
• Six definite time positive sequence undervoltage elements (”POS SEQ UV 1”, ”POS SEQ
UV 2”, ”POS SEQ UV 3”, ”POS SEQ UV 4”, ”POS SEQ UV 5”, and ”POS SEQ UV 6” block).
• Six definite time positive sequence overvoltage elements (”POS SEQ OV 1”, ”POS SEQ
OV 2”, ”POS SEQ OV 3”, ”POS SEQ OV 4”, ”POS SEQ OV 5”, and ”PhS SEQ OV 6” block).
• Two definite time neutral voltage displacements elements (”GND OV 1”, and ”GND OV 2”
block).
• Two definite time negative sequence voltage displacements elements (”NSEQ OV 1”, and
”NSEQ OV 2” block).
• One output logic element (”Output Logic” block).

3.14.2 Functionality

The Y-Side Voltage) subrelay models a whole set of phase-phase and phase-gound over/undervoltage
elements irrespective of the delta or wye VT connections. When the delta VT connections is
used the phase-ground over/undervoltage elements should be manually disabled in the model.

The neutral voltage displacements elements are fed by the zero sequence voltage calculated
using the phase-ground phase voltage. Id VT delta connection is present the neutral voltage
displacements element must be manually disabled.

3.14.3 Data input

The relationships between the relay settings and the model parameters can be found in the
following table (the relay model parameter names are listed between brackets):

Address Relay Setting Model block Model setting Note

PHASE UV LEVEL 27PY1P Phase UV 1 Input Setting (Ipsetr)

SEL 700G Version: 001 42

3 Supported features

Address Relay Setting Model block Model setting Note

Out of Service (outserv) Set when 27PY1P is OFF
PHASE UV DELAY 27PY1D Phase UV 1 Time Dial (Tpset)
PHASE UV LEVEL 27PY2P Phase UV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 27PY2P is OFF
PHASE UV DELAY 27PY2D Phase UV 2 Time Dial (Tpset)
PHASE UV LEVEL 27PPY1P Ph_Ph UV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 27PPY1P is OFF
PHASE UV DELAY 27PPY1D Ph_Ph UV 1 Time Dial (Tpset)
PHASE UV LEVEL 27PPY2P Ph_Ph UV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 27PPY2P is OFF
PHASE UV DELAY 27PPY2D Ph_Ph UV 2 Time Dial (Tpset)
PHASE OV LEVEL 59PY1P Phase OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PY1P is OFF
PHASE OV DELAY 59PY1D Phase OV 1 Time Dial (Tpset)
PHASE OV LEVEL 59PY2P Phase OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PY2P is OFF
PHASE OV DELAY 59PY2D Phase OV 2 Time Dial (Tpset)
PHASE OV LEVEL 59PPY1P Ph_Ph OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PPY1P is OFF
PHASE OV DELAY 59PPY1D Ph_Ph OV 1 Time Dial (Tpset)
PHASE OV LEVEL 59PPY2P Ph_Ph OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59PPY2P is OFF
PHASE OV DELAY 59PPY2D Ph_Ph OV 2 Time Dial (Tpset)
ENABLE P-SEQ UV E27V1Y POS SEQ UV 1 Out of Service (outserv)
POS SEQ UV 2 Out of Service (outserv)
POS SEQ UV 3 Out of Service (outserv)
POS SEQ UV 4 Out of Service (outserv)
POS SEQ UV 5 Out of Service (outserv)
POS SEQ UV 6 Out of Service (outserv)
POS SEQ UV LEVEL 27V1Y1P POS SEQ UV 1 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1Y1D POS SEQ UV 1 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1Y2P POS SEQ UV 2 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1Y2D POS SEQ UV 2 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1Y3P POS SEQ UV 3 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1Y3D POS SEQ UV 3 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1Y4P POS SEQ UV 4 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1Y4D POS SEQ UV 4 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1Y5P POS SEQ UV 5 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1Y5D POS SEQ UV 5 Time Dial (Tpset)
POS SEQ UV LEVEL 27V1Y6P POS SEQ UV 6 Input Setting (Ipsetr)
POS SEQ UV DELAY 27V1Y6D POS SEQ UV 6 Time Dial (Tpset)
ENABLE P-SEQ OV E59V1Y POS SEQ OV 1 Out of Service (outserv)
POS SEQ OV 2 Out of Service (outserv)
POS SEQ OV 3 Out of Service (outserv)
POS SEQ OV 4 Out of Service (outserv)
POS SEQ OV 5 Out of Service (outserv)
POS SEQ OV 6 Out of Service (outserv)
POS SEQ OV LEVEL 59V1Y1P POS SEQ OV 1 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1Y1D POS SEQ OV 1 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1Y2P POS SEQ OV 2 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1Y2D POS SEQ OV 2 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1Y3P POS SEQ OV 3 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1Y3D POS SEQ OV 3 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1Y4P POS SEQ OV 4 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1Y4D POS SEQ OV 4 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1Y5P POS SEQ OV 5 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1Y5D POS SEQ OV 5 Time Dial (Tpset)
POS SEQ OV LEVEL 59V1Y6P POS SEQ OV 6 Input Setting (Ipsetr)
POS SEQ OV DELAY 59V1Y6D POS SEQ OV 6 Time Dial (Tpset)
NSEQ OV LEVEL 59QY1P NSEQ OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59QY1P is OFF
NSEQ OV DELAY 59QY1D NSEQ OV 1 Time Dial (Tpset)
NSEQ OV LEVEL 59QY2P NSEQ OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59QY2P is OFF
NSEQ OV DELAY 59QY2D NSEQ OV 2 Time Dial (Tpset)
GND OV LEVEL 59GY1P GND OV 1 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59GY1P is OFF
GND OV DELAY 59GY1D GND OV 1 Time Dial (Tpset)
GND OV LEVEL 59GY2P GND OV 2 Input Setting (Ipsetr)
Out of Service (outserv) Set when 59GY2P is OFF

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3 Supported features

Address Relay Setting Model block Model setting Note

GND OV DELAY 59GY2D GND OV 2 Time Dial (Tpset)

3.14.4 Y-Side Voltage subrelay scheme

Figure 3.13: Y-Side Voltage subrelay connection scheme

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3 Supported features

3.15 Output logic

The output logic is the interface between the relay and the power system.

3.15.1 Available Units and Signals

The trip logic is implemented by the ”Output Logic” following blocks located in the main relay.

The relay output signals are:

• OUT1
• OUT2
• OUT3

• OUT4
• OUT5
• OUT6
• OUT7

• OUT8
• OUT9
• OUT10

• OUT11

3.15.2 Functionality

The ”Output Logic” block operates the power breaker when a trip command has been issued
by any protective element. The trip Logic can be configured in the ”Logic” tab page. As default
configuration all relay output signals trips with the same logic. A three phases trip logic is
implemented.

3.15.3 Data input

Please disable the ”Output Logic” block in the main relay to disable the relay model ability to
open the power circuit.

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4 Main relay scheme

4 Main relay scheme

Figure 4.1: SEL 700G relay connection scheme

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5 Features not supported

5 Features not supported

The following features are not supported:

• Single phase trip.

• Check synchronization functions.
• Circuit breaker failure protection.
• 100% stator earth fault protection (3rd harmonic method) (27TN/59TN).

• 100% stator earth fault protection (low frequency injection method) (64S).
• Thermal element alarm thresholds.
• Off-Frequency Accumulators;

• Dead machine.

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6 References

6 References

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7 Change Log

7 Change Log

Version Date Comments

001 May 21, 2014 Initial version V 15.1

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