MCP1640/B/C/D: 0.65V Start-Up Synchronous Boost Regulator With True Output Disconnect or Input/Output Bypass Option
MCP1640/B/C/D: 0.65V Start-Up Synchronous Boost Regulator With True Output Disconnect or Input/Output Bypass Option
L1
4.7 µH
VOUT
VIN 3.3V @ 100 mA
SW V
0.9V to 1.7V OUT
VIN
976 k
CIN COUT
+
4.7 µF EN VFB 10 µF
ALKALINE
562 k
- GND
L1
4.7 µH
VOUT
VIN 5.0V @ 300 mA
SW V
3.0V to 4.2V OUTS
VIN VOUTP 976 k
CIN COUT
+
4.7 µF EN VFB 10 µF
LI-ION
309 k
- PGND SGND
100.0
V IN = 2.5V
Efficiency (%)
80.0
V IN = 0.8V V IN = 1.2V
60.0
40.0
0.1 1.0 10.0 100.0 1000.0
Output Current (mA)
DC CHARACTERISTICS
Electrical Characteristics: Unless otherwise indicated, VIN = 1.2V, COUT = CIN = 10 µF, L = 4.7 µH, VOUT = 3.3V,
IOUT = 15 mA, TA = +25°C. Boldface specifications apply over the TA range of -40°C to +85°C.
Parameters Sym. Min. Typ. Max. Units Conditions
Input Characteristics
Minimum Start-Up Voltage VIN — 0.65 0.8 V Note 1
Minimum Input Voltage After VIN — 0.35 — V Note 1
Start-Up
Output Voltage Adjust Range VOUT 2.0 5.5 V VOUT VIN; Note 2
Maximum Output Current IOUT — 150 — mA 1.2V VIN, 2.0V VOUT
— 150 — mA 1.5V VIN, 3.3V VOUT
— 350 — mA 3.3V VIN, 5.0V VOUT
Feedback Voltage VFB 1.175 1.21 1.245 V
Feedback Input Bias Current IVFB — 10 — pA
Quiescent Current – PFM IQPFM — 19 30 µA Measured at VOUT = 4.0V;
Mode EN = VIN, IOUT = 0 mA;
Note 3
Quiescent Current – PWM IQPWM — 220 — µA Measured at VOUT = 4.0V;
Mode EN = VIN, IOUT = 0 mA;
Note 3
Quiescent Current – Shutdown IQSHDN — 0.7 2.3 µA VOUT = EN = GND;
Includes N-Channel and
P-Channel Switch Leakage
NMOS Switch Leakage INLK — 0.3 — µA VIN = VSW = 5V;
VOUT = 5.5V
VEN = VFB = GND
PMOS Switch Leakage IPLK — 0.05 — µA VIN = VSW = GND;
VOUT = 5.5V
Note 1: 3.3 k resistive load, 3.3VOUT (1 mA).
2: For VIN > VOUT, VOUT will not remain in regulation.
3: IQOUT is measured at VOUT; VOUT is externally supplied with a voltage higher than the nominal 3.3V output
(device is not switching); no load; VIN quiescent current will vary with boost ratio. VIN quiescent current
can be estimated by: (IQPFM * (VOUT/VIN)), (IQPWM * (VOUT/VIN)).
4: Peak current limit determined by characterization, not production tested.
5: 220 resistive load, 3.3VOUT (15 mA).
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, VIN = 1.2V, COUT = CIN = 10 µF, L = 4.7 µH, VOUT = 3.3V, IOUT = 15 mA.
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Operating Junction Temperature TJ -40 — +125 °C Steady State
Range
Storage Temperature Range TA -65 — +150 °C
Maximum Junction Temperature TJ — — +150 °C Transient
Package Thermal Resistances
Thermal Resistance, 6LD-SOT-23 JA — 190.5 — °C/W
Thermal Resistance, 8LD-2x3 DFN JA — 75 — °C/W
Note: Unless otherwise indicated, VIN = EN = 1.2V, COUT = CIN = 10 µF, L = 4.7 µH, VOUT = 3.3V, ILOAD = 15 mA, TA = +25°C.
27.5 100
VIN = 1.2V VOUT = 2.0V VIN = 1.6V
25.0 VOUT = 5.0V 90
80
IQ PFM Mode (µA)
22.5
Efficiency (%)
70 VIN = 0.8V
20.0 60
VIN = 1.2V
50
17.5 VOUT = 3.3V
40
15.0 VOUT = 2.0V 30
20
12.5 PWM / PFM
10
PWM Only
10.0 0
-40 -25 -10 5 20 35 50 65 80 0.01 0.1 1 10 100 1000
Ambient Temperature (°C) IOUT (mA)
FIGURE 2-1: VOUT IQ vs. Ambient FIGURE 2-4: 2.0V VOUT PFM/PWM Mode
Temperature in PFM Mode. Efficiency vs. IOUT.
300 100
VOUT = 3.3V VIN = 2.5V
VIN = 1.2V 90
275 VOUT = 5.0V
80
IQ PWM Mode (µA)
Efficiency (%)
70 VIN = 0.8V
250
60 VIN = 1.2V
FIGURE 2-2: VOUT IQ vs. Ambient FIGURE 2-5: 3.3V VOUT PFM/PWM Mode
Temperature in PWM Mode. Efficiency vs. IOUT.
600 100
VOUT = 5.0V VIN = 3.6V
VOUT = 5.0V 90
500 VOUT = 3.3V 80
Efficiency (%)
60
VOUT = 2.0V
300 50
40
200
30
100 20
PWM / PFM
10 PWM Only
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0
0.01 0.1 1 10 100 1000
VIN (V) IOUT (mA)
FIGURE 2-3: Maximum IOUT vs. VIN After FIGURE 2-6: 5.0V VOUT PFM/PWM Mode
Start-Up, VOUT 10% Below Regulation Point. Efficiency vs. IOUT.
3.33 1.00
IOUT = 15 mA VIN = 1.2V VOUT = 3.3V
3.325
3.32 0.85
VIN = 1.8V
3.315 Startup
VOUT (V)
VIN (V)
0.70
3.31
3.305
0.55
3.3 VIN = 0.8V Shutdown
3.295 0.40
3.29
3.285 0.25
-40 -25 -10 5 20 35 50 65 80 0 20 40 60 80 100
Ambient Temperature (°C) IOUT (mA)
FIGURE 2-7: 3.3V VOUT vs. Ambient FIGURE 2-10: Minimum Start-Up and
Temperature. Shutdown VIN into Resistive Load vs. IOUT.
3.38 525
VIN = 1.5V VOUT = 3.3V
IOUT = 5 mA
505
3.32
500
3.30 495
IOUT = 15 mA
490
3.28 IOUT = 50 mA
485
3.26 480
-40 -25 -10 5 20 35 50 65 80 -40 -25 -10 5 20 35 50 65 80
Ambient Temperature (°C) Ambient Temperature (°C)
FIGURE 2-8: 3.3V VOUT vs. Ambient FIGURE 2-11: FOSC vs. Ambient
Temperature. Temperature.
3.40 4.5
IOUT = 5 mA
TA = +85°C 4 VOUT = 5.0V
3.36 3.5
TA = +25°C 3
VOUT (V)
VOUT = 3.3V
VIN (V)
3.32 2.5
2 VOUT = 2.0V
3.28 TA = -40°C
1.5
1
3.24
0.5
3.20 0
0.8 1.2 1.6 2 2.4 2.8 0 1 2 3 4 5 6 7 8 9 10
VIN (V) IOUT (mA)
FIGURE 2-9: 3.3V VOUT vs. VIN. FIGURE 2-12: PWM Pulse-Skipping Mode
Threshold vs. IOUT.
10000
PWM / PFM
PWM Only
VOUT = 3.3V
VOUT = 2.0V
100
VOUT = 5.0V
VOUT = 2.0V VOUT = 3.3V
10
0.8 1.1 1.4 1.7 2 2.3 2.6 2.9 3.2 3.5
VIN (V)
FIGURE 2-13: Input No Load Current vs. FIGURE 2-16: MCP1640 3.3V VOUT PFM
VIN. Mode Waveforms.
5
IOUT = 1 mA
Switch Resistance (Ohms)
VOUT
4 20 mV/DIV
AC
P - Channel Coupled
3
VSW
2V/DIV
1
IL
0.05 mA/DIV
N - Channel
0
1 1.5 2 2.5 3 3.5 4 4.5 5 1 µs/DIV
> VIN or VOUT
FIGURE 2-14: N-Channel and P-Channel FIGURE 2-17: MCP1640B 3.3V VOUT
RDSON vs. > of VIN or VOUT. PWM Mode Waveforms.
60
40
IOUT (mA)
VOUT = 2.0V
30
20
10
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VIN (V)
MCP1640B PWM
Mode Only
VOUT
100 mV/DIV
VOUT AC
1V/DIV Coupled
ISTEP = 1 mA to 75 mA
VIN
1V/DIV IOUT
50 mA/DIV
VEN
1V/DIV
FIGURE 2-19: 3.3V Start-Up After Enable. FIGURE 2-22: MCP1640B 3.3V VOUT Load
Transient Waveforms.
MCP1640B PWM
Mode Only
VOUT
1V/DIV
VOUT
50 mV/DIV
AC
Coupled
ISTEP = 1 mA to 50 mA
VIN
1V/DIV
IOUT
VEN 50 mA/DIV
1V/DIV
FIGURE 2-20: 3.3V Start-Up when FIGURE 2-23: MCP1640B 2.0V VOUT Load
VIN = VENABLE. Transient Waveforms.
PFM
PWM MODE
MODE
VOUT
VOUT 50 mV/DIV
100 mV/DIV AC
AC Coupled
Coupled
ISTEP = 1 mA to 75 mA
FIGURE 2-21: MCP1640 3.3V VOUT Load FIGURE 2-24: 3.3V VOUT Line Transient
Transient Waveforms. Waveforms.
3.1 Feedback Voltage Pin (VFB) 3.6 Output Voltage Power Pin (VOUTP)
The VFB pin is used to provide output voltage regulation The output voltage power pin connects the output
by using a resistor divider. Feedback voltage will be voltage to the switch node. High current flows through
1.21V typical with the output voltage in regulation. the integrated P-Channel and out of this pin to the
output capacitor and the output. In the 2x3 DFN
package, VOUTP and VOUTS are connected externally.
3.2 Signal Ground Pin (SGND)
The signal ground pin is used as a return for the
3.7 Output Voltage Sense Pin (VOUTS)
integrated VREF and error amplifier. In the 2x3 DFN The output voltage sense pin connects the regulated
package, the SGND and power ground (PGND) pins are output voltage to the internal bias circuits. In the
connected externally. 2x3 DFN package, the VOUTS and output voltage
power (VOUTP) pins are connected externally.
3.3 Power Ground Pin (PGND)
3.8 Power Supply Input Voltage Pin (VIN)
The power ground pin is used as a return for the
Connect the input voltage source to VIN. The input
high-current N-Channel switch. In the 2x3 DFN
source should be decoupled to GND with a 4.7 µF
package, the PGND and SGND pins are connected
minimum capacitor.
externally.
3.9 Exposed Thermal Pad (EP)
3.4 Enable Pin (EN) There is no internal electrical connection between the
The EN pin is a logic-level input used to enable or Exposed Thermal Pad (EP) and the SGND and PGND
disable device switching and lower quiescent current pins. They must be connected to the same potential on
while disabled. A logic high (>90% of VIN) will enable the Printed Circuit Board (PCB).
the regulator output. A logic low (<20% of VIN) will
ensure that the regulator is disabled.
3.10 Ground Pin (GND)
The ground or return pin is used for circuit ground
3.5 Switch Node Pin (SW) connection. Length of trace from input cap return,
output cap return, and GND pin should be made as
Connect the inductor from the input voltage to the SW short as possible to minimize noise on the GND pin. In
pin. The SW pin carries inductor current and can be as the SOT-23-6 package, a single ground pin is used.
high as 800 mA peak. The integrated N-Channel switch
drain and integrated P-Channel switch source are 3.11 Output Voltage Pin (VOUT)
internally connected at the SW node.
The output voltage pin connects the integrated
P-Channel MOSFET to the output capacitor. The FB
voltage divider is also connected to the VOUT pin for
voltage regulation.
VOUT
Internal
VIN
Bias
IZERO
Direction
Control
SW Soft Start
.3V
0V
Gate Drive ILIMIT
and
EN Shutdown
Control
Logic
ISENSE
Slope
GND Oscillator
Comp.
S
PWM/PFM
Logic
1.21V
FB
EA
(typ.)
spikes, especially in PFM mode. Size
Value
DCR
(µH)
ISAT
(A)
Part Number WxLxH
While the N-Channel switch is on, the output current is
(mm)
supplied by the output capacitor COUT. The amount of
output capacitance and equivalent series resistance Coilcraft
will have a significant effect on the output ripple EPL2014-472 4.7 0.23 1.06 2.0x2.0x1.4
voltage. While COUT provides load current, a voltage EPL3012-472 4.7 0.165 1.1 3.0x3.0x1.3
drop also appears across its internal ESR that results
MSS4020-472 4.7 0.115 1.5 4.0x4.0x2.0
in ripple voltage.
LPS6225-472 4.7 0.065 3.2 6.0x6.0x2.4
EQUATION 5-2: Coiltronics®
SD3110 4.7 0.285 0.68 3.1x3.1x1.0
I OUT = COUT -------
dV
dt SD3112 4.7 0.246 0.80 3.1x3.1x1.2
Where: SD3114 4.7 0.251 1.14 3.1x3.1x1.4
dV = ripple voltage SD3118 4.7 0.162 1.31 3.8x3.8x1.2
RBOT RTOP
+VIN +VOUT
1
GND
Wired on Bottom
L Plane
+VIN
+VOUT
CIN COUT
GND MCP1640 RTOP
1
RBOT
Enable
GND
L1
4.7 µH
VOUT
Manganese Lithium 5.0V @ 5 mA
Dioxide Button Cell SW V
OUT
VIN
+ 976 k
CIN COUT
2.0V to 3.2V
4.7 µF EN VFB 10 µF
-
309 k
From PIC® MCU I/O GND
Note: For applications that can operate directly from the battery input voltage during Sleep mode and
require a higher voltage during Normal Run mode, the MCP1640C device provides Input to
Output Bypass when disabled. The PIC® microcontroller is powered by the output of the
MCP1640C. One of its I/O pins is used to enable and disable the MCP1640C. While operating
in Sleep mode, the MCP1640C input quiescent current is typically less than 1 µA.
FIGURE 6-1: Manganese Lithium Coin Cell Application Using Bypass Mode.
L1
10 µH
VOUT
VIN 5.0V @ 350 mA
SW V
3.3V To 4.2V OUTS
VIN VOUTP 976 k
CIN COUT
+
10 µF EN VFB 10 µF
LI-ION
309 k
- PGND SGND
MCP1640-I/MC AHM
MCP1640T-I/MC AHM
AHM
MCP1640B-I/MC AHP 340
MCP1640BT-I/MC AHP 25
MCP1640C-I/MC AHQ
MCP1640CT-I/MC AHQ
MCP1640D-I/MC AHR
MCP1640DT-I/MC AHR
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
N 4
E
E1
PIN 1 ID BY
LASER MARK
1 2 3
e
e1
A A2 c φ
L
A1
L1
Units MILLIMETERS
Dimension Limits MIN NOM MAX
Number of Pins N 6
Pitch e 0.95 BSC
Outside Lead Pitch e1 1.90 BSC
Overall Height A 0.90 – 1.45
Molded Package Thickness A2 0.89 – 1.30
Standoff A1 0.00 – 0.15
Overall Width E 2.20 – 3.20
Molded Package Width E1 1.30 – 1.80
Overall Length D 2.70 – 3.10
Foot Length L 0.10 – 0.60
Footprint L1 0.35 – 0.80
Foot Angle I 0° – 30°
Lead Thickness c 0.08 – 0.26
Lead Width b 0.20 – 0.51
Notes:
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-028B
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Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
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