LTC1153

Auto-Reset
Electronic Circuit Breaker
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FEATURES DESCRIPTIO
■ Programmable Trip Delay: 15µs to >100ms The LTC1153 electronic circuit breaker drives a low cost
■ Programmable Trip Current: 1mA to >20A N-channel MOSFET to interrupt power to a sensitive
■ Programmbale Auto-Reset Time: 1ms to >10 sec. electronic load in the event of an over-current condition.
■ 4.5V to 18V Supply Range The breaker remains tripped for a period of time set by an
■ Drives Low RDS(ON) N-Channel MOSFETs external timing capacitor and then is automatically reset.
■ Status Output Indicates Fault Condition This cycle continues until the over-current condition is
■ Thermal Trip with PTC Thermistor removed, protecting both the sensitive load and the
■ 8µA IQ in Standby Mode MOSFET switch.
■ No External Charge Pump Capacitors The trip current, trip delay time and auto-reset period are
■ Available in 8-Pin SOIC programmable over a wide range to accommodate a
UO variety of load impedances. An active high shutdown input
APPLICATI S is also provided and interfaces directly to a PTC thermistor
for thermal circuit breaking. An open-drain output is
■ Power Bus Circuit Breaker provided to report breaker status to the µP.
■ SCSI Termination Power Protection
■ Regulator Over-Current Protection The LTC1153 is available in both 8-pin DIP and 8-pin SOIC
■ Battery Short-Circuit Protection packages.
■ DC Motor Stall Protection
■ Sensitive System Power Interrupt

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TYPICAL APPLICATI
5V/1A Electronic Circuit Breaker with 1ms Trip Delay,
200ms Auto-Reset Period and 70°C Thermal Shutdown Trip Delay Time

10
ON/OFF IN VS RSEN = 0.1Ω
CT CD RD *RSEN RD = 100k
0.22µF 0.01µF 100k 0.1Ω CD = 0.01µF
CT DS
Z5U
1
TRIP DELAY (ms)

LTC1153
TO µP STATUS G IRLR024

51k 51k
GND SHUTDOWN
5V 0.1
**70°C SENSITIVE
PTC 5V LOAD

0.01
ALL COMPONENTS SHOWN ARE SURFACE MOUNT. 1 10 100
* IMS026 INTERNATIONAL MANUFACTURING SERVICE, INC. (401) 683-9700 CIRCUIT BREAKER CURRENT (A)
** RL2006-100-70-30-PT1 KEYSTONE CARBON COMPANY (814) 781-1591 LTC1153 • TA02

LTC1153 • TA01

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LTC1153
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ABSOLUTE AXI U RATI GS
Supply Voltage ........................................................ 22V Current (Any Pin).................................................. 50mA
Input Voltage ..................... (VS + 0.3V) to (GND – 0.3V) Operating Temperature
Timing Capacitor Voltage ... (VS + 0.3V) to (GND – 0.3V) LTC1153C .............................................. 0°C to 70°C
Gate Voltage ....................... (VS + 24V) to (GND – 0.3V) Storage Temperature Range ................. – 65°c to 150°C
Status Output Voltage .............................................. 15V Lead Temperature (Soldering, 10 sec.)................ 300°C

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PACKAGE/ORDER I FOR ATIO
TOP VIEW ORDER PART TOP VIEW ORDER PART
IN 1 8 VS
NUMBER IN 1 8 VS
NUMBER
TIMING CAP 2 7 DRAIN SENSE TIMING CAP 2 7 DRAIN SENSE
LTC1153CN8 LTC1153CS8
STATUS 3 6 GATE STATUS 3 6 GATE
GND 4 5 SHUTDOWN GND 4 5 SHUTDOWN

N8 PACKAGE S8 PACKAGE
8-LEAD PLASTIC DIP 8-LEAD PLASTIC SOIC
LTC1153 • PO01
LTC1154 • PO02
S8 PART MARKING
TJMAX = 100°C, θJA = 130°C/W (N8) TJMAX = 100°C, θJA = 150°C/W 1153

ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, CT = 0.1µF, VSD = 0V unless otherwise noted.
LTC1153C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VS Supply Voltage ● 4.5 18 V
IQ Quiescent Current OFF VS = 5V, VIN = 0V 8 20 µA
IQ Quiescent Current ON VS = 5V, VIN = 5V 85 120 µA
IQ Quiescent Current ON VS =12V, VIN = 5V 180 400 µA
VINH Input High Voltage ● 2 V
VINL Input Low Voltage ● 0.8 V
IIN Input Current 0V < VIN < VS ● ±1 µA
CIN Input Capacitance 5 pF
VCT Timing Capacitor Threshold Voltage VS = 5V 2.1 2.5 2.9 V
VS = 12V 2.0 2.6 3.2 V
ICT Timing Capacitor Current VS = 12V 3.0 4.2 6.0 µA
VSDH Shutdown Input High Voltage ● 2 V
VSDL Shutdown Input Low Voltage ● 0.8 V
ISD Shutdown Input Current 0V < VIN < VS ● ±1 µA
VSEN Drain Sense Threshold Voltage 80 100 120 mV
● 75 100 125 mV
ISEN Drain Sense Input Current 0V < VSEN < VS ● ±0.1 µA

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 LTC1153

ELECTRICAL CHARACTERISTICS VS = 4.5V to 18V, TA = 25°C, CT = 0.1µF, VSD = 0V unless otherwise noted.
LTC1153C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VGATE – VS Gate Voltage Above Supply VS = 5V ● 6.0 7.0 9.0 V
VS = 6V ● 7.5 8.3 15.0 V
VS = 12V ● 15.0 18.0 25.0 V
VSTAT Status Output Low Voltage ISTAT = 400µA ● 0.05 0.4 V
ISTAT Status Output Leakage Current VSTAT = 12V ● 1 µA
tON Turn-ON Time VS = 5V, CGATE = 1000pF
Time for VGATE > VS + 2V 30 110 300 µs
Time for VGATE > VS + 5V 100 450 1000 µs
VS = 12V, CGATE = 1000pF
Time for VGATE > VS + 5V 20 80 200 µs
Time for VGATE > VS + 10V 50 160 500 µs
tOFF Turn-OFF Time VS = 5V, CGATE = 1000pF
Time for VGATE < 1V 10 36 60 µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V 10 28 60 µs
tTD Minimum Trip Delay VS = 5V, CGATE = 1000pF
Time for VGATE < 1V 5 25 40 µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V 5 23 40 µs
tSD Shutdown Turn-OFF Time VS = 5V, CGATE = 1000pF
Time for VGATE < 1V 17 40 µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V 13 35 µs

The ● denotes specifications which apply over the operating temperature range.

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TYPICAL PERFOR A CE CHARACTERISTICS
Standby Supply Current Supply Current ON MOSFET Switch Gate Voltage
50 1000 24
VIN = 0V TA = 25°C
45 900 22
TA = 25°C
40 800 20
SUPPLY CURRENT (µA)

SUPPLY CURRENT (µA)

35 700 18
VGATE – VS (V)

30 600 16
25 500 14
20 400 12
15 300 10
10 200 8
5 100 6
0 0 4
0 5 10 15 20 0 5 10 15 20 0 5 10 15 20
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
LTC1153 • TPC01 LTC1153 • TPC02 LTC1153 • TPC03

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LTC1153
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TYPICAL PERFOR A CE CHARACTERISTICS
Input Threshold Voltage Drain Sense Threshold Voltage Auto-Reset Period
2.4 150 10
TA = 25°C

DRAIN SENSE THRESHOLD VOLTAGE (mV)

2.2 140
3.3µF
INPUT THRESHOLD VOLTAGE (V)

2.0 130

RESET PERIOD (SEC)

1.8 120 1 1µF
1.6 110
VON
1.4 100 0.33µF
1.2 VOFF 90
0.1 0.1µF
1.0 80
0.8 70
0.033µF
0.6 60
0.4 50 0.01
0 5 10 15 20 0 5 10 15 20 0 5 10 15 20
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
LTC1153 • TPC04 LTC1153 • TPC05 LTC1153 • TPC06

MOSFET Gate Turn-ON Time MOSFET Gate Turn-OFF Time Built-In Trip Delay
1000 50 50
CGATE = 1000pF CGATE = 1000pF CGATE = 1000pF
900 45 45
TIME FOR VGATE < 1V TIME FOR VGATE < 1V
800 40 40 VSEN = VS – 1V
NO EXTERNAL DELAY
TURN OFF TIME (µs)

700 35 35
TURN ON TIME (µs)

TRIP TIME (µs)

600 30 30
500 25 25
400 20 20
VGS = 5V
300 15 15
200 10 10
VGS = 2V
100 5 5
0 0 0
0 5 10 15 20 0 5 10 15 20 0 5 10 15 20
SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE (V)
LTC1153 • TPC07 LTC1153 • TPC08 LTC1153 • TPC09

Standby Supply Current Supply Current ON Input ON Threshold Voltage

50 1000 2.4
VIN = 0V VIN = 5V
45 900 2.2
INPUT THRESHOLD VOLTAGE (V)

40 800 2.0
SUPPLY CURRENT (µA)

SUPPLY CURRENT (µA)

35 700 1.8
30 600 1.6
25 500 1.4
VS = 5V
20 400 1.2
VS = 12V VS = 18V
15 300 1.O
VS = 18V
10 200 0.8
VS = 5V
5 100 0.6
VS = 5V
0 0 0.4
–50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C) TEMPERATURE (°C) TEMPERATURE (°C)
LTC1153 • TPC10 LTC1153 • TPC11 LTC1153 • TPC12

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 LTC1153
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TYPICAL PERFOR A CE CHARACTERISTICS
Shutdown Threshold Voltage Auto-Reset Time* MOSFET Gate Drive Current
2.4 10 1000
*SECONDS OF DELAY TA = 25°C
2.2
SHUTDOWN THRESHOLD VOLTAGE (V)

PER µF CT
2.0

GATE DRIVE CURRENT (µA)

100

AUTO-RESET TIME (s/µF)

1.8 VS = 18V
1.6 VS = 12V VS = 12V
1.4 1 VS = 5V 10
VS = 5V
1.2
VS = 18V VS = 18V
1.O VS = 5V
1
0.8
0.6
0.4 0.1 0.1
–50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 0 4 8 12 16 20
TEMPERATURE (°C) TEMPERATURE (°C) GATE VOLTAGE ABOVE SUPPLY (V)
LTC1153 • TPC13 LTC1153 • TPC14 LTC1153 • TPC15

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PI FU CTIO S
Input and Shutdown Pins impedance when driven above the rail (the equivalent of a
few hundred kΩ). Care should be taken to minimize any
The LTC1153 input pin is active high and activates all of the
loading of this pin by parasitic resistance to ground or
protection and charge pump circuitry when switched ON.
supply.
The shutdown pin is designed to break the circuit if a
secondary fault condition (over temperature, etc.) is de- Supply Pin
tected. The LTC1153 logic and shutdown inputs are high
impedance CMOS gates with ESD protection diodes to The supply pin of the LTC1153 serves two vital purposes.
ground and supply and therefore should not be forced The first is obvious: it powers the input, gate drive, regu-
beyond the power supply rails. The shutdown pin should lation and protection circuitry. The second purpose is less
be connected to ground when not in use. obvious: it provides a Kelvin connection to the top of the
drain sense resistor for the internal 100mV reference.
Timing Capacitor Pin (Auto-Reset Timer) The LTC1153 is designed to be continuously powered so
The small capacitor charging current (4.2µA) produces that the gate of the MOSFET is actively driven at all times.
large delays with relatively small valued capacitors, but If it is necessary to remove power from the supply pin and
care must be taken to ensure that this current is not then re-apply it, the input pin (or enable pin) should be
shunted to ground through a leaky capacitor or printed cycled a few milliseconds after the power is re-applied to
circuit board trace. The timing capacitor voltage is sensed reset the input latch and protection circuitry. Also, the
by a high impedance CMOS comparator input with ESD input and enable pins should be isolated with 10k resistors
clamp diodes to ground and supply and therefore should to limit the current flowing through the ESD protection
not be forced beyond the power supply rails. This pin can diodes to the supply pin.
be grounded if the auto-reset function is not used. The supply pin of the LTC1153 should never be forced
below ground as this may result in permanent damage to
MOSFET Gate Drive Pin
the device. A 300Ω resistor should be inserted in series
The MOSFET gate drive pin is either driven to ground when with the ground pin if negative supply voltage transients
the switch is turned OFF or driven above the supply rail are anticipated.
when the switch is turned ON. This pin is a relatively high

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LTC1153
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PI FU CTIO S
Drain Sense Pin during start-up. This trip delay can be set from a few
The drain sense pin is compared against the supply pin microseconds to many seconds. However, very long de-
voltage. If the voltage at this pin is more than 100mV lays may put the MOSFET switch in risk of being destroyed
below the supply pin, the input latch will trip and the by a short-circuit condition. (see Applications Information
MOSFET switch will be turned off. Section).

This pin is also a high impedance CMOS gate with ESD Status Pin
protection and therefore should not be forced beyond the
The status pin is an open-drain output which is driven low
power supply rails.
whenever the breaker is tripped. A 51k pull-up resistor
Some loads, such as large supply capacitor, lamps, or should be connected between this output and a logic
motors require high inrush currents. An RC time is added supply. The status pins of multiple LTC1153s can be OR’d
between the sense resistor and the drain sense pin to together if independent fault sensing is not required. No
ensure that the drain sense circuitry does not false trigger connection is required to this pin when not in use.

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BLOCK DIAGRA

DRAIN
ANALOG SECTION SENSE
VS
SHUTDOWN
10µs
COMP TTL-TO-CMOS SHUTDOWN
LOW STANDBY DELAY
100mV CONVERTER
CURRENT
REFERENCE
REGULATOR

GATE CHARGE
AND DISCHARGE GATE
CONTROL LOGIC
ANALOG DIGITAL
R
INPUT
TTL-TO-CMOS VOLTAGE LATCH
INPUT OSCILLATOR FAST/SLOW
CONVERTER REGULATORS ONE
S AND CHARGE GATE CHARGE
SHOT
PUMP LOGIC
GND

TIMER AUTO-RESET
FAULT DETECTION
CAP TIMER
AND STATUS
STATUS OUTPUT DRIVER
LTC1153 • BD01

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 LTC1153
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TEST CIRCUITS TI I G DIAGRA
5V OVER-CURRENT NOR- SHUT-
OFF NORMAL (AUTO-CURRENT) MAL DOWN OFF
1 8
INPUT IN VS RSEN
CP 0.05Ω INPUT
51k 0.01µF *200µs
2 7
CT DS
0.1µF RD100k OUTPUT
LTC1153
Z5U 3 6
STATUS STATUS G IRLZ24

OUTPUT STATUS
4 5
GND SD
S1 TIMING
SHUTDOWN CAP

10Ω 1Ω *90ms
SHUT-
DOWN
LTC1153 • TC01
LTC1153 • TD01

S1 CLOSED S1 OPEN
*TIMES FOR COMPONENTS SHOWN IN TEST CIRCUIT

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LTC1153 OPERATIO
The LTC1153 is an electronic circuit breaker with built-in Internal Voltage Regulation
MOSFET gate charge pump, over-current detection and
The output of the TTL-to-CMOS converter drives two
auto-reset circuitry. The LTC1153 consists of the follow-
regulated supplies which power the low voltage CMOS
ing functional blocks:
logic and analog blocks. The regulator outputs are isolated
TTL and CMOS Compatible Inputs from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or the
The LTC1153 input and shutdown input have been de- analog comparator.
signed to accommodate a wide range of logic families.
Both input thresholds are set at about 1.3V with approxi- Gate Charge Pump
mately 100mV of hysteresis.
Gate drive for the MOSFET switch is produced by an
A low standby current voltage regulator provides continu- adaptive charge pump circuit which generates a gate
ous bias for the TTL-to-CMOS converter. The TTL-to- voltage substantially higher than the power supply volt-
CMOS converter output enables the rest of the circuitry. In age. The charge pump capacitors are included on-chip and
this way the power consumption is kept to a minimum in therefore no external components are required to generate
the standby mode. the gate drive.

Auto-Reset Timer Drain Current Sense

An external timing capacitor, CT, is ramped up by a small The LTC1153 is configured to sense the current flowing
current whenever a fault is detected, i.e., the switch into the drain of an N-channel MOSFET switch. An internal
latched off. When the timing capacitor ramps up to ap- 100mV reference is compared to the drop across a sense
proximately 2.5V, the switch is turned back on and the resistor (typically 0.002Ω to 0.10Ω) in series with the
timing capacitor discharged. If the circuit breaker output drain lead. If the drop across this resistor exceeds the
is still in an overload state, the breaker will latch off and this internal 100mV threshold, the input latch is reset and the
cycle will continue until the fault condition is removed. gate is quickly discharged via a relatively large N-channel
transistor.

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LTC1153
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LTC1153 OPERATIO
Controlled Gate Rise and Fall Times Status Output Driver
When the input is switched ON and OFF, the gate is The status circuitry continuously monitors the input and
charged by the internal charge pump and discharged in a the gate charge control logic. The open-drain output is
controlled manner. The charge and discharge rates have driven low when the input is turned ON and the breaker is
been set to minimize RFI and EMI emissions in normal latched off. The status circuitry is reset along with the input
operation. If a short-circuit or current overload condition latch when the auto-reset circuitry retries the breaker or
is encountered, the gate is discharged very quickly (typi- the input is cycled low.
cally a few microseconds) by a large N-channel transistor.

UO U W U
APPLICATI S I FOR ATIO
12V
MOSFET and Load Protection +
100µF
The LTC1153 protects the power MOSFET switch by IN VS 0.036Ω

removing drive from the gate as soon as an over-current

CT DS
condition is detected and breaking the circuit to the load. CT
LTC1153
0.22µF
Resistive and inductive loads can be protected with no STATUS G IRFZ24
external time delay in series with the drain sense pin. High 15V
inrush current loads, however, require that the trip delay GND SD

time be set long enough to start the load but short enough
to ensure the safety of the MOSFET. CLOAD ≤ 1µF RLOAD
12Ω

Resistive Loads
LTC1153 • F01

Loads that are primarily resistive should be protected with

as short a delay as possible to minimize the amount of time Figure 1. Protecting Resistive Loads
that the MOSFET switch or the load is subjected to an
12V
overload condition. The drain sense circuitry has a built- +
100µF
in trip delay of approximately 10µs to eliminate false IN VS 0.036Ω
triggering by power supply or load transient conditions.
This delay is sufficient to “mask” short load current CT
CT DS
LTC1153
transients and the starting of a small capacitor (<1µF) in 0.22µF
STATUS G IRFZ24
parallel with the load. The drain sense pin can therefore be
15V
connected directly to the drain current sense resistor as GND SD
shown in Figure 1.
12V, 1A
1N5400
Inductive Loads SOLENOID

Loads that are primarily inductive, such as relays, sole-

noids and stepper motor windings should be protected LTC1153 • F02

with as short a delay as possible to minimize the amount Figure 2. Protecting Inductive Loads
of time that the MOSFET is subjected to an overload
condition. The built-in 10µs trip delay will ensure that the Large inductive loads (>0.1mH) may require diodes con-
breaker is not false-tripped by a supply or load transient. nected directly across the inductor to safely divert the
No external delay components are required as shown in stored energy to ground. Many inductive loads have these
Figure 2. diodes included. If not, a diode of the proper current rating

8
 LTC1153
UO U W U
APPLICATI S I FOR ATIO
should be connected across the load, as shown in Figure Using the values shown in Figure 3, the start-up current is
2, to safely divert the stored energy. less than 100mA and does not false-trip the breaker.

Capacitive Loads Lamp Loads

Large capacitive loads, such as complex electrical sys- The inrush current created by a lamp during turn-on can be
tems with large bypass capacitors, should be powered 10 to 20 times greater than the rated operating current.
using the circuit shown in Figure 3. The gate drive to the The circuit shown in Figure 4 shifts the trip threshold up by
power MOSFET switch is passed through an RC delay a factor of 11:1 (to 30A) for 100ms while the bulb is turned
network, R1 and C1, which greatly reduces the turn on on. The trip threshold then drops down to 2.7A after the
ramp rate of the switch. And since the MOSFET source inrush current has subsided.
voltage follows the gate voltage, the load is powered
12V
smoothly and slowly from ground. This dramatically re- +
duces the start-up current flowing into the supply capaci- IN VS 10k
470µF
0.036Ω
tor/s which, in turn, reduces supply transients and allows 100k

for slower activation of sensitive electrical loads. (Diode, CT DS

CT
D1, provides a direct path for the LTC1153 protection 0.33µF
LTC1153 VN2222LL

circuitry to quickly discharge the gate). STATUS G 0.1µF

1M

12V GND SD MTP3055EL

+
470µF 9.1V
IN VS 0.036Ω
CD RD 12V/1A
0.01µF 1OOk BULB
CT DS
CT D1
LTC1153 1N4148
0.47µF LTC1153 • F04

STATUS G
R1 R2
1OOk 1OOk Figure 4. Lamp Driver with Delayed Protection
MTP3055E
GND SD
C1 Selecting RD and CD
0.33µF OUT
15V
+
Figure 5 is a graph of normalized breaker trip time versus
CLOAD
100µF
breaker current. This graph is used to select the two delay
components, RD and CD, which make up a simple RC delay
LTC1153 • F03
between the drain sense resistor and the drain sense input.
Figure 3. Powering Large Capacitive Loads
10

The RC network, RD and CD, in series with the drain sense

input should be set to trip based on the expected charac-
TRIP DELAY TIME (1 = RC)

teristics of the load after start-up. With this circuit, it is 1

possible to power a large capacitive load and still react
quickly (10µs) to break the circuit if a short-circuit condi-
tion is encountered. The ramp rate at the output of the 0.1
switch as it lifts off ground is approximately:
dV/dt = (VGATE – VTH)/(R1 × C1)
0.01
And therefore the current flowing into the capacitor during 1 10 100
BREAKER CURRENT (1 = SET CURRENT)
start-up is approximately: LTC1153 • F05

ISTART-UP = CLOAD × dV/dt Figure 5. Trip Delay Time vs Breaker Current

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LTC1153
UO U W U
APPLICATI S I FOR ATIO
The Y axis of the graph is normalized to one RC time 12V

constant. The X axis is normalized to the set current. (The 5V +

10µF
set current is defined as the current required to develop 120k 10k
IN VS 0.05Ω
100mV across the drain sense resistor). 5V CT
µP OR 0.47µF
Note that the trip delay time is shorter for increasing levels CONTROL
CT DS
LOGIC LTC1153
of MOSFET current. This ensures that the total energy 10k
STATUS G MTP12N06
dissipated by the MOSFET is always within the bounds
15V
established by the manufacturer for safe operation. (See GND SD
MOSFET data sheet for further S.O.A. information). 300Ω 10k LOAD

Using a Speed-Up Diode LTC1153 • F07

Another way to reduce the trip delay time is to “bypass” Figure 7. Reverse Battery Protection
the delay resistor with a small signal diode as shown in
Figure 6. The diode will engage when the drop across the Current Limited Power Supplies
drain sense resistor exceeds about 0.7V, providing a direct The LTC1153 requires at least 3.5V at the supply pin to
path to the sense pin and dramatically reducing the trip ensure proper operation. It is therefore necessary that the
delay time. The drain sense resistor value is selected to supply to the LTC1153 be held higher than 3.5V at all
limit the maximum DC breaker current to 4A. times, even when the output of the switch is short circuited
12V
+
to ground. The output voltage of a current limited regulator
100µF
1N4148
may drop very quickly during short-circuit and pull the
IN VS 0.036Ω
supply pin of the LTC1153 below 3.5V before the shut-
0.01µF
CT DS
1OOk down circuitry has had time to respond and remove drive
CT
LTC1153 from the gate of the power MOSFET. A supply filter should
0.22µF
STATUS G IRF530 be added as shown in Figure 8 which holds the supply pin
15V of the LTC1153 high long enough for the over-current
GND SD shutdown circuitry to respond and fully discharge the
LOAD gate, i.e., break the circuit.
LTC1153 • F06 5V/2A
>7V
+ REGULATOR +
100µF *20Ω 10µF 0.1Ω
Figure 6. Using a Speed-Up Diode
+ 1N4148
*47µF
Reverse Battery Protection IN VS
0.1µF
100k
The LTC1153 can be protected against reverse battery CT DS
conditions by connecting a resistor in series with the 1µF LTC1153

ground lead as shown in Figure 7. The resistor limits the STATUS G IRLR024

supply current to less than 50mA with –12V applied. Since SHORT
GND SD CIRCUIT
the LTC1153 draws very little current while in normal
operation, the drop across the ground resistor is minimal.
the 5V µP (or control logic) is protected by the 10k *SUPPLY FILTER COMPONENTS LTC1153 • F08

resistors in series with the input and status pins. Figure 8. Supply Filter for Current Limited Supplies

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 LTC1153
UO U W U
APPLICATI S I FOR ATIO
Five volt linear regulators with small output capacitors Because the LTC1153 is micropower in both the standby
are the most difficult to protect as they can “switch” and ON state, the voltage drop across the supply filter
from a voltage mode to a current limited mode very is less than 2mV, and does not significantly alter the
quickly. The large output capacitors on many switching accuracy of the 100mV drain sense threshold voltage.
regulators, on the other hand, may be able to hold the
supply pin of the LTC1153 above 3.5V sufficiently long
that this extra filtering is not required.

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TYPICAL APPLICATIO S
Over-Temperature Circuit Breaker Over-Voltage Circuit Breaker

12V 4.75V TO 5.25V

+ +
100µF 10µF
IN VS IN VS
5V 5V
100Ω
51k CT DS 51k CT DS
0.47µF LTC1153 5V 0.22µF LTC1153 5.6V
STATUS G MTD3055E STATUS G IRLD024
30k
GND SD GND SD
*PTC 12V 5V
THERMISTOR LOAD LOAD
(100°C)
*RL3006-50-100-25-PT0 KEYSTONE SWITCH IS SHUTDOWN WHEN VS > 5.7V
LTC1153 • TA03 LTC1153 • TA05

24V to 28V Over-Temperature Circuit Breaker

24V to 28V Over-Temperature Circuit Breaker with Bootstrapped Supply

24V TO 28V 24V TO 28V

+ +
100µF 3k 100µF 100k

+ +
IN VS 18V 10µF IN VS 18V 10µF 6.2k
5V 5V
51k CT DS CT DS
51k
1N4148
0.47µF LTC1153 0.47µF LTC1153
STATUS G MTP12N06 STATUS G
MTP15N06E
30k 30k
GND SD 5V GND SD 5V
*PTC 24V TO 28V *PTC 24V TO 28V
THERMISTOR LOAD THERMISTOR LOAD
(100°C) (100°C)
*KEYSTONE RL2006-100-100-30-PT. * KEYSTONE RL2006-100-100-30-PT.
MOUNT ON MOSFET OR LOAD HEAT SINK. LTC1153 • TA04 MOUNT ON MOSFET OR LOAD HEAT SINK. LTC1153 • TA06

** BOOTSTRAPPING REDUCES IQ(OFF) TO 60µA, IQ(ON) = 1mA.

11
LTC1153
UO
TYPICAL APPLICATI S
12V Lamp Driver/Circuit Breaker Relay Driver with Over-Current Protection
with Auto-Reset and Status Feedback
12V 12V
+ +
470µF 100µF
IN VS 10k 0.02Ω 2Ω 0.02Ω
100k
IN VS 10k
5V
CT DS 0.01µF
5V 1N4148
0.33µF LTC1153 VN2222LL CT DS
STATUS G 1µF LTC1153 MTD3055E
0.1µF
1M STATUS G TO 12V
GND SD IRFZ34 LOAD
15V
12V GND SD

12V/2A 1N4001
BULB COIL CURRENT LIMITED TO 350mA
CONTACT CURRENT LIMITED TO 5A
LTC1153 • TA07 LTC1153 • TA08

SCSI Termination Power 1A Circuit Breaker with

Auto-Reset and Ramped Turn-On
1N5817
0.1Ω MTD3055EL
5V 4.25V/1A
+ +
100µF 20Ω 10µF
10k 1N4148
+
ON/OFF IN VS 47µF
51k 0.1µF
1N4148
CT DS
0.47µF LTC1153
Z5U 100k 100k
STATUS STATUS G
0.22µF
GND SD

LTC1153 • TA09

Logic Controlled Battery Switch with Reverse Battery Protection,

Ramped Turn-On and 10µA Standby Current
Si9956DY

0.05Ω
SWITCHED
+ BATTERY
4 TO 6 +
CELLS 47µF/16V

ON/OFF IN VS
51k
1N4148
CT DS
0.47µF LTC1153
100k 100k
STATUS STATUS G
0.22µF
GND SD

LTC1153 • TA10

300Ω

12
 LTC1153
UO
TYPICAL APPLICATI S
“4 Cell-to-5V” Regulator with 2A Current Limit, Auto-Reset,
Ramped Turn-On and 10µA Standby Current

+ 4-CELL +
BATTERY 100µF 0.05Ω
PACK

ON/OFF IN VS
51k
1N4148 IRLR024
CT DS
0.47µF 200pF
LTC1153
100k 100k
STATUS STATUS G 10k 1
8 3
0.22µF 5V/1A
LT1431
GND SD 7 4 + 470µF
6 5 ESR < 0.5Ω

LTC1153 • TA11

12V Step-Up Regulator with Soft Start, Auto-Reset Circuit Breaker (Pre-Regulator),
Status Feedback and 10µA Standby Current
1N5820
0.02Ω IRLZ24 50µH
5V 12V/1A
+ +
470µF 20Ω 5 330µF
100k 1N4148 + VIN
10.72k
+ 150µF 1%
VSW 4
ON/OFF IN VS 47µF LT1070 2
51k 0.22µF FB
1N4148 GND VC
CT DS
0.47µF 3 1 1.24k
LTC1153
Z5U 100k 100k 1%
STATUS STATUS G 1k

0.22µF
GND SD 1µF

LTC1153 • TA12

12V Step-Up Regulator with 1A Circuit Breaker (Post Regulator), Breaker Status
Feedback and Ramped Output
1N5820
50µH (12V)
5V
+ +
150µF 5 330µF 0.1Ω
1N4148
VIN
10.72k
VSW 4 1%
LT1070 ON/OFF IN VS
2 10k
FB 51k 0.1µF
GND VC 1N4148
1.24k CT DS
3 1 1% 0.47µF LTC1153
Z5U 100k 100k
1k STATUS STATUS G IRF530

1µF 12V
GND SD 12V/1A
+ 47µF
0.22µF
16V

LTC1153 • TA13

13
LTC1153
UO
TYPICAL APPLICATI S
Auto-Reset Circuit Breaker with Programmable (1-6) Number of
Retries Using Binary Counter

5V TO 18 V
+
100µF 0.1Ω

ON/OFF IN VS

5V
CT DS 1N4148
11 4 16
0.47µF LTC1153
LOAD VCC Z5U 100k 100k
5
UP STATUS G IRF530
12 100k
74C193 CARRY 12V
7 GND SD OUTPUT
QD 0.22µF +
ABCDGND 47µF
15 1 10 9 8 14
FAULT
INPUTS* LTC1153 • TA14

*SET WITH 3-BIT BINARY WORD = 7 – N

DC Motor Driver with Stall-Current Circuit Breaking (Auto-Reset),

Thermal Overload Shutdown and 10µA Standby Current

12V
+
470µF 0.02Ω

5V ON/OFF IN VS
0.1µF
100k
51k CT DS
0.33µF LTC1153
10k
2N2907 STATUS G IRFZ34
12V
120k
240Ω GND SD

MOTOR *PTC
FAULT THERMISTOR M 1N5400
LED (100°C)

*RL3006-50-100-25-PTO KEYSTONE
MOUNT ON MOTOR CHASIS OR MOSFET HEAT SINK
LTC1153 • TA15

14
 LTC1153
U
PACKAGE DESCRIPTIO
N8 Package
8-Lead Plastic Lead
0.400
(10.160)
0.300 – 0.320 0.045 – 0.065 0.130 ± 0.005 MAX
(7.620 – 8.128) (1.143 – 1.651) (3.302 ± 0.127)
8 7 6 5

0.065
0.250 ± 0.010
(1.651)
0.009 – 0.015 TYP (6.350 ± 0.254)
(0.229 – 0.381) 0.125
(3.175) 0.020
+0.025 0.045 ± 0.015 MIN (0.508) 1 2 3 4
0.325 –0.015

( )
(1.143 ± 0.381) MIN
+0.635
8.255
–0.381 0.100 ± 0.010 0.018 ± 0.003
(2.540 ± 0.254) (0.457 ± 0.076) N8 0392

S8 Package
8-Lead Plastic SOIC

0.189 – 0.197
(4.801 – 5.004)
0.010 – 0.020 7
× 45° 0.053 – 0.069 8 6 5
(0.254 – 0.508)
(1.346 – 1.752)
0.008 – 0.010 0.004 – 0.010
(0.203 – 0.254) (0.101 – 0.254)

0.228 – 0.244 0.150 – 0.157

0.016 – 0.050 (5.791 – 6.197) (3.810 – 3.988)
0°– 8° 0.014 – 0.019 0.050
0.406 – 1.270
TYP (0.355 – 0.483) (1.270)
BSC

1 2 3 4 SO8 0392

15
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of circuits as described herein will not infringe on existing patent rights.
LTC1153
U.S. Area Sales Offices

NORTHEAST REGION CENTRAL REGION NORTHWEST REGION

Linear Technology Corporation Linear Technology Corporation Linear Technology Corporation
One Oxford Valley Chesapeake Square 782 Sycamore Dr.
2300 E. Lincoln Hwy.,Suite 306 229 Mitchell Court, Suite A-25 Milpitas, CA 95035
Langhorne, PA 19047 Addison, IL 60101 Phone: (408) 428-2050
Phone: (215) 757-8578 Phone: (708) 620-6910 FAX: (408) 432-6331
FAX: (215) 757-5631 FAX: (708) 620-6977

SOUTHEAST REGION SOUTHWEST REGION

Linear Technology Corporation Linear Technology Corporation
17060 Dallas Parkway 22141 Ventura Blvd.
Suite 208 Suite 206
Dallas, TX 75248 Woodland Hills, CA 91364
Phone: (214) 733-3071 Phone: (818) 703-0835
FAX: (214) 380-5138 FAX: (818) 703-0517

International Sales Offices

FRANCE KOREA TAIWAN

Linear Technology S.A.R.L. Linear Technology Korea Branch Linear Technology Corporation
Immeuble "Le Quartz" Namsong Building, #505 Rm. 801, No. 46, Sec. 2
58 Chemin de la Justice Itaewon-Dong 260-199 Chung Shan N. Rd.
92290 Chatenay Mallabry Yongsan-Ku, Seoul Taipei, Taiwan, R.O.C.
France Korea Phone: 886-2-521-7575
Phone: 33-1-46316161 Phone: 82-2-792-1617 FAX: 886-2-562-2285
FAX: 33-1-46314613 FAX: 82-2-792-1619

GERMANY SINGAPORE UNITED KINGDOM

Linear Techonolgy GMBH Linear Technology Pte. Ltd. Linear Technology (UK) Ltd.
Untere Hauptstr. 9 101 Boon Keng Road The Coliseum, Riverside Way
D-8057 Eching #02-15 Kallang Ind. Estates Camberley, Surrey GU15 3YL
Germany Singapore 1233 United Kingdom
Phone: 49-89-319741-0 Phone: 65-293-5322 Phone: 44-276-677676
FAX: 49-89-3194821 FAX: 65-292-0398 FAX: 44-276-64851

JAPAN
Linear Technology KK
5F YZ Building
4-4-12 Iidabashi Chiyoda-Ku
Tokyo, 102 Japan
Phone: 81-3-3237-7891
FAX: 81-3-3237-8010

World Headquarters

Linear Technology Corporation

1630 McCarthy Blvd.
Milpitas, CA 95035-7487
Phone: (408) 432-1900
FAX: (408) 434-0507
10/92

LT/GP 1092 10K REV 0

Linear Technology Corporation
16 1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977  LINEAR TECHNOLOGY CORPORATION 1992