LTC4210-1/LTC4210-2

Hot Swap Controller in

6-Lead SOT-23 Package

FEATURES DESCRIPTION
nn Allows Safe Board Insertion and Removal The LTC®4210 is a 6-pin SOT-23 hot swap controller that
from a Live Backplane allows a board to be safely inserted and removed from a
nn Adjustable Analog Current Limit live backplane. An internal high side switch driver controls
with Circuit Breaker the GATE of an external N-channel MOSFET for a supply
nn Fast Response Limits Peak Fault Current voltage ranging from 2.7V to 16.5V. The LTC4210 provides
nn Automatic Retry or Latch Off On Current Fault the initial timing cycle and allows the GATE to be ramped
nn Adjustable Supply Voltage Power-Up Rate up at an adjustable rate.
nn High Side Drive for External MOSFET Switch
nn Controls Supply Voltages from 2.7V to 16.5V
The LTC4210 features a fast current limit loop providing
nn Undervoltage Lockout
active current limiting together with a circuit breaker timer.
nn Adjustable Overvoltage Protection
The signal at the ON pin turns the part on and off and is
nn Low Profile (1mm) SOT-23 (ThinSOT™) Package
also used for the reset function.
This part is available in two options: the LTC4210-1 for
automatic retry on overcurrent fault and the LTC4210-2
APPLICATIONS for latch off on an overcurrent fault.
nn Hot Board Insertion L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property
nn Electronic Circuit Breaker of their respective owners.
nn Industrial High Side Switch/Circuit Breaker

TYPICAL APPLICATION
Single Channel 5V Hot Swap Controller
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE) (MALE) RSENSE Q1
VOUT
Power-Up Sequence
LONG 0.01Ω Si4410DY
VIN
5V
5V
RX
+ 470µF 4A
CLOAD = 470µF
Z1 10Ω VON
CLOAD
OPTIONAL (2V/DIV)
CX
0.1µF RG
VCC SENSE 100Ω VTIMER
(1V/DIV)
RON1 GATE
SHORT 20k RC
ON LTC4210 100Ω
CC VOUT
RON2 (5V/DIV)
10k TIMER 0.01µF
GND

CTIMER IOUT
LONG 0.22µF (0.5A/DIV)
GND GND 4210 TA02
Z1: ISMA10A OR SMAJ10A 4210 TA01 10ms/DIV

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LTC4210-1/LTC4210-2
ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION
(Note 1)
Supply Voltage (VCC).................................................17V TOP VIEW
Input Voltage (SENSE, TIMER).... – 0.3V to (VCC + 0.3V)
TIMER 1 6 VCC
Input Voltage (ON)...................................... –0.3V to 17V GND 2 5 SENSE
Output Voltage (GATE)........... Internally Limited (Note 3) ON 3 4 GATE
Operating Temperature Range
S6 PACKAGE
LTC4210-1C/LTC4210-2C.......................... 0°C to 70°C 6-LEAD PLASTIC TSOT-23
LTC4210-1I/LTC4210-2I........................–40°C to 85°C TJMAX = 125°C, θJA = 230°C/W

Storage Temperature Range................... –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................... 300°C

ORDER INFORMATION http://www.linear.com/product/LTC4210-1#orderinfo

Lead Free Finish
TAPE AND REEL (MINI) TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC4210-1CS6#TRMPBF LTC4210-1CS6#TRPBF LTYW 6-Lead Plastic TSOT-23 0°C to 70°C
LTC4210-2CS6#TRMPBF LTC4210-2CS6#TRPBF LTYX 6-Lead Plastic TSOT-23 0°C to 70°C
LTC4210-1IS6#TRMPBF LTC4210-1IS6#TRPBF LTF5 6-Lead Plastic TSOT-23 –40°C to 85°C
LTC4210-2IS6#TRMPBF LTC4210-2IS6#TRPBF LTF6 6-Lead Plastic TSOT-23 –40°C to 85°C
TRM = 500 pieces.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

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 LTC4210-1/LTC4210-2
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 5V, unless otherwise noted. (Note 2)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VCC Supply Voltage l 2.7 16.5 V
ICC VCC Supply Current l 0.65 3.5 mA
VLKOR VCC Undervoltage Lockout Release VCC Rising l 2.2 2.5 2.65 V
VLKOHYST VCC Undervoltage Lockout Hysteresis 100 mV
IINON ON Pin Input Current l –10 0 10 µA
IINSENSE SENSE Pin Input Current VSENSE = VCC l –10 5 10 µA
VCB Circuit Breaker Trip Voltage VCB = (VCC – VSENSE) l 44 50 56 mV
IGATEUP GATE Pin Pull-Up Current VGATE = 0V l –5 –10 –15 µA
IGATEDN GATE Pin Pull-Down Current VTIMER = 1.5V, VGATE = 3V or 25 mA
VON = 0V, VGATE = 3V or
VCC – VSENSE = 100mV, VGATE = 3V
∆VGATE External N-Channel Gate Drive VGATE – VCC, VCC = 2.7V l 4.0 6.5 8 V
VGATE – VCC, VCC = 3V l 4.5 7.5 10 V
VGATE – VCC, VCC = 3.3V l 5.0 8.5 12 V
VGATE – VCC, VCC = 5V l 10 12 16 V
VGATE – VCC, VCC = 12V l 9.0 12 16 V
VGATE – VCC, VCC = 15V l 6.0 11 18 V
ITIMERUP TIMER Pin Pull-Up Current Initial Cycle, VTIMER = 1V l –2 –5 –8.5 µA
During Current Fault Condition, VTIMER = 1V l –25 –60 –100 µA
ITIMERDN TIMER Pin Pull-Down Current After Current Fault Disappears, VTIMER = 1V l 2 3.5 µA
Under Normal Conditions, VTIMER = 1V 100 µA
VTIMER TIMER Pin Threshold High Threshold, TIMER Rising l 1.22 1.3 1.38 V
Low Threshold, TIMER Falling l 0.15 0.2 0.25 V
VTMRHYST TIMER Low Threshold Hysteresis 100 mV
VON ON Pin Threshold ON Threshold, ON Rising l 1.22 1.3 1.38 V
VONHYST ON Pin Threshold Hysteresis 80 mV
tOFF(TMRHIGH) Turn-Off Time (TIMER Rise to GATE Fall) VTIMER = 0V to 2V Step, VCC = VON = 5V 1 µs
tOFF(ONLOW) Turn-Off Time (ON Fall to GATE Fall) VON = 5V to 0V Step, VCC = 5V 30 µs
tOFF(VCCLOW) Turn-Off Time (VCC Fall to IC Reset) VCC = 5V to 2V Step, VON = 5V 30 µs

Note 1: Stresses beyond those listed under Absolute Maximum Ratings Note 3: An internal Zener on the GATE pin clamps the charge pump
may cause permanent damage to the device. Exposure to any Absolute voltage to a typical maximum voltage of 26V. External overdrive of the
Maximum Rating condition for extended periods may affect device GATE pin beyond the internal Zener voltage may damage the device.
reliability and lifetime. Without a limiting resistor, the GATE capacitance must be <0.15µF at
Note 2: All currents into device pins are positive; all currents out of device maximum VCC. If a lower GATE pin clamp voltage is desired, an external
pins are negative. All voltages are referenced to ground unless otherwise Zener diode may be used.
specified.

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 LTC4210-1/LTC4210-2
TYPICAL PERFORMANCE CHARACTERISTICS
Undervoltage Lockout Threshold
Supply Current vs Supply Voltage Supply Current vs Temperature vs Temperature
4.0 4.0 2.65
TA = 25°C

UNDERVOLTAGE LOCKOUT THRESHOLD (V)

3.5 3.5 2.60

3.0 3.0 2.55

SUPPLY CURRENT (mA)

SUPPLY CURRENT (mA)

VCC RISING
2.5 2.5 2.50

2.0 2.0 2.45

VCC = 15V VCC FALLING
1.5 1.5 VCC = 12V 2.40

1.0 1.0 2.35

VCC = 5V
0.5 0.5 2.30
VCC = 3V
0 0 2.25
0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 –75 –50 –25 0 25 50 75 100 125 150
SUPPLY VOLTAGE (V) TEMPERATURE (°C) TEMPERATURE (°C)
4210 G01 4210 G02 4210 G03

VGATE vs Supply Voltage VGATE vs Temperature IGATEUP vs Supply Voltage

40 40 –8.0
TA = 25°C TA = 25°C
35 35 –8.5

30 30 VCC = 15V –9.0

25 25 IGATEUP (µA) –9.5

VGATE (V)

VGATE (V)

VCC = 12V
20 20 –10.0

15 15 VCC = 5V –10.5

10 10 –11.0
VCC = 3V
5 5 –11.5

0 0 –12.0
0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V)
4210 G04 4210 G05 4210 G06

IGATEUP vs Temperature ∆VGATE vs Supply Voltage ∆VGATE vs Temperature

–8.0 18 18
TA = 25°C
–8.5 16 16
14
–9.0 14 VCC = 12V
VCC = 5V VCC = 5V
12
–9.5 12
IGATEUP (µA)

∆VGATE (V)

∆VGATE (V)

10 VCC = 15V
–10.0 VCC = 12V 10
VCC = 3V 8
–10.5 8
6
VCC = 15V
–11.0 6 VCC = 3V
4
–11.5 2 4

–12.0 0 2
–75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C)
4210 G07 4210 G08 4210 G09

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 LTC4210-1/LTC4210-2
TYPICAL PERFORMANCE CHARACTERISTICS
ITIMERUP (In Initial Cycle) ITIMERUP (In Initial Cycle) ITIMERUP (During Circuit Breaker
vs Supply Voltage vs Temperature Delay) vs Supply Voltage
0 0 –20
TA = 25°C VCC = 5V TA = 25°C
–1 –1 –30
–2 –2
–40
–3 –3

ITIMERUP (µA)
–50
ITIMERUP (µA)

ITIMERUP (µA)
–4 –4
–5 –5 –60
–6 –6 –70
–7 –7
–80
–8 –8
–9 –9 –90

–10 –10 –100

0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V)
4210 G12
4210 G10 4210 G11

ITIMERUP (During Circuit Breaker ITIMERDN (In Cool-Off Cycle) ITIMERDN (In Cool-Off Cycle)
Delay) vs Temperature vs Supply Voltage vs Temperature
–20 3.0 3.0
VCC = 5V TA = 25°C VCC = 5V
–30 2.8 2.8
2.6 2.6
–40
2.4 2.4
–50
ITIMERUP (µA)

ITIMERDN (µA)

2.2 ITIMERDN (µA) 2.2

–60 2.0 2.0

–70 1.8 1.8

1.6 1.6
–80
1.4 1.4
–90 1.2 1.2
–100 1.0 1.0
–75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C)
4210 G13 4210 G14 4210 G15

TIMER High Threshold TIMER High Threshold TIMER Low Threshold

vs Supply Voltage vs Temperature vs Supply Voltage
1.38 1.38 0.24
TA = 25°C VCC = 5V TA = 25°C
1.36 1.36 0.23
TIMER HIGH THRESHOLD (V)

TIMER LOW THRESHOLD (V)

TIMER HIGH THRESHOLD (V)

1.34 1.34 0.22

1.32 1.32 0.21

1.30 1.30 0.20

1.28 1.28 0.19

1.26 1.26 0.18

1.24 1.24 0.17

1.22 1.22 0.16

0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V)
4210 G16 4210 G17 4210 G18

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LTC4210-1/LTC4210-2
TYPICAL PERFORMANCE CHARACTERISTICS
TIMER Low Threshold ON Pin Threshold ON Pin Threshold
vs Temperature vs Supply Voltage vs Temperature
0.24 1.45 1.45
VCC = 5V TA = 25°C VCC = 5V
0.23 1.40 1.40
TIMER LOW THRESHOLD (V)

0.22 1.35 1.35

ON PIN THRESHOLD (V)

ON PIN THRESHOLD (V)

HIGH THRESHOLD HIGH THRESHOLD
0.21 1.30 1.30

0.20 1.25 1.25 LOW THRESHOLD

LOW THRESHOLD
0.19 1.20 1.20

0.18 1.15 1.15

0.17 1.10 1.10

0.16 1.05 1.05

–75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150
TEMPERATURE (°C) SUPPLY VOLTAGE (V) TEMPERATURE (°C)
4210 G19 4210 G20 4210 G21

tOFF(ONLOW) vs Supply Voltage tOFF(ONLOW) vs Temperature VCB vs Supply Voltage

80 80 58
TA = 25°C TA = 25°C
70 70 VCC = 15V 56

60 60 54

VCC = 12V
tOFF,ONLOW (µs)

tOFF,ONLOW (µs)

50 50 VCB (mV) 52

40 40 50
VCC = 5V
30 30 48

20 20 46
VCC = 3V
10 10 44

0 0 42
0 2 4 6 8 10 12 14 16 18 20 –75 –50 –25 0 25 50 75 100 125 150 0 2 4 6 8 10 12 14 16 18 20
SUPPLY VOLTAGE (V) TEMPERATURE (°C) SUPPLY VOLTAGE (V)
4210 G22 4210 G23 4210 G24

Overcurrent to GATE Low

VCB vs Temperature Propagation Delay
58 1k
VCC = 5V 25°C
56 VCC = 5V
CGATE = 5nF
OVERCURRENT TO GATE LOW

54
PROPAGATION DELAY (µs)

100

52
VCB (mV)

50 10

48

46 1

44

42 0.1
–75 –50 –25 0 25 50 75 100 125 150 0 50 100 150 200 250 300 350 400
TEMPERATURE (°C) VIN – VSENSE (mV)
4210 G26
4210 G25

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 LTC4210-1/LTC4210-2
PIN FUNCTIONS
TIMER (Pin 1): Timer Input Pin. An external capacitor load current. An external R-C compensation network should
CTIMER sets a 272.9ms/µF initial timing delay and a 21.7ms/ be connected to this pin for current limit loop stability.
µF circuit breaker delay. The GATE pin turns off whenever
SENSE (Pin 5): Current Limit Sense Input Pin. A sense
the TIMER pin is pulled beyond the COMP2 threshold,
resistor between the VCC and SENSE pins sets the analog
such as for overvoltage detection with an external Zener. current limit. In overload, the EA controls the external
GND (Pin 2): Ground Pin. MOSFET gate to maintain the SENSE pin voltage at 50mV
below VCC. When the EA is maintaining current limit, the
ON (Pin 3): ON Input Pin. The ON pin comparator has a
TIMER circuit breaker mode is activated. The current limit
low-to-high threshold of 1.3V with 80mV hysteresis and a
loop/circuit breaker mode can be disabled by connecting
glitch filter. When the ON pin is low, the LTC4210 is reset.
the SENSE pin to the VCC pin.
When the ON pin goes high, the GATE turns on after the
initial timing cycle. VCC (Pin 6): Positive Supply Input Pin. The operating supply
voltage range is between 2.7V to 16.5V. An undervoltage
GATE (Pin 4): GATE Output Pin. This pin is the high side
lockout (UVLO) circuit with a glitch filter resets the LTC4210
gate drive of an external N-channel MOSFET. An internal
when a low supply voltage is detected.
charge pump provides a 10µA pull-up current with Zener
clamps to VCC and ground. In overload, the error amplifier
(EA) controls the external MOSFET to maintain a constant

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LTC4210-1/LTC4210-2
BLOCK DIAGRAM
6 5
VCC SENSE

+ 50mV
INITIAL UP/LATCH OFF –
UVLO – +

5µA 60µA EA

CURRENT LIMIT GLITCH

FILTER

0.2V +
COMP1
CHARGE
– PUMP Z1
TIMER 12V
1 LOGIC
10µA
+ GATE
4
COMP2
SHUTDOWN Z2
1.3V – M5
26V

INITIAL DOWN/NORMAL

GLITCH
FILTER
2µA 100µA
GND
2

COOL OFF
COMP3
– +
1.3V ON
3 4210 BD

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 LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
Hot Circuit Insertion The UVLO has a low-to-high threshold of 2.5V, a 100mV
hysteresis and a high-to-low glitch filter of 30µs. Above
When circuit boards are inserted into live backplanes,
2.5V supply voltage, the LTC4210 will start if the ON pin
the supply bypass capacitors can draw large transient
conditions are met. A short supply dip below 2.4V for less
currents from the backplane power bus as they charge.
than 30µs is ignored to allow for bus supply transients.
Such transient currents can cause permanent damage to
connector pins, glitches on the system supply or reset ON Function
other boards in the system.
The ON pin is the input to a comparator which has a
The LTC4210 is designed to turn a printed circuit board’s low-to-high threshold of 1.3V, an 80mV hysteresis and a
supply voltage ON and OFF in a controlled manner, allow- high-to-low glitch filter of 30µs. A low input on the ON pin
ing the circuit board to be safely inserted into or removed
resets the LTC4210 TIMER status and turns off the external
from a live backplane. The LTC4210 can reside either on
MOSFET by pulling the GATE pin to ground. A low-to-high
the backplane or on the daughter board for hot circuit
transition on the ON pin starts an initial cycle followed by
insertion applications.
a start-up cycle. A 10k pull-up resistor connecting the ON
Overview pin to the supply is recommended. The 10k resistor shunts
any potential static charge on the backplane and reduces
The LTC4210 is designed to operate over a range of sup- the overvoltage stress at the ON pin during live insertion.
plies from 2.7V to 16.5V. Upon insertion, an undervoltage Alternatively, an external resistor divider at the ON pin can
lockout circuit determines if sufficient supply voltage is be used to program an undervoltage lockout value higher
present. When the ON pin goes high an initial timing cycle than the internal UVLO circuit. An RC filter can be added
assures that the board is fully seated in the backplane at the ON pin to increase the delay time at card insertion
before the MOSFET is turned on. A single timer capacitor if the internal glitch filter delay is insufficient.
sets the periods for all of the timer functions. After the
initial timing cycle the LTC4210 can either start up in cur- GATE Function
rent limit or with a lower load current. Once the external
During hot insertion of the PCB, an abrupt application of
MOSFET is fully enhanced and the supply has ramped
supply voltage charges the external MOSFET drain/gate
up, the LTC4210 monitors the load current through an
capacitance. This can cause an unwanted gate voltage
external sense resistor. Overcurrent faults are actively
spike. An internal proprietary circuit holds GATE low before
limited to 50mV/RSENSE for a specified circuit breaker
the internal circuitry wakes up. This reduces the MOSFET
timer limit. The LTC4210-1 will automatically retry after
current surges substantially at insertion. The GATE pin is
a current limit fault while the LTC4210-2 latches off. The
held low in reset mode and during the initial timing cycle.
LTC4210‑1 timer function limits the retry duty cycle to
In the start-up cycle the GATE pin is pulled up by a 10µA
3.8% for MOSFET cooling.
current source. During an overcurrent fault condition, the
Undervoltage Lockout error amplifier servoes the GATE pin to maintain a constant
current to the load until the circuit breaker trips. When the
An internal undervoltage lockout (UVLO) circuit resets the circuit breaker trips, the GATE pin shuts down abruptly.
LTC4210 if the VCC supply is too low for normal operation.

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LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
Current Limit Circuit Breaker Function CURRENT FLOW
TO LOAD
CURRENT FLOW
TO LOAD
SENSE RESISTOR
The LTC4210 features a current limiting circuit breaker
instead of a traditional comparator circuit breaker. When TRACK WIDTH W:
0.03" PER AMP W
there is a sudden load current surge, such as a low imped- ON 1 OZ COPPER

ance fault, the bus supply voltage can drop significantly 4210 F01

to a point where the power to an adjacent card is affected,

causing system malfunctions. The LTC4210 fast response TO TO
VCC SENSE
error amplifier (EA) instantly limits current by reducing
the external MOSFET GATE pin voltage. This minimizes Figure 1. Making PCB Connections to the Sense Resistor
the bus supply voltage drop and permits power budgeting
and fault isolation without affecting neighboring cards. A Calculating Current Limit
compensation circuit should be connected to the GATE For a selected RSENSE, the nominal load current is given
pin for current limit loop stability. by Equation 1. The minimum load current is given by
Equation 2:
Sense Resistor Consideration
VCB(MIN) 44mV
The nominal fault current limit is determined by a sense ILIMIT(MIN) = = (2)
resistor connected between VCC and the SENSE pin as RSENSE(MAX) RSENSE(MAX)
given by Equation 1.
where
VCB(NOM) 50mV
ILIMIT(NOM) = = (1)  R 
RSENSE(NOM) RSENSE(NOM) RSENSE(MAX) =RSENSE • 1+ TOL 
 100 
The power rating of the sense resistor should be rated at
The maximum load current is given by Equation 3:
the fault current level. Table 2 in the Appendix lists some
common sense resistors. VCB(MAX) 56mV
ILIMIT(MAX) = = (3)
For proper circuit breaker operation, Kelvin-sense PCB RSENSE(MIN) RSENSE(MIN)
connections between the sense resistor and the LTC4210
VCC and SENSE pins are strongly recommended. The where
drawing in Figure 1 illustrates the connections between  R 
the LTC4210 and the sense resistor. PCB layout should RSENSE(MIN) =RSENSE • 1– TOL 
 100 
be balanced and symmetrical to minimize wiring errors.
In addition, the PCB layout for the sense resistor should
include good thermal management techniques for optimal
sense resistor power dissipation.

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 LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
If a 7mΩ sense resistor with ±1% tolerance is used for quency parasitic oscillations frequently associated with
current limiting, the nominal current limit is 7.14A. From the power MOSFET. In some applications, the user may
Equations 2 and 3, ILIMIT(MIN) = 6.22A and ILIMIT(MAX) = find that RG helps in short-circuit transient recovery as
8.08A. For proper operation, the minimum current limit well. However, too large of an RG value will slow down the
must exceed the circuit maximum operating load current turn-off time. The recommended RG range is between 5Ω
with margin. The sense resistor power rating must exceed and 500Ω. Usually, method 2 is preferred when the input
VCB(MAX)2/RSENSE(MIN). supply voltage is greater than 10V. RG limits the current
flow into the GATE pin’s internal zener clamp during tran-
Frequency Compensation sient events. The recommended RC and CC values are the
A compensation circuit should be connected to the GATE same as method 1. The parasitic compensation capacitor
pin for current limit loop stability. CP is required when 0.2µF < load capacitance CL < 9µF,
otherwise it is optional.
Method 1
Parasitic MOSFET Oscillation
The simplest frequency compensation network consists
of RC and CC (Figure 2a). The total GATE capacitance is: There are two possible parasitic oscillations when the
MOSFET operates as a source follower when ramping at
CGATE = CISS + CC (4) power-up or during current limiting. The first type of oscil-
Generally, the compensation value in Figure 2a is sufficient lation occurs at high frequencies, typically above 1MHz.
for a pair of input wires less than a foot in length. Applica- This high frequency oscillation is easily damped with RG
tions with longer input wires may require the RC or CC value as mentioned in method 2.
to be increased for better fault transient performance. For The second type of oscillation occurs at frequencies
a pair of three foot input wires, users can start with CC = between 200kHz and 800kHz due to the load capacitance
47nF and RC = 100Ω. Despite the wire length, the general being between 0.2µF and 9µF, the presence of RG and
rule for AC stability required is CC ≥ 8nF and RC ≤ 1kΩ. RC resistance, the absence of a drain bypass capacitor,
a combination of bus wiring inductance and bus supply
Method 2
output impedance. There are several ways to prevent this
The compensation network in Figure 2b is similar to the second type of oscillation. The simplest way is to avoid
circuitry used in method 1 but with an additional gate load capacitance below 10µF, the second choice is con-
resistor RG. The RG resistor helps to minimize high fre- necting an external CP > 1.5nF.

RSENSE Q1 RSENSE Q1
0.007Ω Si4410DY 0.007Ω Si4410DY
VIN VIN
VOUT VOUT
5V + 12V +
6 5 CL 6 5 CL
VCC SENSE VCC SENSE
RG CP**
LTC4210* *ADDITIONAL DETAILS LTC4210* 2.2nF
200Ω
4 OMITTED FOR CLARITY 4
GATE **USE CP IF 0.2µF < CL < 9µF, GATE
RC OTHERWISE NOT REQUIRED RC
100Ω 100Ω
CC CC
10nF 10nF
(2a) (2b) 4210 F02

Method 1 Method 2

Figure 2. Frequency Compensation

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LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
Whichever method of compensation is used, board level the TIMER pin until it reaches 0.2V at time point 4. The
short-circuit testing is highly recommended as board initial cycle delay (time point 2 to time point 4) is related
layout can affect transient performance. Beside frequency to CTIMER by equation:
compensation, the total gate capacitance CGATE also tINITIAL ≈ 272.9 • CTIMER ms/µF (5)
determines the GATE start-up as in Equation 6. The CGATE
should be kept below 0.15µF at high supply operation as When the initial cycle terminates, a start-up cycle is
the capacitive energy ( 0.5 • CGATE • VGATE2 ) is discharged activated and the GATE pin ramps high. The TIMER pin
by the LTC4210 internal pull-down transistor. This prevents continues to be pulled down towards ground.
the internal pull-down transistor from overheating when the
1 2 3 4 5 6 7
GATE turns off and/or is servoing during current limiting.
>2.5V

Timer Function VIN

The TIMER pin handles several key functions with an >1.3V

external capacitor, CTIMER. There are two comparator VON

thresholds: COMP1 (0.2V) and COMP2 (1.3V). The four

COMP2
timing current sources are: 100µA
VTIMER
COMP1
5µA pull-up 5µA 10µA
60µA pull-up VGATE
VTH
2µA pull-down DISCHARGE
VOUT BY LOAD
100µA pull-down 4210 F03

RESET INITIAL START-UP NORMAL

The 100µA is a nonideal current source approximating a MODE CYCLE CYCLE CYCLE
7k resistor below 0.4V.
Figure 3. Normal Operating Sequence
Initial Timing Cycle
Start-Up Cycle Without Current Limit
When the card is being inserted into the bus connector,
the long pins mate first which brings up the supply VIN The GATE is released with a 10µA pull-up at time point
at time point 1 of Figure 3. The LTC4210 is in reset mode 4 of Figure 3. At time point 5, GATE reaches the external
as the ON pin is low. GATE is pulled low and the TIMER MOSFET threshold VTH and VOUT starts to follow the GATE
pin is pulled low with a 100µA source. At time point 2, ramp up. If the RSENSE current is below the current limit,
the short pin makes contact and ON is pulled high. At this the GATE ramps at a constant rate of:
instant, a start-up check requires that the supply voltage ∆VGATE IGATE
be above UVLO, the ON pin be above 1.3V and the TIMER = (6)
∆T CGATE
pin voltage be less than 0.2V. When these three conditions
are fulfilled, the initial cycle begins and the TIMER pin is where CGATE is the total capacitance at the GATE pin.
pulled high with 5µA. At time point 3, the TIMER reaches
the COMP2 threshold and the first portion of the initial
cycle ends. The 100µA current source then pulls down

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12 For more information www.linear.com/LTC4210-1

 LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
The current through RSENSE can be divided into two com- 1 2 3 4 5 5A 5B 6 7

ponents; ICLOAD due to the total load capacitance (CLOAD) >2.5V

and ILOAD due to the noncapacitive load elements. The VIN

capacitive load typically dominates.

For a successful start-up without current limit, IRSENSE >1.3V

< ILIMIT: VON

IRSENSE = ICLOAD + ILOAD < ILIMIT COMP2

2µA
100µA 60µA
 ∆V 
IRSENSE = CLOAD • OUT  +ILOAD <ILIMIT (7) VTIMER
COMP1
 ∆T  5µA 10µA
100µA

<10µA
Due to the voltage follower configuration, the VOUT ramp 10µA

rate approximately tracks VGATE: VGATE

VTH
∆VOUT ICLOAD ∆VGATE IGATE
= ≈ = (8) DISCHARGE
∆T CLOAD ∆T CGATE VOUT
BY LOAD

At time point 6, VOUT is approximately VIN but GATE REGULATED AT 50mV/RSENSE

ramp-up continues until it reaches a maximum voltage. IRSENSE

This maximum voltage is determined either by the charge 4210 F04

pump or the internal clamp. RESET INITIAL START-UP NORMAL

MODE CYCLE CYCLE CYCLE

Start-Up Cycle with Current Limit Figure 4. Operating Sequence with

Current Limiting at Start-Up Cycle
If the duration of the current limit is brief during start-up
(Figure 4) and it did not last beyond the circuit breaker During current limiting, the second term in Equation 10
function time out, the GATE behaves the same as in start-up is partly modified from CGATE • VIN/IGATE to CLOAD • VIN/
without current limit except for the time interval between ICLOAD. The start-up time is now given by:
time point 5A and time point 5B. The servo amplifier limits
IRSENSE by decreasing the IGATE current (<10µA). VTH VIN
t STARTUP =CGATE • +CLOAD •
IGATE ICLOAD
50mV (11)
IRSENSE =ILIMIT = (9) VTH VIN
RSENSE =CGATE • +CLOAD •
IGATE IRSENSE –ILOAD
Equations 7 and 8 are applicable but with a lower GATE
and VOUT ramp rate. For successful completion of current limit start-up cycle
there must be a net current to charge CLOAD and the cur-
Gate Start-Up Time rent limit duration must be less than tCBDELAY. The second
The start-up time without current limit is given by: term in Equation 11 has to fulfill Equation 12.

V +V VIN
t STARTUP =CGATE • TH IN CLOAD • < tCBDELAY (12)
IGATE IRSENSE –ILOAD
(10)
VTH VIN
t STARTUP =CGATE • +CGATE •
IGATE IGATE

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LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
Circuit Breaker Timer Operation A B
CIRCUIT BREAKER
TRIPS
When a current limit fault is encountered at time point A COMP2

in Figure 5, the circuit breaker timing is activated with a VTIMER

LATCHED OFF (5µA PULL-UP)
OR RETRY (2µA PULL-DOWN)
60µA pull-up. The circuit breaker trips at time point B if 60µA
COMP1
the fault is still present and the TIMER pin voltage reaches
the COMP2 threshold and the LTC4210 shuts down. For 100µA

a continuous fault, the circuit breaker delay is: NORMAL FAULT

4210 F05

MODE MODE
CTIMER
tCBDELAY =1.3V • (13) Figure 5. A Continuous Fault Timing
60µA

Intermittent overloads may exceed the current limit as in A1 B1 A2 B2 A3 B3

Figure 6, but if the duration is sufficiently short, the TIMER ~50mV/RSENSE
ILOAD
pin may not reach the COMP2 threshold and the LTC4210
will not shut down. To handle this situation, the TIMER
CIRCUIT BREAKER
discharges with 2µA whenever (VCC – SENSE) voltage is 60µA TRIPS
COMP2 60µA
below the 50mV limit and the TIMER voltage is between VTIMER
60µA

the COMP1 and COMP2 thresholds. When the TIMER 2µA

COMP1

voltage falls below the COMP1 threshold, the TIMER pin 2µA LATCHED OFF (5µA PULL-UP)
OR RETRY (2µA PULL-DOWN)
is discharged with an equivalent 7k resistor (normal mode, VGATE 10µA 10µA

100µA source) when (VCC – SENSE) voltage is below

the 50mV limit. If the TIMER pin does not drop below 4210 F06

CB CB CB
the COMP1 threshold, any intermittent overload with an FAULT FAULT FAULT
aggregate duty cycle of more than 3.8% will eventually
Figure 6. Multiple Intermittent Overcurrent Condition
trip the circuit breaker. Figure 7 shows the circuit breaker
response time in seconds normalized to 1µF. The asym-
metric charging and discharging of TIMER is a fair gauge 1
t (s/µF) = 1.3V • 1µF
of MOSFET heating. CTIMER 60µA • D – 2µA
NORMALIZED RESPONSE TIME (s/µF)

t 1.3V •1µF
(s / µF)= (14)
CTIMER (60µA •D) – 2µA
0.1
When the circuit breaker trips, the GATE pin is pulled low.
The TIMER enters latchoff mode with a 5µA pull-up for the
LTC4210-2 (latched-off version), while an auto-retry “cool-
off” cycle begins with a 2µA pull-down for the LTC4210‑1
(auto-retry version). An auto-retry cool-off delay of the 0.01
0 10 20 30 40 50 60 70 80 90 100
LTC4210‑1 between COMP2 and COMP1 thresholds takes: OVERLOAD DUTY CYCLE, D (%)
4210 F07

C
tCOOLOFF =1.1V • TIMER (15) Figure 7. Circuit Breaker Timer Response
2µA for Intermittent Overload

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14 For more information www.linear.com/LTC4210-1

 LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
Auto-Retry After Current Fault (LTC4210-1) Latch-Off After Current Fault (LTC4210-2)
Figure 8 shows the waveforms of the LTC4210-1 (auto- Figure 9 shows the waveforms of the LTC4210-2 (latch-off
retry version) during a circuit breaker fault. At time point version) during a circuit breaker fault. At time point B, the
B1, the TIMER trips the COMP2 threshold of 1.3V. The TIMER trips the COMP2 threshold. The GATE pin pulls to
GATE pin pulls to ground while TIMER begins a “cool-off” ground while the TIMER pin is latched high by a 5µA pull-
cycle with a 2µA pull-down to the COMP1 threshold of up. The TIMER pin eventually reaches the soft-clamped
0.2V. At time point C1, the TIMER pin pulls down with voltage (VCLAMP) of 2.3V. To clear the latchoff mode, the
approximately a 7k resistor to ground and a GATE start-up user can either pull the TIMER pin to below 0.2V externally
cycle is initiated. If the fault persists, the fault auto-retry or cycle the ON pin low for more than 30µs.
duty cycle is approximately 3.8%. Pulling the ON pin low
for more than 30µs will stop the auto-retry function and
put the LTC4210 in reset mode.
A B C

A1 B1 C1 A2 B2 VCLAMP
2µA 2µA COMP2
COMP2 VTIMER 60µA
60µA 60µA
VTIMER COMP1
COMP1
100µA

VGATE
VGATE
0V

VOUT
VOUT 0V
REGULATING AT 50mV/RSENSE
REGULATING AT 50mV/RSENSE

ILOAD
ILOAD

NORMAL LATCHED OFF CYCLE

NORMAL COOL OFF COOL OFF MODE 2410 F09
MODE CYCLE CYCLE
CB CB CB
FAULT FAULT 4210 F08 FAULT

Figure 8. Automatic Retry After Overcurrent Fault Figure 9. Latchoff After Overcurrent Fault

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LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
Normal Mode/External Timer Control See the section OVERVOLTAGE DETECTION USING TIMER
Whenever the TIMER pin voltage drops below the COMP1 PIN for details of the application.
threshold, but is not in reset mode, the TIMER enters
Power-Off Cycle
normal (100µA source) mode with an equivalent 7k resis-
tive pull-down. Table 1 shows the relationship of tINITIAL, The system can be reset by toggling the ON pin low for
tCBDELAY, tCOOLOFF vs CTIMER. more than 30µs as shown at time point 7 of Figure 3. The
GATE pin is pulled to ground. The TIMER capacitor is also
If the TIMER pin is pulled beyond the COMP2 threshold,
discharged to ground. CLOAD discharges through the load.
the GATE pin is pulled to ground immediately. This allows Alternatively, the TIMER pin can be externally driven above
the TIMER pin to be used for overvoltage detection, see the COMP2 threshold to turn off the GATE pin.
Figure 11.
Externally forcing the TIMER pin below the COMP1 POWER MOSFET SELECTION
threshold will reset the TIMER to normal mode. During
overvoltage detection, the TIMER’s 100µA pull-down Power MOSFETs can be classified by RDSON at VGS gate drive
current will continue to be on if (VCC – SENSE) voltage is ratings of 10V, 4.5V, 2.5V and 1.8V. Use the typical curves
below 50mV. If the (VCC – SENSE) voltage exceeds 50mV ∆VGATE vs Supply Voltage and ∆VGATE vs Temperature to
during the overvoltage detection, the TIMER current will be determine whether the gate drive voltage is adequate for
the same as described for latched-off or autoretry mode. the selected MOSFET at the operating voltage.

Table 1. tINITIAL, tCBDELAY, tCOOLOFF vs CTIMER

In addition, the selected MOSFET should fulfill two VGS
criteria:
CTIMER (µF) tINITIAL (ms) tCBDELAY (ms) tCOOLOFF (ms)
0.033 9.0 0.7 18.2 1. Positive VGS absolute maximum rating > LTC4210
0.047 12.8 1 25.9 maximum ∆VGATE, and
0.068 18.6 1.5 37.4 2. Negative VGS absolute maximum rating > supply volt-
0.082 22.4 1.8 45.1 age. The gate of the MOSFET can discharge faster than
0.1 27.3 2.2 55 VOUT when shutting down the MOSFET with a large
0.22 60.0 4.8 121 CLOAD.
0.33 90.1 7.2 181.5
0.47 128.3 10.2 258.5
If one of the conditions cannot be met, an external Zener
clamp shown on Figure 10a or Figure 10b can be used.
0.68 185.6 14.7 374
The selection of RG should be within the allowed LTC4210
0.82 223.8 17.8 451
package dissipation when discharging VOUT via the Zener
1 272.9 21.7 550
clamp.
2.2 600.5 47.7 1210
3.3 900.7 71.5 1815

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16 For more information www.linear.com/LTC4210-1

 LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
RSENSE Q1 RSENSE Q1
VCC VOUT VCC VOUT
D1* D1* D2*
*USER SELECTED VOLTAGE CLAMP
(A LOW BIAS CURRENT ZENER DIODE
RS RS
IS RECOMMENDED)
200Ω 200Ω
1N4688 (5V)
GATE 1N4692 (7V) GATE
1N4695 (9V)
(10a) 1N4702 (15V) (10b)

Figure 10. Gate Protection Zener Clamp

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR
(FEMALE) (MALE) RSENSE Q1
LONG 0.01Ω Si4410DY VOUT
VIN
5V
5V
RX Z2 RB + CLOAD
4A
Z1 10Ω 10k
470µF
CX
0.1µF D1 6 5 RG
1N4148 VCC SENSE 100Ω
4
RON1 RTIMER GATE
20k 18Ω R4
SHORT 3
ON LTC4210 100Ω
RON2 CC
1
10k TIMER 10nF
GND

CTIMER 2
LONG 0.22µF
GND GND
4210 F11
Z1: SMAJ10A Z2: BZX84C6V2

Figure 11. Supply Side Overvoltage Protection

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LTC4210-1/LTC4210-2
APPLICATIONS INFORMATION
A MOSFET with a VGS absolute maximum rating of ±20V capacitors, since controlling the surge current to bypass
meets the two criteria for all the LTC4210 applications capacitors at plug-in is the primary motivation for the hot
ranges from 2.7V to 16.5V. Typically most 10V gate rated swap controller. Although wire harness, backplane and PCB
MOSFETs have VGS absolute maximum ratings of ±20V or trace inductances are usually small, these can create large
greater, so no external VGS Zener clamp is needed. There spikes when large currents are suddenly drawn, cut-off or
are 4.5V gate rated MOSFETs with VGS absolute maximum limited. This can cause detrimental damage to board com-
ratings of ±20V. ponents unless measures are taken. Abrupt intervention
can prevent subsequent damage caused by a catastrophic
In addition to the MOSFET gate drive rating and VGS abso-
lute maximum rating, other criteria such as VBDSS, ID(MAX), fault but it does cause a large supply transient. The energy
RDS(ON), PD, θJA, TJ(MAX) and maximum safe operating stored in the lead/trace inductance is easily controlled with
area should also be carefully reviewed. VBDSS should snubbers and/or transient voltage suppressors. Even when
exceed the maximum supply voltage inclusive of spikes ferrite beads are used for electromagnetic interference
and ringing. ID(MAX) should be greater than the current (EMI) control, the low saturating current of ferrite will not
limit, ILIMIT. RDS(ON) determines the MOSFET VDS which pose a major problem if the transient voltage suppressors
together with VCB yields an error in the VOUT voltage. At with adequate ratings are used. The transient associated
2.7V supply voltage, the total of VDS + VCB of 0.1V yields with the GATE turn off can be controlled with a snubber
3.7% VOUT error. and/or transient voltage suppressor. Snubbers such as RC
networks are effective especially at low voltage supplies.
The maximum power dissipated in the MOSFET is The choice of RC is usually determined experimentally.
ILIMIT2 • RDS(ON) and this should be less than the maximum The value of the snubber capacitor is usually chosen
power dissipation, PD allowed in that package. Given power between 10 to 100 times the MOSFET COSS. The value
dissipation, the MOSFET junction temperature, TJ can be of the snubber resistor is typically between 3Ω to 100Ω.
computed from the operating temperature (TA) and the When the supply exceeds 7V or EMI beads exist in the
MOSFET package thermal resistance (θJA). The operating wire harness, a transient voltage suppressor and snubber
TJ should be less than the TJ(MAX) specification. are recommended to clip off large spikes and reduce the
Next review the short-circuit condition under maximum ringing. For supply voltages of 6V or below, a snubber
supply VIN(MAX) conditions and maximum current limit, network should be sufficient to protect against transient
ILIMIT(MAX) during the circuit breaker time-out interval voltages. In many cases, a simple short-circuit test can
of tCBDELAY with the maximum safe operating area of be performed to determine the need of the transient volt-
the MOSFET. The operation during output short-circuit age suppressor.
conditions must be well within the manufacturer’s recom-
mended safe operating region with sufficient margin. To OVERVOLTAGE DETECTION USING THE TIMER PIN
ensure a reliable design, fault tests should be evaluated
Figure 11 shows a supply side overvoltage detection
in the laboratory.
circuit. A Zener diode, a diode and COMP2 threshold sets
the overvoltage threshold. Resistor RB biases the Zener
VIN TRANSIENT PROTECTION diode voltage. Diode D1 blocks forward current in the
Unlike most circuits, hot swap controllers typically are not Zener during start-up or output short-circuit. RTIMER with
allowed the good engineering practice of supply bypass CTIMER sets the overload noise filter.

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 LTC4210-1/LTC4210-2
APPENDIX
Table 2 lists some current sense resistors that can be subject to change, please verify the part numbers with
used with the circuit breaker. Table 3 lists some power the manufacturer.
MOSFETs that are available. Since this information is

Table 2. Sense Resistor Selection Guide

CURRENT LIMIT VALUE PART NUMBER DESCRIPTION MANUFACTURER
1A LR120601R050 0.05Ω 0.5W 1% Resistor IRC-TT
2A LR120601R025 0.025Ω 0.5W 1% Resistor IRC-TT
2.5A LR120601R020 0.02Ω 0.5W 1% Resistor IRC-TT
3.3A WSL2512R015F 0.015Ω 1W 1% Resistor Vishay-Dale
5A LR251201R010F 0.01Ω 1.5W 1% Resistor IRC-TT
10A WSR2R005F 0.005Ω 2W 1% Resistor Vishay-Dale

Table 3. N-Channel Selection Guide

CURRENT LEVEL (A) PART NUMBER DESCRIPTION MANUFACTURER
0 to 2 MMDF3N02HD Dual N-Channel SO-8 ON Semiconductor
RDS(ON) = 0.1Ω, CISS = 455pF
2 to 5 MMSF5N02HD Single N-Channel SO-8 ON Semiconductor
RDS(ON) = 0.025Ω, CISS = 1130pF
5 to 10 MTB50N06V Single N-Channel DD Pak ON Semiconductor
RDS(ON) = 0.028Ω, CISS = 1570pF
10 to 20 MTB75N05HD Single N-Channel DD Pak ON Semiconductor
RDS(ON) = 0.0095Ω, CISS = 2600pF

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LTC4210-1/LTC4210-2
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC4210-1#packaging for the most recent package drawings.

S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)

0.62 0.95 2.90 BSC

MAX REF (NOTE 4)

1.22 REF

2.80 BSC 1.50 – 1.75

3.85 MAX 2.62 REF 1.4 MIN (NOTE 4)

PIN ONE ID

RECOMMENDED SOLDER PAD LAYOUT 0.30 – 0.45

0.95 BSC
PER IPC CALCULATOR 6 PLCS (NOTE 3)

0.80 – 0.90

0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’

0.30 – 0.50 REF

0.09 – 0.20 1.90 BSC
(NOTE 3) S6 TSOT-23 0302
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193

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20 For more information www.linear.com/LTC4210-1

 LTC4210-1/LTC4210-2
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 09/16 Updated Order Information. 2
Updated graphs G04 through G09; added graph G26. 4, 6

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Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
For more
tion that the interconnection of itsinformation www.linear.com/LTC4210-1
circuits as described herein will not infringe on existing patent rights. 21
LTC4210-1/LTC4210-2
TYPICAL APPLICATION
12V Hot Swap Application
BACKPLANE PCB EDGE
CONNECTOR CONNECTOR
(FEMALE) (MALE) RSENSE Q1
LONG 0.01Ω Si4410DY VOUT
VIN
12V
12V
RX + CLOAD
4A
Z1 10Ω
470µF
CX
0.1µF 6 5 RG
VCC SENSE 200Ω
4
RON1 GATE
SHORT 62k 3 RC
ON LTC4210 100Ω
RON2 CC
1
10k TIMER 10nF
GND

CTIMER 2
LONG 0.22µF
GND GND
4210 TA03
Z1: SMAJ12A

RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1421 Two Channel, Hot Swap Controller Operates from 3V to 12V and Supports –12V
LTC1422 Single Channel, Hot Swap Controller in SO-8 Operates from 2.7V to 12V, Reset Output
LT1640AL/LT1640AH Negative Voltage Hot Swap Controller in SO-8 Operates from –10V to –80V
LTC1642 Single Channel, Hot Swap Controller Overvoltage Protection to 33V, Foldback Current Limiting
LTC1643AL/LTC1643AH PCI Hot Swap Controller 3.3V, 5V, Internal FETs for ±12V
LTC1647 Dual Channel, Hot Swap Controller Operates from 2.7V to 16.5V, Separate ON pins for Sequencing
LTC4211 Single Channel, Hot Swap Controller 2.5V to 16.5V, Multifunction Current Control
LTC4230 Triple Channel, Hot Swap Controller 1.7V to 16.5V, Multifunction Current Control
LTC4251 –48V Hot Swap Controller in SOT-23 Floating Supply, Three-Level Current Limiting
LTC4252 –48V Hot Swap Controller in MSOP Floating Supply, Power Good, Three-Level Current Limiting
LTC4253 –48V Hot Swap Controller with Triple Supply Sequencing Floating Supply, Three-Level Current Limiting

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22 Linear Technology Corporation

LT 0916 REV A • PRINTED IN USA

1630 McCarthy Blvd., Milpitas, CA 95035-7417

For more information www.linear.com/LTC4210-1
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LTC4210-1  LINEAR TECHNOLOGY CORPORATION 2002