Introduction of ADC
Review of Control System
Analog to Digital Converter (ADC)
What is an ADC (1/2)
Why it should be digitalized?
Computer/controller uses digital data to be processed for controlling a process.
The advantages using computer in process control are
1. Too control multivariable in a control system
2. Linearization
3. The difficult equation able to solve as quickly as possible, and it can be
   modified.
4. Computer network able to solve control issues in large scales
Analog to Digital Converter (ADC)
 Most signals are analog
      • e.g. speech, biological signals, seismic signals, radar signals,
         sonar signals, etc.
 ADC is applied to process analog signals by digital means
 ADC has a three-step process
      • Sampling
      • Quantization
      • Coding
                                        A/D
                                        Converter
           Xa(t)                X(n)                      Xq(n)                     01011
                   Sample and               Quantizer               Coder           …
                   Hold (S/H)
          Analog Signal     Discrete-Time               Quantized           Digital Sinyal
                                Signal                   Signal
Sample and Hold (S/H)
                        1. Electronic switch is opened 
                           isolating capacitor from input.
                        2. Capacitor     will    hold   (stay
                           charged)  switch is opened.
                        3. The voltage of Capacitor will be
                           used as voltage input of ADC 
                           but does not discharge because
                           the high resistance of voltage
                           follower.
ADC Specifications
 Acquisition Time is the time that it takes for the ADC to
  acquire and convert an analog signal to a digital value.
  The conversion time is a sum of: (Sample Time) +
  (Calibration Time) + (Charge Distribution Time) +
  (Synchronization Time)
 Aperture time is the period during which the ADC is
  reading the input signal. The larger the aperture time, the
  better the resolution. Select short aperture times for faster
  measurement speed.
 Settling time is the time elapsed which it used by ADC to
  build convergence output from an input signal.
Commercially Available S/H
Turbine Supervisory Instrument (TSI)
Resistive Vibration Sensor
Alat ini terdiri dari 3 komponen penting
1. Flexure
2. Strain gauge
3. Bridge circuit
Prinsip Kerja
                                                                      Strain gauge
                                                                      1
                                                                      SG1               Vibration
 V
                                                                                          Flexure
                                                                      Strain
                                                                      gauge2
                                                                      SG2
Ketika Flexure terdeflexi akibat gerak vibrasi benda kerja, maka nilai hambatan strain gauge 1
dan 2 akan berubah sebanding dengan defleksi yang terjadi karena perubahan percepatan
pada benda kerja. Perubahan hambatan ini kemudian disambungkan dengan bridge sirkuit
yang menghasilkan tegangan mengikuti persamaan sbb
                                                                  V  R3   V  SG2
                                                           V           
                                                                  R1  R3 SG1  SG2
Sampling Definition
Sampling Theorem
 Nquist theorem :
             𝑓𝑠 ≥ 2𝑓𝑚
 Dimana
 fs = number of sampling
 (sample/s)
 fm = maximum frekuensi (cycle/s)
                   𝑓𝑚
 Sampling rate =    𝑓𝑠
 Number of sampling of a cycle
 (NC)
      𝑓
 𝑁𝐶 = 𝑓𝑠
        𝑚
Contoh 1 : Proper sampling
Jika diketahui
f = 90 cycle/second
fs = 1000 sample/second
Sampling rate = 0.09
     1000
𝑁𝐶 =
       90
   = 11.1 𝑠𝑎𝑚𝑝𝑙𝑒/𝑐𝑦𝑐𝑙𝑒
Contoh 2 : Proper sampling
Jika diketahui
f = 90 cycle/second
fs = 280 sample/second
Sampling rate = 0.32
     280
𝑁𝐶 =
      90
   = 3.2 𝑠𝑎𝑚𝑝𝑙𝑒/𝑐𝑦𝑐𝑙𝑒
Improper sampling number
   Terjadinya aliasing. Aliasing adalah sebuah efek yang menyebabkan hasil
    sampling sinyal sangat jauh berbeda dengan aslinya
Jika diketahui
f = 90 cycle/second
fs = 95 sample/second
Sampling rate = 0.95
     95
𝑁𝐶 =
     90
   = 1.05 𝑠𝑎𝑚𝑝𝑙𝑒/𝑐𝑦𝑐𝑙𝑒
Sampling Rate of DSP
Applications
        Aplikasi        fmax      fs
       Geophysical     500 Hz   1 kHz
       Biomedical      1 kHz    2 kHz
       Mechanical      2 kHz    4 kHz
         Speech        4 kHz    8 kHz
         Audio         20 kHz   40 kHz
         Video         4 MHz    8 MHz
Quantization
Quantizing (1/2)
Quantizing  breaking down analog value into a set of finite states
Quantizing (2/2)
Coding
Coding  assigning a digital word or number to each state.
Accuracy
Accuracy  Resolution
Accuracy  Sampling rate
Accuracy  (Resolution &
Sampling rate)
Commonly Used Methods of ADC
 Numerous methods are used for converting analog signals to
 digital form. Five most commonly used methods are listed
 below:
 •   Counter / staircase ramp ADC
 •   Tracking ADC
 •   Successive approximation
 •   Dual slope
 •   Voltage to frequency
 •   Parallel (or flash)
Counter / Staircase Ramp ADC
                              Operation
                                 Reset and Start Counter
                                 DAC convert Digital output of Counter
                                  to Analog signal
                                 A clock generated pulse
                                 Binary counter generates an n bit
                                  digital output which is applied as an
                                  input to the DAC
                                 Compare Analog input and Output of
                                  DAC
                                    • VA> VDAC
                                           – Continue counting
                                    • VA < VDAC
                                           – Stop counting
                                 Digital Output = Output of Counter
                              Disadvantage
                                 Conversion time is varied
                                    • 2n Clock Period for Full Scale input
Comparator Principles
Contoh soal ADC
                                       - Ketika direset counter = 0,
                                         maka tegangan yang keluar
                                         DAC dirumuskan sbb
                                                 0
                                       - 𝑉𝐷𝐴𝐶 = 23 × 5 = 0 volt
                                       - Di komparator karena 𝑉𝐷𝐴𝐶 >
                                         𝑉𝐴 maka output komparator = 1
                                         (asumsi +𝑉𝐶𝐶 ) = 1
                                       - Di logika and ketika output
Sebuah ADC digunakan untuk               komparator bernilai 1, maka
menerka tegangan input (VA) sebesar      output ADC bernilai 1 dan 0.
4 Volt. Spec ADC (3 bit dan output 0   - Counter mengupgrade nilainya
s/d 5 Volt). Uraikan proses              menjadi 1, ketika mendeteksi
penerkaan tegangan yang keluar dari      nilainya 1 dan 0.
                                                 1
ADC                                    - 𝑉𝐷𝐴𝐶 = 23 × 5 = 0.625 volt
                                       - Proses berjalan lagi dari awal
ADC Process
Tracking Type ADC
 Tracking or Servo Type          Can be used as S/H circuit
    Using Up/Down Counter to        By stopping desired instant
     track input signal              Digital Output
     continuously                    Long Hold Time
      • For slow varying input    Disabling UP (Down) control,
                                   Converter generate
                                     Minimum (Maximum) value
                                      reached by input signal over a
                                      given period
Tracking ADC
Successive Approximation
ADC
 Most Commonly used in             Block Diagram
  medium to high speed
  Converters
 Based on approximating the
  input signal with binary code
  and then successively revising
  this approximation until best
  approximation is achieved
 SAR(Successive
  Approximation Register) holds
  the current binary value
Successive Approximation
ADC
 Circuit waveform     Conversion Time
                            n clock for n-bit ADC
                            Fixed conversion time
                       Serial Output is easily
                        generated
                            Bit decision are made in
                             serial order
 Logic Flow
ADC Formulation
An Example of SAR Calculation (1/5)
An Example of SAR Calculation (2/5)
An Example of SAR Calculation (3/5)
An Example of SAR Calculation (4/5)
An Example of SAR Calculation (5/5)
Advantages and Disadvantages
         Advantages                 Disadvantages
   •   Capable of high speed       Higher resolution
   •   Medium accuracy compared
       to other ADC types
                                    successive
   •   Good tradeoff between        approximation ADCs
       speed and cost               will be slower
                                   Speed limited
                                    ~5Msps
Dual Slope Integrating ADC
 Operation               T1
                     
       Integrate 0 vi dt
                                        t2
   
   
       Reset and integrate
       Thus T v
                                    
                                    0
                                             Vr dt
               1 i ( AVG )  t2Vr
                         t2
           vi ( AVG )  Vr
                               T1
 Applications
    DPM(Digital Panel Meter),
     DMM(Digital Multimeter), …
 VS=-VA/RC×t1
 VS=Vref/RC×t2
 Vref/RC×t2=-VA/RC×t1
 VA=-Vref×t1/t2
 Kelebihan dan kekurangan
 Dual Slope Integrating ADC
 Excellent Noise Rejection
    High frequency noise
     cancelled out by integration
    Proper T1 eliminates line
     noise
    Easy to obtain good
     resolution
 Low Speed
    If T1 = 60Hz, converter
     throughput rate < 30
     samples/s
Contoh Dual Slope
 For example, consider the clock frequency is 1 MHz, the reference voltage
  (Vref) is -1 V, the fixed time period t1 is 1 ms and the RC time constant is also
  1 ms.
 Assuming the unknown analog input voltage amplitude as VA = 5 V, during
  the fixed time period t1 , the integrator output Vs is
  VS = -VA/RC × t1= (-5)/1 ms × 1 ms=-5 V
 During the time period t2, ramp generator will integrate all the way back to 0V.
  t2 = VS/Vref × RC = (-5)/(-1) × 1 ms = 5ms = 5000μs
 Hence the 4-bit counter value is 5000, and by activating the decimal point of
  (most Significant Digit) MSD seven segment displays, the display can directly
  read as 5 V.
 VS=-VA/RC×t1
 VS=Vref/RC×t2
 Vref/RC×t2=-VA/RC×t1
 VA=-Vref×t1/t2
Advantages and Disadvantages
     Advantages             Disadvantages
   Input signal is        Slow
    averaged               High precision
   Greater noise           external components
    immunity than other     required to achieve
    ADC types               accuracy
   High accuracy
Voltage to Frequency ADC
 VFC (Voltage to Frequency          Low Speed
  Converter)                         Good Noise Immunity
    Convert analog input voltage    High resolution
     to train of pulses
                                        For slow varying signal
 Counter
                                        With long conversion time
    Generates Digital output by
     counting pulses over a fixed    Applicable to remote data
     interval of time                 sensing in noisy environments
                                        Digital transmission over a
                                         long distance
Parallel or Flash ADC
 Very High speed conversion
     Up to 100MHz for 8 bit
      resolution
     Video, Radar, Digital
      Oscilloscope
 Single Step Conversion
     2n –1 comparator
     Precision Resistive Network
     Encoder
 Resolution is limited
     Large number of comparator in
      IC
Simulasi EWB
Flash_ADC.ewb
Advantages and Disadvantages
     Advantages               Disadvantages
   Very fast              Needs many parts
                            (255 comparators
                            for 8-bit ADC)
                           Lower resolution
                           Expensive
                           Large power
                            consumption
Advantages AND Disadvantages
 Type of ADC    Speed   Price          Noise      Conversion
                                       Immunity   Time
 Voltage to                              Constant
 frequency
 Dual slope                                Vary
 Staircase                                   Vary
 ramp                                                    2n
                                                  Tmax 
                                                          f
 Successive                                  Constant
 approximation                                         n
                                                  T 
                                                       f
 Parallel (or                          Constant
 flash)                 Not feasible
                        for high
                        resolution
Transformasi antar base
(GENAP)
Transformasi antar base
(GANJIL)
Convert basis 16 ke basis 2
HEKSA NUMBER   DESIMAL   23= 8   22= 4   21= 2   20= 1
    0H            0       0       0       0       0
    1H            1       0       0       0       1
    2H            2       0       0       1       0
    3H            3       0       0       1       1
    4H            4       0       1       0       0      Misal
    5H            5       0       1       0       1      DH16 = 11012
    6H            6       0       1       1       0
                                                         FH16 = 11112
    7H            7       0       1       1       1
    8H            8       1       0       0       0      9H16 = 10012   dst
    9H            9       1       0       0       1
    AH           10       1       0       1       0
    BH           11       1       0       1       1
    CH           12       1       1       0       0
    DH           13       1       1       0       1
    EH           14       1       1       0       0
     FH          15       1       1       1       1
Convert basis 16 ke basis
10
Misal
Check
Convert basis 8 ke basis 10
                                       Misal
  OCTA NUMBER   22 = 4 21 = 2 20 = 1   68 = 1102
       0          0      0      0      48 = 1002
       1          0      0      1      78 = 1112
       2          0      1      0      dst
       3          0      1      1
       4          1      0      0
       5          1      0      1
       6          1      1      0
       7          1      1      1
ADC on EWB
              (EOC = End of Conversion)
             (SOC = Start of Conversion)
ADC simulation on EWB
 MSB = D7                      adc_basic.ewb
 LSB = D0
 Kenapa keluar 7F H  lihat bab DSC (digital signal conditioning)
Explanation
0111 1111
     = 1 × 23 + 1 × 22 + 1 × 21 + 1 × 20
     = 8 + 4 + 2 + 1 = 15  FH
= 0 × 23 + 1 × 22 + 1 × 21 + 1 × 20
= 0 + 4 + 2 + 1 = 7  7H
How It is works?
  When this ADC is connected to a computer, the sequence of operation is
  listed below:
  1. The computer reads the EOC to check the ADC is busy or not.
  2. If the ADC is not busy when the computer selects the input channel
     and send out the “Start” signal. Otherwise, step (1) is repeated.
  3. The computer monitors the EOC.
  4. When the EOC is activated, the computer reads the digital output.
  When there is more than one ADCs being linked to the computer, they
  can be connected in parallel. Using the ‘output enable’ can do the
  selection of ADC output.
How to select and use an
ADC
 Range of commercially     Guidelines for using
  available ADCs             ADCs
                               Use the full input range of
                                the ADC
                               Use a good source of
                                reference signal
                               Look out for fast input
                                signal changes
                               Keep analog and digital
                                grounds separate
                               Minimize interference and
                                loading problem
Selection of ADC
The parameters used in selecting an ADC are very similar to those
considered for a DAC selection.
• Error/Accuracy: Quantising error represents the difference
  between an actual analog value and its digital representation.
  Ideally, the quantising error should not be greater than ± ½
  LSB.
• Resolution: V to cause 1 bit change in output
• Output Voltage Range  Input Voltage Range
• Output Settling Time  Conversion Time
• Output Coding (usually binary)
Commercially available
monolithic ADCs
Commercially available
hybrid ADCs
DAS (Data Acquisition System)
 DAS performs the              Applications
  complete function of             Simple monitoring of a
  converting the raw                single analog variable
  outputs from one or more         Control and Monitoring of
  sensors into equivalent           hundreds of parameters in
                                    a nuclear plant
  digital signals usable for
  further processing, control,
  or displaying applications
Single Channel System
                               S/H (Sample and Hold)
 Transducer                      Reduce uncertainty error in
                                   the converted output when
    Generate signal of low        input changes are fast
     amplitude, mixed with         compared to the conversion
     undesirable noise             time
 Amplifier, Filters              In Multi-channel system
                                     • To hold a sample from one
    Amplify                           channel while multiplexer
    Remove noise                      proceed to sample next one
    Linearize                       • Simultaneous sampling of
                                       two signal
Multi-channel System
 Analog multiplexer and a    Local ADCs and digital
  ADC                          multiplexer
    Low cost                    Higher sampling rate
Worked Examples
Question 1. Calculate the maximum conversion time of (a) a 8-bit
staircase ramp ADC and (b) a successive approximation ADC, if
the clock rate is 2MHz.
Solution:
(a)    For a 8-bit staircase ramp ADC, the maximum number of
count is
                           nc = 28 = 256
Therefore, the maximum conversion time is
                   nc     256
              Tc                128  10 6
                                               s  128s
                    f   2  10 6
(b) For a 8-bit successive approximation ADC, the conversion
time is constant and equal to
                n    8
            Tc            4  10 6
                                       s  4 s
                f 2  10 6
It can be noted that the conversion speed of successive
approximation ADC is much faster than the staircase ramp
type.
Question 2.
Find out the percentage resolution of a DAC of n bits, and hence
determine the value for n = 12.
Solution:
                           1
Percentage resolution =      n
                                100%
                           2
For n = 12,
Percentage resolution =
           1
            12
                100%  0.0244%  244ppm (part per million)
          2
An example of ADC (1/3)
Suatu alat pengukur temperatur menggunakan suatu sensor dengan persamaan
output 6,5 mV/C. Sebuah ADC 6 bit dengan tegangan referensi 10 V digunakan
dalam peralatan ini.
a. Rancang sebuah sirkuit yang menghubungkan sensor dengan ADC
b. Cari resolusi dari sensor temperatur tsb!
An example of ADC (2/3)
               9.84375
      𝑔𝑎𝑖𝑛 =           = 15.14
                 0.65
An example of ADC (3/3)