0% found this document useful (0 votes)
44 views5 pages

US3723891

This document describes a frequency to voltage converter circuit. The circuit uses a switching circuit that charges a capacitor to a peak negative voltage at each zero crossing of a positive input signal. The capacitor then discharges through a resistor towards a positive voltage until the next zero crossing. The peak negative voltage is sampled and held to provide a DC voltage output proportional to the frequency of the input signal. The circuit aims to provide precise performance over a large dynamic range using an exponential charging curve rather than a linear ramp.

Uploaded by

mitza22
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
44 views5 pages

US3723891

This document describes a frequency to voltage converter circuit. The circuit uses a switching circuit that charges a capacitor to a peak negative voltage at each zero crossing of a positive input signal. The capacitor then discharges through a resistor towards a positive voltage until the next zero crossing. The peak negative voltage is sampled and held to provide a DC voltage output proportional to the frequency of the input signal. The circuit aims to provide precise performance over a large dynamic range using an exponential charging curve rather than a linear ramp.

Uploaded by

mitza22
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 5

United States Patent (19) 11, 3,723,891

Whiteley (45) Mar. 27, 1973


54 FREQUENCY TO VOLTAGE 2,978,615 4/1961 Chater.............................. 3071233 X
CONVERTER 3,363,113 111968 Bedingfield....................... 328/15 X
3,371,291 2, 1968 Forrest et al..................... 3071233 X
75 Inventor: Thomas B. Whiteley, Riverside, 3,593,171 7|1971 Gassmann........................ 307/233 X
Calif.
73 Assignee: The United States of America as Primary Examiner-Alfred L. Brody
represented by the Secretary of the Attorney-R. S. Sciascia, G. J. Rubens, J. W. McLaren
Navy. and T. M. Phillips
22 Filed: May 12, 1971 57 ABSTRACT
21 ) Appl. No.: 143,678 A frequency to voltage converter including a
switching circuit responsive to an input signal at each
zero crossing in the positive direction to charge a
52) U.S. C. ..................329/103,3071233, 3071246, capacitor to a peak negative voltage and discharging
328/67, 328/151,329/126 through a resistor towards a positive voltage until the
51 int. Cl. ............................................... H03d 3/04 next zero crossing in the positive direction. The peak
58 Field of Search......329/103, 1, 2, 126; 3071246, voltage charge is coupled to a holding circuit to pro
307/233; 328/67, 151 vide a D.C. voltage proportional to the frequency of
the input signal.
56 References Cited
8 Claims, 3 Drawing Figures
UNITED STATES PATENTs
3,582,799 6/1971 Reid.................................3071233 X
2,834,883 5/1958 Lukoff.................................. 328/151
Patented March 27, 1973 3,723,891
2 Sheets-Sheet l

INVENTOR.
77/246 A. W/7AZAY
BY 2, 27. A62,2-
Patented March 27, 1973 3,723,891
2 Sheets-Sheet 2

dF.O29
O=.O4 - 2

O = O5

FREQ. KHz
2.25 22.5 23.75 25 26.25 275 28.75
-5%. - O -5%. +5% +O% +5%
-
O= O5
-2 N d = .O4
N
o e-(E+E2(exp(aT,)-exp(aT) y
--- Str. Line with Slope K -3 C = O29 N
C
N
-4 &N
FIG. 3. INVENTOR.
77/24/45 A. W/7AZAY
3,723,891
1. 2
FREQUENCY TO VOLTAGE CONVERTER e = E- (E -- E) exp ()
STATEMENT OF GOVERNMENT INTEREST where a = 11Rc.
Then at t = T,
The invention described herein may be manufac
tured and used by or for the Government of the United ep = E - (E - E) exp (7)
States of America for governmental purposes without where e is the capacitor voltage reached after
the payment of any royalties thereon or therefor. discharging for a time period T.
BACKGROUND OF THE INVENTION Considered as functions of a variable T, e is a hyper
The invention relates to frequency to voltage conver
10 bolic curve, and e is an exponential curve. By optimum
sion systems and more particularly to the concept of choice of parameters, the two curves can be made to
providing an exponential charging curve beginning at very nearly coincide over a considerable range near T =
To.
each crossover in the positive direction of a sinusoidal The peak voltage e then is an instantaneous measure
input signal. 15 of the inverse period 1/T, i.e., the frequency of the
Various methods for achieving an indication of the input signal.
frequency of an alternating current signal have previ It is obvious that e = 0 at T= To. In order that e =0
ously been devised. Such prior art circuits are not suita at T: To,
ble where precise performance over a large dynamic
range and time lag is important. 20 E.- (E+ E.) exp (-ato) = 0
SUMMARY OF THE INVENTION E= (E+E) exp (To
In the preferred form of the invention, an input signal For best coincidence of the two curves the first and
(approximately sinusoidal) is shaped and differentiated second derivatives with respect to T are equated at T=
by a very short time constant R.C. network. A 25 To
switching circuit responsive to the negative pulse cor
responding to the positive-going zero-crossing of the e' = KIT?
input signal, charges a capacitor to a peak negative
voltage, and is then discharged through a resistor e' = -2K1T =(-2/T) e."
toward a positive voltage. The peaks of the discharge 30
e' = a (Et-E) exp (-aT)
waveform are sampled and then held constant until the
next peak. e' = -dep'
Other objects and many of the attendant advantages
of this invention will be readily appreciated as the same From e' =e=,
35
becomes better understood by reference to the follow K= a To(E -- e...) exp (-a To) and
ing detailed description when considered in connection
with the accompanying drawings. from the second derivative,
BRIEF DESCRIPTION OF THE DRAWINGS a = 2fTo
40
FIG. 1 is a schematic circuit diagram of one embodi In an example for a discriminator with 25 KHz center
ment of the invention; frequency
FIG. 2 is a representation of voltages in various parts Tos 40pus
of the circuit of FIG. 1; and
FIG. 3 is a graph showing the effect of variance from 45 a = 2140 = 0.050
the computed values for best linearity.
RC = 20pus
DESCRIPTION OF THE PREFERRED
EMBODIMENT exp (-a To) = 0.13534
It is well known that a linear ramp function SO
Assume (E -- E) = 75V
generated at a zero crossover of an input sine wave, and
allowed to rise until the next crossover, has a peak am E.-0.1353 x 75 = 10.1V
plitude that is a measure of the length of time between E = 64.9 V
crossovers. Instead of a linear ramp, the present inven 55
tion utilizes an exponential curve, generated at succes The table below and the plotted voltage vs. frequency
sive crossovers of the input signal. graph (FIG. 3) illustrate the effect of variance from the
To obtain a voltage proportional to the frequency, f, computed values for best linearity.
which is the inverse of the period, T, the expression
TABLE I
e = K (11T - 11T) 60
Frequency range
represents a voltage proportional to the variation offs 8 exp(-aTo) E. E. K-
linearity within
2%
1/Tabout the center frequency fo = 1/To. K is the slope 0.05 0.3534 65W 1OW 812 20%
constant relating voltage and frequency, e.g. V/MHz. 0.04 0.2090 60V 15W 969 10%
A capacitor discharging through a resistance, R, 65
0.029 0.31187 5.5W 23.5V 090 6%
from an initial voltage, -E, toward a supply voltage,
+E, has an exponential discharge voltage represented The circuit of this invention is illustrated in FIG.
by with the waveform at various points shown in FIG. 2.
3,723,891 4
3
Input signal, A, is applied to high gain limiting ampli capacitor to a voltage that is an instantaneous
fier 10 which produces a square wave output, B. Square measure of the frequency of the input signal; and
wave B, is differentiated by short time constant RC net e. sampling and holding circuit means coupled to
work 12 to produce waveform C. Limiter 10 and dif said capacitor for maintaining an output voltage
ferentiator 12 should produce pulses (waveform C) of 5 2. proportional
The
to the frequency of said input signal.
frequency to voltage converter of claim 1
sufficient amplitude to trigger transistor 14, having a wherein said first means
width not greater than one percent of To and constant said input signal passingincludes a circuit responsive to
in amplitude and width over the expected amplitude direction to stop the discharge ofzero
through
said
in the positive
capacitor and
range of input waveform, A. Transistor 14 is a PNP O start the charging of said capacitor.
type which conducts only on negative pulses from dif 3. The frequency to voltage converter of claim
ferentiator 12. The negative pulses of waveform C cor wherein said capacitor charging includes a negative
respond to the positive going zero crossings of the input voltage source so that said capacitor is charged to a
signal. Transistor 16 is a NPN type having high break known negative voltage.
down voltage and current capability, conducts heavily 15 4. The frequency to voltage converter of claim 1
when transistor 14 is conducting. Capacitor 18 is Wherein saidsource
discharge circuit means includes a posi
charged rapidly to voltage -E, and then released and tive voltage só that the capacitor is discharged
allowed to discharge through resistor 20 towards +E, as towards said positive voltage source.
shown by waveform D. The discharge of capacitor 18 is 5. The frequency to voltage converter of claim 4
arrested by the next charging pulse, and the sequence 20 wherein said sampling and holding circuit samples and
repeats. Resistor 20 is provided with a trim adjustment holds the positive peak voltage to which said capacitor
so that the operation of the circuit can be adjusted is discharged.
precisely to zero at center frequency. 6. The frequency to voltage converter of claim 1 said
The peaks of waveform D are coupled by emitter fol first means includes:
lower 22 and silicon diode 24 to holding capacitor 26. 25 a. a negative voltage source;
The sawtooth voltage dropoff between peaks b. Switch circuit means responsive to said input signal
(waveform E) is caused by discharging of capacitor 26 passing through Zero in the positive direction for
through resistor 28. The dropoff rate should be charging said capacitor to the magnitude of said
selected to allow the output to follow the maximum ex negative voltage source.
pected rate of change of frequency. RC filter 30 cou 30 7. The converter of claim 6 wherein said switch cir
pled between holding capacitor 26 and output terminal cuit means includes:
32 removes most of the carrier frequency sawtooth a, a differentiator for generating negative pulses
from the output (waveform F). when said input signal passes through zero in a
Obviously many modifications and variations of the positive direction;
present invention are possible in the light of the above 35 b. a first transistor coupled to said differentiator and
teachings. It is therefore to be understood that within being responsive to said negative pulse for generat
the scope of the appended claims the invention may be ing a trigger pulse;
practiced otherwise than as specifically described. c. a second transistor having a high breakdown volt
What is claimed is: age and a high current capability in circuit with
1. A frequency to voltage converter for producing a 40 said first transistor, said negative voltage source
direct current voltage having a magnitude proportional and said capacitor for connecting said capacitor to
to the frequency of an alternating input signal compris said negative voltage source in response to said
Ing:
trigger pulse.
8. The converter of claim 4 wherein said discharge
a. an input terminal for receiving an input signal the circuit
45 means includes:
frequency of which is to be measured; a. a positive voltage source;
b. a capacitor; b. an adjustable resistor connecting said capacitor to
c. first means coupled to said capacitor for charging said positive voltage source so that said capacitor
said capacitor to a known voltage; will discharge toward said positive voltage source.
d. discharge circuit means coupled to said capacitor k sk k xx k
and to said input terminal for discharging said 50

. 55

60

65

Sa Re

You might also like