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DisplayPort to HDMI Converter Guide

The CH7211A is a semiconductor device that converts a DisplayPort signal received via USB Type-C to HDMI. It supports high resolution video up to 4K at 60Hz and 8 channel audio at 192kHz. The device uses advanced algorithms to seamlessly decode the DisplayPort signal and encode it to HDMI. It is compliant with relevant DisplayPort, HDMI, and USB-C standards to provide video and audio connectivity in USB Type-C docking stations, adapters and monitors.

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0% found this document useful (0 votes)
91 views9 pages

DisplayPort to HDMI Converter Guide

The CH7211A is a semiconductor device that converts a DisplayPort signal received via USB Type-C to HDMI. It supports high resolution video up to 4K at 60Hz and 8 channel audio at 192kHz. The device uses advanced algorithms to seamlessly decode the DisplayPort signal and encode it to HDMI. It is compliant with relevant DisplayPort, HDMI, and USB-C standards to provide video and audio connectivity in USB Type-C docking stations, adapters and monitors.

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A H
Copyright
© © All Rights Reserved
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CH7211A

Chrontel Brief Datasheet

CH7211A DisplayPort to HDMI 2.0 Converter on USB Type C

FEATURES GENERAL DESCRIPTION


 Compliant with DisplayPort Alternate Mode on USB
Chrontel’s CH7211A is a low-cost, low-power
Type C standard
semiconductor device that translates the DisplayPort
 Compliant with DisplayPort Specification version 1.3
signal to HDMI/DVI through the USB Type-C connector.
and Embedded DisplayPort (eDP) Specification version
This innovative USB Type-C based DisplayPort receiver
1.4
with an integrated HDMI Transmitter is specially
 Support up to 4 Main Link Lanes at 1.62Gbps,2.7Gbps
designed to target the USB Type-C to HDMI converter,
(HBR) or 5.4Gbps (HBR2) link rate
adopter and docking device. Through the CH7211A’s
 Automotive DP input signal detection and Lane swap
advanced decoding / encoding algorithm, the input
supported for compliance with the USB type C cable
DisplayPort high-speed serialized multimedia data can be
plug orientation switch
seamlessly converted to HDMI/DVI output.
 DP_BR signaling modes supported
 Programmable DisplayPort receiver equalization
supported for the compensation of input signal
attenuation The CH7211A’s DP/eDP receiver is compliant with the
 Support Spread Spectrum Clocking (de-spreading) for DisplayPort Specification 1.3 and Embedded DisplayPort
(eDP) Specification version 1.4. With sophisticated
EMI reduction
DisplayPort signal detection and the Lane Swap/AUX
 Support Fast and full Link Training
 Support eDP Authentication: Alternative Scramble Seed polarity inversion logic, the CH7211A supports USB
Reset and Alternative Framing Type-C cable plug orientation switch. With internal
HDCP key Integrated, the device support HDCP 2.2
 HDMI transmitter compliant with HDMI specification
specifications. In the device’s receiver block, which
version 2.0 and DVI specification version 1.0
 HDMI transmitter supports up to 6.0Gbps data rate for supports four DisplayPort Main Link Lanes input with
data rate running at 1.62Gbps, 2.7Gbps or 5.4Gbps, and
video timing of 4Kx2K@60Hz
converted the input signal to HDMI output up to
 HDMI 3D dual view and 3D audio are supported
4Kx2k@60Hz. Leveraging the USB Power Delivery
 High-Dynamic-Range (HDR) display are supported
control logic, the USB billboard module for USB device
 YCC 4:4:4/4:2:2 to YCC 4:2:2/4:2:0,Y-only(Gray
indentify and DisplayPort’s unique source/sink “Link
display) conversion are supported
Training” routine, the CH7211A is capable of instantly
 HDCP engine compliant with HDCP 2.2 specification
bring up the video display to the HDMI/DVI TV/Monitor
with internal HDCP Keys
when the initialization process is completed.
 HDCP 2.2 repeater supported
 Active DDC buffer and related control register
integrated
The CH7211A also supports up to 8-channel audio input
 SCDC supported on HDMI DDC
from either DP Rx or SPDIF port and output from HDMI
 IIC-over-AUX transaction supported
Tx with sample rate up to 192 KHz. Available audio
 CEC tunneling over AUX is supported
bandwidth depends on the pixel clock frequency, the
 AUX CH polarity inversion supported for USB type C
video format timing, and whether or not content
cable plug orientation switch
protection re-synchronization is needed.
 Programmable Pre-Emphasis on output driver supported
 Support 2 USB Type-C ports that are compliant with
USB Type-C Cable and Connector Specification
With sophisticated MCU and the embedded EEPROM,
revision 1.3.
CH7211A support auto-boot and EDID buffer.
 Compliant with USB Power Delivery Specification
Leveraging the firmware auto-loaded from the embedded
Revision 3.0, Version 1.1, with USB Power Delivery
EEPROM, CH7211A can support DP input detection,
BMC transceiver integrated on each USB Type-C port
HDMI connection detection, and determine to enter into
 Integrated Ra, Rd and Rp for USB Type-C
Power saving mode automatically.
 On-chip Audio Decoder which support 8 channel Audio
input from DP Rx and output from HDMI Tx with
sample rate up to 192KHz
 SPDIF/IIS input supported with audio sampling rate up
to 192KHz
 Embedded MCU to handle the control logic
 Full speed USB billboard module integrated
 USB 2.0 PHY supported with internal switch for
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CHRONTEL CH7211A
data/file transport
 Embedded EEPROM, integrated EDID Buffer
 IIC Slave, USB 2.0 are available for firmware update
 IIC slave interface are available for debug
 Support Auto Power Saving mode and low stand-by
current
 Anti-back drive support
 Low power architecture
 RoHS compliant and Halogen free package
 HBM 2KV ESD performance
 Offered in 64 pin QFN package

APPLICATION
 USB Type C to HDMI 2.0 cable/Adapter/Docking
Station
 On-board DP to HDMI 2.0 application
 USB Type-C Monitor/Projector/Display

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CHRONTEL CH7211A
SPDIF/
IIS

SPDIF/IIS Decoder
DisplayPort
Main Link
4 x 5.4G TMDS
CSC
Equalizer

Input detection Pre-


Repackage
& CDR Serializer Emphasi
Encoder
Lane Swap s
HDCP encryption

AUX USB Plug DPCD / DDC Register DDC


Orientation AUX Controller Active DDC Buffer
Switch IIC Over AUX Transaction

HPD_Out

CC0/1_A HPD_IN
USB Power Delivery Control HDP to PD Converter
CC0/1_B

USB 2.0 PHY RAM

Generator
Ref Clock
USB Billboard / CEC tunneling over AUX
D +/-
Switch
MCU IIC Slave

Embedded EEPROM

D +/- GPIOs VBUS_DET CEC SPC/SPD

Figure 1: CH7211A Functional Block Diagram

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CHRONTEL CH7211A

USB Type
C Plug

DP Lane TMDS
4X

DDC
SBU / AUX HDMI

CEC Rx
CC0/1_A

USB CH7211A HPD

Type C D +/-
5V
ALT Mode
D +/-
Tx VCONN1/2
USB 2.0 Audio /

File
GPIO

Enable CC0/1_B
Divider
Circuit
Power Power Adapter
VBUS Charge
DCDC / FET

Figure 2: CH7211A USB Type-C to HDMI / USB 2.0 / Power Charge Docking Application Block Diagram

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CHRONTEL CH7211A

1.0 PIN-OUT
1.1 Package Diagram

SC_EEPROM
DDC_SCL/
VDDPLL

RBIAS
AVCC

AUXN
AVDD

AUXP
AVDD
D3N

D2N

D1N

D0N
D3P

D2P

D1P

D0P

51

50

49
52
53
55

54
64

63

62

61

60

59

58

57

56
DDC_SDA/
AVCC 1 48
SD_EEPROM

XI 2 47 HPD_DP/GPIO9

XO 3 46 HPD_HM

USB0_DN 4 45 GPIO4/CC1_B

USB0_DP 5 44 GPIO5/CC0_B

USB1_DN 6
CHRONTEL 43 SPC0

USB1_DP 7 42 SPD0

AVCC5V 8
CH7211A 41 DGND

VBUS_DET 9 40 DVDD

DVDD 10 QFN64 39 AVCC

11 38 SD0/SPDIF/GPIO6
DGND

RB 12 37 WS/GPIO7

GPIO0 13 36 SCLK/GPIO8

GPIO1 14 35 CC1_A

GPIO2 15 34 Ra

CC0_A/VCONN/
GPIO3 16 33 VCONN_DET
17

31

32
18

19

20

21

22

23

24

25

26

27

28

29

30
TXCB

TXC

TX1
GNDS
VDDS

TX0B

VDDS

TX2B

Rd
GNDS
AVCC

TX1B

CEC_HM
TX2
AVDDPLL

TX0

Figure 3: CH7211A 64-Pin QFN Pin Out

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CHRONTEL CH7211A

1.2 Pin Description


Table 1: 64 BGA Pin Name Descriptions
Pin # Type Symbol Description
2 In XI Crystal Input / External Reference Input
A parallel resonance crystal should be attached between this pin and
XO. An external 3.3V CMOS compatible clock also can drive the XI
Input
3 Out XO Crystal Output
A parallel resonance crystal should be attached between this pin and
XI / FIN. However, if an external CMOS clock is attached to XI/FIN,
XO should be left open
4,5 In/Out USB0_DN/ D+/- Input of USB Type C Interface
USB0_DP
6,7 In/Out USB1_DN/ USB 2.0 Output Pins
USB1_DP
9 In VBUS_DET USB VBUS Voltage Detection
Voltage input 0 ~ 5V
12 In RB Reset* Input (Internal pull-up)
When this pin is low, the device is held in the power-on reset
condition. When this pin is high, reset is controlled through the serial
port register.
13~16 In/Out GPIO[3:0] General Purpose Input/Output Interface
18,19 Out TXCB/ TXC HDMI Clock Outputs
These pins provide the differential clock output for the HDMI
22,23 Out TX0B/ TX0 HDMI Data Channel 0 Outputs
These pins provide the TMDS differential outputs for data channel 0
25,26 Out TX1B/ TX1 HDMI Data Channel 1 Outputs
These pins provide the TMDS differential outputs for data channel 1
29/30 Out TX2B/ TX2 HDMI Data Channel 2 Outputs
These pins provide the TMDS differential outputs for data channel 2
31 In/Out CEC_HM HDMI CEC Channel
32 In Rd USB Type-C Dead Battery Rd Resistor
Connect CC0_A to this pin to enable dead battery Rd on CC0_A pin
33 In/Out CC0_A Port A USB Type-C Configure Channel 0
In VCONN VCONN Input
Connect this pin to VCONN pin of USB Type-C Plug Connector if
CH7211A is used in VCONN Power Accessory mode.
In VCONN_DET USB VCONN Voltage Detection
Voltage input 2.7 ~ 5.5v
34 In Ra Ra Resistor
When used in typeC accessory mode, this pin needs connect to CC0.
35 In/Out CC1_A Port A USB Type-C Configure Channel 1
36 In SCLK IIS Audio Input’s Bit clock
In/Out GPIO8 General Purpose Input/Output Interface
37 In WS IIS Audio Input’s WS
In/Out GPIO7 General Purpose Input/Output Interface
38 In SD0/SPDIF IIS Audio Input’s Data or SPDIF Input.
In/Out GPIO6 General Purpose Input/Output Interface
42 In/Out SPD0 Serial Port Data Input / Output
This pin functions as the bi-directional data pin of the serial port.
External pull-up 6.8 K resister is required

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CHRONTEL CH7211A
43 In SPC0 Serial Port Clock Input
This pin functions as the clock pin of the serial port. External pull-up
6.8 K resister is required
44 In/Out CC0_B Port B USB Type-C Configure Channel 0
In/Out GPIO5 General Purpose Input/Output
45 In/Out CC1_B Port B USB Type-C Configure Channel 1
In/Out GPIO4 General Purpose Input/Output
46 In HPD_HM HDMI Tx HPD Input
47 Out HPD_DP DP Rx HPD Output
In/Out GPIO9 General Purpose Input/Output
48 In DDC_SDA Serial Port Data to HDMI Receiver
The pin should be connected to data signal of HDMI DDC. This pin
requires a pull-up 1.8 kΩ resistor to the desired voltage level
In/Out SD_EEPROM Connect to External EEPROM I2C Port Data
The EEPROM is optional depending on FW size
49 Out DDC_SCL Serial Port Clock Output to HDMI Receiver
The pin should be connected to clock signal of HDMI DDC. This pin
requires a pull-up 1.8kΩ resistor to the desired voltage level
Out SC_EEPROM Connect to External EEPROM I2C Port Clock
50,51 In/Out AUXN/AUXP AUX Channel Differential Input/Output
These two pins are DisplayPort AUX Channel control, which supports
a half-duplex, bi-directional AC-coupled differential signal.
52 In RBIAS HDMI Swing Control
This pin sets the swing level of the HDMI outputs. A 1K-ohm with 1%
tolerance resistor should be connected between this pin and ground
using short and wide traces.
54,55 In D0P/ D0N DP Main Link Differential Lane 0 Input
These pins accept four AC-coupled differential pair signals from the
DisplayPort transmitter.
57/58 In D1P/ D1N DP Main Link Differential Lane 1 Input
These pins accept four AC-coupled differential pair signals from the
DisplayPort transmitter.
59,60 In D2P/ D2N DP Main Link Differential Lane 2 Input
These pins accept four AC-coupled differential pair signals from the
DisplayPort transmitter.
62,63 In D3P/ D3N DP Main Link Differential Lane 3 Input
These pins accept four AC-coupled differential pair signals from the
DisplayPort transmitter.
1,24,39,5 Power AVCC Analog Power Supply(3.3V)
3
8 Power AVCC5V Analog Power Supply (5V)
10,40 Power DVDD Digital Core/IO Power Supply (1.2V)
11,41 Power DGND Digital Ground
17 Power AVDDPLL PLL Power Supply (1.2V)
20,28 Power VDDS Serializer Power Supply (1.2V)
21,27 Power GNDS Ground
56,61 Power AVDD Analog Power Supply (1.2V)
64 Power VDDPLL PLL Power Supply (1.2V)

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CHRONTEL CH7211A

2.0 PACKAGE DIMENSION


TOP VIEW BOTTOM VIEW

B
A
16 1 1 16

64 17
17 64

Pin 1

A C

32 49
49 32 F

33 48 48 33
E
D
I
G

Figure 4: 64 Pin QFN Package (8x8 mm)

Table of Dimensions
No. of Leads SYMBOL
64 (8x8 mm) A B C D E F G H I
Milli- MIN 7.90 6.10 6.10 0.40 0.15 0.35 0.70 0.00 0.203
meters MAX 8.10 6.30 6.30 BSC 0.25 0.45 0.80 0.05 REF

Notes:
1. All dimensions conform to JEDEC standard MO-207.

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CHRONTEL CH7211A

Disclaimer
This document provides technical information for the user. Chrontel reserves the right to make changes at any time
without notice to improve and supply the best possible product and is not responsible and does not assume any
liability for misapplication or use outside the limits specified in this document. CHRONTEL warrants each part to be
free from defects in material and workmanship for a period of one (1) year from date of shipment. Chrontel assumes
no liability for errors contained within this document. The customer should make sure that they have the most recent
data sheet version. Customers should take appropriate action to ensure their use of the products does not infringe
upon any patents. Chrontel, Inc. respects valid patent rights of third parties and does not infringe upon or assist
others to infringe upon such rights.

Chrontel PRODUCTS ARE NOT AUTHORIZED FOR AND SHOULD NOT BE USED WITHIN LIFE SUPPORT
SYSTEMS OR NUCLEAR FACILITY APPLICATIONS WITHOUT THE SPECIFIC WRITTEN CONSENT OF
Chrontel. Life support systems are those intended to support or sustain life and whose failure to perform when used
as directed can reasonably expect to result in personal injury or death.

ORDERING INFORMATION

Part Number Package Type Operating Temperature Range Minimum Order Quantity

CH7211A-BF 64 QFN, Lead-free Commercial : 0 to 70C 260/Tray

Chrontel
Chrontel International Limited
129 Front Street, 5th floor,
Hamilton, Bermuda HM12
www.chrontel.com
E-mail: sales@chrontel.com

2018 Chrontel - All Rights Reserved.

209-1000-070 Rev 1.1 2018-11-19 9

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