Introduction                 STM32 Analog do Digital Converter   ADC registers
Outline
  1    Introduction
          Introduction to Analog to Digital Converters
          Analog to Digital Converter types
          Analog to Digital Converter characteristics
  2    STM32 Analog do Digital Converter
         Introduction
         Features
         ADC and DMA
  3    ADC registers
        Overview
Introduction               STM32 Analog do Digital Converter        ADC registers
Introduction to Analog to Digital Converters (1/2)
  Definition
  An analog-to-digital converter is a device that converts a continuous
  quantity to a discrete time digital representation
Introduction        STM32 Analog do Digital Converter   ADC registers
Introduction to Analog to Digital Converters (2/2)
Introduction        STM32 Analog do Digital Converter   ADC registers
Continuous quantity to discrete quantity (1/2)
                               N = 2n
                        LSB = VREF /2n
Introduction        STM32 Analog do Digital Converter   ADC registers
Continuous quantity to discrete quantity (2/2)
Introduction        STM32 Analog do Digital Converter   ADC registers
Continuous time to discrete time (1/2)
Introduction                STM32 Analog do Digital Converter         ADC registers
Continuous time to discrete time (2/2)
  Nyquist rate
  The Nyquist rate is the minimum sampling rate required to avoid
  aliasing, equal to twice the highest frequency contained within the signal.
                                          def
                                     fN = 2B
  Minimum sampling rate
  To avoid aliasing, the sampling rate must exceed the Nyquist rate.
                                      fS > fN
Introduction        STM32 Analog do Digital Converter   ADC registers
Analog to Digital Converter diagram
Introduction       STM32 Analog do Digital Converter   ADC registers
FLASH Analog to Digital Converter
Introduction       STM32 Analog do Digital Converter   ADC registers
SAR Analog to Digital Converter
Introduction        STM32 Analog do Digital Converter   ADC registers
Sigma-delta Analog to Digital Converter
Introduction                   STM32 Analog do Digital Converter   ADC registers
Analog to Digital Converter characteristics
        Resolution
        Max sampling rate
        Signal to Noise Ratio (SNR)
        Input voltage offset
        Gain stability
        Linearity
Introduction   STM32 Analog do Digital Converter   ADC registers
Gain error
Introduction           STM32 Analog do Digital Converter   ADC registers
Voltage offset error
Introduction           STM32 Analog do Digital Converter   ADC registers
Non-linearity errors
Introduction                 STM32 Analog do Digital Converter   ADC registers
Outline
  1    Introduction
          Introduction to Analog to Digital Converters
          Analog to Digital Converter types
          Analog to Digital Converter characteristics
  2    STM32 Analog do Digital Converter
         Introduction
         Features
         ADC and DMA
  3    ADC registers
        Overview
Introduction                   STM32 Analog do Digital Converter        ADC registers
STM32 Analog do Digital Converter
          Successive approximation analog-to-digital converter
          12-bit resolution
          Interrupt generation at End of Conversion, End of Injected
          conversion and Analog watchdog event
          Single and continuous conversion modes
          Scan mode for automatic conversion of channel 0 to channel n
          Self-calibration
          External trigger option for both regular and injected conversion
          Total conversion time: 14 to 252 TCK (tS for sampling + 12.5 for
          successive approximation)
Introduction       STM32 Analog do Digital Converter   ADC registers
STM32 Analog do Digital Converter accuracy
Introduction          STM32 Analog do Digital Converter   ADC registers
Analog power supply
Introduction       STM32 Analog do Digital Converter   ADC registers
STM32 clock tree
Introduction       STM32 Analog do Digital Converter   ADC registers
STM32 Analog do Digital Converter diagram
Introduction                    STM32 Analog do Digital Converter             ADC registers
Channel selection
          16 multiplexed channels
          It is possible to organize the conversions in groups
          A group consists of a sequence of conversions which can be done on
          any channel and in any order
          Regular group:
               up to 16 conversions
               the conversion sequence must be selected in the ADC SQRx registers
          Injected group:
               up to 4 conversions
               This mode is intended for use when conversion is triggered by an
               external event or by software
               The injected group has priority over the regular channel group
               It interrupts the conversion of the current channel in the regular
               channel group
Introduction                 STM32 Analog do Digital Converter      ADC registers
Single and continuous conversion mode
          In Single conversion mode the ADC does one conversion
          In Continuous mode (CONT = 1) another conversion starts as soon
          as it finishes one
          The conversion is started either by setting the ADON bit or by
          external trigger
          If the EOCIE is set, an interrupt is generated at the end of each
          conversion
Introduction                   STM32 Analog do Digital Converter          ADC registers
Scan conversion mode
          Scans a group of analog channels
          A single conversion is performed for each channel of the group
          After each end of conversion the next channel of the group is
          converted automatically
          If CONT = 1, on last channel conversion, the ADC starts again
          from the first group channel
          If the DMA bit is set, the direct memory access controller is used to
          transfer the converted data to SRAM after each EOC
Introduction                  STM32 Analog do Digital Converter        ADC registers
Analog watchdog
          The AWD analog watchdog status bit is set if the analog voltage
          converted by the ADC is below a low threshold or above a high
          threshold
          These thresholds are programmed in the 12 least significant bits of
          the ADC HTR and ADC LTR 16-bit registers
          An interrupt can be enabled by using the AWDIE bit in the
          ADC CR1 register
Introduction      STM32 Analog do Digital Converter   ADC registers
Direct Memory Access
Introduction                  STM32 Analog do Digital Converter         ADC registers
ADC and DMA
          Converted regular channels value are stored in a unique data register
          It is necessary to use DMA for conversion of more than one regular
          channel
          The end of conversion of a regular channel generates a DMA request
          Converted data is transferred from the ADC DR register to the
          destination location selected by the user
Introduction                 STM32 Analog do Digital Converter   ADC registers
Outline
  1    Introduction
          Introduction to Analog to Digital Converters
          Analog to Digital Converter types
          Analog to Digital Converter characteristics
  2    STM32 Analog do Digital Converter
         Introduction
         Features
         ADC and DMA
  3    ADC registers
        Overview
Introduction                      STM32 Analog do Digital Converter                  ADC registers
ADC status register (ADC SR)
      0 AWD: Analog watchdog flag
        This bit is set by hardware when the converted voltage crosses the values programmed
        in the ADC LTR and ADC HTR registers. It is cleared by software.
        0: No Analog watchdog event occurred
        1: Analog watchdog event occurred
      1 EOC: End of conversion
        This bit is set by hardware at the end of a group channel conversion (regular or
        injected). It is cleared by software or by reading the ADC DR.
        0: Conversion is not complete
        1: Conversion complete
      4 STRT: Regular channel start flag
        This bit is set by hardware when regular channel conversion starts. It is cleared by
        software.
        0: No regular channel conversion started
        1: Regular channel conversion has started
Introduction                       STM32 Analog do Digital Converter                     ADC registers
ADC control register 1 (ADC CR1)
    4:0 AWDCH[4:0]: Analog watchdog channel select bits
        These bits are set and cleared by software. They select the input channel to be guarded
        by the Analog watchdog.
        00000: ADC analog input Channel0
        ...
        10001: ADC analog input Channel17
      5 EOCIE: Interrupt enable for EOC
        This bit is set and cleared by software to enable/disable the End of Conversion interrupt.
        0: EOC interrupt disabled
        1: EOC interrupt enabled. An interrupt is generated when the EOC bit is set.
      8 SCAN: Scan mode
        This bit is set and cleared by software to enable/disable Scan mode. In Scan mode, the
        inputs selected through the ADC SQRx or ADC JSQRx registers are converted.
        0: Scan mode disabled
        1: Scan mode enabled
Introduction                       STM32 Analog do Digital Converter                    ADC registers
ADC control register 2 (ADC CR2)
      0 ADON: A/D converter ON/OFF
        If this bit holds a value of zero and a 1 is written to it then it wakes up the ADC from
        Power Down state.
        Conversion starts when this bit holds a value of 1 and a 1 is written to it.
        0: Disable ADC conversion and go to power down mode.
        1: Enable ADC and to start conversion
      1 CONT: Continuous conversion
        0: Single conversion mode
        1: Continuous conversion mode
      8 DMA: Direct memory access mode
        0: DMA mode disabled
        1: DMA mode enabled
     11 ALIGN: Data alignment
        0: Right Alignment
        1: Left Alignment
Introduction                       STM32 Analog do Digital Converter                    ADC registers
ADC sample time register 1 (ADC SMPR1)
    4:0 SMPx[2:0]: Channel x Sample time selection
        These bits are written by software to select the sample time individually for each
        channel.
        000: 1.5 cycles
        001: 7.5 cycles
        010: 13.5 cycles
        011: 28.5 cycles
        100: 41.5 cycles
        101: 55.5 cycles
        110: 71.5 cycles
        111: 239.5 cycles
Introduction                      STM32 Analog do Digital Converter                   ADC registers
ADC regular sequence register 1 (ADC SQR1)
 19:15 SQ16[4:0]: 16th conversion in regular sequence
       These bits are written by software with the channel number (0..17) assigned as the 16th
       in the conversion sequence.
 23:20 L[3:0]: Regular channel sequence length
       These bits are written by software to define the total number of conversions in the
       regular channel conversion sequence.
       0000: 1 conversion
       0001: 2 conversions
       ...
       1111: 16 conversions
Introduction                STM32 Analog do Digital Converter   ADC registers
ADC value registers
          ADC regular data register (ADC DR)
          ADC watchdog low threshold register (ADC LTR)
          ADC watchdog low threshold register (ADC HTR)
References
http://en.wikipedia.org/wiki/Analog to digital converter
http://en.wikipedia.org/wiki/Sample and hold
http://en.wikipedia.org/wiki/Quantization error
http://en.wikipedia.org/wiki/Nyquist rate
http://en.wikipedia.org/wiki/Nyquist frequency
http://en.wikipedia.org/wiki/Flash ADC
http://en.wikipedia.org/wiki/Successive Approximation ADC
http://en.wikipedia.org/wiki/Sigma-delta modulation
STM32F10xxx Reference Manual (RM0008 - Doc ID 14611)
Application note: STM32 ADC modes and their applications (AN3116 - Doc ID
16840)