EE5206 Embedded Systems Design and

Implementation

LECTURE 4

ADC AND DAC

By
Prof. Buddhika Jayasekara
 Embedded System Design

Design of
Problem Requirements Specifications
Solution

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 Embedded System Design- Step by Step

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 Embedded System Design- Step by Step

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 Embedded System Design- Step by Step

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 Embedded System Design- Step by Step

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 Register Based Approach

Configure facilities by
Special registers for
setting registers
• Control Registers • Digital
• Data registers inputs/outputs
• Analog inputs, ADC
• PWMs
• Serial
Communication
• Special inputs and
outputs

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 ADC and DAC Conversion

❑ Digital Control Systems

▪ Real world signals are analog
▪ Processing in Digital format
▪ Need Analog to Digital Converters (ADCs)
▪ Digital to Analog converters (DACs)

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 Analog Inputs - Sensors

❑ Temperature Sensors
❑ Pressure Sensors
❑ Moisture
❑ Water level
❑ Preset value
❑ etc

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 Student Work: Digitally Controlled Solar Micro
Inverter
❑ Develop a quick sketch of the overall solution
❑ Evaluate the requirements for ADCs/DACs
▪ Bits?
▪ Conversion time?
▪ Real-time?

Design -Embedded
System , power
inverter

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 ADC
❑ Digital Signal Processing is more popular
▪ Easy to implement, modify, …
▪ Low cost
❑ Data from real world are typically Analog
❑ Needs conversion system
▪ from raw measurements to digital data
▪ Consists of
• Amplifier, Filters
• Sample and Hold Circuit, Multiplexer
• ADC

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 ADC

❑ Basic I/O Relationship

▪ ADC is Rationing System
• x = Analog input /
Reference
– Fraction: 0 ~ 1
❑ n bits ADC
▪ Number of discrete output
level : 2n
▪ Quantum
• LSB size
• Q = LSB = FS / 2n
❑ Quantization Error
▪ 1/2 LSB
▪ Reduced by increasing n

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 Interfacing Sensors/ADC/DAC

❑ Analog-to digital converter (ADC)

▪ Most widely used device in data acquisition
▪ Temperature, pressure, humidity, velocity are some analog variables
▪ Sensors will provide output voltage or current
▪ ADC converts analog signal to digital that can be read by micro
controller
▪ E.g.8-bit microcontroller

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 Interfacing ADC

❑ Resolution: based on step size- smallest size that can be

determined (Vref =5V)

❑ Conversion time: time taken to convert analog input to digital

number
▪ Depends on the clock source and fabrication technology

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 Interfacing ADC

❑ Vref : Input voltage used as the reference

❑ Digital data output

Vinput
D=
step size

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 Interfacing ADC

❑ E.g.

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 Converter Errors
❑ Offset Error ❑ Integral Linearity Error

❑ Gain Error ❑ Differential Linearity Error

❑ Can be eliminated by initial ❑ Nonlinear Error

adjustments ❑ Hard to remove
Chap 0 17
 ADC Terminologies
❑ Converter Resolution ❑ Conversion Time
▪ The smallest change required in ▪ Required time (tc) before the
the analog input of an ADC to converter can provide valid
change its output code by one level output data

❑ Converter Accuracy ❑ Converter Throughput Rate

▪ The difference between the actual ▪ The number of times the
input voltage and the full-scale input signal can be sampled
weighted equivalent of the binary maintaining full accuracy
output code ▪ Inverse of the total time
▪ Maximum sum of all converter required for one successful
errors including quantization error conversion
▪ Inverse of Conversion time if
No S/H(Sample and Hold)
circuit is used

Chap 0 18
 A/D Conversion Techniques
❑ Counter or Tracking ADC

❑ Successive Approximation ADC

▪ Most Commonly Used

❑ Dual Slop Integrating ADC

❑ Voltage to Frequency ADC

❑ Parallel or Flash ADC

▪ Fast Conversion

❑ Shaft Encoder

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 Counter Type ADC
❑ Block diagram ❑ Operation
– Reset and Start Counter
– DAC convert Digital output of
Counter to Analog signal
– Compare Analog input and
Output of DAC
• Vi < VDAC
– Continue counting
• Vi = VDAC
❑ Waveform
– Stop counting
– Digital Output = Output of
Counter
❑ Disadvantage
– Conversion time is varied
• 2n Clock Period for Full
Scale input
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 Tracking Type ADC

❑ Tracking or Servo Type ❑ Can be used as S/H circuit

▪ Using Up/Down Counter to track
▪ By stopping desired instant
input signal continuously
▪ Digital Output
▪ For slow varying input
▪ Long Hold Time
❑ Disabling UP (Down) control,
Converter generate
▪ Minimum (Maximum) value
reached by input signal over a
given period

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 Successive Approximation ADC
❑ Most Commonly used in medium
to high speed Converters

❑ Based on approximating the

input signal with binary code and
then successively revising this
approximation until best
approximation is achieved

❑ SAR(Successive Approximation
Register) holds the current
binary value

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 Successive Approximation ADC
❑ Circuit waveform
❑ Conversion Time
– n clock for n-bit ADC
– Fixed conversion time

❑ Serial Output is easily generated

❑ Logic Flow – Bit decision are made in serial
order

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 Parallel or Flash ADC
❑ Very High speed conversion

▪ Up to 100MHz for 8 bit resolution

▪ Video, Radar, Digital Oscilloscope

❑ Single Step Conversion

▪ 2n –1 comparator

▪ Precision Resistive Network

▪ Encoder

❑ Resolution is limited

▪ Large number of comparator in IC

Chap 0 24
 Shaft Encoder
• Binary Encoder
❑ Elctromechanical ADC – Misalignment of mechanism
▪ Convert shaft angle to digital causes large error
output • Ex: 011 → 111 (180deg)
❑ Encoding
▪ Optical or Magnetic Sensor
❑ Applications
▪ Machine tools, Industrial robotics,
Numerical control
• Gray Encoder
– Misalignment causes 1 LSB
error

Chap 0 25
 ADC options - Compare

❑ https://www.st.com/en/microcontrollers-
microprocessors/stm32-high-performance-mcus/products.html
❑ 12 bit
❑ 16 bit
❑ Number of channels

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 ADC

❑ 8bit ADC

❑ 12bit ADC

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 E.g. - PIC: Programming ADC-Polling

1. Turn on ADC module

2. Make selected channels as inputs
3. Select voltage references-use registers ADCON0 and ACON1
4. Select conversion speed-use registers ADCON0 and ACON1
5. Wait for required acquisition time
6. Activate the start conversion bit of GO/DONE
7. Wait for conversion to complete by polling the end-of-
conversion bit
8. Read ADRESL and ADRESH to get the digital output
9. Back to step 5

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 ADC in STM 32 -Discussion

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 DAC-Basics
Reference Voltage

Digital Value DAC Analog Voltage

❑ Types of DAC
▪ Binary Weighted Resistor
▪ R-2R Ladder
▪ Multiplier DAC
• The reference voltage is constant and is set by the manufacturer.
▪ Non-Multiplier DAC
• The reference voltage can be changed during operation.
❑ Comprised of switches, op-amps, and resistors

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 Binary Weighted Resistor
Binary Representation

Rf = R

I i

R 2R 4R 8R Vo
Most
Significant Bit

Least
Significant Bit
-VREF

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 Binary Representation

SET CLEARED
Most
Significant Bit

Least
-VREF Significant Bit

( 1 1 1 1 )2 = ( 15 )10

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 Binary Weighted Resistor

❑“Weighted Resistors” based on bit

❑Reduces current by a factor of 2 for each bit
Rf = R

I i

R 2R 4R 8R Vo

MSB

LSB

-VREF

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 Binary Weighted Resistor

 B3 B2 B1 B0  I
 REF  R + 2R + 4R + 8R 
I = V i

 B B B  R 2R 4R 8R Vo

VOUT = I  R f = VREF  B3 + 2 + 1 + 0 
 2 4 8  MSB

Bi = Value of Bit i LSB

-VREF

• More Generally:

Bi = Value of Bit i
n = Number of Bits Bi
VOUT = VREF 
2 n −i −1
= VREF  Digital Value  Resolution

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 R-2R Ladder

VREF
MSB

LSB

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 R-2R Ladder

❑ Same input switch setup as Binary Weighted Resistor DAC

❑ All bits pass through resistance of 2R
VREF
MSB

LSB

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 R-2R Ladder

❑ Less significant the bit, the more resistors the signal must pass through
before reaching the op-amp

❑ The current is divided by a factor of 2 at each node

LSB MSB

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 R-2R Ladder

• The current is divided by a factor of 2 at each node

• Analysis for current from (001)2 shown below

I0 I0 I0
2 4 8
I0
R R R 2R
R 2R 2R 2R

VREF B1 B2
Op-Amp input
“Ground”
B0 − VREF VREF
I0 = =
2 R + 2 R 2 R 3R
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 R-2R Ladder
VREF  B2 B1 B0  – Bi = Value of Bit i
I=  + + 
3R  2 4 8 

Rf  B2 B1 B0 
VOUT = VREF  + + 
R  2 4 8 

Rf

If Rf = 6R, VOUT is same as Binary Weighted

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 Digital to Analog Converters
Performance Specifications

❑ Resolution

❑ Reference Voltages

❑ Settling Time

❑ Linearity

❑ Speed

❑ Errors

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 Performance Specifications
Resolution
❑ Resolution: is the amount of variance in output voltage for
every change of the LSB in the digital input

❑ How closely can we approximate the desired output signal

❑ (Higher Res. = finer detail=smaller Voltage divisions)

❑ A common DAC has a 8 - 12 bit Resolution

VRef
Resolution = VLSB = N N = Number of bits

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 Performance Specifications
Resolution

Poor Resolution(1 bit) Better Resolution(3 bit)

Vout Vout

Desired Analog Desired Analog signal

signal
111

110 110

8 Volt. Levels
2 Volt. Levels

101 101

100 100

011 011

010 010

001 001

0 0 000
000

Digital Input Approximate Digital Input

Approximate
output
output

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 Performance Specifications
Reference Voltage

❑Reference Voltage: A specified voltage used to

determine how each digital input will be assigned to
each voltage division
❑Types:
▪ Non-multiplier: internal, fixed, and defined by
manufacturer
▪ Multiplier: external, variable, user specified

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 Performance Specifications
Reference Voltage

Non-Multiplier: (Vref = C) Multiplier: (Vref = Asin(wt))

Voltage Voltage

11
11
10 10
10 10

01 01
01 01

0 0
00 00 00 00
Digital Input Digital Input

Assume 2 bit DAC

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 Performance Specifications
Settling Time
❑ Settling Time: The time required for the input signal voltage to settle to
the expected output voltage(within +/- VLSB).

❑ Any change in the input state will not be reflected in the output state
immediately. There is a time lag, between the two events.

Analog Output Voltage

+VLSB
Expected
Voltage -VLSB

Time
Settling time

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 Performance Specifications
Linearity
❑ Linearity: is the difference between the desired analog output and the actual
output over the full range of expected values.

❑ Ideally, a DAC should produce a linear relationship between a digital input

and the analog output, this is not always the case.

Linearity(Ideal Case) NON-Linearity(Real World)

Analog Output Voltage

Desired Output
Analog Output Voltage

Desired/Approximate Output

Approximate
output

Digital Input Digital Input

Perfect Agreement Miss-alignment 46
 Digital to Analog Converters
Performance Specifications

Speed
❑ Speed: Rate of conversion of a single digital input to its analog
equivalent
❑ Conversion Rate
▪ Depends on clock speed of input signal
▪ Depends on settling time of converter
Errors
❑ Non-linearity
▪ Differential
▪ Integral
❑ Gain
❑ Offset
❑ Non-monotonicity
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 Performance Specifications
Errors: Differential Non-Linearity
❑ Differential Non-Linearity: Difference in voltage step size
from the previous DAC output (Ideally All DLN’s = 1 VLSB)

Ideal Output
Analog Output Voltage

2VLSB Diff. Non-Linearity = 2VLSB

VLSB

Digital Input

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 Performance Specifications
Errors: Integral Non-Linearity

❑Integral Non-Linearity: Deviation of the actual DAC

output from the ideal (Ideally all INL’s = 0)

Ideal Output
Analog Output Voltage

1VLSB Int. Non-Linearity = 1VLSB

Digital Input
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 Performance Specifications
Errors: Gain
❑ Gain Error: Difference in slope of the ideal curve and the
actual DAC output

High Gain

High Gain Error: Actual Desired/Ideal Output

slope greater than ideal Analog Output Voltage

Low Gain Error: Actual Low Gain

slope less than ideal

Digital Input

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 Performance Specifications
Errors: Offset
❑ Offset Error: A constant voltage difference between the ideal
DAC output and the actual.
▪ The voltage axis intercept of the DAC output curve is
different than the ideal.

Output Voltage Desired/Ideal Output

Positive Offset

Digital Input
Negative Offset

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 Performance Specifications
Errors: Non-Monotonicity
❑ Non-Monotonic: A decrease in output voltage with an increase
in the digital input

Analog Output Voltage

Desired Output
Non-Monotonic

Monotonic

Digital Input

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 STM DAC - Discussion

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