Experiment 8 (a)
1     Objective
Investigate the operation of Encoders.
2     Purpose
Having completed this experiment you will be able to:
    • Understand the operating principles of encoder circuits..
3     Apparatus
    • Logic Trainer (SMT-8004)
    • Logic Trainer (SMT-800)
    • Power Supply
    • Connecting wires
4     Theory
An encoder is combinational logic gates that accept one or multiple inputs and generates a specific output
code. Only one input is triggered at a time. An encoder with n-bit inputs and n-bit outputs is shown in
Fig. 1. When one of the inputs is triggered there will be an n-bit code at the output.
                               Figure 1: Encoder with n-inputs and n-outputs.
                                                      1
                                     Figure 2: Octal to binary encoder.
        4.1   Octal to Binary Encoder
An octal to binary encoder is shown in Fig. 2. There are 8 octal inputs A1 A7 or (0 7); and three binary
outputs Q0, Q1, Q2 or (000 111). If input A0 = 0 the corresponding output Q2, Q1, Q0 is equal to 000.
Actually, A0 is not connected to the gate input. If A1 = 1 then Q2Q1Q0 = 001. When A2 = 1 the output
Q2Q1Q0 = 010. There cant be more than one 1 among the inputs. For example, if A2 = 1 and A3 = 1
simultaneously, Q2Q1Q0 = 011. If A3, A4 both are 1 at the same time, Q2Q1Q0 = 111. Both outputs are incorrect.
        4.2 Constructing—a −4 to2 Encoder with Basic Gates (Module− SMT
            8004
        block Encoder 1)
4.2.1    Procedure
   • Insert connection clips according to Fig. 3.
                                 Figure 3: 4 − 2 Encoder with basic gates.
                                                      2
• Connect Vcc to +5V.
• Connect inputs A D to Date Switches SW0 SW3 respectively; Outputs F8 and F9 to Logic Indicator
  L0 and L1.
• Follow the input sequences for D, C, B, A; in Table 1 and record the output states.
                     Table 1: Truth Table of   4−       2 Encoder with basic gates.
                                    D C        B        A F8 F9
                                    0   0      0        0
                                    0   0      0        1
                                    0   0      1        0
                                    0   0      1        1
                                    0   1      0        0
                                    0   1      0        1
                                    0   1      1        0
                                    0   1      1        1
                                    1   0      0        0
                                    1   0      0        1
                                    1   0      1        0
                                    1   0      1        1
                                    1   1      0        0
                                    1   1      0        1
                                    1   1      1        0
                                    1   1      1        1
• Remove the connection clip between A and A1; insert it between A1 and F1 as shown in Fig. 4. All
  other connections remain the same. Follow the input sequences in Table 2 and record output states.
                              Figure 4: 4 − 2 Encoder with basic gates.
                                                    3
                         Table 2: Truth Table of   4−       2 Encoder with basic gates.
                                        D C        B        A F8 F9
                                        0   0      0        0
                                        0   0      0        1
                                        0   0      1        0
                                        0   0      1        1
                                        0   1      0        0
                                        0   1      0        1
                                        0   1      1        0
                                        0   1      1        1
                                        1   0      0        0
                                        1   0      0        1
                                        1   0      1        0
                                        1   0      1        1
                                        1   1      0        0
                                        1   1      0        1
                                        1   1      1        0
                                        1   1      1        1
    • Compare the outputs states in Table 1 and 2.
    • What is the difference between them?
5     Conclusion
———————————————————————————————————————————
———–
———————————————————————————————————————————
———–
———————————————————————————————————————————
———–
———————————————————————————————————————————
———–
———————————————————————————————————————————
———–