CHAPTER – 9
Encoder and Decoder
DECODER
• A decoder is a combinational circuit.
• A decoder accepts a set of inputs that represents a binary
number and activates only that output corresponding to the
input number. All other outputs remain inactive.
• Fig. shows the block diagram of decoder with ‘N’ inputs and
‘M’outputs.
• There are 2N possible input combinations, for each of these
input combination only one output will be HIGH (active) all
other outputs are LOW.
• Some decoder have one or more ENABLE (E) inputs that are
used to control the operation of decoder.
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BLOCK DIAGRAM OF DECODER
A0 B0
A1 B1
A2 B2
. .
DECODER .
.
. .
. .
AN-1 BM-1
N- Inputs M- Outputs (2^N)
Only one output is High for
each input
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2 to 4 Line Decoder
Block diagram of 2 to 4 decoder is shown in fig.
Decoder:
A and B are the inputs. ( No. of inputs =2)
No. of possible output combinations: 22=4
No. of Outputs : 22=4, they are indicated by D0, D1, D2 and D3
From the Truth Table it is clear that each output is “1” for only
specific combination of inputs.
TRUTH TABLE
A D0
INPUTS OUTPUTS
2X4 D1
Decoder A B D0 D1 D2 D3
B D2
0 0 1 0 0 0
D3
0 1 0 1 0 0
Inputs Outputs
1 0 0 0 1 0
1 1 0 0 0 1
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BOOLEAN EXPRESSION:
From Truth Table
D0 AB D1 A B
D2 A B D3 AB
LOGIC DIAGRAM:
A B
A B
D0 A B
D1 A B
D2 A B
D3 A B
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3 to 8 Line Decoder
Decoder:
Block diagram of 3 to 8 decoder is shown in fig.
A , B and C are the inputs. ( No. of inputs =3)
No. of possible output combinations: 23=8
No. of Outputs : 23=8, they are indicated by D0 to D7
From the Truth Table it is clear that each output is “1” for only
specific combination of inputs.
A
. D0
B 3X8 .
Decoder .
C .
D7
Inputs Outputs
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TRUTH TABLE FOR 3 X 8 DECODER:
INPUTS OUTPUTS
A B C D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0 D0 A'B'C'
0 0 1 0 1 0 0 0 0 0 0 D1 A'B' C
0 1 0 0 0 1 0 0 0 0 0 D 2 A'BC'
0 1 1 0 0 0 1 0 0 0 0 D3 A'BC
1 0 0 0 0 0 0 1 0 0 0 D 4 AB'C'
1 0 1 0 0 0 0 0 1 0 0 D5 AB''C
1 1 0 0 0 0 0 0 0 1 0 D6 A BC'
1 1 1 0 0 0 0 0 0 0 1 D7 A BC
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LOGIC DIAGRAM OF 3 X 8 DECODER:
INPUTS
A B C
A B C
D0 A B C
D1 A B C
D2 A B C
D3 A BC
OUTPUTS
D4 A B C
D5 A B C
D6 A B C
D7 A B C
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EXPANSION OF DECODERS:
The number of lower order Decoder for implementing higher order
Decoder can be find as
No. of lower order required = m2/m1
Where, m1=No. of Outputs of lower order Decoder
m2=No. of Outputs of higher order Decoder
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ENCODER
• An Encoder is a combinational logic circuit.
• It performs the inverse operation of Decoder.
• The opposite process of decoding is known as Encoding.
• An Encoder converts an active input signal into a coded output signal.
• Block diagram of Encoder is shown in Fig. It has ‘M’inputs and ‘N’outputs.
• An Encoder has ‘M’ input lines, only one of which is activated at a giventime,
and produces an N-bit output code, depending on which input is activated.
‘M’ Inputs (2^N)
A0 B0
‘N’ Outputs
A1 B1
A2 B2
- - - - - --
- - - - - --
Encoder
AM-1 BN-1
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4 to 2 line Encoder
• Block Diagram of 4 to 2 line Encoder is shown in Fig.
• It has four inputs and two outputs.
• Only one input has one value at any given time.
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TRUTH TABLE & DIAGRAM:
INPUT OUTPUT
Y0 Y1 Y2 Y3 A1 A0 Expression for the
1 0 0 0 0 0 truth table is,
0 1 0 0 0 1
A0=Y1+Y3
0 0 1 0 1 0
A1=Y2+Y3
0 0 0 1 1 1
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8 to 3 line Encoder -OCTAL TO BINARY
• Block Diagram of Octal to Binary Encoder is shown in Fig.
)ENCODER:
• It has eight inputs and three outputs.
• Only one input has one value at any given time.
• Each input corresponds to each octal digit and output generates
corresponding Binary Code.
D0
D1 X
D2
D3
ENCODER Y
D4
D5
D6
Z
D7
INPUT OUTPUT
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TRUTH TABLE:
INPUT OUTPUT
D0 D1 D2 D3 D4 D5 D6 D7 X Y Z
1 0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 0 0 0 0 1
0 0 1 0 0 0 0 0 0 1 0
0 0 0 1 0 0 0 0 0 1 1
0 0 0 0 1 0 0 0 1 0 0
0 0 0 0 0 1 0 0 1 0 1
0 0 0 0 0 0 1 0 1 1 0
0 0 0 0 0 0 0 1 1 1 1
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X D 4 D5 D6 D7
Y D 2 D3 D6 D7
LOGIC DIAGRAM:
Z D1 D 3 D 5 D 7
D0 D1 D2 D3 D4 D5 D6 D7
X D 4 D5 D 6 D 7
Y D 2 D3 D 6 D 7
Z D1 D 3 D 5 D 7
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ENCODER & DECODER
M=4
M=22
M=2N
‘M’ is the input and
‘N’ is the output
A0
B0
A1
B1
A2 Encoder Decoder
A3 B2
4x2 2x4
B3
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ENCODER & DECODER
M=4
M=22
M=2N
‘M’ is the input and
‘N’ is the output
A0 00
A1 01
A2 10 Encoder Decoder
A3 11 4x2 2x4
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ENCODER & DECODER
M=4
M=22
M=2N
‘M’ is the input and
‘N’ is the output
A0 00
01 1
A1
A2 10 Encoder Decoder
0
A3 11 4x2 2x4
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ENCODER & DECODER
M=4
M=22
M=2N
‘M’ is the input and
‘N’ is the output
A0 00
01 1
A1
A2 10 Encoder Decoder
0 10
A3 11 4x2 2x4
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THANK YOU
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