6N137, HCNW137, HCNW2601, HCNW2611, HCPL-0600,

HCPL-0601, HCPL-0611, HCPL-0630, HCPL-0631, HCPL-0661,

HCPL-2601, HCPL-2611, HCPL-2630, HCPL-2631, HCPL-4661
High CMR, High Speed TTL Compatible Optocouplers

Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product

Description Features
The 6N137, HCPL-26xx/06xx/4661, HCNW137/26x1 are • 15 kV/µs minimum Common Mode Rejection (CMR)
optically coupled gates that combine a GaAsP light emit- at VCM = 1 kV for HCNW2611, HCPL-2611, HCPL-4661,
ting diode and an integrated high gain photo detector. HCPL-0611, HCPL-0661
An enable input allows the detector to be strobed. The • High speed: 10 MBd typical
output of the detector IC is an open collector Schottky- • LSTTL/TTL compatible
clamped transistor. The internal shield provides a guar- • Low input current capability: 5 mA
anteed common mode transient immunity specification • Guaranteed AC and DC performance over temper­
up to 15,000 V/µs at Vcm = 1000 V. ature: -40 °C to +85 °C
This unique design provides maximum AC and DC circuit • Available in 8-Pin DIP, SOIC-8, widebody packages
isolation while achieving TTL compatibility. The optocou- • Strobable output (single channel products only)
pler AC and DC operational param­e­ters are guaranteed
• Safety approval
from -40 °C to +85 °C allowing troublefree system per-
UL recognized - 3750 Vrms for 1 minute and 5000  Vrms*
formance.
for 1 minute per UL1577 CSA approved
Functional Diagram IEC/EN/DIN EN 60747-5-5 approved with  
6N137, HCPL-2601/2611 HCPL-2630/2631/4661 VIORM = 567 Vpeak for 06xx Option 060
HCPL-0600/0601/0611 HCPL-0630/0631/0661
VIORM = 630 Vpeak for 6N137/26xx Option 060  
NC 1 8 V CC ANODE 1 1 8 V CC
VIORM = 1414 Vpeak for HCNW137/26x1
ANODE 2 7 VE CATHODE 1 2 7 V O1
• MIL-PRF-38534 hermetic version available
CATHODE 3 6 VO CATHODE 2 3 6 V O2 (HCPL-56xx/66xx)
NC 4 5 GND ANODE 2 4 5 GND
SHIELD SHIELD Applications
• Isolated line receiver
TRUTH TABLE TRUTH TABLE
(POSITIVE LOGIC) (POSITIVE LOGIC) • Computer-peripheral interfaces
LED ENABLE OUTPUT LED OUTPUT
ON H L ON L • Microprocessor system interfaces
OFF H H OFF H
ON L H • Digital isolation for A/D, D/A conversion
OFF L H • Switching power supply
ON NC L
OFF NC H • Instrument input/output isolation
• Ground loop elimination
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
• Pulse transformer replacement
• Power transistor isolation in motor drives
• Isolation of high speed logic systems

*5000 Vrms/1 Minute rating is for HCNW137/26X1 and Option 020

(6N137, HCPL-2601/11/30/31, HCPL-4661) products only.

CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.

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The 6N137, HCPL-26xx, HCPL-06xx, HCPL-4661, HCNW137,
and HCNW26x1 are suitable for high speed logic interfac-
ing, input/output buffering, as line receivers in environ-
ments that conventional line receivers cannot tolerate
and are recom­mended for use in extremely high ground
or induced noise environments.

Selection Guide
Widebody
Minimum CMR 8-Pin DIP (300 Mil) Small-Outline SO-8 (400 Mil) Hermetic
Input Single
On- Single Dual Single Dual Single and Dual
dV/dt VCM Current
Output Channel Channel Channel Channel Channel Channel
(V/µs) (V) (mA) Enable Package Package Package Package Package Packages
1000 10 5 YES 6N137
5,000 1,000 5 YES HCPL-0600 HCNW137
NO HCPL-2630 HCPL-0630

10,000
1,000 YES HCPL-2601 HCPL-0601 HCNW2601
NO HCPL-2631 HCPL-0631

15,000
1,000 YES HCPL-2611 HCPL-0611 HCNW2611
NO HCPL-4661 HCPL-0661
1,000 50 YES HCPL-2602 [1]

3, 500 300 YES HCPL-2612[1]

1,000 50 3 YES HCPL-261A[1] HCPL-061A[1]
NO HCPL-263A[1] HCPL-063A[1]
1,000[2] 1,000 YES HCPL-261N[1] HCPL-061N[1]
NO HCPL-263N[1] HCPL-063N[1]
1,000 50 12.5 [3]
HCPL-193x[1]
HCPL-56xx[1]
HCPL-66xx[1]

Notes:
1. Technical data are on separate Avago publications.
2. 15 kV/µs with VCM = 1 kV can be achieved using Avago application circuit.
3. Enable is available for single channel products only, except for HCPL-193x devices.

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Ordering Information
HCPL-xxxx is UL Recognized with 3750 Vrms for 1 minute per UL1577.
HCNWxxxx is UL Rcognized with 5000 Vrms for 1 minute per UL1577.
Option UL 5000 Vrms/
Part RoHS Non RoHS Surface Gull Tape & 1 Minute IEC/EN/DIN
Number Compliant Compliant Package Mount Wing Reel Rating EN 60747-5-5 Quantity
-000E No option 50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel

6N137 -020E #020 300mil X 50 per tube

-320E #320 DIP-8 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-560E -560 X X X X 1000 per reel
-000E No option 50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 300mil X 50 per tube
HCPL-2601
-320E #320 DIP-8 X X X 50 per tube
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-360E - X X X 50 per tube
-000E No option 50 per tube
-300E #300 X X 50 per tube
-500E #500 X X X 1000 per reel
-020E #020 X 50 per tube
HCPL-2611 300mil
-320E #320 X X X 50 per tube
DIP-8
-520E #520 X X X X 1000 per reel
-060E #060 X 50 per tube
-360E #360 X X X 50 per tube
-560E #560 X X X X 1000 per reel
-000E No option 50 per tube
-300E #300 X X 50 per tube

HCPL-2630 -500E #500 300mil X X X 1000 per reel

-020E #020 DIP-8 X 50 per tube
-320E #320 X X X 50 per tube
-520E -520 X X X X 1000 per reel
-000E No option 50 per tube
-300E #300 X X 50 per tube

HCPL-2631 -500E #500 300mil X X X 1000 per reel

HCPL-4661 -020E #020 DIP-8 X 50 per tube
-320E #320 X X X 50 per tube
-520E #520 X X X X 1000 per reel

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 Option UL 5000 Vrms/
Part RoHS Non RoHS Surface Gull Tape & 1 Minute IEC/EN/DIN
Number Compliant Compliant Package Mount Wing Reel Rating EN 60747-5-5 Quantity
-000E No option X 100 per tube
HCPL-0600
HCPL-0601 -500E #500 X X 1500 per reel
SO-8
HCPL-0611 -060E #060 X X 100 per tube
-560E #560 X X X 1500 per reel
HCPL-0630 -000E No option X 100 per tube
HCPL-0631 SO-8
-500E #500 X X 1500 per reel
HCPL-0661
-000E No option X X 42 per tube
HCNW137
400 mil
HCNW2601 -300E #300 X X X X 42 per tube
DIP-8
HCNW2611
-500E #500 X X X X X 750 per reel

To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry. Combination of Option 020 and Option 060 is not available.
Example 1:
HCPL-2611-560E to order product of 300mil DIP Gull Wing Surface Mount package in Tape and Reel packag
ing with IEC/EN/DIN EN 60747-5-5 Safety Approval in RoHS compliant.
Example 2:
HCPL-2630 to order product of 300mil DIP package in tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Notes:
The notation ‘#xxx’ is used for existing products, while (new) products launched since July 15, 2001 and RoHS compliant option will use ‘-xxxE‘.

Schematic
HCPL-2630/2631/4661
HCPL-0630/0631/0661
6N137, HCPL-2601/2611 ICC
HCPL-0600/0601/0611 VCC
IF HCNW137, HCNW2601/2611 8
ICC 1 IF1
VCC IO1
2+ 8 + VO1
7
IO
VO VF1
6
–
2
VF SHIELD
–
GND 3 IF2
3 SHIELD 5 IO2
IE 7 – VO2
VE 6
VF2

USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED

+
BETWEEN PINS 5 AND 8 IS RECOMMENDED (SEE NOTE 5).
4
GND
SHIELD 5

6N137 Schematic a

6N137 Schematic b

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Package Outline Drawings
8-pin DIP Package** (6N137, HCPL-2601/11/30/31, HCPL-4661)

9.65 ± 0.25 7.62 ± 0.25

(0.380 ± 0.010) (0.300 ± 0.010)

TYPE NUMBER 8 7 6 5 6.35 ± 0.25

OPTION CODE* (0.250 ± 0.010)
A XXXXZ DATE CODE

YYWW RU

UL
1 2 3 4 RECOGNITION

1.78 (0.070) MAX.

1.19 (0.047) MAX.
+ 0.076
5° TYP. 0.254 - 0.051

3.56 ± 0.13 + 0.003)

4.70 (0.185) MAX. (0.010 - 0.002)
(0.140 ± 0.005)

0.51 (0.020) MIN.

2.92 (0.115) MIN. DIMENSIONS IN MILLIMETERS AND (INCHES).
*MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
1.080 ± 0.320 0.65 (0.025) MAX. "V" = OPTION 060
(0.043 ± 0.013) OPTION NUMBERS 300 AND 500 NOT MARKED.
2.54 ± 0.25
(0.100 ± 0.010) NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
**JEDEC Registered Data (for 6N137 only).

8-pin DIP Package with Gull Wing Surface Mount Option 300
(6N137, HCPL-2601/11/30/31, HCPL-4661)
LAND PATTERN RECOMMENDATION
9.65 ± 0.25 1.016 (0.040)
(0.380 ± 0.010)

8 7 6 5

6.350 ± 0.25 10.9 (0.430)

(0.250 ± 0.010)

1 2 3 4

2.0 (0.080)
1.27 (0.050)

1.780 9.65 ± 0.25

(0.070) (0.380 ± 0.010)
1.19 MAX.
(0.047) 7.62 ± 0.25
MAX. (0.300 ± 0.010) + 0.076
0.254 - 0.051
3.56 ± 0.13 + 0.003)
(0.140 ± 0.005) (0.010 - 0.002)

1.080 ± 0.320
(0.043 ± 0.013) 0.635 ± 0.25
(0.025 ± 0.010)
0.635 ± 0.130 12° NOM.
2.54
(0.100) (0.025 ± 0.005)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.

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Small-Outline SO-8 Package (HCPL-0600/01/11/30/31/61)

LAND PATTERN RECOMMENDATION

8 7 6 5
5.994 ± 0.203
(0.236 ± 0.008)
XXX
3.937 ± 0.127 YWW TYPE NUMBER 7.49 (0.295)
(0.155 ± 0.005) (LAST 3 DIGITS)
DATE CODE
1 2 3 4
PIN ONE 1.9 (0.075)
0.406 ± 0.076
(0.016 ± 0.003) 1.270 BSC
(0.050) 0.64 (0.025)

* 5.080 ± 0.127 7° 0.432

45° X (0.017)
(0.200 ± 0.005)

3.175 ± 0.127
(0.125 ± 0.005) 0 ~ 7° 0.228 ± 0.025
1.524 (0.009 ± 0.001)
(0.060)

0.203 ± 0.102
(0.008 ± 0.004)
* TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH) 0.305 MIN.
5.207 ± 0.254 (0.205 ± 0.010) (0.012)
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.

NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.

8-Pin Widebody DIP Package (HCNW137, HCNW2601/11)

11.23 ± 0.15 11.00 MAX.

(0.442 ± 0.006) (0.433)
9.00 ± 0.15
8 7 6 5
(0.354 ± 0.006)
TYPE NUMBER
A DATE CODE
HCNWXXXX

YYWW

1 2 3 4

10.16 (0.400)
TYP.
1.55
(0.061) 7° TYP.
MAX. + 0.076
0.254 - 0.0051
+ 0.003)
(0.010 - 0.002)
5.10 MAX.
(0.201)

3.10 (0.122)
3.90 (0.154) 0.51 (0.021) MIN.

2.54 (0.100)
TYP.
1.80 ± 0.15 0.40 (0.016)
(0.071 ± 0.006) 0.56 (0.022) DIMENSIONS IN MILLIMETERS (INCHES).

NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.

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8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300
(HCNW137, HCNW2601/11)

11.23 ± 0.15
(0.442 ± 0.006) LAND PATTERN RECOMMENDATION

8 7 6 5

9.00 ± 0.15
(0.354 ± 0.006) 13.56
(0.534)

1 2 3 4

1.3 2.29
(0.051) (0.09)

1.55 12.30 ± 0.30

(0.061) (0.484 ± 0.012)
MAX.
11.00 MAX.
(0.433)

4.00 MAX.
(0.158)

1.80 ± 0.15
(0.071 ± 0.006) 1.00 ± 0.15
0.75 ± 0.25 (0.039 ± 0.006) + 0.076
2.54 0.254 - 0.0051
(0.100) (0.030 ± 0.010)
BSC + 0.003)
(0.010 - 0.002)
DIMENSIONS IN MILLIMETERS (INCHES).
7° NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).

NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.

Reflow Soldering Profile

The recommended reflow soldering conditions are per JEDEC Standard J-STD-020 (latest revision). Non-halide flux
should be used.

Regulatory Information
The 6N137, HCPL-26xx/06xx/46xx, and HCNW137/26xx have been approved by the following organizations:
UL IEC/EN/DIN EN 60747-5-5
Recognized under UL 1577, Component Recognition
Program, File E55361.

CSA
Approved under CSA Component Acceptance Notice
#5, File CA 88324.

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Insulation and Safety Related Specifications
8-pin DIP Widebody
(300 Mil) SO-8 (400 Mil)

Parameter Symbol Value Value Value Unit Conditions
Minimum External L(101) 7.1 4.9 9.6 mm Measured from input terminals
Air Gap to output terminals, shortest
(External Clearance) distance through air.
Minimum External L(102) 7.4 4.8 10.0 mm Measured from input terminals
Tracking to output terminals, shortest
(External Creepage) distance path along body.
Minimum Internal 0.08 0.08 1.0 mm Through insulation distance,
Plastic Gap conductor to conductor, usually
(Internal Clearance) the direct distance between the
photoemitter and photodetector
inside the optocoupler cavity.
Minimum Internal NA NA 4.0 mm Measured from input terminals
Tracking to output terminals, along
(Internal Creepage) internal cavity.
Tracking Resistance CTI 200 200 200 V DIN IEC 112/VDE 0303 Part 1
(Comparative Tracking Index)
Isolation Group IIIa IIIa IIIa Material Group
(DIN VDE 0110, 1/89, Table 1)

Option 300 - surface mount classification is Class A in accordance with CECC 00802.

IEC/EN/DIN EN 60747-5-5 Insulation Characteristics*

(HCPL-06xx Option 060 Only)
Description Symbol Characteristic Unit
Installation classification per DIN VDE 0110, Table 1
  for rated mains voltage ≤ 150 Vrms I-IV
  for rated mains voltage ≤ 300 Vrms I-IV
  for rated mains voltage ≤ 600 Vrms I-III
Climatic Classification 40/85/21
Pollution Degree (DIN VDE 0110/39) 2
Maximum Working Insulation Voltage VIORM 567 V peak
Input-to-Output Test Voltage, Method b*
 VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, VPR 1063 V peak
  Partial Discharge < 5 pC
Input-to-Output Test Voltage, Method a*
 VIORM x 1.6 = VPR, Type and Sample Test, tm = 10 sec, VPR 907 V peak
  Partial Discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 60 sec) VIOTM 6000 V peak
Safety Limiting Values (Maximum values allowed in the event of a failure)
  Case Temperature TS 150 °C
  Input Current** IS,INPUT 150 mA
  Output Power** PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS ≥109 Ω

*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a
detailed description.

Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.

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IEC/EN/DIN EN 60747-5-5 Insulation Characteristics*
(HCPL-26xx; 46xx; 6N13x Option 060 Only)
Description Symbol Characteristic Unit
Installation classification per DIN VDE 0110, Table 1
  for rated mains voltage ≤ 300 Vrms I-IV
  for rated mains voltage ≤ 450 Vrms I-IV
Climatic Classification 40/85/21
Pollution Degree (DIN VDE 0110/39) 2
Maximum Working Insulation Voltage VIORM 630 V peak
Input to Output Test Voltage, Method b*
 VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, VPR 1181 V peak
  Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
 VIORM x 1.6 = VPR, Type and sample test, tm = 10 sec, VPR 1008 V peak
  Partial Discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 60 sec) VIOTM 6000 V peak
Safety Limiting Values (Maximum values allowed in the event of a failure)  
  Case Temperature TS 175 °C
  Input Current IS,INPUT 230 mA
  Output Power PS,OUTPUT 600 mW
Insulation Resistance at TS, VIO = 500 V RS ≥109 Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.

IEC/EN/DIN EN 60747-5-5 Insulation Characteristics*

(HCNW137/2601/2611 Only)
Description Symbol Characteristic Unit
Installation classification per DIN VDE 0110, Table 1
  for rated mains voltage ≤ 600 Vrms I-IV
  for rated mains voltage ≤ 1000 Vrms I-III
Climatic Classification 40/85/21
Pollution Degree (DIN VDE 0110/39) 2
Maximum Working Insulation Voltage VIORM 1414 V peak
Input to Output Test Voltage, Method b*
 VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec, VPR 2651 V peak
  Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
 VIORM x 1.6 = VPR, Type and sample test, tm = 10 sec, VPR 2262 V peak
  Partial Discharge < 5 pC
Highest Allowable Overvoltage
(Transient Overvoltage, tini = 60 sec) VIOTM 8000 V peak
Safety Limiting Values (Maximum values allowed in the event of a failure)
  Case Temperature TS 150 °C
  Input Current IS,INPUT 400 mA
  Output Power PS,OUTPUT 700 mW
Insulation Resistance at TS, VIO = 500 V RS ≥109 Ω
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-5, for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings, which must be ensured by protective circuits in application.

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Absolute Maximum Ratings* (No Derating Required up to 85 °C)
Parameter Symbol Package** Min. Max. Units Note
Storage Temperature TS -55 125 °C
Operating Temperature TA †
-40 85 °C
Average Forward Input Current I F Single 8-Pin DIP 20 mA 2
Single SO-8
Widebody
Dual 8-Pin DIP 15 1, 3
Dual SO-8
Reverse Input Voltage VR 8-Pin DIP, SO-8 5 V 1
Widebody 3
Input Power Dissipation PI Widebody 40 mW
Supply Voltage VCC 7 V
(1 Minute Maximum)
Enable Input Voltage (Not to VE Single 8-Pin DIP VCC + 0.5 V
Exceed VCC by more than Single SO-8
500 mV) Widebody
Enable Input Current IE 5 mA
Output Collector Current IO 50 mA 1
Output Collector Voltage VO 7 V 1
Output Collector Power PO Single 8-Pin DIP 85 mW
Dissipation Single SO-8
Widebody
Dual 8-Pin DIP 60 1, 4
Dual SO-8
Lead Solder Temperature TLS 8-Pin DIP 260 °C for 10 sec.,
(Through Hole Parts Only)             1.6 mm below seating plane
Widebody 260 °C for 10 sec.,
up to seating plane
Solder Reflow Temperature            SO-8 and See Package Outline
Profile (Surface Mount Parts Only) Option 300 Drawings section

*JEDEC Registered Data (for 6N137 only).

**Ratings apply to all devices except otherwise noted in the Package column.
†0 °C to 70 °C on JEDEC Registration.

Recommended Operating Conditions

Parameter Symbol Min. Max. Units
Input Current, Low Level IFL* 0 250 µA
Input Current, High Level[1] IFH** 5 15 mA
Power Supply Voltage VCC 4.5 5.5 V
Low Level Enable Voltage †
VEL 0 0.8 V
High Level Enable Voltage† VEH 2.0 VCC V
Operating Temperature TA -40 85 °C
Fan Out (at RL = 1 kΩ) [1]
N 5 TTL Loads
Output Pull-up Resistor RL 330 4 k Ω
*The off condition can also be guaranteed by ensuring that VFL ≤ 0.8 V.
**The initial switching threshold is 5 mA or less. It is recommended that 6.3 mA to 10 mA be used for best performance and to permit at least a 20%
LED degradation guardband.
†For single channel products only.

10

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Electrical Specifications
Over recommended temperature (TA = -40 °C to +85 °C) unless otherwise specified. All Typicals at VCC = 5 V, TA = 25 °C.
All enable test conditions apply to single channel products only. See note 5.
Parameter Sym. Package Min. Typ. Max. Units   Test Conditions Fig. Note
High Level Output IOH* All 5.5 100 µA VCC = 5.5 V, VE = 2.0 V, 1 1, 6,
Current VO = 5.5 V, IF = 250 mA 19
Input Threshold ITH Single Channel 2.0 5.0 mA VCC = 5.5 V, VE = 2.0 V, 2, 3 19
Current Widebody VO = 0.6 V,

Dual Channel 2.5
I OL
(Sinking) = 13 mA
Low Level Output VOL* 8-Pin DIP 0.35 0.6 V VCC = 5.5 V, VE = 2.0 V, 2, 3, 1, 19
Voltage SO-8 IF = 5 mA, 4, 5
Widebody 0.4 IOL (Sinking) = 13 mA
High Level Supply ICCH Single Channel 7.0 10.0* mA VE = 0.5 V  VCC = 5.5 V 7
Current 6.5 VE = VCC    IF = 0 mA
Dual Channel 10 15 Both
Channels
Low Level Supply ICCL Single Channel 9.0 13.0* mA VE = 0.5 V  VCC = 5.5 V 8
Current 8.5 VE = VCC    IF = 10 mA
Dual Channel 13 21 Both
Channels
High Level Enable IEH Single Channel -0.7 -1.6 mA VCC = 5.5 V, VE = 2.0 V
Current
Low Level Enable IEL* -0.9 -1.6 mA VCC = 5.5 V, VE = 0.5 V 9
Current
High Level Enable VEH 2.0 V 19
Voltage
Low Level Enable VEL 0.8 V
Voltage
Input Forward VF 8-Pin DIP 1.4 1.5 1.75* V TA = 25 °C  IF = 10 mA 6, 7 1
Voltage SO-8 1.3 1.80
Widebody 1.25 1.64 1.85 TA = 25 °C
1.2 2.05
Input Reverse BVR* 8-Pin DIP 5 V IR = 10 μA 1
Breakdown SO-8
Voltage Widebody 3 IR = 100 μA, TA = 25°C
Input Diode DVF / 8-Pin DIP -1.6 mV/°C
IF = 10 mA 7 1
Temperature ∆TA SO-8
Coefficient Widebody -1.9
Input Capacitance CIN 8-Pin DIP 60 pF f = 1 MHz, VF = 0 V 1
SO-8
Widebody 70

*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to +70 °C. Avago specifies -40 °C to +85 °C.

11

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Switching Specifications (AC)
Over Recommended Temperature (TA = -40 °C to +85 °C), VCC = 5 V, IF = 7.5 mA unless otherwise specified.
All Typicals at TA = 25 °C, VCC = 5 V.
Parameter Sym. Package** Min. Typ. Max. Units   Test Conditions Fig. Note
Propagation Delay tPLH 20 48 75* ns TA = 25°C  RL = 350 Ω 8, 9, 1, 10,
Time to High 100        CL = 15 pF 10 19
Output Level
Propagation Delay tPHL 25 50 75* ns TA = 25°C 1, 11,
Time to Low 100 19
Output Level
Pulse Width |tPHL - tPLH| 8-Pin DIP 3.5 35 ns 8, 9, 13, 19
Distortion SO-8 10,
Widebody 40 11
Propagation Delay tPSK 40 ns 12, 13,
Skew 19
Output Rise tr 24 ns 12 1, 19
Time (10-90%)
Output Fall tf 10 ns 12 1, 19
Time (90-10%)
Propagation Delay tELH Single Channel 30 ns RL = 350 Ω, 13, 14
Time of Enable CL = 15 pF, 14
from VEH to VEL VEL = 0 V, VEH = 3 V
Propagation Delay tEHL Single Channel 20 ns 15
Time of Enable
from VEL to VEH

*JEDEC registered data for the 6N137.

**Ratings apply to all devices except otherwise noted in the Package column.

Parameter Sym.    Device Min. Typ. Units       

Test Conditions Fig. Note
Logic High |CMH| 6N137 1,000 10,000 V/µs |VCM| = 10 V VCC = 5 V, IF = 0 mA, 15 1, 16,
Common HCPL-2630 5,000 10,000 |VCM| = 1 kV VO(MIN) = 2 V, 18, 19
Mode HCPL-0600/0630 RL = 350 Ω, TA = 25 °C
Transient HCNW137
Immunity HCPL-2601/2631 10,000 15,000 |VCM| = 1 kV
HCPL-0601/0631
HCNW2601
HCPL-2611/4661 15,000 25,000 |VCM| = 1 kV
HCPL-0611/0661
HCNW2611
Logic Low |CML| 6N137 1,000 10,000 V/µs |VCM| = 10 V VCC = 5 V, IF = 7.5 mA, 15 1, 17,
Common HCPL-2630 5,000 10,000 |VCM| = 1 kV VO(MAX) = 0.8 V, 18, 19
Mode HCPL-0600/0630 RL = 350 Ω, TA = 25°C
Transient HCNW137
Immunity HCPL-2601/2631 10,000 15,000 |VCM| = 1 kV
HCPL-0601/0631
HCNW2601
HCPL-2611/4661 15,000 25,000 |VCM| = 1 kV
HCPL-0611/0661
HCNW2611

12

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Package Characteristics
All Typicals at TA = 25 °C.
Parameter Sym.  Package Min. Typ. Max. Units    Test Conditions Fig. Note
Input-Output II-O* Single 8-Pin DIP 1 µA 45% RH, t = 5 s, 20, 21
Insulation Single SO-8 VI-O = 3 kV dc, TA = 25 °C
Input-Output VISO 8-Pin DIP, SO-8 3750 V rms RH ≤ 50%, t = 1 min, 20, 21
Momentary With- Widebody 5000 TA = 25 °C 20, 22
stand Voltage** OPT 020† 5000
Input-Output RI-O 8-Pin DIP, SO-8 1012 Ω VI-O = 500 Vdc 1, 20,
Resistance Widebody 10 1013 TA = 25 °C
12
23
1011 TA = 100 °C
Input-Output CI-O 8-Pin DIP, SO-8 0.6 pF f = 1 MHz, TA = 25 °C 1, 20,
Capacitance Widebody 0.5 0.6 23
Input-Input II-I Dual Channel 0.005 µA RH ≤ 45%, t = 5 s, 24
Insulation VI-I = 500 V
Leakage Current
Resistance RI-I Dual Channel 1011 Ω 24
(Input-Input)
Capacitance CI-I Dual 8-Pin DIP 0.03 pF f = 1 MHz 24
(Input-Input) Dual SO-8 0.25

*JEDEC registered data for the 6N137. The JEDEC Registration specifies 0 °C to 70 °C. Avago specifies -40 °C to 85 °C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous volt-
age rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable), your equipment
level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
†For 6N137, HCPL-2601/2611/2630/2631/4661 only.

Notes:
  1. Each channel.
  2. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 20 mA.
  3. Peaking circuits may produce transient input currents up to 50 mA, 50 ns maximum pulse width, provided average current does not exceed 15 mA.
  4. Derate linearly above 80 °C free-air temperature at a rate of 2.7 mW/°C for the SOIC-8 package.
  5. Bypassing of the power supply line is required, with a 0.1 µF ceramic disc capacitor adjacent to each optocoupler as illustrated in Figure 17. Total
lead length between both ends of the capacitor and the isolator pins should not exceed 20 mm.
  6. The JEDEC registration for the 6N137 specifies a maximum IOH of 250 µA. Avago guarantees a maximum IOH of 100 µA.
  7. The JEDEC registration for the 6N137 specifies a maximum ICCH of 15 mA. Avago guarantees a maximum ICCH of 10 mA.
  8. The JEDEC registration for the 6N137 specifies a maximum ICCL of 18 mA. Avago guarantees a maximum ICCL of 13 mA.
  9. The JEDEC registration for the 6N137 specifies a maximum IEL of –2.0 mA. Avago guarantees a maximum IEL of -1.6 mA.
10. The tPLH propagation delay is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the
output pulse.
11. The tPHL propagation delay is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the
output pulse.
12. tPSK is equal to the worst case difference in tPHL and/or tPLH that will be seen between units at any given temperature and specified test conditions.
13. See application section titled “Propagation Delay, Pulse-Width Distortion and Propagation Delay Skew” for more information.
14. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge
of the output pulse.
15. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge
of the output pulse.
16. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V).
17. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V).
18. For sinusoidal voltages, (|dVCM | / dt)max = πfCMVCM(p-p).
19. No external pull up is required for a high logic state on the enable input. If the VE pin is not used, tying VE to VCC will result in improved CMR
performance. For single channel products only.
20. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
21. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 Vrms for one second (leakage detection
current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-5 Insulation Characteristics Table, if applicable.
22. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for one second (leakage detection
current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-
5-5 Insulation Characteristics Table, if applicable.
23. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together. For dual channel products only.
24. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. For dual channel products only

13

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 8-PIN DIP, SO-8 WIDEBODY
IOH – HIGH LEVEL OUTPUT CURRENT – µA

15 6 6
VCC = 5.5 V VCC = 5 V VCC = 5 V
VO = 5.5 V TA = 25 °C TA = 25 °C
5 5

VO – OUTPUT VOLTAGE – V
VO – OUTPUT VOLTAGE – V
VE = 2.0 V*
IF = 250 µA
10 4 4
* FOR SINGLE RL = 350 Ω
RL = 350 Ω
CHANNEL
PRODUCTS 3 3
ONLY RL = 1 KΩ RL = 1 KΩ
5 2 2
RL = 4 KΩ RL = 4 KΩ

1 1

0 0 0
-60 -40 -20 0 20 40 60 80 100 0 1 2 3 4 5 6 0 1 2 3 4 5 6
TA – TEMPERATURE – °C IF – FORWARD INPUT CURRENT – mA IF – FORWARD INPUT CURRENT – mA

Figure 1. Typical high level output current vs. Figure 2. Typical output voltage vs. forward input current
temperature

8-PIN DIP, SO-8 WIDEBODY

ITH – INPUT THRESHOLD CURRENT – mA
ITH – INPUT THRESHOLD CURRENT – mA

6 6
VCC = 5.0 V VCC = 5.0 V
VO = 0.6 V VO = 0.6 V
5 5

4 4
RL = 350 Ω
3 3
RL = 1 KΩ RL = 350 Ω
RL = 1 KΩ
2 2

1 1
RL = 4 KΩ RL = 4 KΩ
0 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100

TA – TEMPERATURE – °C TA – TEMPERATURE – °C

Figure 3. Typical input threshold current vs. temperature

14

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 8-PIN DIP, SO-8 WIDEBODY

IOL – LOW LEVEL OUTPUT CURRENT – mA

VOL – LOW LEVEL OUTPUT VOLTAGE – V

VOL – LOW LEVEL OUTPUT VOLTAGE – V

0.8 0.8 70
VCC = 5.5 V * FOR SINGLE VCC = 5.5 V VCC = 5.0 V * FOR SINGLE
0.7 VE = 2.0 V* CHANNEL 0.7 VE = 2.0 V VE = 2.0 V* CHANNEL
IF = 5.0 mA PRODUCTS ONLY IF = 5.0 mA VOL = 0.6 V PRODUCTS ONLY
0.6 0.6 60
IO = 16 mA
0.5 0.5 IF = 10-15 mA
IO = 16 mA IO = 12.8 mA IO = 12.8 mA
0.4 0.4 50

0.3 0.3
IO = 9.6 mA IO = 6.4 mA
IO = 9.6 mA IF = 5.0 mA
0.2 IO = 6.4 mA 0.2 40

0.1 0.1
0 0 20
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100

TA – TEMPERATURE – °C TA – TEMPERATURE – °C TA – TEMPERATURE – °C

Figure 4. Typical low level output voltage vs. temperature Figure 5. Typical low level output current vs.
temperature

8-PIN DIP, SO-8 WIDEBODY

1000 1000
TA = 25 °C TA = 25 oC
IF - FORWARD CURRENT - mA
IF – FORWARD CURRENT – mA

100 100
IF IF
+ +
10 VF 10 VF
– -

1.0 1.0

0.1 0.1

0.01 0.01

0.001 0.001
1.1 1.2 1.3 1.4 1.5 1.6 1.2 1.3 1.4 1.5 1.6 1.7
VF – FORWARD VOLTAGE – V VF - FORWARD VOLTAGE - V

Figure 6. Typical input diode forward characteristic

8-PIN DIP, SO-8 WIDEBODY

-2.4 -2.3
TEMPERATURE COEFFICIENT – mV/°C
TEMPERATURE COEFFICIENT – mV/°C

dVF/dT – FORWARD VOLTAGE

dVF/dT – FORWARD VOLTAGE

-2.2
-2.2

-2.0
-2.1
-1.8
-2.0
-1.6

-1.9
-1.4

-1.2 -1.8
0.1 1 10 100 0.1 1 10 100

IF – PULSE INPUT CURRENT – mA IF – PULSE INPUT CURRENT – mA

Figure 7. Typical temperature coefficient of forward voltage vs. input current

15

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 PULSE GEN.
Z O = 50 Ω
t f = t r = 5 ns
SINGLE CHANNEL +5 V DUAL CHANNEL +5 V
IF
IF
PULSE GEN. 1 VCC 8 1 VCC 8
ZO = 50 Ω
t f = t r = 5 ns RL
0.1µF INPUT OUTPUT VO
2 7 BYPASS RL MONITORING 2 7 MONITORING
NODE NODE
INPUT OUTPUT VO 0.1µF
MONITORING 3 6 MONITORING 3 6 BYPASS
NODE *CL NODE
RM CL*
RM 4 4
5 5
GND GND

*CL IS APPROXIMATELY 15 pF WHICH INCLUDES

PROBE AND STRAY WIRING CAPACITANCE.

IF = 7.50 mA
INPUT
IF IF = 3.75 mA

t PHL t PLH

OUTPUT
VO 1.5 V

Figure 8. Test circuit for tPHL and tPLH

100 105
VCC = 5.0 V VCC = 5.0 V
IF = 7.5 mA
tP – PROPAGATION DELAY – ns

TA = 25°C
tP – PROPAGATION DELAY – ns

80 tPLH , RL = 4 KΩ 90 tPLH , RL = 4 KΩ
tPHL , RL = 350 Ω
1 KΩ
60 4 KΩ 75

tPLH , RL = 350 Ω
40 tPLH , RL = 1 KΩ 60
tPLH , RL = 1 KΩ
tPLH , RL = 350 Ω
20 45
tPHL , RL = 350 Ω
1 KΩ
0 4 KΩ
30
-60 -40 -20 0 20 40 60 80 100 5 7 9 11 13 15

TA – TEMPERATURE – °C IF – PULSE INPUT CURRENT – mA

Figure 9. Typical propagation delay vs. tem- Figure 10. Typical propagation delay vs. pulse
perature input current

40
PWD - PULSE WIDTH DISTORTION - ns

VCC = 5.0 V tRISE

RL = 4 kΩ IF = 7.5 mA tFALL
tr, tf – RISE, FALL TIME – ns

30
VCC = 5.0 V
IF = 7.5 mA 300 RL = 4 kΩ
20 290
60
RL = 350Ω RL = 1 kΩ
10
40

0 RL = 350 Ω
20
RL = 1 kΩ
RL = 350 Ω, 1 kΩ, 4 kΩ
-10 0
-60 -40 -20 0 20 40 60 80 100 -60 -40 -20 0 20 40 60 80 100

TA - TEMPERATURE - oC TA – TEMPERATURE – °C

Figure 11. Typical pulse width distortion vs. Figure 12. Typical rise and fall time vs. tempera-
temperature ture

16

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 PULSE GEN.
Z O = 50 Ω
t f = t r = 5 ns
INPUT VE
MONITORING NODE

+5 V

1 VCC 8 3.0 V
INPUT
VE 1.5 V
7.5 mA 0.1 µF RL
IF 2 7 BYPASS
t EHL t ELH
OUTPUT VO
3 6 MONITORING OUTPUT
NODE VO 1.5 V
*C L
4 5
GND
*C L IS APPROXIMATELY 15 pF WHICH INCLUDES
PROBE AND STRAY WIRING CAPACITANCE.

Figure 13. Test circuit for tEHL and tELH

120
tE – ENABLE PROPAGATION DELAY – ns

VCC = 5.0 V
VEH = 3.0 V
VEL = 0 V
90 IF = 7.5 mA
tELH, RL = 4 kΩ

60
tELH, RL = 1 kΩ

30
tELH, RL = 350 Ω

tEHL, RL = 350 Ω, 1 kΩ, 4 kΩ

0
-60 -40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C

Figure 14. Typical enable propagation delay vs.

temperature

IF
SINGLE CHANNEL DUAL CHANNEL
IF B
1 VCC 8 +5 V 1 VCC 8 +5 V
A
B RL
0.1 µF OUTPUT VO
2 7 BYPASS RL 2 7 MONITORING
A
VFF NODE
OUTPUT VO
VFF MONITORING 0.1 µF
3 6 3 6
NODE BYPASS
GND GND
4 5 4 5

VCM VCM
+ – + –
PULSE PULSE
GENERATOR GENERATOR
Z O = 50 Ω Z O = 50 Ω
VCM (PEAK)
VCM
0V
SWITCH AT A: IF = 0 mA
5V CMH
VO
VO (MIN.)
SWITCH AT B: IF = 7.5 mA
VO (MAX.)
VO
0.5 V CML

Figure 15. Test circuit for common mode transient immunity and typical waveforms

17

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 HCPL-2611 OPTION 060 HCNWXXXX
OUTPUT POWER – PS, INPUT CURRENT – IS

OUTPUT POWER – PS, INPUT CURRENT – IS

800
PS (mW) PS (mW)
700 IS (mA) IS (mA)
800
600
700
500
600
400 500

300 400
300
200
200
100
100
0 0
0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175
TS – CASE TEMPERATURE – °C TS – CASE TEMPERATURE – °C

Figure 16. Thermal derating curve, dependence of safety limiting value with case temperature per IEC/EN/DIN EN 60747-5-5

GND BUS (BACK)

VCC BUS (FRONT)

NC

ENABLE
0.1µF

NC OUTPUT

10 mm MAX. SINGLE CHANNEL

(SEE NOTE 5) DEVICE ILLUSTRATED.

Figure 17. Recommended printed circuit board layout

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 SINGLE CHANNEL DEVICE

VCC1 5V 8 5V
VCC2

470 Ω 390 Ω
IF 2 6
+
D1*
VF 0.1 µF
BYPASS
– 3 5
GND 1 GND 2
SHIELD VE 7
1 2

*DIODE D1 (1N916 OR EQUIVALENT) IS NOT REQUIRED FOR UNITS WITH OPEN COLLECTOR OUTPUT.

DUAL CHANNEL DEVICE

CHANNEL 1 SHOWN

VCC1 5 V 8 5V
VCC2

470 Ω 390 Ω
IF
1 7
+
D1*
VF 0.1 µF
BYPASS
– 2 5
GND 1 GND 2
SHIELD
1 2

Figure 18. Recommended TTL/LSTTL to TTL/LSTTL interface circuit

19

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Propagation Delay, Pulse-Width Distortion and Propagation
Delay Skew
Propagation delay is a figure of merit which describes puts of a group of optocouplers are switched either ON
how quickly a logic signal propagates through a sys- or OFF at the same time, tPSK is the difference between
tem. The propaga­tion delay from low to high (tPLH) is the the shortest propagation delay, either tPLH or tPHL, and the
amount of time required for an input signal to propagate longest propagation delay, either tPLH or tPHL.
to the output, causing the output to change from low to
As mentioned earlier, tPSK can determine the maximum
high. Similarly, the propagation delay from high to low
parallel data transmission rate. Figure 20 is the timing
(tPHL) is the amount of time required for the input signal
diagram of a typical parallel data application with both
to propagate to the output causing the output to change
the clock and the data lines being sent through opto-
from high to low (see Figure 8).
couplers. The figure shows data and clock signals at the
Pulse-width distortion (PWD) results when tPLH and tPHL inputs and outputs of the optocouplers. To obtain the
differ in value. PWD is defined as the difference be- maximum data transmission rate, both edges of the
tween tPLH and tPHL and often determines the maximum clock signal are being used to clock the data; if only one
data rate capa­bil­ity of a transmission system. PWD can edge were used, the clock signal would need to be twice
be expressed in percent by dividing the PWD (in ns) by as fast.
the minimum pulse width (in ns) being transmitted. Typi-
Propagation delay skew repre­sents the uncertainty of
cally, PWD on the order of 20-30% of the minimum pulse
where an edge might be after being sent through an
width is tolerable; the exact figure depends on the par-
opto­coupler. Figure 20 shows that there will be uncer-
ticular application (RS232, RS422, T-l, etc.).
tainty in both the data and the clock lines. It is important
Propagation delay skew, tPSK, is an important parameter to that these two areas of uncertainty not overlap, other-
consider in parallel data appli­ca­tions where synchroniza­ wise the clock signal might arrive before all of the data
tion of signals on parallel data lines is a concern. If the outputs have settled, or some of the data outputs may
parallel data is being sent through a group of optocou- start to change before the clock signal has arrived. From
plers, differ­ences in propagation delays will cause the these considera­tions, the absolute minimum pulse width
data to arrive at the outputs of the optocouplers at differ- that can be sent through optocouplers in a parallel appli-
ent times. If this difference in propagation delays is large cation is twice tPSK. A cautious design should use a slightly
enough, it will determine the maximum rate at which longer pulse width to ensure that any additional uncer-
parallel data can be sent through the optocouplers. tainty in the rest of the circuit does not cause a problem.
Propagation delay skew is defined as the difference be- The tPSK specified optocouplers offer the advantages of
tween the minimum and maximum propagation delays, guaranteed specifications for propagation delays, pulse-
either tPLH or tPHL, for any given group of optocouplers width distortion and propagation delay skew over the
which are operating under the same conditions (i.e., the recom­mended temper­a­ture, input current, and power
same drive current, supply voltage, output load, and op- supply ranges.
erating tempera­ture). As illustrated in Figure 19, if the in-

DATA

IF 50% INPUTS

CLOCK
VO 1.5 V

IF 50%
DATA

OUTPUTS t PSK
VO 1.5 V
CLOCK
t PSK

t PSK

Figure 19. Illustration of propagation delay skew - tPSK Figure 20. Parallel data transmission example

20

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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes AV02-0170EN
AV02-0940EN - April 16, 2013

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