Aj_Scope2 Version 1.

Aj_Scope2

Technical Manual

www.ajoyraman.in
 Aj_Scope2 Technical Manual

1. Introduction:

This is a brief manual containing relevant technical data required for understanding
construction and use of the Aj_Scope2 unit.

This unit is designed as a ‘Do-It-Yourself’ (DIY) teaching aid for budding engineers,
electronic enthusiasts and hobbyists.

This USB connected unit implements a microcontroller based 2-Channel Oscilloscope

providing continuous sampling rates up to 500 ksps extending to 20 Msps using
equivalent time sampling (ETS). Common DSO features such as XY-mode, spectrum
analysis, waveform capture and data saving are provided. The input range is ± 12.5V
with additional gain settings of X2 and X5. Trigger and sweep options are also
provided.

2. Warning & Disclaimer:

All content provided in this document is for informational purposes only. The owner of
this document makes no representations as to the accuracy or completeness of any
information. The owner will not be liable for any errors or omissions in this information.
The owner will not be liable for any losses, injuries, or damages from the display or use
of this information including software.

3. Specifications

Input
No of Channels Two
Analog bandwidth (Large Signal) 0.30/0.30/0.70 MHz For Gain 1/2/5
Analog bandwidth (Small Signal) 12/6/7 MHz For Gain 1/2/5
Input impedance 1 Meg Ohm
Input connection 3 mm Audio Jack
Vertical Scale Offset
+12.5V to -12.5V +7.50V to -12.50V Gain 1
+6.25V to - 6.25V -6.25V to +13.75V Gain 2
+2.50V to -2.50V -2.50V to +17.50V Gain 5

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 Aj_Scope2 Technical Manual

Sampling Rate
1 Mbps to 20 Mbps 1 uses/sample to ETS Mode
0.05usec/sample (repetitive signals)
10bps to 500 kbps 100ms/sample to Normal Mode
2uses/sample
Trigger Ch1 / Ch2 / Auto
Trigger Polarity Rising / Falling edge
Trigger Range +12.5V to -12.5V Gain 1
+6.25V to - 6.25V Gain 2
+2.50V to -2.50V Gain 5
Display Modes Ch1 + Ch2 vs. time 200 Samples each
Ch1 vs. time 200 Samples
Ch2 vs. time 200 Samples
XY Ch1 + Ch2 vs. time 200 Samples each
DFT Ch1 400 Samples
DFT Ch2 400 Samples
Capture Modes Single / Repeat / Store
Save Modes Data to CSV Fig to multiple formats
PC Software VB.Net 2.0 / Virtual Com Port
Python 2.6/2.7 115200 bps
Power Supply USB +5V , 150 mA

4. Block Schematic and Function Description

VDD VDD

+5V
SERIAL I/O
PC USB PORT

D- FT232R dsPIC30F2020
USB-INTERFACE DATA ACQUISITION BUSY LED
D+ ADC COMP ADC COMP

VDD VDD
GND

MCP6S22 MCP6S22
SPI
PGA PGA
CH1 IN

GND

CH2 IN

GND

Figure 1, Aj_Scope2 simplified block schematic

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 Aj_Scope2 Technical Manual

Figure 1 shows the simplified block schematic of the system. For ease of portability the
unit is powered and controlled from the USB port of a PC.

The configuration is optimized so that only four integrated circuits all operating on a
single +5V supply are required to provide the full functionality of this Digital Storage
Oscilloscope.

The FT232R from FDTI is a USB to serial UART interface with advanced features
providing:

• A single chip USB to asynchronous serial data transfer interface.

• With the entire USB protocol handled on the chip.
• A fully integrated 1024 bit EEPROM storing device descriptors and CBUS I/O
configuration.
• With fully integrated USB termination resistors.
• A fully integrated clock generation with no external crystal required
• Output selection enabling glue-less interface to external MCU or FPGA.
• And data transfer rates from 300 baud to 3 Mega baud

This chip provides a minimum component count USB-Serial interface and is used to
communicate with the host PC for enumeration as a USB to UART device setting up
the Aj_Scope2 as a 200mA device and acts as the USB communication interface.

The MCP6S22 devices are digitally controlled Programmable Gain Amplifiers (PGA)
with high bandwidth and high input impedance controlled through a Serial-Peripheral-
Interface (SPI). These devices provide the input interface between the dsPIC18F14K50
and dsPIC30F2020 and the external analog signals being monitored.
The first PIC microcontroller implements the following functions:

The dsPIC30F2020 microcontroller implements the main Oscilloscope Functions.

• Analog to Digital conversion of the CH1 and CH2 signal conditioned inputs at the
required sampling rates
• Trigger interrupt handling
• Responding to serial commands from PC and sending back the acquired data.
• A Busy signal is also generated

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 Aj_Scope2 Technical Manual

The dsPIC30F2020 microcontroller is ideally suited to this task as it permits

simultaneous 2-channel A/D conversion at rates up to 1Msps, has internal comparators
which can handle the trigger functionality, provide PWM outputs which are used to set
the input offset voltages and a SPI interface for controlling the PGAs.

5. Software on the PC Host:

Both Microsoft Windows and Linux based GUI software have been developed to
interface with the Aj_Scope2 via the USB port of a PC.

Visual Basic .Net Microsoft Windows Application Code

Figure 2, Aj_Scope2 Icon MS Windows

A Visual Basic .Net 2.0 based GUI program is used to control the functions of the
Aj_Scope2. An Aj_Scope.exe along with associated ZedGraph.dll and FTDI USB driver
files has been tested for compatibility with Windows XP and Windows 7 with .Net 2.0.

* The FDTI VCP drivers can be downloaded from www.ftdichip.com/

Open Source Python Cross-Platform Application Code

Alternatively a Python based GUI program can be used to control the functions of the
Aj_Scope2. An Aj_Scope.pyc python executable bit code provides a cross-platform
application which has been tested using Python 2.7 on Windows XP and Windows 7
and on Debian 6.0 (“squeeze”) and Debian 7.0 (“wheezy”) using Python 2.6 and
Python 2.7 respectively.

With the following packages:

Tkinter, ttk, serial, glob, math, time, csv, numpy and matplotlib

*On Linux systems appropriate ‘chmod’ commands need to be executed as root for
giving users permission to access the VCP port which is typically /dev/ttyUSB0

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 Aj_Scope2 Technical Manual

GUI VB.Net 2.0:

Figure 3, GUI

The GUI based Windows software on the Host PC permits checking for available COM
ports and connecting to the port on which the hardware is connected. Once connected
the hardware unit responds with a ready signal.

Display and trigger modes, sampling rate, channel gains, channel offset trigger offset
and number of samples can be set using the simple controls.

The RUN button initiates the signal capture single, repetitive or over-plotted.

Initially signals can be acquired in auto / single mode after with suitable changes can be
made in the gain and offsets and a trigger level set. Repeat mode can now be used for
continuous display of the signals. Display of Ch1/Ch2 is possible with trigger by either
Ch1 or Ch2.

Finally an EXIT button is provided to close the program and exit.

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 Aj_Scope2 Technical Manual

Figure 4, Mouse cursor data display

Values of data at the mouse cursor are automatically displayed.

The waveform caption can be entered and the figure stored as an image file.

Figure 5, Image zoom, copy, print and save modes

Data can be stored in a .csv file using the SAVE option. Further processing can be
carried out in MS EXCEL.

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 Aj_Scope2 Technical Manual

Figure 6, Plot in EXCEL based on saved data

A DFT (discrete furrier transform) can be carried out to show the frequency spectrum of
captured waveforms.

Figure 7, Spectrum Display

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 Aj_Scope2 Technical Manual

GUI PYTHON on DEBIAN ‘Lenny’:

Figure 8, GUI Python

Figure 9, Curser Display

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 Aj_Scope2 Technical Manual

The cursor is toggled on/off with the right mouse button and the cursor choice toggled
red/blue using the mouse left button. The parameter values are displayed on the top
right-hand corner of the display.

Figure 10 Image zoom, pan and save modes

Image zoom, pan and save mode are provided by the Python Tkinter Toolbar.

Figure 11, Plot in Debian Gnumeric based on saved .csv data

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 Aj_Scope2 Technical Manual

Figure 12, XY Plot

Figure 13, DFT Spectrum Plot

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 Aj_Scope2 Technical Manual

6. Aj_Scope2 Unit:

Figure 14, Showing Aj_Scope2 Unit

In order to economize on the cost of an enclosure while still providing an aesthetic unit
the Aj_Scope2 is enclosed in a large size cardboard matchbox enclosure.

The USB connection to the PC is on one end while the Audio-Jack for the signals to be
monitored is on the other.

A ‘Busy’ LED is provided on one corner at the top and a ‘Reset’ switch is provided
diagonally opposite.

The ‘Reset’ switch provides a restart of the micro-controller is the worst-case of hang-
up. This typically occurs when the operator selects a trigger threshold which is out of
limits with respect to the waveform being observed. If the Aj_Scope2 is operated
correctly this switch is seldom used.

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 Aj_Scope2 Technical Manual

7. Circuit Diagrams:

The circuit of the Aj_Scope2 has been optimized for the minimum components
meeting the overall system requirements. The details of each circuit are as follows:

7.1 USB Interface

+5V +5V +5V

U2
FT232R

20

TO MICRO-CONTROLLER
VCC

VCC
CON1
U1RX
TO PC

1 16 1
2 USBMINUS TXD
3
4 15 5
USBPLUS RXD

USB-B U1TX
17 14
3V3 OUT CBUS3

C8
AGND
TEST

GND

GND

0.1uF GND
26

25

21

18

Figure 15, Showing USB Interface

The FDTI FT232R forms a single chip minimum component count interface between
the PC USB port and the micro-controller serial-link Rx-Data and Tx-Data pins. As
all the circuitry in self contained only one capacitor C8 needs to be added for the
3.3V generation.

Power to the rest of the circuitry is fed from the USB connector.

On connection to the PC USB port , the device is enumerated as a Virtual Com Port
(VCP) and the corresponding drivers are loaded by the OS. As the Aj_Scope2
draws approximately 150mA the device has been programmed to indicate a 200mA
device.

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 Aj_Scope2 Technical Manual

7.2 Input Analog Interface

VCC

8
U3

VCC
C9 27pF AN0
2 1
CH0 VOUT
R1
3 7 1K
CH1 SCK SCLK
CH1 IN R2 6
R3 SDI SDATA
820K
100K 5 R4 CMP3

GND
CS CS1 1K

C10
100pF R7
MCP6S22

4
CH1 RET 100K
R8 R9

2.2K 3.3K
C14 OC1
1.0uF C15
0.1uF

Figure 16, Showing the Analog Input Interface for Ch1 (duplicated for Ch2)

An input potential divider with a ratio 4:1 is formed by resistors

R2: (R3+R7+R8+R9), 820k: 205k. The input impedance of this divider is
therefore 1.025 Meg Ohm. Capacitors C9 and C10 are added so as to
compensate for any input capacitance of the MCP6S22.

OC1 a PWM output of the micro-controller is filtered in tow stages by R9/C15

and R8/C14 and produces a DC offset voltage at the junction of R7/R8 based on
the duty cycle of the PWM. This offset voltage is initialized to produce a fixed
VDD/2 voltage at the output of the MCP6S22 which is then changed by the Ch1
offset voltage slider around this value. The PWM voltage is suitably adjusted for
different gain settings.

The MCP6S22 is connected to the micro-controller through an SPI interface in

order to setup the gain values 1/2/5.

VOUT at Pin 1 of the MCP6S22 is fed as an analog input to the microcontroller

within a working range 0-VDD. This output is potential divided by 2 using R1/R4
and fed as an input to the internal comparator CMP3 of the microcontroller. This
voltage is used for the trigger function.

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 Aj_Scope2 Technical Manual

7.3 Processor Circuit

+5V

SW1
RESET R5 R6
10K 150
C11

C12 0.1uf C13

13

20

28
0.1uf U4 47uf
1

VDD

VDD

AVDD
MCLR
CH1
2 12
AN0 U1ARX U1RX
3 11
AN1 U1ATX U1TX
CH2 4 9 C16 22pf
AN2 OSC1
VREF
5
AN3 Y1 16MHz

dsPIC30F2020
CH1/2
6 10
CMP3A OSC2
C18 22pf
7 22
CMP3B RE4
CH2/2 R17
26 21
SCLK RE0 RE5 150
25 15
SDATA RE1 OC1 OC1
24 14
CS1 RE2 OC2 OC2 D1
23 18 LED
CS2 RE3 PGC
AVSS

16 17
VSS

VSS

RA9 PGD
19

27
8

Figure 16a, Showing the Processor Circuit

The dsPic30F2020 is powered from the USB bus. A reset switch is provided at the
MCLR pin.

A 16MHz crystal is connected across OSC1/OSC2 and sets up the processor clock.

RE0 to RE3 form the SPI interface to the two PGAs.

OC1 and OC2 for the PWM signals setting the offset voltages for Ch1 and Ch2. U1ARX
and U1ATX are connected to the USB to Serial converter FT232R.

A Vref of 3V is connected to the analog inputs AN2/AN3 and is used to compensate for
ADC scale-factor change with variation in VDD.

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 Aj_Scope2 Technical Manual

Finally the PGA outputs are connected to AN0/AN1 and CMP3A/CMP3B.

Under software control the microcontroller A/D converts the Ch1/Ch2 inputs at fixed
intervals and stores them in internal memory before transferring them to the host PC.

When not in auto mode the start of the conversion sequence is determined by
comparing an internally generated trigger reference voltage with the voltages at
CMP3A/CMP3B.

LED D1 flashes during the initialization and acquisition process indicating that the
processor is busy. No commands are initiated during this phase.

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 Aj_Scope2 Technical Manual

7.4 Overall Circuit

+5V +5V +5V
+5V

U1 U2
LM1117

20
4
3 2

VCC

VCC
VIN VOUT VREF CON1

ADJ
C1 C2 C3 C4 C5 C6 C7 1 16 1
U1RX TXD USBMINUS 2
3

FT232R
100uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF 0.1uF
5 15 4

1
U1TX RXD USBPLUS
+5V
14 17 USB-B
CBUS3 3V3 OUT

AGND

TEST
U3 C8

GND

GND

GND
VCC
C9 27pF 0.1uF
2 1
CH0 VOUT

18

21

25

26
7
R1
3 7 1K
CH1 SCK SCLK
R2 6
R3 SDI SDATA
820K +5V
100K 5 R4

GND
CON2 CS CS1 1K
SW1
1 C10 RESET R6
2 R5
100pF R7
MCP6S22
4
3 10K 150
100K C11
4
5 R8 R9 C13
C12 0.1uf
OC1

13

20

28
2.2K 3.3K 0.1uf U4 47uf
C14
JACK 1.0uF C15 1

VDD

VDD

AVDD
0.1uF MCLR
+5V 2 12
AN0 U1ARX U1RX
3 11
AN1 U1ATX U1TX
C16 22pf
8

U5 4 9
AN2 OSC1
VCC

C17 VREF

dsPIC30F2020
27pF 5
AN3 Y1 16MHz
2 1
CH0 VOUT 6 10
R10 CMP3A OSC2
C18 22pf
3 7 1K 7 22
CH1 SCK SCLK CMP3B RE4
R11 6 26 21 R17
R12 SDI SDATA SCLK RE0 RE5 150
820K
100K 5 R13 25 15
GND

CS CS2 SDATA RE1 OC1 OC1

1K
24 14
C19 CS1 RE2 OC2 OC2 D1
100pF R14 23 18
MCP6S22 LED
4

CS2 RE3 PGC

100K

AVSS
16 17
R16

VSS

VSS
R15 RA9 PGD
OC2
2.2K 3.3K
C20
C21

19

27
1.0uF

8
0.1uF
Fig 17 SCOPE2 SCHEMATIC
18 AUG 2013

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 Aj_Scope2 Technical Manual

8. Bill of materials

BILL OF MATERIALS

Sl.No. Value Part. Reference Qty. Unit Cost Cost (INR)

1 USB-B CON1 1.0 10.0 10.0

2 PHONE JACK CON2 1.0 20.0 20.0
3 100uF C1 1.0 2.0 2.0
4 0.1uf C2,C3,C4,C5,C7,C8,C11, 10.0 1.0 10.0
C12,C15,C21 0.0
5 10uF C6 1.0 2.0 2.0
6 27pF C9,C17 2.0 1.0 2.0
7 100pF C10,C19 2.0 1.0 2.0
8 47uf C13 1.0 2.0 2.0
9 1.0uF C14,C20 2.0 2.0 4.0
10 22pf C16,C18 2.0 1.0 2.0
11 LED D1 1.0 0.5 0.5
12 1K R1,R4,R10,R13 4.0 0.2 0.8
13 820K R2,R11 2.0 0.2 0.4
14 100K R3,R7,R12,R14 4.0 0.2 0.8
15 10K R5 1.0 0.2 0.2
16 150 R6,R17 2.0 0.2 0.4
17 2.2K R8,R15 2.0 0.2 0.4
18 3.3K R9,R16 2.0 0.2 0.4
19 RESET SW1 1.0 3.0 3.0
20 LM1117 U1 1.0 15.0 15.0
21 FT232R U2 1.0 175.0 175.0
22 MCP6S22 U5,U3 2.0 98.0 196.0
23 dsPIC30F2020 U4 1.0 452.0 452.0
24 16MHz Y1 1.0 6.0 6.0
25 PCB DIY 1.0 25.0 25.0

Total Rupees 931.9

USD 15.0

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 Aj_Scope2 Technical Manual

9. Printed Circuit Boards :

Figure 18, Component Layout

Figure 19, Wired PCB top view

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 Aj_Scope2 Technical Manual

10. Construction Steps

Step 1, Glue the FT232R in place

Step 2, Carefully solder only required pins of the FT232R

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 Aj_Scope2 Technical Manual

Step 3, Connect the thru-hole-vias by Solder a wire through both sided

Step 4, Solder the connectors and IC bases

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 Aj_Scope2 Technical Manual

Step 5, Solder the passive components and insert the ICs

Step 6 Conformal Coating

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 Aj_Scope2 Technical Manual

Step 7 Fit Inside Matchbox Sliding Inner Cardboard Container

Step 8 Fit inside Matchbox Cover with hole for LED

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 Aj_Scope2 Technical Manual

Step 9 Fit the legs

Step 10 Modify Reset switch to vertical position and prepare heat sink plate. Add heat
sink compound over the processor IC.

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 Aj_Scope2 Technical Manual

Step 11 Assemble the heat sink

Step 12 Final assembly into matchbox

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 Aj_Scope2 Technical Manual

11. Appendices

• Circuit Diagram Color

• Circuit Diagram B/W

• PCB 1:1 A4 Top mirrored

• PCB 1:1 A4 Bottom

12. Summary

This document provides essential information for fabrication and operation of the
Aj_Scope2 unit.

Software can be downloaded from my website http://www.ajoyraman.in

Address any doubts and clarifications to me at ajoyraman@gmail.com

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 5 4 3 2 1

+5V +5V +5V

+5V

U1 U2
LM1117

20
4
3 2

VCC

VCC
VIN VOUT VREF CON1

ADJ
D C1 C2 C4 C5 C6 C7 D
C3 1 16
U1RX TXD USBMINUS 2
10uF 0.1uF 3

FT232R
100uF 0.1uF 0.1uF 0.1uF 0.1uF
4

1
U1TX 5 RXD USBPLUS 15

+5V
14 17
USB-B
CBUS3 3V3 OUT

AGND

TEST
U3 C8

GND

GND

GND
VCC
C9 27pF 0.1uF
2 1

18

21

25

26
CH0 VOUT

7
R1
3 7 1K
CH1 SCK SCLK
C R2 6 C
R3 SDI SDATA
820K +5V
100K 5 R4

GND
CON2 CS CS1 1K
SW1
1 C10 RESET R6
2 R5
100pF R7

4
3
100K
MCP6S22 10K C11
150
4
5 R8 R9 C13
C12 0.1uf
OC1

13

20

28
2.2K 3.3K 0.1uf U4 47uf
C14
JACK 1.0uF C15
1

VDD

VDD

AVDD
0.1uF MCLR
+5V 2 12
AN0 U1ARX U1RX
3 AN1 U1ATX 11 U1TX
C16 22pf
8

B B
U5 4 9
AN2 OSC1
VCC

C17 VREF
27pF

dsPIC30F2020
5 AN3 Y1 16MHz
2 CH0 VOUT 1
6 CMP3A OSC2 10
R10
C18 22pf
3 7 1K 7 22
CH1 SCK SCLK CMP3B RE4
R11 R17
SDI 6 SDATA SCLK 26 RE0 RE5 21
820K R12 150
100K 5 R13 25 15
GND

CS CS2 SDATA RE1 OC1 OC1

1K
CS1 24 RE2 OC2 14 OC2
C19 D1
100pF R14
4

100K
MCP6S22 CS2 23 RE3 PGC 18 LED

AVSS
R16 16 17

VSS

VSS
R15 RA9 PGD
A A
OC2
2.2K 3.3K
C20

19

27
1.0uF C21

8
0.1uF
Fig 17 SCOPE2 SCHEMATIC
18 AUG 2013
5 4 3 2 1
 5 4 3 2 1

+5V +5V +5V

+5V

U1 U2
LM1117

20
4
3 2

VCC

VCC
VIN VOUT VREF CON1

ADJ
D C1 C2 C4 C5 C6 C7 D
C3 1 16
U1RX TXD USBMINUS 2
10uF 0.1uF 3

FT232R
100uF 0.1uF 0.1uF 0.1uF 0.1uF
4

1
U1TX 5 RXD USBPLUS 15

+5V
14 17
USB-B
CBUS3 3V3 OUT

AGND

TEST
U3 C8

GND

GND

GND
VCC
C9 27pF 0.1uF
2 1

18

21

25

26
CH0 VOUT

7
R1
3 7 1K
CH1 SCK SCLK
C R2 6 C
R3 SDI SDATA
820K +5V
100K 5 R4

GND
CON2 CS CS1 1K
SW1
1 C10 RESET R6
2 R5
100pF R7

4
3
100K
MCP6S22 10K C11
150
4
5 R8 R9 C13
C12 0.1uf
OC1

13

20

28
2.2K 3.3K 0.1uf U4 47uf
C14
JACK 1.0uF C15
1

VDD

VDD

AVDD
0.1uF MCLR
+5V 2 12
AN0 U1ARX U1RX
3 AN1 U1ATX 11 U1TX
C16 22pf
8

B B
U5 4 9
AN2 OSC1
VCC

C17 VREF
27pF

dsPIC30F2020
5 AN3 Y1 16MHz
2 CH0 VOUT 1
6 CMP3A OSC2 10
R10
C18 22pf
3 7 1K 7 22
CH1 SCK SCLK CMP3B RE4
R11 R17
SDI 6 SDATA SCLK 26 RE0 RE5 21
820K R12 150
100K 5 R13 25 15
GND

CS CS2 SDATA RE1 OC1 OC1

1K
CS1 24 RE2 OC2 14 OC2
C19 D1
100pF R14
4

100K
MCP6S22 CS2 23 RE3 PGC 18 LED

AVSS
R16 16 17

VSS

VSS
R15 RA9 PGD
A A
OC2
2.2K 3.3K
C20

19

27
1.0uF C21

8
0.1uF
Fig 17 SCOPE2 SCHEMATIC
18 AUG 2013
5 4 3 2 1
Scope2 PCB 1:1 Top-Mirrored
Scope 2 PCB 1:1 Bottom