Product Specification

AU OPTRONICS CORPORATION

( V ) Preliminary Specifications

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( ) Final Specifications

Module 11.6”(11.57”) HD 16:9 Color TFT-LCD

with LED Backlight design

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Model Name B116XTN02.0 (H/W:1A)

Note ( ) LED Backlight with driving circuit design

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Customer Date Approved by Date
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Kevin KH Shen 8/16/2012
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Checked &
Date Prepared by Date
Approved by
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Michael WJ Sun 8/16/2012

Note: This Specification is subject to change NBBU Marketing Division

without notice. AU Optronics corporation

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Contents
1. Handling Precautions .............................................................. 4
2. General Description................................................................. 5
2.1 General Specification ..................................................................................................................... 5
2.2 Optical Characteristics.................................................................................................................... 6

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3. Functional Block Diagram...................................................... 11
4. Absolute Maximum Ratings ................................................... 12
4.1 Absolute Ratings of TFT LCD Module..........................................................................................12
4.2 Absolute Ratings of Environment ..................................................................................................12
5. Electrical Characteristics ....................................................... 13

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5.1 TFT LCD Module .........................................................................................................................13
5.2 Backlight Unit ...............................................................................................................................15
6. Signal Interface Characteristic .............................................. 16
6.1 Pixel Format Image .......................................................................................................................16
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6.2 The Input Data Format..................................................................................................................17
6.3 Integration Interface Requirement .................................................................................................18
6.4 Interface Timing ............................................................................................................................20
7. Panel Reliability Test............................................................. 22
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7.1 Vibration Test................................................................................................................................22
7.2 Shock Test ....................................................................................................................................22
7.3 Reliability Test ..............................................................................................................................22
8. Mechanical Characteristics .................................................... 23
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8.1 LCM Outline Dimension ...............................................................................................................23

9. Shipping and Package ........................................................... 25
9.1 Shipping Label Format ..................................................................................................................25
9.2 Carton Package.............................................................................................................................25
9.3 Shipping Package of Palletizing Sequence .....................................................................................26
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9.4 Handling guide..............................................................................................................................26

10. Appendix: EDID Description ................................................ 28

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Record of Revision

Version and Date Page Old description New Description Remark

0.1 2012/3/20 All First Edition for Customer

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0.2 2012/3/28 29 TBD Update EDID

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1. Handling Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input
connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration

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or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on
hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure

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human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate
nor tilt the Interface Connector of the TFT Module.
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11)After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
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damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source (IEC60950 or UL1950), or be applied exemption.
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13) Disconnecting power supply before handling LCD modules, it can prevent electric shock,
DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT
module that a LED light bar build in as a light source of back light unit. It can prevent
electrostatic breakdown.
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2. General Description
B116XTN02.0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel,
a driver circuit, and LED backlight system. The screen format is intended to support the 16:9
HD, 1366(H) x768(V) screen and 262k colors (RGB 6-bits data driver) with LED backlight
driving circuit. All input signals are LVDS interface compatible.

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B116XTN02.0 is designed for a display unit of notebook style personal computer and
industrial machine.
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition:

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Items Unit Specifications
Screen Diagonal [mm] 293.8
Active Area [mm] 256.125 X 144.0

Pixels H x V 1366x3(RGB) x 768

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Pixel Pitch [mm] 0.1875 x 0.1875

Pixel Format R.G.B. Vertical Stripe

Display Mode Normally White

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White Luminance (ILED=20mA) [cd/m2] 200 typ. (5 points average)
(Note: ILED is LED current)

Luminance Uniformity 1.6 max. (13 points)

Contrast Ratio 500 typ
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Response Time [ms] 8 typ

Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 2.6 max. (Include Logic and BLU power)
Weight [Grams] 220 max.
[mm] Min. Typ. Max.
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Physical Size Length 277.5 278 278.5

Include bracket Width 167.5 168 168.5
Thickness - - 3.0
Electrical Interface 1 channel LVDS
Glass Thickness [mm] 0.4

Surface Treatment Glare, Hardness 3H,

Support Color 262K colors ( RGB 6-bit )

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Temperature Range
[oC] 0 to +50
Operating
[oC] -20 to +60
Storage (Non-Operating)
RoHS Compliance RoHS Compliance

2.2 Optical Characteristics

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The optical characteristics are measured under stable conditions at 25℃ (Room Temperature) :
Item Symbol Conditions Min. Typ. Max. Unit Note
White Luminance 5 points average 2
170 200 - cd/m 1, 4, 5.
ILED=20mA
θR Horizontal (Right) 40 45 -

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degree
θL CR = 10 (Left) 40 45 -
Viewing Angle 4, 9
ψH Vertical (Upper) 10 15 -
ψL CR = 10 (Lower) 30 35 -
Luminance
δ5P 5 Points - - 1.25 1, 3, 4
Uniformity
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Luminance
δ13P 13 Points - - 1.6 2, 3, 4
Uniformity
Contrast Ratio CR 400 500 - 4, 6
Cross talk % 4 4, 7
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Tr Rising - -
Response Time Tf Falling - - msec 4, 8
TRT Rising + Falling - 8 16
Rx 0.537 0.567 0.597
Red
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Ry 0.304 0.334 0.364

Gx 0.300 0.330 0.360
Color / Green
Gy 0.539 0.569 0.599
Chromaticity
Coodinates Bx CIE 1931 0.125 0.155 0.185 4
Blue
By 0.106 0.136 0.166
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Wx 0.283 0.313 0.343

White
Wy 0.299 0.329 0.359
NTSC % - 45 -

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Note 1: 5 points position (Ref: Active area)

W
W /4 W /4 W /4 W /4

H /4

1 2

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H /4

H 3

H /4

4 5

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H /4

Note 2: 13 points position (Ref: Active area)

W
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10 10

10
1 2 3
H /4

4 5
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H /4

H 6 7 8

H /4
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9 10

H /4 11 12 13
10

Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the
minimum test point luminance
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Maximum Brightness of five points

δW5 =
Minimum Brightness of five points

Maximum Brightness of thirteen points

δW13 =
Minimum Brightness of thirteen points

Note 4: Measurement method

The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be executed after

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lighting Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center
of screen.

Photo detector

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Field=2°

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50 cm

LCD Panel TFT-LCD

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Center of the screen
Note 5： Definition of Average Luminance of White (YL):
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Measure the luminance of gray level 63 at 5 points，YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
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Note 6： Definition of contrast ratio:

Contrast ratio is calculated with the following formula.

Brightness on the “White” state

Contrast ratio (CR)=
Brightness on the “Black” state
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Note 7： Definition of Cross Talk (CT)

CT = | YB – YA | / YA × 100 (%)

Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

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Note 8: Definition of response time:

The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval
between the 10% and 90% of amplitudes. Refer to figure as below.
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"Black"
"White" "White"
100%
Signal(Relative value)

90%
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10%
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0%
Tr Tf
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Note 9. Definition of viewing angle

Viewing angle is the measurement of contrast ratio ≧10, at the screen center, over a 180° horizontal an d
180° vertical range (off-normal viewing angles). Th e 180° viewing angle range is broken down as follow s; 90°
(θ) horizontal left and right and 90° ( Φ) vertical, high (up) and low (down). The measurement direction is
typically perpendicular to the display surface with the screen rotated about its center to develop the desired
measurement viewing angle.

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3. Functional Block Diagram

The following diagram shows the functional block of the 11.6 inches wide Color TFT/LCD 40 Pin one
channel Module

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4. Absolute Maximum Ratings

An absolute maximum rating of the module is as following:

4.1 Absolute Ratings of TFT LCD Module

Item Symbol Min Max Unit Conditions
Logic/LCD Drive Vin -0.3 +4.0 [Volt] Note 1,2

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4.2 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions
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Operating Temperature TOP 0 +50 [ C] Note 4
Operation Humidity HOP 5 95 [%RH] Note 4
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Storage Temperature TST -20 +60 [ C] Note 4
Storage Humidity HST 5 95 [%RH] Note 4

Note 1: At Ta (25℃ )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2
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Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).

Twb=39°C
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Operating Range Storage Range

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5. Electrical Characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;

The power specification are measured under 25℃ and frame frenquency under 60Hz

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Symble Parameter Min Typ Max Units Note
Logic/LCD Drive
VDD 3.0 3.3 3.6 [Volt]
Voltage
PDD VDD Power - - 0.65 [Watt] Note 1
IDD IDD Current - - 606 [mA] Note 1

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IRush Inrush Current - - 2000 [mA] Note 2
Allowable
[mV]
VDDrp Logic/LCD Drive - - 100
p-p
Ripple Voltage

Note 1 : Maximum Measurement Condition：Black Pattern at 3.3V driving voltage. (Pmax=V3.3 x Iblack)
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Note 2：Measure Condition
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90% 3.3V

10%
0V
0.5ms

Vin rising time

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5.1.2 Signal Electrical Characteristics

Input signals shall be low or High-impedance state when VDD is off.

Signal electrical characteristics are as follows;

Parameter Condition Min Max Unit

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Differential Input High
Vth Threshold (Vcm=+1.2V)
100
[mV]
Differential Input Low
Vtl Threshold (Vcm=+1.2V)
-100 - [mV]
Differential Input
VID

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Voltage 100 600 [mV]
Differential Input
Vcm Common Mode Voltage
1.125 1.375 [V]

Note: LVDS Signal Waveform

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5.2 Backlight Unit

5.2.1 LED characteristics

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Parameter Symbol Min Typ Max Units Condition
Backlight Power (Ta=25℃), Note 1
PLED - - 1.8 [Watt] Vin =12V
Consumption
(Ta=25℃), Note 2
LED Life-Time N/A 15000 - - Hour

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IF=20 mA

Note 1: Calculator value for reference PLED = VF (Normal Distribution) * IF (Normal Distribution) / Efficiency
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.

5.2.2 Backlight input signal characteristics

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Parameter Symbol Min Typ Max Units Remark

LED Power Supply VLED 6.0 12.0 21.0 [Volt]

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LED Enable Input
2.5 - 5.5 [Volt]
High Level
LED Enable Input VLED_EN - - 0.5 [Volt] Define as
Low Level
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Connector
PWM Logic Input
High Level 2.5 - 5.5 [Volt] Interface

PWM Logic Input (Ta=25℃)

VPWM_EN
Low Level - - 0.5 [Volt]

PWM Input Frequency FPWM 200 1K 10K Hz

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PWM Duty Ratio Duty 5 -- 100 %

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6. Signal Interface Characteristic

6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.

1 1366

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1st Line R G B R GB R G B R G B

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768th Line R G B R GB R G B R G B
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6.2 The Input Data Format

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Signal Name Description
R5 Red Data 5 (MSB) Red-pixel Data
R4 Red Data 4 Each red pixel's brightness data consists of
R3 Red Data 3 these 6 bits pixel data.
R2 Red Data 2
R1 Red Data 1
R0
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Red Data 0 (LSB)

Red-pixel Data
G5 Green Data 5 (MSB) Green-pixel Data
G4 Green Data 4 Each green pixel's brightness data consists of
G3 Green Data 3 these 6 bits pixel data.
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G2 Green Data 2
G1 Green Data 1
G0 Green Data 0 (LSB)

Green-pixel Data
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B5 Blue Data 5 (MSB) Blue-pixel Data

B4 Blue Data 4 Each blue pixel's brightness data consists of
B3 Blue Data 3 these 6 bits pixel data.
B2 Blue Data 2
B1 Blue Data 1
B0 Blue Data 0 (LSB)
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Blue-pixel Data
RxCLKIN Data Clock The signal is used to strobe the pixel data and
DE signals. All pixel data shall be valid at the
falling edge when the DE signal is high.
DE Display Timing This signal is strobed at the falling edge of
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
VS Vertical Sync The signal is synchronized to RxCLKIN .
HS Horizontal Sync The signal is synchronized to RxCLKIN .

Note: Output signals from any system shall be low or High-impedance state when VDD is off.

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6.3 Integration Interface Requirement

6.3.1 Connector Description

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following
components.

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Connector Name / Designation For Signal Connector
Manufacturer IPEX or compatible
Type / Part Number STM(MASK24025P40)

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Mating Housing/Part Number IPEX 20353-040T-11 or compatible

6.3.2 Pin Assignment

LVDS is a differential signal technology for LCD interface and high speed data transfer device.
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PIN# Signal Name Description
1 NC No connection

2 VDD Power Supply +3.3V

3 VDD Power Supply +3.3V
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4 VEDID EDID +3.3V Power
5 AGING AGING Enable
6 CLK_EDID EDID Clock Input
7 DAT_EDID EDID Data Input
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8 RxOIN0- -LVDS Differential Data INPUT(Odd R0-R5,G0)

9 RxOIN0+ +LVDS Differential Data INPUT(Odd R0-R5,G0)
10 VSS Ground
11 RxOIN1- -LVDS Differential Data INPUT(Odd G1-G5,B0-B1)
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12 RxOIN1+ +LVDS Differential Data INPUT(Odd G1-G5,B0-B1)

13 VSS Ground
14 RxOIN2- -LVDS Differential Data INPUT(Odd B2-B5,HS,VS,DE)
15 RxOIN2+ +LVDS Differential Data INPUT(Odd B2-B5,HS,VS,DE)
16 VSS Ground
17 RxOCKIN- -LVDS Odd Differential Clock INPUT
18 RxOCKIN+ +LVDS Odd Differential Clock INPUT
19 NC No connection
20 NC No connection
21 NC No connection
22 VSS Ground
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23 NC No connection
24 NC No connection
25 VSS Ground
26 NC No connection
27 NC No connection
28 VSS Ground

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29 NC No connection
30 NC No connection
31 VLED_GND LED Ground
32 VLED_GND LED Ground
33 VLED_GND LED Ground

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34 NC No connection

35 VPWM_EN PWM logic input level

36 VLED_EN LED enable input level
37 NC No connection
38 VLED
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LED Power Supply
39 VLED LED Power Supply
40 VLED LED Power Supply
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Pin 40 Pin 1
VLED

NC

Connector
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Note1: Input signals shall be low or High-impedance state when VDD is off.

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6.4 Interface Timing

6.4.1 Timing Characteristics
Basically, interface timings should match the 1366x768 /60Hz manufacturing guide line timing.

Parameter Symbol Min. Typ. Max. Unit

Frame Rate - 60 - Hz

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Clock frequency 1/ T Clock 66.4 76.3 80 MHz
Period TV 776 798 801
Vertical
Active T VD 768 T Line
Section
Blanking T VB 8 30 33
Period TH 1416 1592 1666

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Horizontal
Active T HD 1366 T Clock
Section
Blanking T HB 50 226 300

Note : DE mode only

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6.4.2 Timing diagram

TCLOCK Input Timing Definition ( DE Mode)

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DOTCLK

Input Invaild Pixel Pixel Pixel Pixel Pixel Invaild Pixel

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Data Data 1 2 3 N-1 N Data 1

DE
THB THD

TH
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DE
TVB
TVD

TV

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6.5 Power ON/OFF Sequence

Power on/off sequence is as follows. Interface signals and LED on/off sequence are also shown in
the chart. Signals from any system shall be Hi-Z state or low level when VDD is off

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7. Panel Reliability Test

7.1 Vibration Test

Test Spec:

Test method: Non-Operation

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Acceleration: 1.5 G

Frequency: 10 - 500Hz Random

Sweep: 30 Minutes each Axis (X, Y, Z)

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7.2 Shock Test
Test Spec:

Test method: Non-Operation

Acceleration: 220 G , Half sine wave

Active time: 2 ms

Pulse:
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X,Y,Z .one time for each side

7.3 Reliability Test

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Items Required Condition Note
Temperature
℃, 90%RH, 300h
Ta= 40℃
Humidity Bias
High Temperature
℃, Dry, 300h
Ta= 50℃
Operation
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Low Temperature
℃, 300h
Ta= 0℃
Operation
High Temperature
℃, 35%RH, 300h
Ta= 60℃
Storage
Low Temperature
℃, 50%RH, 250h
Ta= -20℃
Storage
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Thermal Shock
℃to 60℃
Ta=-20℃ ℃, Duration at 30 min, 100 cycles
Test
Contact : ±8 KV Note 1
ESD
Air : ±15 KV

Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%

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8. Mechanical Characteristics

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8.1 LCM Outline Dimension

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 9. Shipping and Package
9.1 Shipping Label Format

TBD

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9.2 Carton Package

The outside dimension of carton is 553(L)mm* 275(W)mm* 379(H)mm

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9.3 Shipping Package of Palletizing Sequence

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9.4 Handling guide
This is a thin and slime LCD model, and please be cautious when pulling it out of package
or assembling it onto platform. Careless handlings, e.g. twist, bending, pressing, or collision,
will result malfunction of LCD models.
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(1) Handling method notice
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Do not lift and hold the panel with Lift and hold the panel up with
single hand at right or left side from both hands from tray.
tray.

(2) On the table notice

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Do not press edge of panel to avoid Do not press the surface of the panel to avoid
glass broken. the glass broken or polarizer scratch.

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Do not put anything or tool on the panel to avoid the glass broken or
polarizer scratch.
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(3) Cable assembly notice

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 Do not insert the connector with single hand and touching the PCBA.

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Insert the connector by pushing right and left edge.

10. Appendix: EDID Description

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Address FUNCTION Value Value Value Note

HEX HEX BIN DEC

00 Header 00 00000000 0

01 FF 11111111 255
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02 FF 11111111 255

03 FF 11111111 255

04 FF 11111111 255

05 FF 11111111 255
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06 FF 11111111 255

07 00 00000000 0

08 EISA Manuf. Code LSB 06 00000110 6

09 Compressed ASCII AF 10101111 175

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0A Product Code 5C 01011100 92

0B hex, LSB first 20 00100000 32

0C 32-bit ser # 00 00000000 0

0D 00 00000000 0

0E 00 00000000 0

0F 00 00000000 0

10 Week of manufacture 00 00000000 0

11 Year of manufacture 16 00010110 22

12 EDID Structure Ver. 01 00000001 1

13 EDID revision # 04 00000100 4

14 Video input def. (digital I/P, non-TMDS, CRGB) 90 10010000 144

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 15 Max H image size (rounded to cm) 1A 00011010 26

16 Max V image size (rounded to cm) 0E 00001110 14

17 Display Gamma (=(gamma*100)-100) 78 01111000 120

18 Feature support (no DPMS, Active OFF, RGB, tmg Blk#1) 02 00000010 2

19 Red/green low bits (Lower 2:2:2:2 bits) 99 10011001 153

1A Blue/white low bits (Lower 2:2:2:2 bits) 85 10000101 133

1B Red x (Upper 8 bits) 95 10010101 149

1C Red y/ highER 8 bits 55 01010101 85

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1D Green x 56 01010110 86

1E Green y 92 10010010 146

1F Blue x 28 00101000 40

20 Blue y 22 00100010 34

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21 White x 50 01010000 80

22 White y 54 01010100 84

23 Established timing 1 00 00000000 0

24 Established timing 2 00 00000000 0

25 Established timing 3 00 00000000 0

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26 Standard timing #1 01 00000001 1

27 01 00000001 1

28 Standard timing #2 01 00000001 1

29 01 00000001 1
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2A Standard timing #3 01 00000001 1

2B 01 00000001 1

2C Standard timing #4 01 00000001 1

2D 01 00000001 1
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2E Standard timing #5 01 00000001 1

2F 01 00000001 1

30 Standard timing #6 01 00000001 1

31 01 00000001 1

32 Standard timing #7 01 00000001 1

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33 01 00000001 1

34 Standard timing #8 01 00000001 1

35 01 00000001 1

36 Pixel Clock/10000 LSB CE 11001110 206

37 Pixel Clock/10000 USB 1D 00011101 29

38 Horz active Lower 8bits 56 01010110 86

39 Horz blanking Lower 8bits E2 11100010 226

3A HorzAct:HorzBlnk Upper 4:4 bits 50 01010000 80

3B Vertical Active Lower 8bits 00 00000000 0

3C Vertical Blanking Lower 8bits 1E 00011110 30

3D Vert Act : Vertical Blanking (upper 4:4 bit) 30 00110000 48

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 3E HorzSync. Offset 26 00100110 38

3F HorzSync.Width 16 00010110 22

40 VertSync.Offset : VertSync.Width 36 00110110 54

41 Horz&Vert Sync Offset/Width Upper 2bits 00 00000000 0

42 Horizontal Image Size Lower 8bits 00 00000000 0

43 Vertical Image Size Lower 8bits 90 10010000 144

44 Horizontal & Vertical Image Size (upper 4:4 bits) 10 00010000 16

45 Horizontal Border (zero for internal LCD) 00 00000000 0

.tw
46 Vertical Border (zero for internal LCD) 00 00000000 0

47 Signal (non-intr, norm, no stero, sep sync, neg pol) 18 00011000 24

48 Pixel Clock/10,000 (LSB) DF 11011111 223 40Hz frame rate

49 Pixel Clock/10,000 (MSB) 13 00010011 19

om
4A Horizontal Addressable Pixels, lower 8 bits 56 01010110 86

4B Horizontal Blanking Pixels, lower 8 bits E2 11100010 226

4C H Pixels, upper nibble : H Blanking, upper nibble 50 01010000 80

4D Vertical Addressable Lines, lower 8 bits 00 00000000 0

4E Vertical Blanking Lines, lower 8 bits 1E 00011110 30

d.c
4F V lines, upper nibble : V blanking, upper nibble 30 00110000 48

50 Horizontal Front Porch, lower 8 bits 26 00100110 38

51 Horizontal Sync Pulse, lower 8 bits 16 00010110 22

52 V Front Porch, lower nibble : V Sync Pulse, lower nibble 36 00110110 54

VFP, 2 bits: VSP 2 bits: HFP 2 bits: HFP 2 bits
slc
53 00 00000000 0

54 Horizontal Image Size in mm, lower 8 bits 00 00000000 0

55 Vertical Image Size in mm, lower 8 bits 90 10010000 144

56 H Image Size, upper nibble : V Image Size, upper nibble 10 00010000 16

w.y

57 Horizontal Border 00 00000000 0

58 Vertical Border 00 00000000 0

59 Bit Encode Sync Information 18 00011000 24

nVDPS
DC
5A 00 00000000 0 Reserved 00
ww

5B HTOTAL 00 00000000 0

5C HA 00 00000000 0

5D HBL 00 00000000 0

5E HFP 00 00000000 0

5F HFPe 00 00000000 0

60 HBP 00 00000000 0

61 HB 00 00000000 0

62 HSO 00 00000000 0

63 HS 00 00000000 0

64 VTOTAL 00 00000000 0

65 VA 00 00000000 0
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 66 VBL 00 00000000 0

67 VFP 00 00000000 0

68 VBP 00 00000000 0

69 VB 00 00000000 0

6A VSO 00 00000000 0

6B VS 00 00000000 0

6C Detail Timing Description #4 00 00000000 0 Header

6D Flag 00 00000000 0

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6E Reserved 00 00000000 0

6F For Brightness Table and Power Consumption 02 00000010 2

70 Flag 00 00000000 0

Brightness
PWM % [7:0] @ Step 0

om
71 0C 00001100 12 Table

72 PWM % [7:0] @ Step 5 33 00110011 51

73 PWM % [7:0] @ Step 10 F9 11111001 249

74 Nits [7:0] @ Step 0 0A 00001010 10

75 Nits [7:0] @ Step 5 3C 00111100 60

d.c
76 Nits [7:0] @ Step 10 64 01100100 100

Power
Panel Electronics Power @ 32x32 Chess Pattern =
77 1F 00011111 31 Consumption

78 Backlight Power @ 60 nits = 14 00010100 20

Backlight Power @ Step 10 =
slc
79 22 00100010 34

7A Nits @ 100% PWM Duty = 6E 01101110 110

7B Flag 20 00100000 32

7C Flag 20 00100000 32
w.y

7D Flag 20 00100000 32

7E Extension Flag 00 00000000 0

7F Checksum B6 10110110 182

ww

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