Product Specification

AU OPTRONICS CORPORATION

( ) Preliminary Specifications
( V ) Final Specifications

Module 17.3”(17.25”) FHD 16:9 Color TFT-LCD

with LED Backlight design

Model Name B173HW01 V0 (H/W:1A)

Note ( ) LED Backlight with driving circuit design

Customer Date Approved by Date

Beyond Yang 07/09/2009

Checked &
Date Prepared by
Approved by

YW LEE 07/09/2009

Note: This Specification is subject to change NBBU Marketing Division

without notice. AU Optronics corporation

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Contents
1. Handling Precautions .............................................................. 4
2. General Description................................................................. 5
2.1 General Specification ..................................................................................................................... 5
2.2 Optical Characteristics.................................................................................................................... 6
3. Functional Block Diagram...................................................... 10
4. Absolute Maximum Ratings ................................................... 11
4.1 Absolute Ratings of TFT LCD Module..........................................................................................11
4.2 Absolute Ratings of Environment ..................................................................................................11
5. Electrical Characteristics ....................................................... 12
5.1 TFT LCD Module .........................................................................................................................12
5.2 Backlight Unit ...............................................................................................................................14
6. Signal Interface Characteristic .............................................. 15
6.1 Pixel Format Image .......................................................................................................................15
6.2 The Input Data Format..................................................................................................................16
6.3 Integration Interface Requirement .................................................................................................18
6.4 Interface Timing ............................................................................................................................20
7. Panel Reliability Test............................................................. 22
7.1 Vibration Test................................................................................................................................22
7.2 Shock Test ....................................................................................................................................22
7.3 Reliability Test ..............................................................................................................................22
8. Mechanical Characteristics .................................................... 23
8.1 LCM Outline Dimension ...............................................................................................................23
8.2 Screw Hole Depth and Center Position..........................................................................................25
9. Shipping and Package ........................................................... 26
9.1 Shipping Label Format ..................................................................................................................26
9.2 Carton Package.............................................................................................................................27
9.3 Shipping Package of Palletizing Sequence .....................................................................................27
10. Appendix: EDID Description ................................................ 28

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Record of Revision

Version and Date Page Old description New Description Remark

0.1 2009/02/24 All First Edition for Customer

0.2 2009/03/23 ♦ New format

All
♦ EDID modify
0.3 2009/04/14 6 Add R, G, B Color Coordinates
26,
1.0 2009/07/09 Modify Label EDID
28~31

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1. Handling Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input
connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration
or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on
hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate
nor tilt the Interface Connector of the TFT Module.
11)After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source (IEC60950 or UL1950), or be applied exemption.
13) Disconnecting power supply before handling LCD modules, it can prevent electric shock,
DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT
module that a LED light bar build in as a light source of back light unit. It can prevent
electrostic breakdown.

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2. General Description
B173HW01 V0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD
panel, a driver circuit, and LED backlight system. The screen format is intended to support
the FHD 16:9 1920(H) x 1080(V) screen and 262k colors (RGB 6-bits data driver) with LED
backlight driving circuit. All input signals are LVDS interface compatible.
B173HW01 V0 is designed for a display unit of notebook style personal computer and
industrial machine.
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition:

Items Unit Specifications

Screen Diagonal [mm] 17.3W”(17.25)
Active Area [mm] 381.888 X 214.812

Pixels H x V 1920x3(RGB) x1080

Pixel Pitch [mm] 0.1989X0.1989

Pixel Format R.G.B. Vertical Stripe

Display Mode Normally White

White Luminance (ILED=20mA) 300 typ. (5 points average)
[cd/m2]
(Note: ILED is LED current) 270 min. (5 points average)
Luminance Uniformity 1.25 max. (5 points)
Contrast Ratio 500 typ
Response Time [ms] 8 typ / 16 Max
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 9.0 max. (Include Logic and Blu power)
Weight [Grams] 590 max.
Physical Size Min. Typ. Max.
Include bracket Length 397.6 398.1 398.6
[mm]
Width 232.3 232.8 233.3
Thickness --- --- 6.0
Electrical Interface 2 channel LVDS
Glass Thickness [mm] 0.5

Surface Treatment Glare, Hardness 4H

Support Color 262K colors ( RGB 6-bit )

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Temperature Range
o
Operating [ C] 0 to +50
o
Storage (Non-Operating) [ C] -20 to +60
RoHS Compliance RoHS Compliance

2.2 Optical Characteristics

The optical characteristics are measured under stable conditions at 25℃ (Room Temperature) :
Item Symbol Conditions Min. Typ. Max. Unit Note
White Luminance 2
5 points average 270 300 --- cd/m 1, 4, 5.
ILED=20mA
θR Horizontal (Right) 60 70 ---
θL CR = 10 (Left) 60 70 ---
Viewing Angle degree 4, 9
ψH Vertical (Upper) 45 60 ---
ψL CR = 10 (Lower) 50 60 ---
Luminance
δ5P 5 Points --- --- 1.25 1, 3, 4
Uniformity
Contrast Ratio CR 400 500 --- 4, 6
Cross talk % --- --- 4 4, 7

Response Time TRT Rising + Falling --- 8 16 msec 4, 8

Rx 0.603 0.638 0.668

Red
Ry 0.301 0.331 0.361
Gx 0.272 0.302 0.332
Color / Green
Gy 0.581 0.611 0.641
Chromaticity
Coodinates Bx CIE 1931 0.118 0.148 0.178 4
Blue
By 0.027 0.057 0.087
Wx 0.283 0.313 0.343
White
Wy 0.299 0.329 0.359
NTSC % --- 72 ---

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Note 1: 5 points position (Ref: Active area)

W
W /4 W /4 W /4 W /4

H /4

1 2
H /4

H 3

H /4

4 5

H /4

Note 2: The luminance uniformity of 5 points is defined by dividing the maximum luminance values by the
minimum test point luminance

Maximum Brightness of five points

δW5 =
Minimum Brightness of five points

Note 3: Measurement method

The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be executed after
lighting Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center
of screen.

Photo detector

Field=2°

50 cm

LCD Panel TFT-LCD

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Note4： Definition of Average Luminance of White (YL):

Measure the luminance of gray level 63 at 5 points，YL = [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L (x) is corresponding to the luminance of the point X at Figure in Note (1).

Note 5： Definition of contrast ratio:

Contrast ratio is calculated with the following formula.

Brightness on the “White” state

Contrast ratio (CR)=
Brightness on the “Black” state

Note 6： Definition of Cross Talk (CT)

CT = | YB – YA | / YA × 100 (%)

Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)

YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note 7: Definition of response time:

The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval
between the 10% and 90% of amplitudes. Refer to figure as below.

"Black"
"White" "White"
100%
Signal(Relative value)

90%

10%
0%
Tr Tf

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Note 8. Definition of viewing angle

Viewing angle is the measurement of contrast ratio ≧10, at the screen center, over a 180° horizontal an d
180° vertical range (off-normal viewing angles). Th e 180° viewing angle range is broken down as follow s; 90°
(θ) horizontal left and right and 90° ( Φ) vertical, high (up) and low (down). The measurement direction is
typically perpendicular to the display surface with the screen rotated about its center to develop the desired
measurement viewing angle.

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3. Functional Block Diagram

The following diagram shows the functional block of the 17.3 inches wide Color TFT/LCD 40 Pin one
channel Module

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4. Absolute Maximum Ratings

An absolute maximum rating of the module is as following:

4.1 Absolute Ratings of TFT LCD Module

Item Symbol Min Max Unit Conditions
Logic/LCD Drive Vin -0.3 +4.0 [Volt] Note 1,2

4.2 Absolute Ratings of Environment

Item Symbol Min Max Unit Conditions
Operating Temperature TOP 0 +50 [oC] Note 4
Operation Humidity HOP 5 95 [%RH] Note 4
o
Storage Temperature TST -20 +60 [ C] Note 4
Storage Humidity HST 5 95 [%RH] Note 4

Note 1: At Ta (25℃ )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2
Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).

Twb=39°C

Operating Range Storage Range

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5. Electrical Characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;

The power specification are measured under 25℃ and frame frenquency under 60Hz

Symble Parameter Min Typ Max Units Note

Logic/LCD Drive [Volt]
VDD 3.0 3.3 3.6
Voltage
PDD VDD Power - 2 [Watt] Note 1
-
IDD IDD Current - 350 600 [mA] Note 1
IRush Inrush Current - - 2000 [mA] Note 2
Allowable
[mV]
VDDrp Logic/LCD Drive - - 100
p-p
Ripple Voltage

Note 1 : Maximum Measurement Condition：Black Pattern at 3.3V driving voltage. (Pmax=V3.3 x Iblack)

Note 2：Measure Condition

90% 3.3V

10%
0V
0.5ms

Vin rising time

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5.1.2 Signal Electrical Characteristics

Input signals shall be low or High-impedance state when VDD is off.

Signal electrical characteristics are as follows;

Parameter Condition Min Max Unit

Differential Input High
Vth Threshold (Vcm=+1.2V) --- 100
[mV]
Differential Input Low
Vtl Threshold (Vcm=+1.2V)
-100 --- [mV]
Differential Input
VID Voltage
100 600 [mV]

Differential Input
Vcm Common Mode Voltage
1.125 1.375 [V]

Note: LVDS Signal Waveform

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5.2 Backlight Unit

5.2.1 LED characteristics

Parameter Symbol Min Typ Max Units Condition

Backlight Power (Ta=25℃), Note 1.
PLED - - 7 [Watt] Vin=12V
Consumption
(Ta=25℃), Note 2
LED Life-Time N/A 10,000 - - Hour
IF=20 mA

Note 1: Calculator value for reference PLED = VF (Normal Distribution) * IF (Normal Distribution) / Efficiency
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.

5.2.2 Backlight input signal characteristics

Parameter Symbol Min Typ Max Units Remark

LED Power Supply VLED 6.0 12.0 21.0 [Volt]

LED Enable Input

2.5 - 5.5 [Volt]
High Level
VLED_EN
LED Enable Input
- - 0.8 [Volt] Define as
Low Level
Connector
PWM Logic Input
2.5 - 5.5 [Volt] Interface
High Level
VPWM_EN (Ta=25℃)
PWM Logic Input
- - 0.8 [Volt]
Low Level

PWM Input Frequency FPWM 100 200 20K Hz

PWM Duty Ratio Duty 5 -- 100 %

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6. Signal Interface Characteristic

6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.

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6.2 The Input Data Format

Signal Name Description

R5 Red Data 5 (MSB) Red-pixel Data
R4 Red Data 4 Each red pixel's brightness data consists of
R3 Red Data 3 these 6 bits pixel data.
R2 Red Data 2
R1 Red Data 1
R0 Red Data 0 (LSB)

Red-pixel Data
G5 Green Data 5 (MSB) Green-pixel Data
G4 Green Data 4 Each green pixel's brightness data consists of
G3 Green Data 3 these 6 bits pixel data.
G2 Green Data 2
G1 Green Data 1
G0 Green Data 0 (LSB)

Green-pixel Data
B5 Blue Data 5 (MSB) Blue-pixel Data
B4 Blue Data 4 Each blue pixel's brightness data consists of
B3 Blue Data 3 these 6 bits pixel data.
B2 Blue Data 2
B1 Blue Data 1
B0 Blue Data 0 (LSB)

Blue-pixel Data
RxCLKIN Data Clock The signal is used to strobe the pixel data and
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DE signals. All pixel data shall be valid at the
falling edge when the DE signal is high.
DE Display Timing This signal is strobed at the falling edge of
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
VS Vertical Sync The signal is synchronized to RxCLKIN .
HS Horizontal Sync The signal is synchronized to RxCLKIN .

Note: Output signals from any system shall be low or High-impedance state when VDD is off.

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6.3 Integration Interface Requirement

6.3.1 Connector Description

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following
components.

Connector Name / Designation For Signal Connector

Manufacturer IPEX or Compatible
Type / Part Number IPEX 20455-040E-12A or Compatible
Mating Housing/Part Number IPEX 20453-040T-11 or Compatible

6.3.2 Pin Assignment

LVDS is a differential signal technology for LCD interface and high speed data transfer device.
PIN# Signal Name Description
1 DIAG_LOOP NC
2 VDD Power Supply, 3.3 V (typical)
3 VDD Power Supply, 3.3 V (typical)
4 V EEDID DDC 3.3V power
5 TEST Panel Self Test
6 Clk EEDID DDC Clock
7 DATA EEDID DDC Data
8 Odd_Rin0- - LVDS differential data input (R0-R5, G0) (odd pixels)
9 Odd_Rin0+ + LVDS differential data input (R0-R5, G0) (odd pixels)
10 VSS Ground – Shield
11 Odd_Rin1- - LVDS differential data input (G1-G5, B0-B1) (odd pixels)
12 Odd_Rin1+ + LVDS differential data input (G1-G5, B0-B1) (odd pixels)
13 VSS Ground – Shield
14 Odd_Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
15 Odd_Rin2+ + LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)
16 VSS Ground – Shield
17 Odd_ClkIN- - LVDS differential clock input (odd pixels)
18 Odd_ClkIN+ + LVDS differential clock input (odd pixels)
19 VSS Ground – Shield
20 Even_Rin0- - LVDS differential data input (R0-R5, G0) (even pixels)
21 Even_Rin0+ + LVDS differential data input (R0-R5, G0) (even pixels)
22 VSS Ground – Shield
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23 Even_Rin1- - LVDS differential data input (G1-G5, B0-B1) (even pixels)

24 Even_Rin1+ + LVDS differential data input (G1-G5, B0-B1) (even pixels)
25 VSS Ground – Shield
26 Even_Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (even pixels)
27 Even_Rin2+ + LVDS differential data input (B2-B5, HS, VS, DE) (even pixels)
28 VSS Ground – Shield
29 Even_ClkIN- - LVDS differential clock input (even pixels)
30 Even_ClkIN+ + LVDS differential clock input (even pixels)
31 VSSLED Ground – LED
32 VSSLED Ground – LED
33 VSSLED Ground – LED
34 DIAG_LOOP NC
35 PWM System PWM Signal Input (+3.3V Swing)
36 LED_EN LED enable pin (+3.3V Input)
37 NC NC
38 VDDLED 6V – 21V LED power
39 VDDLED 6V – 21V LED power
40 VDDLED 6V – 21V LED power
NC

Pin 40 Pin 1
VLED

Note1: Input signals shall be low or High-impedance state when VDD is off.
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6.4 Interface Timing

6.4.1 Timing Characteristics
Basically, interface timings should match the 1920X1080 / 60Hz manufacturing guide line timing.

Parameter Symbol Min. Typ. Max. Unit

Frame Rate - 50 60 - Hz
Clock frequency 1/ T Clock 64.63 71.2 85 MHz
Period TV 1088 1130 -
Vertical T Line
Active T VD 1080
Section
Blanking T VB 8 50 -
Period TH 990 1050 -
Horizontal
Active T HD 1920 T Clock
Section
Blanking T HB 30 90 -

Note : DE mode only

6.4.2 Timing diagram

TCLOCK Input Timing Definition ( DE Mode)

DOTCLK

Input Invaild Pixel Pixel Pixel Pixel Pixel Invaild Pixel

Data Data 1 2 3 N-1 N Data 1

DE
THB THD

TH

DE
TVB
TVD

TV

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6.5 Power ON/OFF Sequence

Power on/off sequence is as follows. Interface signals and LED on/off sequence are also shown in
the chart. Signals from any system shall be Hi-Z state or low level when VDD is off

Power Sequence Timing

Value
Parameter Units
Min. Typ. Max.
T1 0.5 - 10
T2 5 - 50
T3 0.5 - 50
T4 400 - -
T5 200 - -
T6 200 - - ms
T7 0.5 - 10
T8 10 --- ---
T9 10 --- ---
T10 10 --- ---
T11 10 --- ---

Note:If T3,T5,T6 couldn’t match above specifications, must request T3+T5+T6 > 200ms at least

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7. Panel Reliability Test

7.1 Vibration Test

Test Spec:

Test method: Non-Operation

Acceleration: 1.5 G

Frequency: 10 - 500Hz Random

Sweep: 30 Minutes each Axis (X, Y, Z)

7.2 Shock Test

Test Spec:

Test method: Non-Operation

Acceleration: 220 G , Half sine wave

Active time: 2 ms

Pulse: X,Y,Z .one time for each side

7.3 Reliability Test

Items Required Condition Note

Temperature
℃, 90%RH, 300h
Ta= 40℃
Humidity Bias
High Temperature
℃, Dry, 300h
Ta= 50℃
Operation
Low Temperature
℃, 300h
Ta= 0℃
Operation
High Temperature
℃, 35%RH, 300h
Ta= 60℃
Storage
Low Temperature
℃, 50%RH, 250h
Ta= -20℃
Storage
Thermal Shock
℃to 60℃
Ta=-20℃ ℃, Duration at 30 min, 100 cycles
Test
Contact : ±8 KV Note 1
ESD
Air : ±15 KV

Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%

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8. Mechanical Characteristics
8.1 LCM Outline Dimension

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Note: Prevention IC damage, IC positions not allowed any overlap over these areas.

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8.2 Screw Hole Depth and Center Position

Maximum Screw penetration from side surface is 2.3 mm
The center of screw hole center location is 3.1 ± 0.2mm from front surface
Screw Torque: Maximum 2.5 kgf-cm

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9. Shipping and Package

9.1 Shipping Label Format

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9.2 Carton Package

The outside dimension of carton is 480 (L)mm x 373 (W)mm x 311 (H)mm

9.3 Shipping Package of Palletizing Sequence

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10. Appendix: EDID Description

Address FUNCTION Value Value Value Note
HEX HEX BIN DEC

00 Header 00 00000000 0

01 FF 11111111 255

02 FF 11111111 255

03 FF 11111111 255

04 FF 11111111 255

05 FF 11111111 255

06 FF 11111111 255

07 00 00000000 0

08 EISA Manuf. Code LSB 06 00000110 6

09 Compressed ASCII AF 10101111 175

0A Product Code 9D 10011101 157

0B hex, LSB first 10 00010000 16

0C 32-bit ser # 00 00000000 0

0D 00 00000000 0

0E 00 00000000 0

0F 00 00000000 0

10 Week of manufacture 01 00000001 1

11 Year of manufacture 13 00010011 19

12 EDID Structure Ver. 01 00000001 1

13 EDID revision # 03 00000011 3

14 Video input def. (digital I/P, non-TMDS, CRGB) 80 10000000 128

15 Max H image size (rounded to cm) 26 00100110 38

16 Max V image size (rounded to cm) 15 00010101 21

17 Display Gamma (=(gamma*100)-100) 78 01111000 120

Feature support (no DPMS, Active OFF, RGB,
18 tmg Blk#1) 0A 00001010 10

19 Red/green low bits (Lower 2:2:2:2 bits) C8 11001000 200

1A Blue/white low bits (Lower 2:2:2:2 bits) 95 10010101 149

1B Red x (Upper 8 bits) 9E 10011110 158

1C Red y/ highER 8 bits 57 01010111 87

1D Green x 54 01010100 84

1E Green y 92 10010010 146

1F Blue x 26 00100110 38

20 Blue y 0F 00001111 15

21 White x 50 01010000 80

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22 White y 54 01010100 84

23 Established timing 1 00 00000000 0

24 Established timing 2 00 00000000 0

25 Established timing 3 00 00000000 0

26 Standard timing #1 01 00000001 1

27 01 00000001 1

28 Standard timing #2 01 00000001 1

29 01 00000001 1

2A Standard timing #3 01 00000001 1

2B 01 00000001 1

2C Standard timing #4 01 00000001 1

2D 01 00000001 1

2E Standard timing #5 01 00000001 1

2F 01 00000001 1

30 Standard timing #6 01 00000001 1

31 01 00000001 1

32 Standard timing #7 01 00000001 1

33 01 00000001 1

34 Standard timing #8 01 00000001 1

35 01 00000001 1

36 Pixel Clock/10000 LSB A0 10100000 160

37 Pixel Clock/10000 USB 37 00110111 55

38 Horz active Lower 8bits 80 10000000 128

39 Horz blanking Lower 8bits B4 10110100 180

3A HorzAct:HorzBlnk Upper 4:4 bits 70 01110000 112

3B Vertical Active Lower 8bits 38 00111000 56

3C Vertical Blanking Lower 8bits 32 00110010 50

3D Vert Act : Vertical Blanking (upper 4:4 bit) 40 01000000 64

3E HorzSync. Offset 6C 01101100 108

3F HorzSync.Width 30 00110000 48

40 VertSync.Offset : VertSync.Width AA 10101010 170

41 Horz&Vert Sync Offset/Width Upper 2bits 00 00000000 0

42 Horizontal Image Size Lower 8bits 7D 01111101 125

43 Vertical Image Size Lower 8bits D6 11010110 214

44 Horizontal & Vertical Image Size (upper 4:4 bits) 10 00010000 16

45 Horizontal Border (zero for internal LCD) 00 00000000 0

46 Vertical Border (zero for internal LCD) 00 00000000 0

Signal (non-intr, norm, no stero, sep sync, neg

47 pol) 18 00011000 24

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48 Detailed timing/monitor 00 00000000 0

49 descriptor #2 00 00000000 0

4A 00 00000000 0

4B 0F 00001111 15

4C 00 00000000 0

4D 00 00000000 0

4E 00 00000000 0

4F 00 00000000 0

50 00 00000000 0

51 00 00000000 0

52 00 00000000 0

53 00 00000000 0

54 00 00000000 0

55 00 00000000 0

56 00 00000000 0

57 00 00000000 0

58 00 00000000 0

59 20 00100000 32

5A Detailed timing/monitor 00 00000000 0

5B descriptor #3 00 00000000 0

5C 00 00000000 0

5D FE 11111110 254

5E 00 00000000 0

5F Manufacture 41 01000001 65 A

60 Manufacture 55 01010101 85 U

61 Manufacture 4F 01001111 79 O

62 0A 00001010 10

63 20 00100000 32

64 20 00100000 32

65 20 00100000 32

66 20 00100000 32

67 20 00100000 32

68 20 00100000 32

69 20 00100000 32

6A 20 00100000 32

6B 20 00100000 32

6C Detailed timing/monitor 00 00000000 0

6D descriptor #4 00 00000000 0

6E 00 00000000 0

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6F FE 11111110 254

70 00 00000000 0

71 Manufacture P/N 42 01000010 66 B

72 Manufacture P/N 31 00110001 49 1

73 Manufacture P/N 37 00110111 55 7

74 Manufacture P/N 33 00110011 51 3

75 Manufacture P/N 48 01001000 72 H

76 Manufacture P/N 57 01010111 87 W

77 Manufacture P/N 30 00110000 48 0

78 Manufacture P/N 31 00110001 49 1

79 Manufacture P/N 20 00100000 32

7A Manufacture P/N 56 01010110 86 V

7B Manufacture P/N 30 00110000 48 0

7C 20 00100000 32

7D 0A 00001010 10

7E Extension Flag 00 00000000 0

7F Checksum 61 01100001 97

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