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This document provides instructions for a lab project to design a 4-bit binary synchronous up-counter using T flip-flops. Students are asked to determine the equations for the T input of each flip-flop based on the behavior of a 3-bit counter example. They then implement a 4-bit design in simulation software, showing the input equations and screenshots of the output changing over clock cycles. A report is to be submitted with the circuit design, equations, and simulation screenshots to demonstrate the working counter.

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40 views2 pages

Attachment 1

This document provides instructions for a lab project to design a 4-bit binary synchronous up-counter using T flip-flops. Students are asked to determine the equations for the T input of each flip-flop based on the behavior of a 3-bit counter example. They then implement a 4-bit design in simulation software, showing the input equations and screenshots of the output changing over clock cycles. A report is to be submitted with the circuit design, equations, and simulation screenshots to demonstrate the working counter.

Uploaded by

successfanacademy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Digital Logic Design

Lab Project : 4 Bit Binary synchronous counter

Objective :
For this project, the students are required to design a 4-bit binary synchronous up-counter
using T Flip Flop

Equipement required :
Software simulation : Thinkercad, Logisim

Background :
Counter circuits are used in digital systems for many purposes. They may count the number of
occurrences of certain events, generate timing intervals for control of various tasks in a system, ..
The simplest counter circuits can be built using T flip-flops because the toggle feature is naturally
suited for the implementation of the counting operation.
Counters could be synchronous or asynchronous depending on how the clock are connected for each
flip flop.
We are interrested in the synchronous binary up counter. Specifically, the following table shows the
contents of a 3 bit counter for 8 consecutive clock cycles.

Clock cycle Q2 Q1 Q0
0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1
8 0 0 0

Now, when we observe each row of the table, it is clear that bit Q0 changes on each clock cycle. Q1
changes only when Q0 = 1. Q2 changes only when both Q1 and Q0 are equal to 1.
Task :
1. Determine from the above description, the equations of T inputs for each T flip flop used in the
design of the counter.

2. Design the circuit for a 4bit up-counter using T flip flop

Specify the equations for each T input.

3. Implement your Design In Tinkercad using 7473 Dual JK flip flop with clear

Hint : A T flip-flop is typically implemented using a JK flip-flop IC

2. Use DIP switches to give inputs, and use LEDs to display outputs.

3. Include pictures of the simulation in your lab report showing all the above-mentioned outputs.

Project Report

1. Prepare your report on an MS Word file. Do not forget to write your Name and student
number.
2. Change the layout orientation of your Word File to ‘Landscape’ so that large sized pictures
could be inserted in the file.
3. Include the theoritical part (circuit design, equations)
4. While simulating, take screenshots of the whole screen.
a) The screenshot must cover the whole screen and it should include the simulator
window, along with the time and date shown by Windows at the bottom of the screen.
b) Include as many screenshots as necessary to show the working of your simulation.

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