EXPERIMENT NO.

9 AND 10
SHIFT REGISTERS AND COUNTERS
Experiment Objective
In this experiment, we will learn about the shift registers and the design of counters using flip-
flops, and their use in various applications for other types of counters.

Learning outcomes
1. Understand the construction and working of shift registers.
2. Understanding the operation and design aspects of counters and Construct counters using
shift register
3. Applications of shift registers
4. Use flip flop ICs and dedicated counter ICs for counting applications
5. Verilog modeling of shift registers and counters
6. Simulate counters in Verilog

Components required
74194 – Shift register 74195 –Shift register
7495 – Comparator 7474 – Dual D flip-flop

7408 – Quad 2-input AND 7486 – Quad 2-input XOR

7400 – Quad 2-input NAND 74112 – Dual J K flip-flop
7493 – 4 – bit Counter
Experiment
A shift register is a circuit capable of shifting information in one or both directions.

Run #01: Realization of left and right shift operations of shift register using dedicated IC
on the digital IC trainer kit

IC 74194 is a 4-bit Bi-directional universal shift register with parallel load and synchronous
clear. The pin diagram and description are given below.

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IC Pin diagram:

Function Table:

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Observation table:
Left Shift:

CL S0 S1 DSL DSR A B C D QA QB QC QD
R
0 X X X X X X X X
1 1 1 X X 1 0 1 0
1 1 0 0 X X X X X
1 1 0 0 X X X X X
1 1 0 0 X X X X X
1 1 0 0 X X X X X
1 1 0 1 X X X X X
1 1 0 1 X X X X X
1 1 0 1 X X X X X
1 1 0 1 X X X X X

Right Shift:

CL S1 S2 DSL DSR A B C D QA QB QC QD
R
0 X X X X X X X X
1 1 1 X X 1 0 1 0
1 0 1 X 0 X X X X
1 0 1 X 0 X X X X
1 0 1 X 0 X X X X
1 0 1 X 0 X X X X
1 0 1 X 1 X X X X
1 0 1 X 1 X X X X
1 0 1 X 1 X X X X
1 0 1 X 1 X X X X

Run #02: Shift register counters

A shift register counter is basically a shift register with the serial output connected back to the
serial input to produce special sequences. Two of the most common shift register counters are the
Ring counter and the Johnson counter which are described in your textbook
Set up a 4-bit ring counter circuit using IC74195. Apply clock inputs and note down the diagram
and observations below.

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Observation table:

CL SH/LD’ J K’ A B C D QA QB QC QD
R
0 X X X X X X X
1 0 X X a b c d
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X

Run #03: Now set up a 4-bit switch-tail ring counter using the same IC. Note down your circuit
and observations below. Use external AND gates to decode the outputs.

Observation table:
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CL SH/LD’ J K’ A B C D QA QB QC QD
R
0 X X X X X X X
1 0 X X a b c 0
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
1 1 1 1 X X X X
Q: What is the advantage and disadvantage of a switch tail ring counter over a normal ring
counter?

Run #04: Implement the 2-bit counter on the Digital Trainer Kit using D Flip-flop IC.

State Diagram:

Excitation Table:

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Circuit Diagram:

Q. Observe the outputs and fill the table when the clock is given. Use D flip-flops in the design.

Table 9.1: Observation table for Run #01

Clock Count QB QA

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Run #05: Mod – 16 (Operation of a 4-bit ) Counter

IPin Number Pin Name Description

4,6,7,13 n.c. No Connection

8,9,11,12 Q2,Q1,Q3Q Output Pins

0

10 GND Ground

14 A Clock Pulse 0

1 B Clock Pulse 1

2,3 R1,R2 Reset – Clear Input

5 Vcc Supply Voltage : 5V

IC 7493 is made to operate as a 4 – bit counter by wiring the external terminals as shown in the
circuit diagram below.

Input A (pin 14) is connected to the pulsar that generates the pulses which could either be a
toggle switch or a pulse generator.
Output QA (pin 12) is connected to input B (pin 12)
The reset pins R1 and R2 (pins 2 and 3) are connected to ground

Set up the circuit as in the diagram. Using toggle switches generate pulses. After each pulse
observe the count value of the counter on indicator LEDS. Note down the count sequence in the
table below. Start from the 0000 state. (If the initial display is not 0000, give a few pulses to
reach this state).

Observation table for 4 – bit counter Run #02

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 No. of pulses(n) Count – Qd Qc Qb Qa No. of pulses(n) Count – Qd Qc Qb Qa

0 9

1 10

2 11

3 12

4 13

5 14

6 15

7 16

8 17

● IC 7493 is a 4-bit ripple carry adder which consists of 4 internally connected JK Flip-
flops.

Run #06: Design and implementation of 3-bit down counter using JK Flip flop IC on digital
trainer kit

● IC 7476 is JK Flip Flop which is positive edge triggered.

● While IC 74112 is another JK FF is negative edge triggered (optional)

● The FFs can be used as either an Up/down counter.

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 IC 7476 IC 74112

Circuit Diagram:

Observation table for Run #03

State QC QB QA

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 Optional Exercise:

Optional Run #07: Shift registers

IC 74195 is a 4-bit shift register with parallel load and synchronous clear. The pin assignment is
given in Appendix A.
Do the following operations on the register?
1. Asynchronously clear the register.
2. Load the word 1010 into the register.
3. Shift left the loaded word.
4. Shift right the loaded word.

Note down your observations below in the form of a function table.

Right Shift:

CLR J K’ SH/ CLK A B C D QA QB QC QD

LD

1 1 1 1 / 1 0 1 0

Left Shift:
Left shift should be done by connecting QB-A, QC-B, QD-C, D-D, through D serially we can
apply input.

CLR J K’ SH/ CLK A B C D QA QB QC QD

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 LD

1 0 0 0 / 1 0 1 0

Optional Run #08:

4 Bit Comparator Using Trainer Kit (IC 7485)

IC 7485 is 4-bit comparator. Its pin assignment is given in Appendix A.

7485 also has cascading inputs for combining multiple comparators to create comparators of
more than 4 bits.

Connect the circuit and verify its operation by feeding the following test inputs.

Table 8.2: Observation table for Run #01

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 A3 A2 A1 A0 B3 B2 B1 B0 A>B A<B A=B

0000 1111

1111 0000

1010 0101

1010 1010

0101 0101

1001 0110

Optional Run #09: Using D-flip-flop modules implement 2-bit asynchronous up counter in
Verilog and verify with test fixture
Hint : Instantiate D-flip-flop

Observe the outputs and fill the table when clock is given. Use D flip-flops in the design.

Observation table for Run #04

Clock Count QB QA

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 2 bit asynchronous up counter

Optional Run #10: BCD Counter

The previous run shows that R1 and R2 are reset pins. Connecting both of them to 1 causes the
counter to automatically reset to the 0000 state. This fact can be used to make IC 7493 to count
from 0 to a variety of final counts without any external logic circuitry. A BCD counter is one that
counts from 0000 to 1001. Draw the circuit diagram below.

Set up the modified circuit and feed a few pulses. Verify that it counts from 0000 and 1001.
Note the count sequence below.
0000-0001-0010….

I. Verilog
Reading assignment

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Sections: 6.6; ‘Digital Design’ by M.Moris Mano and Michael D. Ciletti “ Digital Design”, PHI,
4th Edition, 2009.

Sections: 7.1-7.2; ‘Verilog HDL’ by Samir Palnitkar.

This session will further explore the modeling of sequential circuits in Verilog and their
synthesis.
Verilog assignments
Exercise #01: Write the Verilog description of a shift register below. Use behavioral modeling.
Exercise #02: Write the Verilog description of a ring counter and Johnson counter. Use
behavioral modeling. Synthesize the code to obtain the hardware.
Exercise #03: Write the Verilog description of a universal shift register. Use any modeling style.
Exercise #04: write the Verilog description of a LFSR. Construct the shift register using D flip-
flops.
Exercise #05: Write the Verilog description of a ripple counter. Use behavioral modeling.

Exercise #06: Write the Verilog description of the circuit of Run #03. Use behavioral modeling
for the flip-flops and structural modeling for the overall circuit.

Exercise #07: Write the Verilog description of the 4-bit up down gray counter with parallel load
feature. The counter also has asynchronous preset and clear features. Use any modeling style.

Take Home Assignments: -

II. Test yourself

1. How many used and unused states does a n-bit a) ring counter have b) Johnson counter
have c) LFSR have?
2. How are shift registers used in data transmission?
3. What are the applications of LFSRs?
4. Construct a 16-bit ring counter using required number of IC 74195.
5. 74164, 74165 and 74194 are various other IC shift registers. Find out their kinds and
internal construction circuitry.
6. Investigate the data sheet of IC 74195 to understand its construction.
7. What is clock skew? How does it affect shift register operation?
8. How do you determine the maximum frequency of operation of a shift register?
9. What is the difference between synchronous and asynchronous counters? Which is
preferred and why?
10. If each flip-flop in 4-bit ripple counter has a propagation delay of 10ns what is the
maximum clock frequency at which the counter can operate?
11. Design an up/down 3-bit synchronous counter using D flip-flops.
12. How many decade counters are needed to achieve a divide-by-1000 counter?
13. How can counters be used in constructing clocks?

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14. Design a circuit using a 4-bit counter that gives an output of 1 for a count which is a
multiple of 5.
15. A variety of IC counters are available. Find out the operation of counter ICs a? 7490 b)
7492 c) 74163 d) 74193
16. Investigate the data sheet of IC 7493 and understand its construction.

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