Kolar 1999
Kolar 1999
4, AUGUST 1999
Abstract— Based on an analysis of basic realization possibil- The following tasks are handled by a dc-to-dc converter
ities, the structure of the power circuit of a new single-stage output stage connected in series:
three-phase boost-type pulsewidth modulated (PWM) rectifier
system (VIENNA Rectifier II) is developed. This system has • high-frequency isolation of the output voltage;
continuous sinusoidal time behavior of the input currents and • matching of the input and output voltage levels (rated
high-frequency isolation of the output voltage, which is controlled voltage of the European low-voltage mains, 400 V
in a highly dynamic manner. As compared to a conventional two- line-to-line; rated dc output voltage, 48 or 60 V) via
stage realization, this system has substantially lower complexity
and allows the realization of several isolated output circuits with
winding ratio of the transformer;
minimum effort. The basic function of the new PWM rectifier • tight, highly dynamic control of the output voltage and/or
system is described based on the conduction states occurring of the power flow on the output side (avoidance of low-
within a pulse period. Furthermore, a straightforward space- frequency harmonics in the output quantities and/or of
vector-oriented method for the system control is proposed which psophometric noise).
guarantees a symmetric magnetization of the transformer. Also,
it makes possible a sinusoidal control of the mains phase currents The advantages of this concept are the following:
in phase with the associated phase voltages. By digital simulation, • separate optimizability of the converter stages concerning
the theoretical considerations are verified and the stresses on
the power semiconductors of the new converter system are
operational mode and dimensioning (e.g., applicability
determined. Finally, results of an experimental analysis of a of already proven control methods, power supply to the
2.5-kW laboratory prototype of the system are given, and the output stage with constant voltage, independent of mains
direct startup and the short-circuit protection of the converter voltage variations, etc.);
are discussed. Also, the advantages and disadvantages of the new • possibility of a separate development of the input and
converter system are compiled in the form of an overview.
output stages;
Index Terms— High-frequency isolation, single-stage ac-to-dc • simple buffering of short mains failures due to providing
power conversion, three-phase high-power-factor rectifier, VI-
a capacitor of appropriate capacity in the voltage dc link
ENNA rectifier.
(at high voltage level).
However, the following disadvantages have to be men-
I. INTRODUCTION tioned:
(a) (b)
(c) (d)
Fig. 1. Basic structures of three-phase single-stage high-frequency isolated PWM rectifier systems. (a) and (b) Quasi-single-stage buck-derived bridge and
single-stage buck-derived matrix PWM rectifier system according to [11]. (c) and (d) Quasi-single-stage boost-derived bridge and single-stage boost-derived
matrix PWM rectifier system according to [12] (naming of the systems according to [10]).
munications power supply modules (output power typically ward space-vector-oriented method for the system control
6 12 kW, i.e., 60 V/100 200 A). Therefore, they are not is proposed which guarantees a symmetric magnetization of
described in greater detail in this paper. the transformer. Also, it makes possible a sinusoidal control
Details of the operation, the control, and the dimensioning of of the mains phase currents in phase with the associated
the buck-derived single-stage matrix PWM rectifier system are phase voltages (see Section IV). There, the amplitude of
discussed in [20]-[22]. The buck-derived isolated quasi-single- the phase currents is given by the output voltage control
stage bridge PWM rectifier system according to Fig. 1(a) is system. By digital simulation (see Section V), the theoretical
treated in [10] in detail. On the other hand, three-phase isolated considerations are verified and, in Section VI, results of an
(quasi-) single-stage boost-derived bridge PWM rectifier sys- experimental analysis of a 2.5-kW laboratory prototype of the
tems have not been analyzed in detail so far. This is explained system are given and possibilities of a low-loss limitation of
in [10] by the following: switching overvoltages occurring due to nonideal coupling
• higher blocking voltage stress on the valves; of the primary and secondary windings of the transformer
• the problem of startup of the converter systems (lack of are discussed, as well as the direct startup and the short-
the voltage required for the control and/or limitation of circuit protection of the converter. Also, the advantages and
the input current in case of output capacitor not charged); disadvantages of the new converter system are compiled in the
• the problem of overload protection (current limitation form of an overview (see Section VII).
for short circuit of the output voltage) or of overcurrent
limitation for mains overvoltages.
II. DERIVATION OF THE CIRCUIT TOPOLOGY
However, boost-derived converter systems show a series of
advantages as compared to buck-derived systems, such as the A three-phase boost-type ac-to-dc converter system with
following: sinusoidal current input and high-frequency isolation of the
output voltage is realized, as already mentioned in Section I in
• continuous shape of the input current (therefore, no input
the conventional way as a two-stage voltage dc-link converter,
filter capacitors have to be provided);
i.e., by coupling on the dc side of a PWM rectifier system and
• direct control of the mains current, i.e., of the input
of a dc-to-dc converter system [see Fig. 2(a)].
quantity being of special interest with regard to effects
As proposed in [12], the structure of this relatively complex
on the mains (the input current of buck-derived PWM
system can be simplified by omitting the dc-link capacitor
rectifier systems is defined indirectly, i.e., via the dif-
and/or by replacing the two-stage converter by a quasi-single-
ference between mains voltage and the controlled input
stage topology [see Fig. 2(b)]. Then, the dc-to-dc converter
filter capacitor voltage); stage is operated with impressed current and not with im-
• no danger of a direct short circuit of a mains line-to-line pressed voltage. Therefore, at the output of the dc-to-dc
voltage; converter, no inductor is required to handle the difference
• impressed transformer primary current, therefore, con- between transformed dc-link voltage and output voltage [see
trary to buck-derived converter structures, no danger of Fig. 2(b)]. (It is important to note that the dc-link capacitor
high overcurrent spikes due to magnetic core saturation serves only for smoothing power oscillations with switching
or high reverse-recovery time of the diodes on the output frequency for symmetric three-phase systems and sinusoidal
side; shape of the input quantities, i.e., the resulting quasi-single-
• direct voltage output (no output inductor required and/or stage converter system has (ideally) a time-constant power
simple realizability of several isolated output circuits); flow for averaging over processes with switching frequency
the output voltage directly defines the blocking voltage despite lacking a dc-link capacitor.) However, this circuit
across the diodes on the secondary (the blocking voltage modification does not reduce the number of turn-off power
is independent of the input voltage). semiconductors. Therefore, the system realization is still con-
These advantages ultimately form the basis for the wide app- nected with a relatively high effort, and possibilities of a
plicability of this circuit type in connection with single-phase further reduction of the circuit complexity have to be searched
single-stage [23]–[25] and two-stage power-factor correction for.
[26]. A starting point for this is given by the fact that the PWM
Based on this contradiction, a closer and objective analysis rectifier stage basically would allow a reversal of the power
and assessment of the practical applicability of three-phase flow (energy feedback from the dc link into the mains); the
boost-derived single-stage isolated PWM rectifier systems system operation is limited to rectifier operation, however,
seems of special interest. due to the unidirectionality of the dc-to-dc converter output
In this paper, based on a step-by-step simplification of stage. Therefore, the bidirectional input stage can be replaced
the circuit proposed in [12] [see Fig. 1(c)], a new topology by a unidirectional PWM rectifier system as proposed in
of a three-phase single-stage high-frequency isolated PWM [27] (see [27, Fig. 2]); this allows us to halve the number
rectifier system [VIENNA Rectifier II, see Figs. 2(d) and 3] of turn-off power semiconductors of the rectifier stage [see
with minimum complexity of the power circuit is derived (see Fig. 2(c)]. Furthermore, this leads to a higher utilization of
Section II). In Section III, the basic function of the PWM the power semiconductors because each power transistor of
rectifier system is described based on the conduction states a phase participates in conducting current during the positive
occurring within a pulse period. Furthermore, a straightfor- and negative and not only during one current half wave.
KOLAR et al.: VIENNA RECTIFIER II 677
(a) (b)
(c) (d)
Fig. 2. Derivation of the basic structure of a new single-stage boost-type high-frequency isolated PWM rectifier system [see (d)] based on a conventional
two-stage converter system with voltage dc link [see (a)].
Due to the structure of the circuit received thereby, it three-level) characteristic concerning voltage generation at the
is obvious to transfer partially the function of the dc-to-dc input, contrary to the system described in [29]. The advantage
converter output stage to the input stage in a further step, i.e., of the realization variant shown in Fig. 3 [as compared to
the switchover of a terminal of the primary winding of the the circuit of Fig. 2(d)] is that it allows a limitation of
transformer between positive and negative dc-link bus will the blocking voltages of all valves by a simple overvoltage
be performed by the input stage. The now resulting novel limitation circuit situated between positive and negative dc-
topology of a single-stage (because sections of the mains link bus (see Section VI-C). Furthermore, one can then obtain
phase currents are fed directly via the primary winding and the a freewheeling of the transformer magnetizing current (and of
energy is transferred directly to the secondary) boost-derived the mains phase currents) by switching on the switches
three-phase ac-to-dc converter with high-frequency isolation and , i.e., one is not constrained by the switching state
is shown in Fig. 2(d). With the exception of a ripple with of the switching elements (see Section IV-B),
switching frequency, this system allows a sinusoidal mains simplifying the system control.
current control in phase with the mains voltage; accordingly,
an (ideally) constant output power results.
III. BASIC PRINCIPLE OF OPERATION
One has to note, however, that the reduction of the complex-
ity of the power circuit as compared to the circuit according Because a mains phase current flows
to Fig. 2(b) and the transition to direct and/or single-stage through the associated freewheeling diode for turned-
energy transfer results in higher complexity of the system off power transistor and through for the
control because now the switches and and voltage generation at the input side of the system is determined
have to guarantee (in immediate interaction) a sinusoidal not only by the switching states of the power transistors but
mains current shape and a pure alternating magnetization with also by the signs and (as shown in the following) also by
switching frequency for the transformer magnetic core. the ratios of the phase current magnitudes. The same is true
For the derivation of a control law for the circuit shown for the polarity of the voltage across the power transformer
in Fig. 2(d), in the following, the space vectors of the being defined by the sign of the primary current (which is
formed from sections of the phase currents). However, due
rectifier input voltage, resulting for the different switching
to the symmetries of the circuit and of the feeding three-
states and the variation of the transformer magnetization are
phase voltage system for analyzing of a sign combination
analyzed. There, a modified realization of the proposed circuit
of the phase currents (e.g., being
is taken as reference (see Fig. 3) which is being obtained by
valid within a -wide interval of the mains period) the
the integration of the four-quadrant switches into the bridge
relationships within the entire mains period are covered.
legs of the input diode bridge [28]. The topology of the
input stage is then identical to a three-level PWM rectifier
system which has been proposed in [29] (see [29, Fig. 9]) and A. Assumptions
which has been introduced in the literature as the VIENNA In the following, the stationary relations for
Rectifier. Accordingly, the circuit proposed here will be called and and/or for an angle interval
the VIENNA Rectifier II. However, it has two-level (and not are considered. There, the considerations
678 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 4, AUGUST 1999
Fig. 3. The considerations of this paper are based on the shown realization variant of the proposed three-phase single-stage high-frequency isolated
boost-type PWM rectifier system. The circuit is obtained by the integration of the four-quadrant switches of the circuit according to Fig. 2(d) into the
bridge legs of the input diode bridge. The basic system function is not influenced by this modification. The feeding three-phase mains is shown in the
form of voltage sources uN;i ; i = R; S; T :
are based on purely sinusoidal mains current shapes is replaced by an ideal transformer with a transformation
ratio being equal to the turns ratio (see Fig. 4).
Furthermore, parasitic capacitances of the valves are neglected
and/or, in general, idealized valves are assumed (no forward
voltage drop, negligible switching times, in particular, no
(1) reverse-recovery current for diodes, etc.). Then, the analysis
of oscillations following switching processes between and
where parasitic capacitances and the inclusion of an overvoltage
limitation circuit (see Section VI-C) can be excluded from the
(2) considerations. Furthermore, the output voltage is assumed
to be impressed and constant
denotes the mains angular frequency) in order
to limit the derivations to the essentials. This means that the
mains current ripple is neglected, and only the fundamental is B. System Switching States and Voltage Generation
considered. Furthermore, resistive mains fundamental behavior
is assumed, i.e., currents and mains phase For the denomination of the switching state of the power
voltages (having also a purely sinusoidal shape) are in transistors and , switching functions
phase. Then, we have for the space vector of the mains current and are used in the following. There,
and voltage corresponds to the on state and to the off state.
A characterization of the switching state of the overall system
can then be made in a clear form by using the combinations
(3) It represents, besides the switching
Remark: The space vector related to a triple of phase state of the transistors, also a characterization concerning
quantities is calculated according to the defining equation the direction of the current flow in the primary of
(shown for the example of the mains voltage) the transformer and/or the sign of the voltage across
(given by or for
(4) is defined).
As becomes immediately clear, the control of the power
The transformer is assumed ideal, i.e., stray inductance transistors und has to be performed dependent on
magnetizing current (with the exception of Sections IV-A the sign of the phase currents , e.g., for turning off a
and IV-B we assume for the magnetizing inductance switch conducting positive current , one has to
and/or winding resistances, and winding capac- turn on in any case and for turning off a switch
itances are neglected. This means that the real transformer conducting negative current or in
KOLAR et al.: VIENNA RECTIFIER II 679
(a)
(b)
Fig. 4. Idealizations of the transformer and the output circuit of the system
assumed for the basic considerations of this paper. (a) Real system. (b)
Idealized system. The isolation of primary and secondary circuit does not
influence the basic system behavior and, therefore, is omitted in (b).
TABLE I
SWITCHING STATES OF THE PROPOSED SYSTEM AND RELATED VOLTAGE SPACE
f g
VECTORS uU;j AND SIGNS sign uT ;1 OF THE TRANSFORMER PRIMARY
VOLTAGE uT ;1 FOR iN;R > 0 AND iN;S ; iN;T < 0
AND/OR 'N 2 (0(=6); +(=6))
(5)
(6)
(7)
(13) if
(14)
if
It is important to point out that—so far—always the switch-
of the switching decision
ing state and not the switching state given
in Table I has been incorporated into the switching-state if
sequence considered. For , one has (independently (15)
if
of a short circuit of the primary leading via the
diodes and or and of the pulsewidth modulator for there
Therefore, the secondary remains without current. The mains denotes the phase current reference value.
current is fed partially via and and partially By the precontrol signals , the following shall be ob-
via and There, the specific current distribution is
tained.
determined by the forward voltage drop of the valves. The
magnetizing state of the transformer • There shall be obtained the distribution of the switching
is not changed (according to the neglection of the winding states which are redundant with respect to the voltage
resistances and of the valves forward voltage drops). The generation (between the begin and end of each pulse half
magnetizing current path is leading for via and interval) required for a symmetric transformer magneti-
the diodes and for via and zation.
and • For at the system input a voltage having a
As opposed to this, the magnetizing current for fundamental equal to the mains voltage shall be
is conducted only on the secondary of formed. Then, the current controller has to provide only
the transformer and, therefore, is decreasing the relatively small fundamental voltage drop across the
according to the secondary voltage. On the primary, then, series inductors Furthermore, despite the fact that the
there is no closed current path for then has, pos- gain of an integrally acting component of is limited
sibly, a discontinuous shape because the output diodes do to finite values for mains frequency variations, the control
not allow a current sign reversal. The mains currents have error is limited to small values (see [33, Fig. 22]).
682 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 4, AUGUST 1999
(a)
(b)
Fig. 8. Block diagram of the two-loop control [see (a)] of the VIENNA Rectifier II (shown schematically); for the sake of clearness, signal paths being
equal for all phases are combined in double lines. (b) Time behavior of the triangular carrier wave iD of the ramp-comparison current controller, of
1
the precontrol signals mi ; of a superimposed current control error iN;R = +1 1
iN ; iN;S =1 iN;T = 0(1 2)1
= iN , and of the control signals
si generated within a pulse period TP :
V mH
and/or the phase axis
A mH
684 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 4, AUGUST 1999
Fig. 11. 2.5-kW laboratory model of the VIENNA Rectifier II. Dimensions:
30 cm 2 26 cm 2 11 cm (11.8 in 2 10.2 in 2 4.3 in). The control circuit
board is located horizontally above the power print. The transformer (ferrite
core SIEMENS RM 14) of the flyback converter for controlling the limitation
voltage and for power supply for control electronics and fans is visible in
the foreground.
B. Control Circuit
(c) The control of the system has been realized in analog
Fig. 10. Digital simulation of the time behavior of the mains phase voltages technology (see Fig. 11). As compared to a digital realiza-
uN;i ; i = R; S; T ; of the line-to-line rectifier input voltage uU;RS ; of the tion (as planned in the next step) with a microcontroller or
rectifier input phase voltage uU;R related to the mains star point N; of the
mains phase currents iN;i ; of the transformer primary current iT ;1 ; of the
digital signal processor (DSP), this has reduced the devel-
transformer primary voltage uT ;1 , and of the load current iO within a mains opment effort. Also, the test of partial functions has been
period [see (a)]. Also shown are the rated spectrum of the mains current [see simplified.
(b), fundamental component I^N suppressed] and of the output current iO [see 1) Current Measurement and Control: For the input cur-
(c), dc value IO suppressed; remark: harmonics with higher amplitudes are
concentrated in the vicinity of multiples of 2fP , i.e., n = 600, 1200, etc.]. n rent measurement, two phase currents are sensed with current
denotes the order of the harmonics related to the mains frequency fN : sensors 1:1000 (LEM Instruments, LA 25-NP); the third
686 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 4, AUGUST 1999
Fig. 12. Circuit measures for limiting the switching overvoltages occurring due to the transformer stray inductance. Due to the overvoltage limitation circuit
the overvoltages (resulting for step changes of iT ;1 ) of all valves on the primary are limited to Ucl : A reduction of the limitation power can
Dcl ; Ccl ; Rcl
be obtained by an auxiliary switch Sa on the secondary. A basically lossless system operation is possible if one changes from hard- to soft-switching
operation by connecting a capacitor Cr in parallel to the secondary.
phase current has been calculated according to the relationship As has become clear during a detailed experimental in-
being valid due to the missing vestigation of the system, one can completely avoid turn-
connection of the circuit with the mains star point. For a on and turn-off losses for the power transistors
dimensioning of the control as simply as possible, the phase by an appropriate time shift of the switching state
current controllers have been realized as proportional changes of and as compared to the related switching
(P) controllers; the output voltage controller has been state changes of Thereby, in and , only turn-
realized as a proportional integral (PI) controller with regard off losses result. Alternatively, a reduction of the switching
to stationary control accuracy. losses can be achieved also by changing from hard- to soft-
The recoding of the output signals of the phase current switching operation . Thereby, the stray inductance can
controllers, i.e., the inversion of a switching decision for be incorporated into the system function. For this, in analogy
negative sign of the related phase current to [36, Fig. 4.16], one has to provide a capacitor across
the output terminals of the transformer. Furthermore, then the
reference value [see (14)] and the correction of false switching
switching state sequence according to (8) has to be extended
decisions according to Table II [see Fig. 8(a)] has been real-
to
ized with a 2k-word by 8-bit CMOS electrically programmable
(Then, the magnetizing
read-only memory (EPROM) (CYPRESS CY7C291). voltage is defined by and, therefore, maintained also for
2) Precontrol Signals: The precontrol signals have blocking output diodes.) For the sake of brevity, a compar-
been composed by analog switches directly from segments of ison of the two control methods shall be left to a future
the mains phase voltages [which are measured for gaining paper.
the phase current reference values see
Fig. 8(a)] and of the line-to-line mains voltages gained from
the differences. This has given in all cases a matching of the C. Overvoltage Limitation
precontrol to the actual mains voltage conditions with small
A problem of the practical realization of the proposed
realization effort. circuit consists in the fact that the transformer is operated
3) Control of the Power Semiconductors: The transfer of not as voltage-fed (as for a buck-derived converter system),
the control energy has been achieved for each transistor but as current-fed. Naturally, thereby, every change of the
separately by a small-signal common-mode filter inductor switching state and/or of the transformer primary current is
on ferrite core SIEMENS EP7) used linked to the occurrence of an overvoltage. This overvoltage
as a high-frequency transformer. The control information has to be limited by an overvoltage limitation circuit
has been transmitted via optocouplers (TOSHIBA TLP 250) (see Fig. 12), e.g., between the positive and negative primary
with output driver stage having high common-mode transient voltage bus. Only by this approach can exceeding of the
immunity and a typical small-signal propagation delay time maximum allowable blocking voltage stress on the power
of ns. semiconductors be avoided.
KOLAR et al.: VIENNA RECTIFIER II 687
As the experimental analysis shows (and as can be verified without an explicit precharge circuit via the
by analytical calculations), the average power fed into the diodes and to the peak value of
clamp circuit during switching processes shows a highly the mains line-to-line voltage. Because, as mentioned before,
nonlinear dependency on the magnitude of the limiting voltage also the supply voltages of the electronics are realized by
relative to the line-to-line mains voltage For rated the flyback converter (discharging the clamp capacitor for
conditions, 2% of the output power are delivered into regular operation and functioning from V), then the
the electrolytic capacitor for output capacitor is precharged without additional control
V. The respective values are 3.5% for V and effort to the required starting value. There, the voltage being
5% for V. With respect to high efficiency of the present across and/or the main secondary winding of the
energy conversion, instead of the discharging resisitor flyback converter can simply be given via the turns ratio of the
(shown in Fig. 11), a flyback converter has been provided windings feeding the electronics and of the main secondary
which is connected to the controlled output voltage on winding.
the secondary; it transfers continuously the energy fed into If the voltage required for current control is available, then
in the form of pulses to the output (see [36, p. 152]). the output undervoltage detection enables the control and adds
Furthermore, this dc-to-dc converter serves as a potential-free the load.
power supply for the control electronics (power consumption
20 W) and for feeding of the fans (power consumption
6 W). Also, it serves for the precharging of the output E. Experimental Results
capacitor during system startup, as described in the following Characteristic signal shapes of the stationary operation of
section. the laboratory model are shown in Fig. 13.
Remark: One has to note that by a power transistor As can been seen from Fig. 13(a) and (b), the mains current
(and decoupling diodes situated on the secondary, a is guided proportional to the mains voltage in accordance
significant reduction of the limitation power can be achieved. with the theoretical considerations. (The deviation of the
This has been proposed in [17] in connection with a single- mains voltage from the ideal sinusoidal shape is caused by
switch three-phase flyback converter topology and also has a high mains load from single-phase rectifiers with capacitive
been analyzed in [37]. By , the secondary is shortened smoothing, e.g., in office electronics, copying machines, etc.)
during changes of the primary current as forced by switching The measured shape of the phase voltage and of the line-
state changes of the system. Thereby, the full limitation to-line voltage at the converter input check the results
voltage is available for obtaining of a new stationary current of the digital simulation of the circuit (see Fig. 10).
value which is delayed by the stray inductance and not The deviation of the shape of the transformer primary
only the difference of the limitation voltage and the voltage voltage from the simulation (see Fig. 10) can be explained
coupled into the transformer primary. The time interval for by the finite leakage inductance of the transformer, which,
the current commutation is substantially shortened thereby as mentioned in Section VI-C, leads to a triggering of the
and/or the power fed into the clamp circuit is substantially overvoltage clamp circuit and/or to overvoltage peaks with
reduced. amplitude 300 V for each switching state change. The simu-
lation has been based on a leakage-free transformer
however, the basic system behavior is represented correctly
D. System Startup and Overload Protection despite this simplification.
As mentioned in [10], the startup and the overload protection In the rated operating point, the following stresses on the
(short circuit of the output voltage) represent critical operating primary power transistors and diodes (related to the peak value
conditions for a single-stage boost-derived converter system. of the mains current fundamental) and on the output diodes
In both cases, the voltage coupled into the transformer primary and the output capacitor (related to the mean value of the
(which guides the mains current) is missing. The current being output current) have been measured (which can be used as a
driven by the mains voltage cannot be limited, therefore, first system evaluation during a concept study):
independently of the converter switching state, i.e., also for the
p.u. p.u.
active switching states and
(in being voltage forming during p.u. p.u.
regular operation. In case of a short circuit of the output p.u. p.u.
voltage , one has to block, therefore, immediately all p.u. p.u.
power transistors The energy stored in the
mains side inductances is then fed into the limitation circuit p.u. p.u.
this has to be taken into consideration for dimensioning p.u. p.u.
the storage capacitor Then, finally, the phase currents
become zero. Therefore, a limitation circuit is required also in p.u.
such cases when no overvoltages result for regular operation and show identical stresses; the same is valid for the
(i.e., e.g., for soft-switching operation). diodes and on the secondary.
For the laboratory model, the clamp capacitor has Therefore, a current stress on the power transistors results
been charged for blocked power transistors und which is relatively low in relation to the rms value and the
688 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 46, NO. 4, AUGUST 1999
(a) (b)
(c) (d)
Fig. 13. Stationary operating behavior of the laboratory model, representation for one mains period. (a) Mains phase voltages uN;R ; uN;S ; and uN;T (50
V/div). (b) Mains phase currents iN;R ; iN;S ; and iN;T (10 A/div). (c) Phase voltage uU;R (related to the mains star point N ) and line-to-line voltage uU;RS
at the rectifier input (100 V/div). (d) Transformer primary voltage uT ;1 (250 V/div) and transformer primary current iT ;1 (20 A/div).
average absolute value of the mains current. For the values high-frequency isolation of the controlled output voltage has
and which are realized advantageously as an IGBT bridge been proposed.
half leg for higher input voltages, the rms current stress can The system has (in particular, as compared to buck-derived
be considered to be equal to the mains current rms value in topologies [38]) the following advantages and disadvantages.
a rough first approximation. (The general advantages of single-stage as compared to two-
Due to space limitations, further results of the experimen- stage converter systems, already mentioned in Section I, are
tal analysis of the converter, as well as the approach for not again discussed in detail here.)
the dimensioning of the components, shall be compiled and The advantages are as follows.
discussed in a paper presently in preparation.
• There is a simple structure of the power and control
circuits (the control described can be realized in purely
analog fashion).
VII. CONCLUSIONS • There is continuous sinusoidal input current shape (re-
In this paper, a novel topology of a single-stage three-phase duction of the filtering effort required on the mains side
ac-to-dc converter with sinusoidal input current shape and and/or lower electromagnetic influence on other systems).
KOLAR et al.: VIENNA RECTIFIER II 689
• According to the constant power flow at the input for such that, for minimum output voltage, a primary voltage
sinusoidal current shape, there are no low-frequency can still be generated which balances the maximum input
harmonics of the output current (low psophometric noise). voltage.
• There is impressed transformer primary current and/or • In general, no direct startup and no direct current limita-
dynamic limitation of the input current (e.g., for saturation tion for an output voltage short circuit is possible, which
of the magnetic circuit of the transformer due to control is a more complex startup than for buck-derived converter
unsymmetries); furthermore, thereby, current spikes on systems; the basic reason is that the system function is
the primary resulting from reverse-recovery currents of dependent on a minimum value of the output voltage
the output diodes for buck-derived converter systems (which, in turn, is dependent on the input voltage).
are avoided. Also, a conduction overlap of the power As becomes clear by the list given, the converter system
transistors, i.e., switching state and/or proposed has a number of advantages which motivate a closer
becomes admissible and does not investigation, which is beyond the basic considerations of
lead to a short circuit of the line-to-line voltage. this paper. Here, in particular, the soft-switching operation
• The maximum volt seconds resulting across the trans- and the possibility of operating the system with low pulse
former are limited and are defined by the pulse period rate (as proposed in [39]–[41] for the conventional VIENNA
and the output voltage (and not by the mains voltage Rectifier) shall be investigated. Furthermore, the establishment
as for buck-derived converter systems); therefore, also of guidelines for converter dimensioning and a more detailed
for heavily varying mains voltage, a good transformer experimental analysis are planned.
utilization can be obtained (for approximately constant Concluding, one has to point out that based on the basic
output voltage). structure of the system proposed and investigated in this paper,
• The blocking voltage of the output diodes is defined by a new single-stage buck-type converter system with impressed
the output voltage (with low inductance) and is indepen- output current and impressed input voltage can be formed
dent of the mains voltage. This is of special advantage (VIENNA Rectifier III, [42]) by dual exchange of the input-
for wide input voltage range and constant output voltage side and output-side energy storage devices. According to first
and/or, in general, for high output voltages. (For buck- investigations, this new system also has high power density
type converters, the blocking voltage stress on the output and high efficiency. Therefore, the aim of further research
diodes is defined by the mains voltage. Due to the trans- also will be a comprehensive and comparative analysis of
former stray inductance and due to the output inductance, single-stage and two-stage (e.g., VIENNA Rectifier I [29]
one has no voltage level for a direct limitation of the with dc-to-dc converter connected in series [43]) three-phase
blocking voltage; this is in analogy to the limitation of PWM rectifier systems regarding realization cost, efficiency,
the voltages on the primary for boost-derived converter and volume. The results also will determine the future trends
systems, see Section VI-C). of the research at the Technical University Vienna in the
• There is good cross regulation for more than one output area of three-phase rectifier systems with low effects on the
voltage under the assumption of close coupling of the mains.
secondary windings (see [38, p. 1]) because no filter in-
ductances are in series with the different output voltages.
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[25] J. G. Cho, J. W. Baek, D. W. Yoo, D. I. Song, and G. H. Rim, “Zero- Ph.D. degree (promotio sub auspiciis preasidentis
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factor correction,” in Proc. 12th IEEE Applied Power Electronics Conf., Technical University Vienna, Vienna, Austria.
Atlanta, GA, Feb. 23–27, 1997, vol. 1, pp. 471–476. He joined the Department of Electrical Drives
[26] A. S. Kislovski, “Sub-kilowatt telecom rectifiers: Design trade-offs,” and Machines, Technical University Vienna, in
in Proc. 1st Int. Telecommunications Energy Special Conf., Berlin, 1997. His current research interests include high-
Germany, Apr. 11–15, 1994, pp. 241–248. power-factor rectifier systems, control optimization
[27] J. W. Kolar, H. Ertl, and F. C. Zach, “Realization considerations for of three-phase inverter systems for wide-speed-
unidirectional three-phase PWM rectifier systems with low effects on the range ac drives, and modeling and simulation of
mains,” in Proc. 6th Int. Conf. Power Electronics and Motion Control, power electronic systems. He is also involved as
Budapest, Hungary, Oct. 4–6, 1990, vol. 1, pp. 234–243. a consultant in several international industrial research and development
[28] W. Koczara, “Unity power factor three-phase rectifier,” in Proc. 6th Int. projects and has proposed numerous novel converter topologies, e.g., the
(2nd Eur.) Power Quality Conf., Munich, Germany, Oct. 14–15, 1992, VIENNA rectifier concept. He is the author of 105 technical and scientific
pp. 79–88. papers and patents.
[29] J. W. Kolar and F. C. Zach, “A novel three-phase utility interface Dr. Kolar has served as an Associate Editor of the IEEE TRANSACTIONS
minimizing line current harmonics of high-power telecommunications ON INDUSTRIAL ELECTRONICS since 1997.
KOLAR et al.: VIENNA RECTIFIER II 691
Uwe Drofenik was born in Mödling, Austria, in Franz C. Zach (M’83) was born in Vienna, Austria,
1970. He received the M.Sc. degree (with honors) in 1942. He received the Dipl.-Ing. (M.Sc.) de-
and the Ph.D. degree (also with honors) in electrical gree in electrical engineering (telecommunications)
engineering from the Technical University Vienna, and the Ph.D. degree (cum laude) in the area of
Vienna, Austria, in 1995 and 1999, respectively. automatic control optimization from the Technical
He is currently performing scientific research in University Vienna, Vienna, Austria, in 1965 and
the Department of Electrical Drives and Machines, 1968, respectively.
Technical University Vienna. During 1996, he was From 1965 to 1969, he was a Scientific Assistant
a Researcher at the University of Tokyo, Tokyo, with the Technical University Vienna and, from
Japan. His research interests include power-factor 1969 to 1972, he was with the NASA Goddard
correction, single- and three-phase converters, and Space Flight Center, Greenbelt, MD, where he de-
digital simulation of power electronic systems. veloped new optimization methods for attitude control of earth-orbiting
satellites. In 1972, he became an Associate Professor of Power Electronics,
Technical University Vienna, where he has headed the Power Electronics
Section since 1974. He is currently a Professor of Power Electronics. He is the
author of numerous technical and scientific papers and patents and two books
concerning automatic control and power electronics. His current activities lie
in the area of power electronics and associated controls, in particular, as used
for power supplies and electrical drives.