UNIT II- Chapter 1: CONVERTERS
Introduction
Processing signal using digital systems have many advantages So Digital systems are widely used for
control, communication, computers, Instrumentation etc.
In many such applications, the signals are not available in digital form so analog signals should be converted
in to digital form( A to D converter/ A/D converter or ADC)
The digital signals are processed & then they are again converted in to analog form for application
(D to A converter/ D/A converter or DAC)
Digital To Analog Converters (DAC)
A digital to analog converter (DAC) converts a digital signal to an analog voltage or current output.
101010101011010101 DAC
2 Methods
1) Weighted Resistor D/A Converter
2) R-2r Ladder D/A Converter
Weighted Resistor D/A Converter/ variable resistor network
The circuit diagram shows 4 bit weighted resistor D/A converter
Each bit signal b0, b1, b2, b3 is connected with weighted resistors 8R, 4R, 2R, R respectively.
The MSB input b3 is connected with lowest resistor R. The resistance value is made twice of
previous resistor as moving towards LSB.
As LSB bit has high resistance connected to it, minimum current will pass through the LSB resistance &
maximum current will pass through the MSB resistance.
Dia. Shows the Summing amplifier with 4 digital inputs B0,B1,B2, B3 with B3 As MSB with weighted
resistor R & B0 as LSB with weighted resistor 8R.
Summing Amplifier
In this circuit
Assume range of voltage from 0 V to 4 V i.e.
0 = 0V 1 = 4V
Then analog output for different combination of inputs can be calculated.
When input is B B B B = 0000 then Vo = 0 V
3 2 1 0
Advantages
1) Simple Construction/Analysis
2) Fast Conversion
Drawbacks:
1) It requires wide range of resistors about R to (2n-1 x R) for n bit & each resistor has different value.
2) It is difficult to fabricate such a wide range of resistors with integrated circuit technique.
3) Since the MSB bit has lowest value of R, it has to handle very large current if input size is too big.
R-2R Ladder D/A Converter
b2
0 1 0 1 0
1
Diagram shows 3 bit R-2R ladder D/A converter
This D/A converter is a resistive network & contains resistors of only two values R & 2R.
Inputs to the resistor network are applied through digitally controlled switches
Op-Amp acts like a summing amplifier.
MSB input is towards right & LSB input is towards left of the circuit.
For general n-Bit R-2R Ladder or Binary Weighted Resister DAC
n
1
Vout Vref bn i
i 1 2i
Analog input to Op-Amp for various digital inputs
1) Suppose digital input is B2B1B0 =100 & Vref=10 V. Then
Vout= - 10(b2/2 + b1/4 + b0/8)
= - 10 (1/2 + 0/4 + 0/8)
=-5V
Advantages
Only two resistor values (R and 2R)
Does not require high precision resistors
Disadvantage
Lower conversion speed than binary weighted DAC
Analog To Digital Converters
A analog to digital converter (ADC) converts a analog voltage or current to digital output.
DAC 01010101010
2-Step Process
Quantizing – Whole range of analog voltage is represented suitably in 2N intervals. (N-bit A/D Converter)
Encoding – Each interval is then assigned a unique N-Bit binary code this process is called encoding.
The number of possible states that the converter can output is: N=2n
Where n is the number of bits in the A/D converter
Example: For a 3 bit A/D converter, N=23=8.
Analog quantization size:
Q=(Vmax-Vmin)/N = (10V – 0V)/8 = 1.25V
TYPES OF ADC
1) Parallel comparator A/D converter OR Simultaneous A/D Converter OR Flash ADC
2) Successive Approximation type A/D Converter
3) Counter type/Counting A/D Converter
1) Parallel comparator A/D converter OR Simultaneous A/D Converter OR Flash ADC
Vin
The circuit consists of
1) Series of comparators
2) encoder circuit
3) Resistors
As shown in circuit dig. The analog voltage which is to be converted in to digital form is given to non
inverting inputs of all comparators.
The reference voltage is given to inverting inputs of all comparators.
The series of comparators compare the input signal(Analog Signal) to a reference voltage as gerenates
output accordingly as shown below.
Voltage Input Logic output C
Vref<Vin C=0
Vref>Vin C=1
Vref=Vin Previous Value
As the analog input voltage exceeds the reference voltage at each comparator, the comparator outputs will
sequentially saturate to a high state.
The comparator outputs are given to encoder circuit, which converts the inputs in to binary equivalent.
The encoder generates a binary number as per the following logic for given circuit.
Analog I/P Vin C7 C6 C5 C4 C3 C2 C1 Y2 Y1 Y0
0<Vin<Vr1 0 0 0 0 0 0 0 0 0 0
Vr1<Vin<Vr2 0 0 0 0 0 0 1 0 0 1
Vr2<Vin<Vr3 0 0 0 0 0 1 1 0 1 0
Vr3<Vin<Vr4 0 0 0 0 1 1 1 0 1 1
Vr4<Vin<Vr5 0 0 0 1 1 1 1 1 0 0
Vr5<Vin<Vr6 0 0 1 1 1 1 1 1 0 1
Vr6<Vin<Vr7 0 1 1 1 1 1 1 1 1 0
Vr7<Vin<Vref 1 1 1 1 1 1 1 1 1 1
Advantages
Simplest in terms of operational theory
Most efficient in terms of speed, very fast
Limited only in terms of comparator and gate propagation delays.
Disadvantages
Lower resolution
Expensive
For each additional output bit, the number of comparators is doubled
i.e. for 8 bits, 257 comparators needed
2) Successive Approximation ADC
Circuit consists of
1) Successive approximation Register (SAR)- Heart of the circuit
2) 8 bit D/A converter
3) Comparator(OP-Amp)
OPERATION
1) Input analog signal which is to be converted in to digital is given to non-inverting i/p of Op-Amp.
2) SAR is RESET by holding a START(S) signal High.
3) On the first clock pulse The MSB of SAR is SET(1). So the o/p of SAR is 100.
4) The O/p of SAR is given to D/A converter which converts 100 in to analog equivalent signal which is the
given to Inverting I/p of Op-Amp.
5) Op-Amp acts like a comparator and compares the 2 Analog I/p signals & generate O/p accordingly
If D/A O/p >Vin Then the comparator O/p is low(0) then MSB of SAR will reset (0)
If D/A O/p <Vin Then the comparator O/p is High(1) then MSB of SAR will remain set (1).
6) In above both cases the next bit of MSB will SET(1) for next clock pulse.
7) So O/p of SAR will be 010 in first case or 110 in second case.
8) Again the same process repeat.
9) SAR will either SET or RESET bits & this continues until the SAR tries all the bits & binary equivalent of
the analog voltage is obtained.
10) This binary O/p can be given to digital display unit for displaying digital O/p.
For N-bit converter, N no. of clock pulses will be required hence slower than flash ADC but faster than counter
type A/D converters.
Application
Digital Voltmeter
Advantages
Capable of high speed and reliable
Medium accuracy compared to other ADC types
Good tradeoff between speed and cost
Capable of outputting the binary number in serial (one bit at a time) format.
Disadvantages
Higher resolution successive approximation ADC’s will be slower
3) Counter Type A/D converter
Circuit consists of
1) Up Counter
2) D/A converter
3) Comparator(OP-Amp)
OPERATION
1) Input analog signal which is to be converted in to digital is given to non-inverting i/p of Op-Amp.
2) Counter is RESET by using a clear pulse.(000)
3) The O/p of counter is given to D/A converter which converts 000 in to analog equivalent signal which is the
given to Inverting I/p of Op-Amp.
4) Op-Amp acts like a comparator and compares the 2 Analog I/p signals & generate O/p accordingly.
If D/A O/p<Vin Then the comparator O/p is High(1).
If D/A O/p>Vin Then the comparator O/p is LOW(0).
O/p of comparator is 1 of the i/p to the AND gate. Other i/p to AND gate is CLOCK pulse.
If Vo=1 then only clock pulse is applied to the counter, Counter increments & again the same process
repeat.
The counter increment till it becomes equal to an unknown analog voltage.
When Vo=0, the AND gate gets disabled & the counting stops. The o/p of counter is Binary equivalent of
analog i/p signal.
UNIT II- Chapter 2: TIMING CIRCUITS
MULTIVIBRATOR
An electronic circuit which generates square waves (or rectangular, saw-tooth waves) is known as
multivibrators.
A multivibrator is switching circuit
It is basically two stage amplifier with output of one stage is given to the input of the other stage.
The circuit operates in 2 states (ON or OFF).
The feedback is such that it will drive one transistor in saturation & other in cutoff. After certain time
controlled by circuit components the action is reversed. i.e. saturated transistor driven to cut off & cut off to
saturation.
The o/p will be square or rectangular depending on circuit components.
TYPES OF MULTIVIBRATOR
1. Astable Multivibrator/ Free running Multivibrator
2. Monostable Multivibrator
3. Bistable Multivibrator
Astable Multivibrator/ Free running Multivibrator
NO stable state.
Multivibrator output alternates automatically between the 2 states(0 & 1) & remain in each state for a time
dependent on circuit components(Resistors & capacitors).
Does not require external trigger pulse for operation.
It is called free running multivibrator as it continuously produces a square wave output.
Monostable Multivibrator
1 stable state & 1 quasi-stable state(Half stable)
The input pulse triggers the circuit into its quasi stable state.
The circuit remains in that state for the period determined by circuit components.
After this period of time circuit returns to its initial stable state.
The process is repeated upon the application of each trigger pulse.
Assume initially output is 0(Low). To change the state of O/P trigger pulse is needed. After application of
trigger pulse O/P switches to 1(High) & remains in High state for the time dependent on circuit components
(Resistors & capacitors) & after that time automatically switches to stable state which is 0.
It produces single o/p pulse for each i/p trigger pulse. (so the name monostable)
Bistable Multivibrator
2 stable states
It requires the input trigger pulse to change the output from one state to the other.
Thus 1 trigger pulse will generate half cycle of square wave & next pulse generate the next half cycle of
square wave.
IC-555 (TIMER)
It is a multivibrator circuit available in premade IC form.
It can be used as an astable or monostable multivibrator & can perform digital timing & switching functions.
The Circuit consists of
1) Comparator(Op-Amp)
2) S-R FlipFlop
3) Resistors & transistors
PIN CONFIGURATION
Pin 1: Ground
All the voltages are measured with respect to this terminal.
Pin 2: Trigger
This pin is an inverting input to a comparator 2 that is responsible
for transition of flip-flop from set to reset. The output of the timer depends on the amplitude of the external
trigger pulse applied to this pin.
Pin 3: Output
Output of the timer is available at this pin. There are two ways in which a load can be connected to the output
terminal
1) Between pin 3 and ground (pin 1): Normally off load
2) Between pin 3 and Vcc (pin 8): Normally on load
Pin 4: Reset (if grounded, timer is OFF)
To disable or reset the timer a negative pulse is applied to this pin due to which it is referred to as reset terminal.
When this pin is not to be used for reset purpose, it should be connected to + VCC to avoid any possibility of false
triggering.
Pin 5: Control Voltage
The external voltage given to this pin determines the pulse width of the output waveform.
The external voltage applied to this pin can also be used to modulate the output waveform.
When this pin is not used, it should be connected to ground through a capacitor to avoid any noise problem.
Pin 6: Threshold
This is the non inverting input terminal of comparator 1. Comparator compares the threshold voltage with a
reference voltage 2/3 VCC. The amplitude of voltage applied to this terminal is responsible for the set state
of flip-flop.
Pin 7: Discharge
This pin is connected internally to the collector of transistor and mostly a capacitor is connected between
this terminal and ground. It is called discharge terminal because when transistor saturates, capacitor
discharges through the transistor. When the transistor is cut-off, the capacitor charges at a rate determined
by the external resistor and capacitor.
Pin 8: Supply Terminal
A supply voltage of + 5 V to + 18 V is applied to this terminal with respect to ground (pin 1)
######### IC-555:Monostable Multivibrator
As the name suggests; in this mode the output is stable in only one (mono) state i.e. ‘off’ state.
If triggered then output goes HIGH & stay high only for a finite time, then it again comes to stable LOW
state. This time can be set choosing appropriate values of resistances.
It produces a single output pulse in response to a single input trigger signal.
DIAGRAMS
OPERATION
1) Initially when the output is low(0), transistor T is ON, operates in saturation region so it acts like closed
switch and the capacitor C is grounded.
2) When negative going trigger pulse is applied to pin 2 becomes lower than the Vcc/3, then the O/p of
Comparator 2 goes high. This O/p goes to SET terminal of S-R Flipflop, So Q =1 & Q(bar) = 0, then the
transistor T turns OFF, operates in cut-off region It acts like an open switch.
3) The capacitor C now starts charging to Vcc through R.
4) When the voltage across the capacitor becomes equal to 2/3 Vcc, then the upper comparator’s output goes
high(1).
5) This goes to RESET of S-R flipflop. Therefore O/P of Flipflop Q= 0 & Q(bar)= 1.
6) Now the transistor T turns ON and the capacitor C rapidly discharges through the transistor. The output of
the monostable is Low & remains low until next trigger pulse is applied.
7) Then the cycle repeats.
8) Pulse width T= 1.1 R.C
WAVEFORMS:
###### IC-555:ASTABLE MULTIVIBRATOR
In this mode; the output is stable neither in ‘high’ state nor in ‘low ’ state.
These circuits are not stable in any state and switch outputs after predetermined time periods.
Hence it oscillates from one state to another giving us a square wave/rectangular wave or clock with the
properties depending on values of external resistors and capacitors.
We can set the clock frequency and Duty cycle
DIAGRAMS
OPERATION
1) Initially assume the output is high (1) Q=1 & Q(bar)=0, transistor T is OFF, operates in cut off region so it
acts like open switch.
2) The capacitor C now starts charging to Vcc through R1 & R2.
3) When the voltage across the capacitor becomes equal to 2/3 Vcc, then the upper comparator’s output goes
high (1).
4) This goes to RESET of S-R flipflop. Therefore O/P of Flipflop Q= 0 & Q (bar)= 1.
5) Now the transistor T turns ON and the capacitor C rapidly discharges through the transistor.
6) The capacitor voltage is actually trigger voltage for lower comparator.
7) When Vc becomes lower than Vcc/3, then the O/p of Comparator 2 goes high. This O/p goes to SET
terminal of S-R Flipflop, So Q =1 & Q(bar) = 0, then the transistor T turns OFF, operates in cut-off region It
acts like an open switch.
8) The capacitor C again starts charging to Vcc through R1 & R2.
9) Then the cycle repeats.
WAVEFORMS:
IC-555:Applications
One-shot pulse generator in Monostable mode
Oscillator in Astable Mode
In Bistable mode to produce a flip/flop type action.
Pulse Amplitude Modulatin (PAM)
Pulse Width Modulation (PWM) etc.
