Power Supply Design

Seminar
Comparing AC/DC power-
conversion topologies for three-
phase industrial systems

Authors
Riccardo Ruffo, Kelvin Le and Harald Parzhuber
Agenda
• Overview of power-conversion systems
• Three-phase boost-converter topology overview and operating principles
• Power losses, common-mode noise and capacitor stress comparisons
• Experimental results (two level, T type, Vienna, active neutral point clamped
[ANPC])
• Conclusions

2
Overview: End Equipment with AC/DC Converter
Energy sustainability and security are
accelerating demands for:
• Renewable Energy: Wind and Solar Wind
• Energy storage systems
• Electric Vehicles (EV) & Chargers
Solar
Key End Equipment Challenges:
• Grid stability / reliability
• Power quality ESS
AC / DC Charger
• Fast & Efficient EV charging
ESS - Energy Storage System
OBC, V2X OBC - On Board Charger
V2X - Vehicle to Grid/Home
3
Overview: Existing AC/DC topologies
AC/DC boost converter benefits:
• Higher efficiency (lower currents)
• Less electromagnetic interference (EMI) Switching Stage
VDC+
noise injected into the grid PCC
• Able to handle better surges from the grid VLL Boost Inductors
L1
An AC/DC boost converter requires: L2
L3 EMI filter
• Boost power factor correction (PFC) VDC0

(VDC ≫ 2 VLL )
• Inductive behavior on the grid side PE

• Capacitive behavior on the DC side VDC-

• Three-phase benefits: current, size,

power ripple
4
Overview
Single-phase, two-level PFC Three-phase, two-level PFC
VDC+

Q1 Q3
Q1 Q3 Q5
Power Grid
VAC VL1_N L
Power Grid - +
L
VAC
+ VL2_N L
+ VDC Load - +
VN
VL_N - VDC0 Load

- VL3_N L
- +

Q2 Q4
Q2 Q4 Q6

VDC-

Switching cell
Note: Neutral of grid is virtually connected to the middle point at high frequency 5
Multilevel topology overview on AC/DC power stages

2L 3L 3L 3L 3L FC3L
two-level three-level Vienna ANPC neutral-point flying
converter T-type rectifier clamped (NPC) capacitor
VDC+ VDC+ VDC+

PWM Q1 PWM Q1 PWM Q1

VDC+ VDC+ VDC+

PWM Q3 PWM Q2 PWM Q2

D1 D5
PWM Q1 PWM Q1

PWM Q2
VAC
VAC VAC VAC
(VDC0) VAC VDC0 VAC VDC0 VDC0
SW-NODE
VDC0
SW-NODE
(VDC0)
SW-NODE SW-NODE SW-NODE SW-NODE
PWM Q3
PWM Q4

PWM Q5
PWM Q3

PWM Q4
PWM Q4 PWM Q3 PWM Q3
D2 D6
PWM Q2 PWM Q2

VDC- VDC- VDC- PWM Q6 PWM Q4 PWM Q4

VDC- VDC- VDC-

Requires two Requires three Requires two

connections to connections to connections to
the DC link the DC link the DC link
2L converter: Basic operating principles
Power For a positive sine wave (VDC0 ≤ VAC ≤ VDC+), duty cycle >50%:
Inverter Mode VDC+ • Q1 and Q2 are switching fPWM

Q1 • Output voltage is defined by duty cycle of the pulse-width

modulator (PWM) (Q1 is on more often than Q2)
VAC (VDC0)
SW-NODE
• Dead time between Q1 and Q2
For a negative sine wave (VDC- ≤ VAC ≤ VDC0), duty cycle <50%:
Q2
• Q1 and Q2 are switching fPWM
VDC-
VDC+
• Output voltage again defined by duty cycle of PWM (Q1 is more
VDC0 often OFF than Q2)

VDC-
At zero crossing, the duty cycle is 50%
Inductor Current When the output ripple frequency fHF-RIPPLE is equal to fPWM:

• fRIPPLE defines sizes of filtering components (magnetics and

capacitors)

Q1 and Q2 need be VDC rated (for VDC = 800 V, 1,200-V rated)

7
3L T-type: Basic operating principles
Power For a positive sine wave (VDC0 ≤ VAC ≤ VDC+):
Inverter Mode VDC+ • Q4 is permanently in the on-state; Q2 is permanently off

Q1
• Q1 and Q3 in red are switching fPWM

Q4 Q3
• The dead time between Q1 and Q3 needs to be accounted for
VAC
VDC0
SW-NODE For a negative sine wave (VDC- ≤ VAC ≤ VDC0):

• Q3 is permanently in the on-state, Q1 is permanently off

Q2
• Q2 and Q4 in blue are switching fPWM
VDC-
VDC+
• The dead time between Q2 and Q4 needs to be accounted for
Q1 When the output ripple frequency fHF-RIPPLE is equal to fPWM:

VAC
Q4 Q3 • fHF-RIPPLE defines the size of filter components (magnetics and
VDC0 Inductor Current
SW-NODE capacitors)
Q1 and Q2 need be VDC rated (for VDC = 800 V, 1,200-V rated)
Q2
Q3 and Q4 can be 1/2 VDC rated (for VDC = 800 V, 600-V rated)
VDC-
8
3L Vienna rectifier: Basic operating principles
Power For a positive sine wave (VDC0 ≤ VAC ≤ VDC+):
PFC VDC+ • Current is negative because of PFC operation

D1
• Q4 is permanently in the on-state

Q4 Q3
• Q3 in red is switching at fPWM
VAC
VDC0
SW-NODE
For a negative sine wave (VDC- ≤ VAC ≤ VDC0):
D2 • Current is positive because of PFC operation

• Q3 is permanently in the on-state

VDC-
VDC+
• Q4 in blue is switching at fPWM
D1
Inductor Current
When the output ripple frequency fHF-RIPPLE is equal to fPWM:
Q4 Q3
VAC
VDC0 • fHF-RIPPLE defines the size of filter components (magnetics and
SW-NODE
capacitors)
D2 D1 and D2 need be VDC rated (for VDC = 800 V, 1,200-V rated)
Q3 and Q4 can be 1/2 VDC rated (for VDC = 800 V, 600-V rated)
VDC-
9
3L ANPC: Basic operating principles
Power
VDC+
For a positive sine wave (VDC0 ≤ VAC ≤ VDC+):
Q1
Inverter Mode • Q3 is permanently in the on-state, Q4 is off
Q3 Q2
• Q1 and Q2 in red are switching fPWM
VAC
VDC0
SW-NODE • Additionally, Q5 is switching with Q1

Q4
Q5 For a negative sine wave (VDC- ≤ VAC ≤ VDC0):

• Q4 is permanently in the on-state, Q3 is off

Q6

VDC- • Q5 and Q6 in blue are switching fPWM

VDC+

Q1 • Additionally, Q2 is switching with Q6

Q3 Q2 When the output ripple frequency fHF-RIPPLE is equal to fPWM:

VAC
VDC0
Inductor Current • Again, fHF-RIPPLE defines the size of filter components
SW-NODE

Q5
All switches can be 1/2 VDC rated (for VDC = 800 V, 600-V rated)
Q4

Q3 and Q4 are switching at fAC (50 or 60 Hz)

Q6
Critical shutdown sequencing – balancing of voltages to 1/2 VDC
VDC- 10
3L NPC: Basic operating principles
VDC+
Power
For a positive sine wave (VDC0 ≤ VAC ≤ VDC+):
Q1
Inverter Mode
• Q2 is permanently in the on-state; Q4 is off
Q2 D5
• Q1 in red is switching fPWM
VAC
VDC0
SW-NODE
• Q3 operates complementary to Q1
D6
Q3
For a negative sine wave (VDC- ≤ VAC ≤ VDC0):

Q4 • Q3 is permanently in the on-state; Q1 is off

VDC-
VDC+ • Q4 in blue is switching fPWM
Q1
• Q2 operates complementary to Q4
Q2 D5
Inductor Current When the output ripple frequency fHF-RIPPLE is equal to fPWM:

SW-NODE
VDC0 All switches can be 1/2 VDC rated (for VDC = 800 V, 600-V rated)
Critical shutdown sequencing – balancing of voltages to 1/2 VDC
D6
Q3

Q4

VDC- 11
FC3L: Basic operating principles
Power
VDC+ All FETs are switching fPWM
Inverter Mode
Q1 Pairs Q1 and Q4 and Q2 and Q3 complement each other
For a positive sine wave (VDC0 ≤ VAC ≤ VDC+):
Q2

• At the +peak, Q1 and Q4 and Q2 and Q3 are 180 degrees phase-shifted

VAC
(VDC0)
SW-NODE to each other and Q1 and Q2 are more in the on-state than Q3 and Q4
For a negative sine wave (VDC- ≤ VAC ≤ VDC0):
Q3

• At the –peak, Q1 and Q4 and Q2 and Q3 are 180 degrees phase-shifted

Q4
to each other and Q1 and Q2 are more in the off-state than Q3 and Q4
VDC-
At zero crossing:

• The duty cycle of Q1 and Q4 and Q2 and Q3 are each 50%

Q1/Q2 more OFF
Q3/Q4 more ON When the output ripple frequency fHF-RIPPLE is equal to 2 × fPWM:

• Defines a smaller size of filter components (magnetics and capacitors)

All switches can be 1/2 VDC rated (for VDC = 800 V, 600-V rated)
Initial charging of flying capacitor to 1/2 VDC is critical
Critical shutdown sequencing – balancing of voltages to 1/2 VDC

12
Comparison overview
• When designing a three-phase Required inductance is half when using
converter, you need to consider: a three-level converter
o Input filtering
Active
o Output filtering EMI filter components
o Active component selection
o Control +
–
o Drivers
o Measurements
• Converter size, efficiency and cost are Output
at first approximation driven by: filtering
o Active components and cooling
• Study done for an 11-kVA system
o Output filtering (capacitors)
• Maximum allowable power loss is 130 W
o Input filtering (EMI filtering)

13
Power-loss comparison: Applied methodology
• Three-phase converters can operate as
DC link voltage Voltage and current
a PFC or as an inverter measurement grid measurements
• What are the differences in losses when V_DC POWER PLANT Boost
I_d*+ P_Load P_Rec Inductors
operating as a PFC or an inverter? PI M_d* i_L1 V_L1

I_d
FFW DQ→123 V_DC + Switching i_L2 V_L2
-
• How are the power losses distributed I_q*+
PI
M_q* PWM UNIT - Stage i_L3 V_L3

within the components? - I_q

Sin PWM_L1, PWM_L2, PWM_L3
Cos

• Target inverter 11 kW: keep constant V_d, V_q

I_q
Sin
Cos
the current amplitude and change angle I_d
123→DQ PLL
𝑣𝐿3 Duty cycles applied to the
switching stage Shape is not
𝑖𝑞 sinuosidal because of
𝑖𝐿3 𝑖𝐿1 the third harmonic
introduced by space
𝑣𝐿1 vector modulation
𝑖𝑑

Design Considerations for Current

𝑣𝐿2 Sensing in DC EV Charging
𝑖𝐿2
Applications 14
 Power-loss comparison: Two-level converter
VDC+
ISW Switch-node current (t) Q1 or Q2 conduction losses (θ)
Q1

VAC (VDC0)
SW-NODE
INV
ISW 16 A Operation
Q2

θ Q1 conduction lossQ1
(t)
VDC-
VAC 230 V INV IND. PFC CAP. INV

• Bidirectional (11 kVA) Q1 or Q2 switching losses (θ)

• 75 mΩ, 1.2 kV, silicon carbide Turn-on, Turn-off Losses;
(SiC)
• Conduction and switching Q1 switching loss (t)
losses are extrapolated
• Switching losses during half
cycle are null
• Losses in function of the angle INV IND. PFC CAP. INV
are not changing Operating angle
• Total loss: 130 W at 60 kHz 15
 Power-loss comparison: T-type
VDC+
Q1 or Q2 conduction losses (θ) Q3 or Q4 conduction losses (θ)
Q1

Q4 Q3
VAC VDC0
SW-NODE

ISW 16 A
Q2

θ VDC-

VAC 230 V INV IND. PFC CAP. INV INV IND. PFC CAP. INV

• Bidirectional (11 kVA) Q1 or Q2 switching losses (θ) Q3 or Q4 switching losses (θ)

• 75 mΩ, 1.2 kV, SiC Switching losses at two
• 60 mΩ, 650 V, SiC level are 10 W at 60 kHz Q3 and Q4 lower switching losses
• No switching losses of Q1
and Q2 at 0 degrees
• No switching losses of Q3
and Q4 at ±180 degrees PFC
INV INV INV PFC INV
• Total loss: 130 W at 100
kHz 16
 Power-loss comparison: Vienna rectifier
VDC+

D1 D1 or D2 conduction losses (θ) Q3 or Q4 conduction losses (θ)

Q4 Q3
VAC VDC0
SW-NODE

ISW 16 A
D2

θ
VDC-
VAC 230 V INV IND. PFC CAP. INV INV IND. PFC CAP. INV
• Unidirectional (11 kVA) 𝑣𝐿3 Q3 or Q4 switching losses (θ)
• Schottky barrier diode, 30 A,
1.2 kV, SiC
• 60 mΩ, 650 V, SiC 𝑖𝐿1
• Q3 and Q4 always have 𝑖𝐿3
𝑣𝐿1
switching losses
• Converter operating limit 𝑖𝐿2
angles are ±30 degrees 𝑣𝐿2 INV PFC INV
• Total loss: 130 W at 95 kHz
PFC operation
17
 Power-loss comparison: NPC
Q1
Q1 or Q4 conduction losses (θ) Q2 or Q3 conduction losses (θ)
Q2 D5

VAC
VDC0
SW-NODE

Q3
D6

Q4
INV IND PFC CAP INV INV IND PFC CAP INV
VDC-

• Bidirectional (11 kVA) Q1 or Q4 switching losses (θ) Q2 or Q3 switching losses (θ)

• SBD, 30 A, 650 V, SiC
• 35 mΩ, 650 V, SiC
• No switching losses of Q1
and Q4 at 0 degrees
• No switching losses of Q2
and Q3 at ±180 degrees PFC
INV INV INV PFC INV
• Total loss: 130 W at 98
kHz 18
 Power-loss comparison: ANPC
Q1 Q1 or Q6 conduction losses (θ) Q2 or Q5 conduction losses (θ)

Q3 Q2

VDC0
SW-NODE

Q4 Q5

Q6
INV IND. PFC CAP. INV INV IND. PFC CAP. INV
VDC-

• Bidirectional (11 kVA) Q1 or Q6 switching losses (θ) Q2 or Q5 switching losses (θ)

• 35 mΩ, 650 V, SiC
• 35 mΩ, 650 V, silicon
• No switching losses of Q1
and Q4 at 0 degrees
• No switching losses of Q5
and Q6 at ±180 degrees PFC
INV INV INV PFC INV
• Total loss: 130 W at 108
kHz 19
 Power-loss comparison: Flying capacitor
VDC+

Q1 Q1, Q2, Q3 or Q4 conduction losses (θ)

Q2

(VDC0)
SW-NODE

Q3
INV IND. PFC CAP. INV
Q4

VDC-
Q1, Q2, Q3 or Q4 switching losses (θ)

• Bidirectional (11 kVA)

• 35 mΩ, 650 V, SiC
• Conduction and switching losses are mostly
constant in function of the angle
• In general, this topology is more efficient INV PFC INV
thanks to double-frequency out
• Total loss: 130 W at 69 kHz 20
 Current-ripple comparison in three-phase AC/DC
Two-level converter Three-level flying capacitor Three-level ANPC, T-type, NPC

VDC+
VDC+

• DC power coming out • DC power coming out from • Low-frequency power ripple
VDC+

from three-phase AC three-phase AC does not caused by charging and

𝑓𝑠𝑤 lead power ripple when grid 𝑓𝑠𝑤
𝑓𝑠𝑤 does not lead power VAC
(VDC0)
VAC
VDC0
discharging of capacitor
VAC
SW-NODE
(VDC0 )
ripple when grid is SW-NODE is symmetric SW-NODE
3𝑓𝑒 during half period
symmetric • Minimum quantity of • Electrolytic capacitor
• Minimum quantity of electrolytic capacitors necessary with reactive
𝑓𝑠𝑤
VDC-
electrolytic capacitors • Film capacitors filter the VDC- power
• Film capacitors filter the
VDC-
ripple current • Film capacitors filter the
ripple current • Flying capacitor only seen ripple current
at switching frequency 21
Common-mode noise comparison: Introduction
Depending on the application, the
common-mode voltage can become
very critical: VDC+
Power String Inverter
• Panels are presenting high surfaces D1
Q5 Q3 Q1
VL1_N
exposed to ground Lpv L
+ -

VL2_N
VDC0
• When raining, parasitic capacitance
L
VL1,DC0 EMI filter + - VN
VL2,DC0 L VL3_N
of the photovoltaic (PV) panel can be PV VL3,DC0
+ -

as high as 200 nF/kWp (kilowatt Q7 Q6 Q4 Q2

PE
PE

power peak installed) PE

VDC-
• When three-phase inverter switches,
it generates a common-mode voltage VCM = ( VL1,DC0 + VL2,DC0 + VL3,DC0 ) /3
that creates parasitic currents
• Issues related to safety and possible
unwanted triggering of the residual
current detector may occur 22
Common-mode noise comparison: Results
Two level Three level
• At first approximation, three-level converters are
always presenting the same common-mode
noise (Vienna, T-type, ANPC, NPC)
• Peak common-mode voltage applied at two
levels is three times higher than three levels. At
800 VDC:
o 400-V peak with a two-level AC/DC
o 400-V/3 peak with a three-level AC/DC
• RMS common-mode voltage applied at two
levels is three times higher than three levels. At
800 VDC:
o 310 VRMS with a two-level AC/DC
o 74 VRMS with a three-level AC/DC
• Significant attenuation effort required by the EMI
filter in a two-level converter for PV applications
23
Bill-of-materials comparison
2L 3L 3L 3L 3L FC3L
two-level three-level Vienna ANPC NPC flying
converter T-type rectifier capacitor
VDC+ VDC+ VDC+

VDC+ VDC+ VDC+ PWM Q1 PWM Q1 PWM Q1

D1 D5
PWM Q1 PWM Q1 PWM Q3 PWM Q2 PWM Q2

PWM Q2
VAC
VAC VAC VAC VAC VAC
V
(VDC0
DC0) VDC0 VDC0 VDC0 VDC0 (VDC0)
SW-NODE SW-NODE SW-NODE SW-NODE
SW-NODE SW-NODE

PWM Q4

PWM Q3
PWM Q3

PWM Q4

PWM Q5
PWM Q4
D2 PWM Q3 D6 PWM Q3
PWM Q2 PWM Q2

VDC- VDC- VDC-

PWM Q6 PWM Q4 PWM Q4

VDC- VDC- VDC-

Reference converter

24
Experimental results: TIDA-01606
• The 10-kW, Bidirectional Three-Phase Three-Level (T-type) Inverter and PFC
Reference Design includes an 11-kW converter based on SiC devices (50
kHz):
– When operating as a T-type, 650 V 60 mΩ (SiC) and 1,200 V 75 mΩ (SiC)
– When operating as a two-level converter, 1,200 V 75 mΩ (SiC)
– When operating as a Vienna rectifer, 1,200 V 40 A SBD (SiC),
650 V 60 mΩ (SiC)

Two level T-type Vienna

VDC+ VDC+ VDC+

VAC (VDC0) VAC VAC

SW-NODE VDC0 VDC0
SW-NODE SW-NODE

VDC- VDC- VDC-

25
Experimental results: TIDA-010210
• The 11-kW, Bidirectional, Three-Phase ANPC Based on GaN Reference
Design includes an 11-kW converter based on GaN devices (100 kHz):
o Low-frequency 40 mΩ, 600 V silicon superjunction metal-oxide
semiconductor field-effect transistor (MOSFET)
o High-frequency 30-mΩ, 600-V GaN
• At a higher DC link voltage and low load, efficiency is lower
• At a higher DC link voltage and high load, efficiency is higher
Q1

Silicon Q3 Q2
GaN devices
devices VDC0
SW-NODE

Q4 Q5

Q6
VDC-

26
Conclusions
• Multilevel topologies:
o Smaller passives offer up to 50% reduction in size for a three-level inverter vs. a
two-level inverter

o A multilevel topology enables FETs with significantly lower switching and

conduction losses, which improves efficiency by using FETs with half the
blocking voltage for the same DC bus voltage

o Three-level topologies keep the switching voltage to half of a two-level inverter,

which reduces overall EMI

27
SLUP426

28
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