Question Bank of Unit-3
Course: BCA –III Subject: Computer Architecture
Paper Code: BCA 203
1. Draw the block diagram for the hardware that implements the following
statement:
x+yz: ARAR+BR,
where AR and BR are two n-bit registers and x, y and z are control variables
2. Design a 4-bit combinational circuit decrementer using four full adders.
3. Tabulate various shift micro operation and design a 4 bit combination circuit
shifter.
4. Starting from an initial value of R=1 1011101, determine the sequence of binary
values in R after a logical shift-left, followed by a circular shift-right, followed
by a logical Shift-right and a circular shift-left.
5. A computer uses a memory unit with 256 K words of 32 bits each. A binary
instruction code is stored in one word of memory. The instruction has four parts:
an indirect bit, an operation code, a register code part to specify one of 64
registers and an address part .Draw the instruction word format and indicate the
number of bits in each part.
6. Starting from an initial value of R=11011101, determine the sequence of binary
values in R after a logical shift-left followed by a shift –right and a circular shift
–left.
7. Draw a diagram of bus system for four registers with 8-bit each using three-state
buffers and decoder.
8. What is the difference between a direct and indirect address instruction?
9. Give a suitable example to discuss insert and selective clear operation.
10. Register A holds the 8-bit binary 11011001. Determine the B operand and the
logic micro-operation to be performed in order to change the value in A to
(i) 01101101 (ii) 11111101
11. Difference between hardwired control and microprogram control
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12. What are micro-operations? What are its various types? Illustrate the
implementation of
i. each category of micro-operations through its block diagram(s).
13. What is a bus? Design a bus system capable of transmitting data from any
register from a
i. group or to registers (32-bits each) to any other register in a group
of 8 registers (32-bits
ii. each). Illustrate the logic through its block diagram?
14. Design an arithmetic circuit with one selection variable S and two n-bit date
inputs A and
i. B. The circuit generates the following four arithmetic operations in
conjunction will the
ii. input carry Cin. Draw the logic diagram for the first two stages.
S cin=0 cin=1
0 D=A+B D=A+1
1 D=A-1 D=A+Bc +1
15. Explain the difference between a direct and indirect address instruction. How
may
i. references to memory are needed for each type of instruction to
bring an operand into a
ii. processor register?
16. The output of four registers R0,R1,R2,R3 are connected through 4-to 1 line
multiplexers
i. to the inputs of a fifth register ,R5. Each register is eight bits long.
The required transfers
ii. are dictated by four timing variables T0 through T3 as follows:
1. To: R5R0
2. T1: R5R1
2
3. T2: R5R2
4. T3: R5R3
iii. Timing variables are mutually exclusive .Draw a block diagram
showing the hardware implementation of the register transfers.
17. What are the various phases of an instruction cycle? Give the micro operations
i. of fetch and decode phases. How the first two register transfer
statements are
ii. implemented?
18. Design a flow chart showing instruction cycle and interrupt cycle for basic
computer operation.
19. Tabulate various memory reference instruction .Explain BUN and BSA.
20. The 8-bit register AR, BR, CR and DR initiatory have the following values.
AR = 11110010
i. BR = 11111111
ii. CR = 10111001
iii. DR = 11101010
b. Determine the 8-bit values in each register off the execution of the
following sequence of
micro operations.
AR AR + BR
CR CR ^ DR, BR BR + 1
AR AR – CR
21. Explain arithmetic circuit and draw the circuit diagram with function table.
22. Design and Explain the flow chart of computer operation.
23. Consider the instruction format of the basic computer for each of the following
16 bit instruction give the equivalent four digits hexadecimal code and explain
that what an instruction going to perform.
a. 0001 0000 0010 0100
b. 1011 0001 0010 0100
c. 0111 1000 0000 0000
d. 0111 0000 1000 0000
e. 1111 1000 0000 0000
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24. Giving suitable block diagram show major components of CPU.
25. What is stack organization?
26. What is the reverse polish notation? Explain with an example.
27. What is stack organization? Describe its function using a suitable example
Define stack limit.
28. What are addressing modes? Discuss different types of addressing modes.
29. Explain Instruction Format.
30. Design 3 and zero address instruction format for y=(A+B)*(C+D)
