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 UNIT 2

Transistor and OPAMP

Unit II Transistor and OPAMP [7L]
• Bipolar Junction Transistor : Construction, type,
Operation, V-I Characteristics, region of operation, BJT as
switch and CE amplifier

• Metal Oxide Semiconductor Field Effect Transistors

(MOSFET): Construction, Types, Operation, V-I
characteristics, Regions of operation, MOSFET as switch
& amplifier.

• Operational amplifier: Functional block diagram of

operational amplifier, ideal operational amplifier, Op-
amp as Inverting and Non inverting amplifier
Sinhgad College of Engineering, Pune – 41.
2
Department of Electronics &Telecommunication Engineering
 Introduction
• The semiconductor device like a diode cannot amplify a signal,
therefore its application area is limited.

• The next development of semiconductor device after diode is a BJT

(bipolar junction transistor).

• It is a three terminal device. The terminals are – collector, emitter,

and base. Out of which the base is a control terminal.

• A signal of small amplitude applied to the base is available in the

“magnified” form at the collector of the transistor.

• Thus the large power signal is obtained from a small power signal.
 Pictorial History of Transistors

http://www.bellsystemmemorial.com/belllabs_transistor.html
 Why is it called transistor ?
• The term transistor was derived from
the words TRANSFER & RESISTOR.

• Transfers input signal current from a

low resistance path to a high resistance
path.
 Why it is called as a “Bipolar” transistor ?

• The conduction in a bipolar junction

transistor takes place due to both,
ELECTRONS and HOLES
• A transistor is a Current operated device.
• The input impedance of a transistor is HIGH
• The example of a unipolar device is the field
effect transistor (FET)
 Types of transistor

• The bipolar transistors are of two types :

• P-N-P Transistor

• N-P-N Transistor

• All three regions are provided with terminals which labeled as

E (emitter ),
B (Base), and
C (collector)
 Emitter :
•It is a region situated in one side
of transistor, which supplies charge carriers
(i.e. electrons and holes) to the other two regions
•The emitter is heavily doped region
Base :
p n •It is a middle region that forms two P-N junctions
n p
In the transistor.
p n • the base of transistor is thin as compared to
Emitter.
And it is lightly doped region

collector :
•It is the situated in the other side of transistor (i.e. Opposite to
the emitter), which collect charge carriers (electrons or holes)
•The collector of a transistor is always larger than the emitter and
base of transistor.
•The doping level of the collector is intermediate between the heavy
Doping of emitter and light doping of the base
• Doping Level
Emitter > Collector > Base

• Area or Size

Collector > Emitter > Base

Base is Thin & Lightly Doped

 P-N-P transistor

C
Collector

P Collector Base
Junction JC

N B
B Base
Emitter Base
Junction JE
P

E
Emitter
E
 N-P-N transistor

C
Collector

N Collector Base
Junction JC

P B
B Base
Emitter Base
Junction JE
N

E
Emitter
E
 The BJT – Bipolar Junction Transistor
Note: Normally Emitter layer is heavily doped, Base layer is
lightly doped and Collector layer has Moderate doping.
The Two Types of BJT Transistors:

npn pnp

E n p n C E p n p C

Cross Section C Cross Section C

B B

B B

Schematic Symbol Schematic Symbol

E E
 Transistor currents

C
Collector

N Collector Base
Junction JC

P B
B Base
Emitter Base
Junction JE
N

E
Emitter
E
Number of P-N junctions and equivalent circuit

P E

N B

N B

P C
Number of P-N junctions and equivalent circuit

P E

N
P B

P C
Number of P-N junctions and equivalent circuit

E
Emitter

P E

B N
P B
Base

P C

C
Collector

Equivalent for P-N-P Transistor

Number of P-N junctions and equivalent circuit

E
Emitter

N E

B P B
Base

N C

C
Collector

Equivalent for N-P-N Transistor

Number of P-N junctions and equivalent circuit

E
Emitter

N E

B P B
Base

N C

C
Collector
 An unbiased Transistor

• For an unbiased transistor no external power supplies are

connected to it

Base
Junction Junction
JEB JCB

- + + + + -

- + + + + -
Emitter collector

P - + + N + + - P

- + + + + -

- + + + + -

Depletion Depletion
region region

Depletion Regions in an unbiased P-N-P transistor

 An unbiased Transistor

• For an unbiased transistor no external power supplies are

connected to it

Base
Junction Junction
JEB JCB

+ - - - - +

+ - - - - +
Emitter collector
+ - - P - - +
N N
+ - - - - +

+ - - - - +

Depletion Depletion
region region

Depletion Regions in an unbiased N-P-N transistor

 Penetration of depletion region

• The width of depletion region is not same on the two sides of

the junction.

• The depletion region is always penetrates more in the

lightly doped region i.e. the base region.

• Therefore the penetration of depletion region is less in the

heavily doped collector and emitter regions, and more into
the base region.
 Transistor biasing in the active region

• Biasing is the process of applying external voltages to the

transistor. The two junctions in a BJT must be biased properly
in order to operate it as an amplifier.

• A BJT is capable of operating in three different regions,

depending on the biasing.
• The regions of operations are:

• Cutoff region (transistor is off)

• Saturation region (transistor is fully on )
• Active region ( in between saturation and cutoff )
 Transistor biasing in the active region

Sr. Region of Base emitter Collector base application

No. operation junction junction
1 Cutoff region Reverse Reverse transistor is OFF
biased biased
2 Saturation Forward Forward transistor is ON
region biased biased
3 Active Forward Reverse Amplifier
region biased biased
 Transistor operation in the active region N-P-N
Junction Junction
JEB JCB

+ - - - - +
+ - - - - +
Emitter collector
+ - - - - +
N P N
+ - - - - +
+ - - - - +

RE Depletion Depletion RC
region region

- + - +
Base

VEE VCC
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
N P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
N P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
N P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

RE Base electron
current

- +
Base

Emitter electron This constitutes the base current IB

current VEE Thus base current flows due to the
Recombination of electrons and holes
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

RE Base electron
current

- + - +
Base

Emitter electron This constitutes the base current IB VCC

current VEE Thus base current flows due to the
 Transistor operation in the active region N-P-N
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

Collector electron
RE Base electron
current
current

- + - +
Base

Emitter electron This constitutes the base current IB VCC

current VEE Thus base current flows due to the
Recombination of electrons and holes
 Transistor operation in the active region N-P-N
Junction Junction
JEB JCB

Emitter collector
N P N

Electron emitted
Electron collected

RE RC
Collector electron
current

- + - +
Base

Emitter electron This constitutes the base current IB

current VEE Thus base current flows due to the VCC
Recombination of electrons and holes
 Transistor operation in the active region N-P-N
Junction Junction
JEB JCB

Emitter collector
N P N

Electron emitted
Electron collected

RC
RE Direction
Direction Conventional Direction
Conventional Current IB Conventional
Current IE Current IC
- + - +
Base

Emitter electron
current VEE VCC
 Transistor operation in the active region N-P-N
Junction Junction
JEB JCB

Emitter collector
N P N

Electron emitted
Electron collected

RC
RE Direction
Direction Conventional Direction
Conventional Current IB Conventional
Current IE Current IC
- + - +
Base

Emitter electron
current VEE VCC
IE = IC + IB
 Transistor operation in the active region P-N-P
Junction Junction
JEB JCB

P N P

Emitter collector
N P

holes emitted
holes collected

RE RC
conventional
current
-
+ + -
Base

Conventional
current VEE VCC
IE = IC + IB
 Transistor current C
Collector

• Therefore we can write that IC

IE = IC + IB IB

B
Base
IE
E
Emitter
• Emitter current is always equal to the sum of collector current
and base current.
• As IB is very small as compared to IE we can assume the
collector current to be nearly equal to the emitter current

IE ≈ IC
 Transistor configuration

• Depending on which terminal is made common to input and

output port there are three possible configurations of the
transistor. They are as follows:

• Common base configuration

• Common emitter configuration

• Common collector configuration

 Terminal Emitter Base Collector
Transistor configuration
Priority --- Input Output

• Common base configuration I/P: Emitter, O/P: Collector

E B C
Input Common Output

• Common Emitter configuration I/P: base, O/P: Collector

E B C
Common Input Output

• Common collector configuration I/P: base, O/P: Emitter

E B C
Output Input Common
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
JEB JCB

+ - - - - +
+ - - - - +
Emitter collector
+ - - - - +
N P N
+ - - - - +
+ - - - - +

RE Depletion Depletion RC
region region

- + - +
Base

VEE VCC
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
N P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
N P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
N P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

RE

- +
Base

VEE
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

RE Base electron
current

- +
Base

Emitter electron This constitutes the base current IB

current VEE Thus base current flows due to the
Recombination of electrons and holes
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
Electrons
JEB Holes JCB

- - +
- - +
Emitter collector
- - +
P N
- - +
- - +

Collector electron
RE Base electron
current
current
(injected collector current)

- + - +
Base

Emitter electron This constitutes the base current IB VCC

current VEE Thus base current flows due to the
Recombination of electrons and holes
 Transistor operation in the active region N-P-N
common base configuration
Junction Junction
JEB JCB

Emitter collector
N P N

Electron emitted
Electron collected

(injected collector current) RC

RE Direction
Direction Conventional Direction
Conventional Current IB Conventional
Current IE Current IC (INJ)
- + - +
Base

Emitter electron
current VEE VCC
 Transistor operation in the active region N-P-N
common base configuration
JEB JCB

+ - - - - +
+ - - - - +
Emitter collector
+ - - - - +
N N
+ - - - - +
+ - - P - - +

Depletion Depletion RC
region region
ICBO is a reverse saturation IC=ICBO
VCC
Current flowing due to the +
Base -
Minority carriers between
Collector and base when the
Emitter is open. ICBO flows due to the reverse I
CBO
Biased collector base junction. Is a collector to base leakage current
ICBO is neglected as compared to IC(INJ) With open emitter
 Current relations in CB configuration

• As ICBO is negligible as compared to IC(INJ)

• IC = IC(INJ) -------(Practically)

• IC = ICBO -------(with emitter open)

• Since ICBO, flows due to thermally generated carriers, it

increases with increase in temperature. It doubles its value
for every 100C rise in temperature
 Current relations in CB configuration

• The collector current IC of the common base configuration is

given by :
• IC = IC(INJ) + ICBO

• IC(INJ) : it is called as the injected collector current and it is

due to the number of electrons crossing the collector base
junction.

• ICBO : this is the reverse saturation current flowing due the

minority carriers between collector and base when the
emitter is open.
• ICBO flows due to the reverse biased collector base
junction.
 Current relations in CB configuration
• Current amplification factor ( αdc)

• the current amplification factor is the ratio of collector current

due to the injection of total emitter current

αdc = IC(INJ) / IE

• The value of αdc for CB configuration will always be less

than 1. this is because IC(INJ) < IE

• Typically The value of αdc ranges between 0.95 to 0.995

depending on the thickness of the base region.

• Larger is the thickness of the base is, smaller is the value of

αdc
 Current relations in CB configuration

• Current amplification factor ( αdc)

• the current amplification factor is the ratio of collector current
due to the injection of total emitter current
IC = IC(INJ) + ICBO ------------------------------(1)

αdc = IC(INJ) / IE
IC(INJ) = αdc IE
IC = αdcIE + ICBO
But ICBO is negligibly small
IC = αdcIE

Therefore the current amplification factor

αdc= IC / IE
 Current relations in CB configuration

• Expression for IB

We know that
IE = IC + IB
since IC = α dc IE +ICBO

IE = (α dc IE +ICBO) + IB
therefore IB = IE - α dc IE – ICBO

IB = (1- α dc )IE – ICBO

Neglecting ICBO we get

IB = (1-αdc ) IE
 Characteristics of a transistor in CB configuration

• The characteristics of a transistor help us to understand its

behavior.
• The transistor characteristics are of three types :

• Input characteristics

• Output characteristics

• Transfer characteristics
 Characteristics of a transistor in CB configuration
Input characteristics

E C
N P N

JE JC

E C

B
 Characteristics of a transistor in CB configuration
Input characteristics

E IE C
N P N
•Input characteristics is always
- + A graph of input current versus
RE Input voltage.
VBE JE JC
VCB =constant
+
•For the CB configuration, input
- + -
Current is IE and input voltage
B Is the emitter to base voltage VBE
VEE
•Input characteristics is plotted at
a constant output voltage VCB
IE
E C
- +
RE VBE VCB =constant
+
- + -

VEE B
 Characteristics of a transistor in CB configuration
Input characteristics

IE IE
E C
N P N

- +
RE VBE JE JC
VCB =constant
+
- + -

B
VEE

IE VBE
E C
- +
RE VBE VCB =constant
+
- + -

VEE B
 Characteristics of a transistor in CB configuration
Input characteristics VCB
4V

IE IE
E C
N P N

- +
RE VBE JE JC
+ VCB =4V

- + -

B
VEE

IE VBE
E C
- +
RE VBE
VCB =4V
+
- + -

VEE B
 Characteristics of a transistor in CB configuration
Input characteristics VCB
VCB
4V
8V
IE IE
E C
N P N

- +
RE VBE JE JC
+ VCB =8V

- + -

B
VEE

IE VBE
E C
- +
RE VBE
VCB =8V
+
- + -

VEE B
 Characteristics of a transistor in CB configuration
Input characteristics VCB
VCB
4V
8V
IE IE
E C
N P N

- +
RE VBE JE JC
+ VCB =8V ΔIE

- + -

B
VEE

IE VBE
E C
ΔVBE
- +
RE VBE
VCB =8V
+
- + -

VEE B
 Characteristics of a transistor in CB configuration
Input characteristics VCB
VCB
4V
8V
IE IE
E C
N P N

- +
RE VBE JE JC
+ VCB =8V ΔIE

- + -

B
VEE

IE VBE
E C
ΔVBE
- + Input resistance
RE VBE Ri = ΔVBE / ΔIE
VCB =8V
+ at constant VCB
- + -
As the change in emitter current is very large for a
B Small change in input voltage, the input resistance
VEE Ri is small
 Characteristics of a transistor in CB configuration
Input characteristics
Effect of VCB (output voltage) on the input characteristics :

VCB
VCB
4V
8V
IE

ΔIE

VBE
VBE

⚫ As shown in figure the emitter current increases slightly with increase in the
output voltage (VCB).
⚫ This happens due to a special phenomenon called “Early effect” or “base
width modulation”.
 Characteristics of a transistor in CB configuration
Input characteristics
“Early effect” or “base width modulation”.

Larger effective base width Narrow Depletion

At low values of VCB Region for small values of VCB

JE JC

- +
- +
Emitter collector
Base - +
Emitter Collector
N P - + N
- +

Total base width

 Characteristics of a transistor in CB configuration
Input characteristics
“Early effect” or “base width modulation”.

smaller effective base width Wider Depletion

At larger values of VCB Region for larger values of VCB

JE JC

- - +
- - +
Emitter collector
Base - - +
Emitter Collector
N P - - + N
- - +

Total base width VCB increases

⚫ As VCB is increased, the reverse voltage applied to the CB junction increases.

⚫ This widens the depletion region at the collector junction
⚫ Due to this, effective width of the base region decreases
 Characteristics of a transistor in CB configuration
Input characteristics
“Early effect” or “base width modulation”.

smaller effective base width

At larger values of VCB Wider Depletion
Region for larger values of VCB

JE JC

- - - - +
- - - - +
Emitter collector
Emitter Base - - - - +
Collector
N P - - - - + N
- - - - +

Total base width VCB increases

⚫ As VCB is increased, the reverse voltage applied to the CB junction increases.

⚫ This widens the depletion region at the collector junction
⚫ Due to this, effective width of the base region decreases
 Characteristics of a transistor in CB configuration
Input characteristics
“Early effect” or “base width modulation”.

smaller effective base width

At larger values of VCB Wider Depletion
Region for larger values of VCB

JE JC

- - - - +
- - - - +
Emitter collector
Emitter Base - - - - +
Collector
N P - - - - + N
- - - - +

Total base width VCB increases

⚫ This will increase the charge concentration gradient in the base region.
⚫ Due to increase in the charge carrier concentration, more number of electrons
diffuse from the emitter to the base i.e. emitter current increases.
 Characteristics of a transistor in CB configuration
Input characteristics
“Early effect” or “base width modulation”.

smaller effective base width

At larger values of VCB Wider Depletion
Region for larger values of VCB

JE JC

- - - - +
- - - - +
Emitter collector
Emitter Base - - - - +
Collector
N P - - - - + N
- - - - +

Total base width VCB increases

⚫ Thus increase in VCB the input IE increases slightly

 Characteristics of a transistor in CB configuration
Input characteristics
“Early effect” or “base width modulation”.

zero effective base width

At larger values of VCB Wider Depletion
Region for larger values of VCB

JE JC

- - - - - - +
- - - - - - +
Emitter collector
- - -
Base - - - +
Emitter Collector
N P- - - - - - + N
- - - - - - +

Total base width VCB increases extremely

⚫ For extremely large VCB the effective base width may be reduced to zero,
causing voltage breakdown of a transistor.
⚫ This phenomenon is known as punch through
 Characteristics of a transistor in CB configuration
Output characteristics
Constant
E IE C
N P N IC
•output characteristics is always
+ A graph of output current versus
RE JE JC VCB RC output voltage.

•For the CB configuration, output

- + - + Current is IC and output voltage
B Is the collector to base voltage VCB
VEE VCC
•Input characteristics is plotted at
a constant input current IE
Constant IE IC C
E
- +
VCB RC
RE VEB
+ -
- + - +

VEE B VCC
 Characteristics of a transistor in CB configuration
Output characteristics
IC Active region
Constant
IE=3mA (mA) (high output dynamic
C
E N P N IC resistance)

+ 3 IE=3 mA
RE JE JC VCB RC 2 IE=2 mA

- + - + 1 IE=1 mA
IC=ICBO
IE=0
B
VEE VCC
-1 0 5 10 VCB

Constant IE=3mA IC C Cutoff region

E Both the junction
+ Becomes reverse bias
-
VCB RC
RE VEB
+ - saturation region
Both the junction
- + - +
Becomes forward bias

VEE B VCC
 Characteristics of a transistor in CB configuration
Output characteristics
Dynamic output resistance of the transistor :

Ro = ΔVCB / ΔIC
for IE constant
• This is nothing but the reciprocal of the output
characteristics in the active region.
• Slope of the output characteristics in the active region is
very small.
• Therefore the dynamic resistance Ro in the active region is
high.
• That’s why the voltage drop across the transistor is very
large in active region
 Characteristics of a transistor in CB configuration
Transfer characteristics

IE C
E N P N IC

+
RE JE JC VCB RC •Transfer characteristics is a graph
Of output current (Ic) versus input
Current (IE)
- + - +
B •This characteristics is also called as
VEE VCC Current gain characteristics.

•The transfer characteristics is

IE IC C plotted for constant value of VCB
E
- +
VCB RC
RE VEB
+ -
- + - +

VEE B VCC
 Characteristics of a transistor in CB configuration
Transfer characteristics

IC (mA)
VCB constant
4

Slope = ΔIC / ΔIE = αdc

2

0 1 2 3 4
IE (mA)

α dc = ΔIC / ΔIE
 Common emitter configuration

C
IC
N

RE RE

IB
JC + +
P
B B
JE
- -
RB VBE VCE
RB VCC
N

+
+ IE

VBB
E
E
- -

N-P-N Transistor
 Common emitter configuration

Emitter acts as a common

terminal between input and the
C
output. The input voltage is IC

applied between base and emitter.

RE
Hence VBE is the input voltage
and IB is the input current. IB
+

B
The output is taken between the
collector and emitter. Therefore VBE VCE
-
RB VCC
VCE is the output voltage and IC
is the output current. + IE

VBB

E
-

N-P-N Transistor
Characteristics of a transistor in CE configuration

• Input characteristics

• Output characteristics

• Transfer characteristics
 Characteristics of a transistor in CE configuration

• Input characteristics: C
IC
• It is a graph of input current (IB)
versus input voltage (VBE) at a RE

constant output voltage (VCE).

IB
+

VCE -
RB VBE constant VCC

VBB + IE

E
-

N-P-N Transistor
 Characteristics of a transistor in CE configuration
• Input characteristics:
• It is a graph of input current (IB) C

versus input voltage (VBE) at a IC

constant output voltage (VCE).

N

IB
(μA) VCE
VCE = 4V 10V constant

IB +
JC
P
B VCC
ΔIB
JE
-
RB VBE
ΔVBE Ri=ΔVBE/ΔIB
N
VCE Constant
VBB +

IE
0 0.7 1 2
VBE
E
-

The value of dynamic input resistance “Ri” is low for CE

N-P-N Transistor
 Characteristics of a transistor in CE configuration
• Output characteristics:
• It is a graph of output current (Ic)
C
versus output voltage (VCE) at a βdc = IC /IB IC

constant input current (IB)

RE
Saturation Active
region region

IC IB = 4μA
(mA) +
4 B
IB = 4μA
3

IB = 3μA VCE -
2 RB VBE VCC

1
IB = 2μA
VBB + IE

IB = 0

E
1 2 3 4
-
VCE

N-P-N Transistor
Cutoff region
Characteristics of a transistor in CE configuration
Transfer characteristics

IC (mA)
VCE constant
4

2
Slope = ΔIC / ΔIB = βac
1

0 1 2 3 4
IB (μA)

β ac = ΔIC / ΔIB

β dc = IC / IB VCE constant
 Relation between αdc and βdc

The expression for βdc in terms of αdc

βdc = αdc
1- αdc

The expression αdc for in terms of βdc

αdc = βdc
βdc + 1
 Common collector configuration
EMITTER FOLLOWER
E

IE E

- -
IE

N
IB JE
P + +
IB
JC VEC
B N
B
- -
VBC
C

+ + IC
C
IC

N-P-N Transistor
Characteristics of a transistor in CC configuration
Input characteristics:
 Characteristics of a transistor in CC configuration
• Output characteristics:
• It is a graph of output current (Ic)
versus output voltage (VCE) at a
constant input current (IB)
Saturation Active
region region

IE
(mA) Current gain γ = IE/IB
4
IB = 4μA
3

2 IB = 3μA

1
IB = 2μA

IB = 0

1 2 3 4
VCE(V)

Cutoff region
 Current gain of common collector configuration

• The current gain of a transistor in a common collector

configuration is denoted by γ (gamma) and is defined as:

• Current gain γ = IE/IB

=(IC + IB ) / IB

= 1 + βdc since βdc = IC/IB

γ ≈ βdc
 Comparison of configuration
Sr. No. Parameter CB CE CC
1 Common terminal between Base Emitter Collector
input and output
2 Phase Difference/ 0o 180 o 0o
Conduction angle
3 Input current IE IB IB
4 Output current IC IC IE
5 Current gain αDC = IC/IE βDC = IC/IB
γ = IE/IB
Less than one High
HIGH
6 Input Voltage Veb Vbe Vbc
7 Output voltage Vcb Vce Vec
8 Current gain Less than unity High High

9 Input resistance Very low (20Ω) Low (1KΩ) High(500kΩ)

10 Output resistance Very high (1M) High(40kΩ) Low (50Ω)

11 Application As preamplifier Audio amplifier Impedance

matching
 Why is CE configuration most preferred configuration ?

• Out of three configurations, the CE configuration is the most

popular and widely used configurations. The reasons are as
follows :

• It has high voltage gain as well as a high

current gain.

• As voltage gain and current gain are high, it

has very high power gain.
 Transistor Biasing

• What is meant by dc biasing of a transistor ?

• Depending on the application, a transistor is to be operated in

any of the three regions of operation namely cutoff, active and
saturation region.

• To operate the transistor in these regions the two junctions of a

transistor should be forward or reverse bias
Q. 2 What is DC Load Line? Derive
the equation of CE amplifier and
explain criteria for selection of
Operating Point (Q Point).
 DC Load Line
• Procedure to plot the DC load
line
C
IC

RE

IB
+

-
RB VBE VCE VCC

+ IE

VBB

E
-

N-P-N Transistor
 DC Load Line
• Procedure to plot the DC load
line
C
• Refer to the collector circuit of a IC

CE configuration, apply KVL

RE

IB
+

-
RB VBE VCE VCC

+ IE

VBB

E
-

N-P-N Transistor
 DC Load Line

• Procedure to plot the DC load

line
C
• Refer to the collector circuit of a
CE configuration, apply KVL IC
RC

VCC – VCE – ICRC = 0

+
Rearranging this equation we get

-
IC = [-1/RC] VCE + VCC/RC VCE VCC

Compare this equation with general

equation of straight line
i.e. y = mx + C E

N-P-N Transistor
 DC Load Line

IC = [-1/RC] VCE + VCC/RC

C

IC
i.e. y = mx + C RC

The comparison yields the following +

results.

-
VCE
y= IC VCC

m = -1/RC

X = VCE E
C =VCC/RC
N-P-N Transistor
 DC Load Line
IC = [-1/RC] VCE + VCC/RC

C
i.e. y = mx + C
IC
RC
The comparison yields the following
results.
y = IC +

m = -1/RC
X = VCE -
VCE VCC
C =VCC/RC

This comparison shows that above

equation represents a straight line.
E
This straight line is called as DC load
line
N-P-N Transistor
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• Now substitute VCE = 0 in above equation C

IC
RC

Saturation
region Active
region +

IC
(mA)

4
IB = 4μA -
3 VCE VCC

2 IB = 3μA

1
IB = 2μA

E
IB = 0

1 2 3 4
VCE N-P-N Transistor
Cutoff region
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• Now substitute VCE = 0 in above equation C

• IC = VCC/RC IC
RC

Saturation
region Active
region +

IC
(mA)

4
IB = 4μA -
3 VCE VCC

2 IB = 3μA

1
IB = 2μA

E
IB = 0

1 2 3 4
VCE N-P-N Transistor
Cutoff region
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• Now substitute VCE = 0 in above equation C

• IC = VCC/RC
• Or IC(MAX) = VCC/RC or point “A” IC
RC

Saturation
region Active
IC region +
(mA)

IC
(MAX) A
IB = 4μA -
3 VCE VCC

IB = 3μA
2

1
IB = 2μA

E
IB = 0

1 2 3 4
VCE N-P-N Transistor
Cutoff region
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• and substituting IC = 0 in above equation C

• IC
RC

Saturation
region Active
IC region +
(mA)

IC
(MAX)
A
IB = 4μA -
3 VCE VCC

2 IB = 3μA

1
IB = 2μA

E
IB = 0

VCE
1 2 3 4
N-P-N Transistor
Cutoff region
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• and substituting IC = 0 in above equation C

• VCE = VCC →→ or point “B” IC

RC

Saturation
region Active
IC region +
(mA)

IC
(MAX)
A
IB = 4μA -
VCE VCC
3

IB = 3μA
2

1
IB = 2μA

E
IB = 0

VCE
1 2 3 4
B N-P-N Transistor
Cutoff region VCE=VCC
 DC Load Line
IC = [-1/RC] VCE + VCC/RC
• and substituting IC = 0 in above equation C

• VCE = VCC → →or point “B” IC

RC

DC load line

IC +
(mA)

IC
(MAX)
A
IB = 4μA -
VCE VCC
3

IB = 3μA
2

1
IB = 2μA

E
IB = 0

VCE
1 2 3 4 B N-P-N Transistor
VCE=VCC
 The quiescent point (Q Point)
• The term quiescent means quite, still
or inactive. The Q point is also called
as “operating point” or “bias point”.
• It is a point on a load line which
represents the dc current through a
transistor (ICQ) and the voltage across
it (VCEQ), When no ac signal is applied.
• In short it represents a dc biasing
conditions
 The quiescent point (Q Point)
• The dc load line is a set of infinite number
of such operating points and the user or
designer can choose any point on the dc
load line as the operating point.
• The position of operating point on the load
line is dependent on the application of
transistor.
• If the transistor is being used for
“Amplification” purpose then the Q point
should be at the center of load line.
Q Point Position Type of Clipping in
Output

Q Point Near to Positive Clipping

Saturation Region (The output is clipped in Positive Half Cycle)

Q Point Near to Negative Clipping

Cut Off Region (The output is clipped in Negative Half cycle)

Q Point Exact No Clipping

at Centre Position
 Typical Junction Voltages
Voltages Silicon Transistor Germanium Transistor

VBE (Cut-off) 0 -0.1V

VBE (Cut-in) 0.5v 0.1V

VBE (Active) 0.7V 0.2V

VBE (Saturation) 0.8V 0.3V

VCE (Saturation) 0.2V 0.1V

To get Maximum Amplification in Active Region

VCE=Vcc and ICQ=Icmax
2 2
 Factor affecting the stability of Q point
❑ Parameters of transistor depend on temperature : VBE, ICO, βdc
❑ Thermal Runaway.

❑ Current Gain (β)

 Factor affecting the stability of Q point
• After establishing the operating point, when input signal is applied, the
output signal should not move the transistor either to saturation or to
cut-off. However, this unwanted shift might occur due to various
reasons outlined below:
• Parameters of transistor depend on temperature. As it increases,
leakage current due to minority charge carriers (ICBO) increases. As
ICBO increases, ICEO also increases, causing increase in collector current
IC. This produces heat at the collector junction. This process repeat,
and finally Q-point may shift into saturation region. Sometimes the
excess heat produced at the junction may even burn the transistor. This
is known as thermal runaway.
• When a transistor is replaced by another of the same type, the Q-point
may shift, due to change in parameters of transistor such as current
gain (β) which changes from unit to unit.
• To avoid a shift of Q-point, bias-stabilization is necessary. Various
biasing circuits can be used for this purpose.
 Biasing circuits
• To avoid a shift of Q-point, bias-stabilization is
necessary. Various biasing circuits can be used for this
purpose.

• Fixed bias
• Collector-to-base bias
• Self Biased or Voltage divider bias
• Fixed bias with emitter resistor
• Emitter bias
 BJT Amplifier
Properties of Ideal Amplifier
•Input Resistance(Ri) : HIGH

•Output Resistance(R0): ZERO

•Voltage Gain(Av): HIGH or Large

•Current Gain(Ai): HIGH or Large

•Power Gain(Ap): HIGH

•Bandwidth: INFINITE
 Single Stage RC Coupled CE Amplifier
+VCC

R1 & R2 are Biasing C1 & C2 are Coupling

Resistor Capacitors
R1 RC
C2
VO
Amplified signal
output Signal
C1
Vi
Signal to be
Amplified RL

R2 RE CE

Bypass Capacitor
R1, R2, RE form A voltage divider biasing circuit for the CE
configuration it sets the Q i.e Operating point of CE amplifier.

The input capacitor Cc1 is used to block D.C Component present in

signal & pass only A.C signal for amplification.

CE used parallel with re is called emitter bypass capacitor. It provide

low resistance path to the amplified A.C. Signal. If it is not used the
amplified A.C signal that passes through RE causes a voltage drop it.
This will reduce output voltage & also gain of the amplifier.

Cc2 is used to block D.C and couple A.C output of amplifier to the
load.

Input voltage & output voltage are is not in phase. The

output is 180 degrees out of phase with the input .
 Transistor as a switch

• To operate BJT as a switch, it is to be operated in two regions

namely cutoff and saturation.

• In cutoff region both the junctions of transistor are reverse

biased and only reverse current flows. This current is very
small and practically neglected. Thus no current flows through
the transistor in cutoff region.

• Hence in this region, it acts as a open switch.

 Transistor as a switch
• Cutoff region, it acts as a open switch.
+ VCC
+ VCC

IC = 0
IC = 0

RC
RC

C
RB IB = 0
0 Volt

N-P-N Transistor
Cutoff region, it acts as a open switch.
 Transistor as a switch

• In the saturation region both the junction are forward biased.

The voltage VCE drops to very small value about 0.2 V and
0.3 V. this is denoted as VCE (sat).
• In saturation condition, collector current is large and controlled
by external resistance in collector circuit.
• Practically, VCE (sat) can be neglected as it is very small
compared to supply voltage hence output voltage which is
VCE for CE configuration is zero in saturation region.
• Thus it acts as a closed switch
 Transistor as a switch
• Saturation region, it acts as a close switch.
+ VCC
+ VCC

IC
IC

RC
RC

C
RB IB
+ VBB

N-P-N Transistor
Saturation region, it acts as a Closed switch.
 Open and Closed BJT Switch

• When operated in
saturation, the BJT
acts as a closed
switch.
• When operated in
cutoff, the BJT acts as
an open switch.
FIELD-EFFECT TRANSISTORS ( FET’S)

• FET’s are the uni polar devices because, unlike

BJT’s that use both electron and hole current, they
operate only with one type of charge carrier.

• The two main types of FET’s are the

• Junction field effect transistor (JFET) and
• The metal oxide semiconductor field effect transistor
(MOSFET)
Current Controlled vs Voltage Controlled Devices
Classification scheme for field effect
transistors.
 THE MOSFET (IGFET)
• The MOSFET (metal oxide semiconductor field effect
transistor) is the category of FET.

• The MOSFET differs from the JFET in that it has no PN

junction structure; instead, the gate of the MOSFET is
insulated from the channel by a silicon dioxide (Sio2) layer.

• Two basic types of MOSFETS are :

• Depletion ( D ) MOSFET and
• Enhancement ( E ) MOSFET

• Because of the insulated gate, these devices are also called

IGFET.
ENHANCEMENT MOSFET ( E-MOSFET)
schematic symbol
n- Channel MOSFET
P- Channel MOSFET
Operation when VGS is Positive
Effect of increase in Drain to Source Voltage
 MOSFET Summary
1. Enhancement Type - the transistor requires a Gate-Source voltage,
( VGS ) to switch the device "ON". The enhancement mode MOSFET
is equivalent to a "Normally Open" switch

2. Depletion Type - the transistor requires the Gate-Source voltage,

( VGS ) to switch the device "OFF". The depletion mode MOSFET is
equivalent to a "Normally Closed" switch.

. MOSFET type VGS = +ve VGS = 0 VGS = -ve

P-Channel Enhancement OFF OFF ON

N-Channel Enhancement ON OFF OFF

Transfer & Drain Characteristics of N
channel

Transfer Characteristics Drain Characteristics

N- Enhancement Mode MOSFETs
 P Channel E-MOSFET

Drain Characteristics Transfer Characteristics

 ENHANCEMENT MOSFET ( E-MOSFET)
Transfer characteristics (n – channel)
• The conductivity of the
channel is enhanced by
increasing the gate to
source voltage and thus
pulling more electrons
into the channel area.
• For any gate voltage
below the threshold
value, there is no
channel

FIGURE E-MOSFET general transfer characteristic curves.

 ENHANCEMENT MOSFET ( E-MOSFET)
Transfer characteristics (p – channel)
• The conductivity of the
channel is enhanced by
increasing the gate to
source voltage and thus
pulling more electrons
into the channel area.
• For any gate voltage
below the threshold
value, there is no
channel

FIGURE E-MOSFET general transfer characteristic curves.

MOSFET as an AMPLIFIER
MOSFET as a SWITCH
 MOSFET act as SWITCH
• VGS<VT MOSFET is OFF condition so
act as Open Switch

• VGS grater than or equal to VT then

MOSFET is ON condition so act as
Closed Switch
 Parameter BJT MOSFET
Current / Voltage Control Current Voltage

Device Type Bipolar Unipolar

Size Small Very Small

Controlling Terminal Base Gate

Thermal Runaway Can take place Dose not take place

Transfer Characteristics Linear Non linear

Types PNP & NPN N & P Channel

Sensitivity High Less

Thermal noise More Low

Switching Speed Less More

Gain Bandwidth Product High Low

Input Resistance Less compare to MOSFET Very high

156
Voltage Gain More Less
 Parameter BJT MOSFET
Regions of operation: Saturation – ON Switch , Ohmic – ON Switch
Cut off – OFF Switch ,Saturation – Amplifier ,
Active – Amplifier Cut off – OFF Switch

Configuration CE, CB, CC CS,CG,CD

Thermal Stability Less More

Symbol

157
Operational Amplifier(Op-Amp)
Unit II Transistor and OPAMP [2L]

• Operational amplifier:
Functional block diagram of
operational amplifier, ideal
operational amplifier, Op-amp
as Inverting and Non inverting
amplifier Sinhgad College of Engineering, Pune – 41.
Department of Electronics &Telecommunication Engineering 159
 Operational Amplifiers
What is an Op amp?
A multistage high-gain amplifier integrated in
analysis as a separate block.
The input of an op amp is a differential amplifier
therefore has 2 inputs.
The output is singled ended.
Typically configured for a dual power supply (+/-V)
Pin configuration of OP-AMP IC 741
Symbol and terminal

Inverting input

741
Symbol and terminal

Inverting input

741
+
Non-Inverting input
Symbol and terminal

Inverting input

-
Output
741
+
Non-Inverting input
Symbol and terminal

+VCC positive supply voltage

Inverting input

-
Output
741
+
Non-Inverting input

-Vcc negative supply voltage

Symbol and terminal

+VCC positive supply voltage

Inverting input
2
7
-
6 Output
741
3
+
4
Non-Inverting input

-VEE negative supply voltage

The OP-AMP IC 741

 The most common and most famous op-

amp is the just 741, which is packaged in
an 8-pin mini-DIP. The integrated circuit
contains 20 transistors and 11 resistors.
Introduced by Fairchild in 1968, the 741
and subsequent IC op-amps including
FET-input op-amps have become the
standard tool for achieving amplification
and a host of other tasks.
Manufactures of OP-AMP IC 741

 The manufactures of Op-amp ICs are companies like

Fairchild, National semiconductor, Motorola, Texas
Instruments and signetics.

 The identifying initials for some other companies are as

follows:
1. National semiconductors : LM 741
2. Motorola : MC 741
3. RCA : CA 741
4. Texas instruments : SN 52741
5. Signetics : N 5741
 Ideal differential amplifier

 An ideal differential amplifier is expected to amplify the

differential signal present between its two input signal.

 It is also the basic stage of an integrated Op-amp with

differential input.

Ideal
Vd
Differential
Amplifier Vo = V1 – V2
+ +

V1 V2
- -

Block diagram of an ideal differential amplifier

 Ideal
Vd
Differential
Amplifier Vo = V1 – V2
+ +

V1 V2
- -

 Differential input signal :

 The difference between the input signals V1 and V2 is called as

the differential signal Vd

 Differential signal Vd = V1 – V2

 From the equation it is clear that the amplifier output will be

non-zero if and only if the differential signal is non-zero value
 Ideal
Vd
Differential
Amplifier Vo = V1 – V2
+ +

V1 V2
- -

Differential gain :
 Vo = Ad ( V1 – V2 )
 Where Ad is called as the differential gain.
 The differential gain can be defined as the gain with which the
differential amplifier amplifies the differential signal.
 Vo = Ad Vd as Vd = V1 – V2
 Therefore the expression for the gain Ad = Vo / Vd
 In decibels Ad (dB) =10 log10 [ Vo / Vd ]
 Ideal
Vd
Differential
Amplifier Vo = V1 – V2 = 0
+ +

V1 V2
- -

Common mode signal :

 A common signal to both the input terminals ( i.e. V1=V2=V)

is called as common mode signal.

 The output voltage produced by an ideal differential amplifier

is zero for the common mode signal.
Block diagram of a typical OP-AMP
Non-inverting
+
input Level Output
Input Intermediate Output
shifting
Stage stage Stage
Inverting - stage

input
Dual input Dual input Such as Complementary
Balanced unbalanced Emitter follower Symmetry
Output Output Using constant Push-pull
Differential Differential Current source amplifier
amplifier amplifier
Block diagram of a typical OP-AMP
Non-inverting
+
input Level Output
Input Intermediate Output
shifting
Stage stage Stage
Inverting - stage

input
Dual input Dual input Such as Complementary
Balanced unbalanced Emitter follower Symmetry
Output Output Using constant Push-pull
Differential Differential Current source amplifier
amplifier amplifier

Input Stage : The input stage is A dual-input balanced

output differential amplifier. The two inputs are
inverting and non-inverting input terminals.
This stage provides most of the voltage gain of the op-
amp and decides the input resistance value Ri.
It provide high input impedance.
Block diagram of a typical OP-AMP
Non-inverting
+
input Level Output
Input Intermediate Output
shifting
Stage stage Stage
Inverting - stage

input
Dual input Dual input Such as Complementary
Balanced unbalanced Emitter follower Symmetry
Output Output Using constant Push-pull
Differential Differential Current source amplifier
amplifier amplifier
Intermediate Stage :
This is usually another differential amplifier.
It is driven by output of input stage.
This stage is a dual input unbalanced output
( single ended output) differential amplifier.
 Block diagram of a typical OP-AMP
Non-inverting
+
input Level Output
Input Intermediate Output
shifting
Stage stage Stage
Inverting - stage

input
Dual input Dual input Such as Complementary
Balanced unbalanced Emitter follower Symmetry
Output Output Using constant Push-pull
Differential Differential Current source amplifier
amplifier amplifier
Level shifting Stage :
Due to the direct coupling between the first two stages, the
input of level shifting stage is an amplified signal with some
non-zero dc level.
Level shifting stage is used to bring this dc level to zero volts
with respect to ground.
Block diagram of a typical OP-AMP
Non-inverting
+
input Level Output
Input Intermediate Output
shifting
Stage stage Stage
Inverting - stage

input
Dual input Dual input Such as Complementary
Balanced unbalanced Emitter follower Symmetry
Output Output Using constant Push-pull
Differential Differential Current source amplifier
amplifier amplifier

Output Stage : This stage is a normally a complementary

output stage. It increases the magnitude of voltage and
raises the current supplying capability of the op-amp.
Its also provides the low output resistance.
Modes of Operation
1. Single-ended input mode.
2. Differential input mode.
3. Common-mode operation.
 Input and output signals 1800 phase shift when the input signal is
applied to the inverting (-) terminal

+VCC

input
Inverting input
2
7
-
6 Vo
741
3
+
4
Inverted Output signal

-VEE
Input and output signals 00 phase shift when the input signal is
applied to the Non-inverting (+) terminal

+VCC

2
7
-
6 Vo
741
3
+
4
input Non-Inverting
input Non-Inverted Output signal

-VEE
DC power supply for an OP-AMP

+ VCC

Inverting input
2
7
-
6 Output
741
3
+
4
Non-Inverting input

-VEE
DC power supply for an OP-AMP

+ VCC= +15V

Inverting input
2
7
-
6 Output
741
3
+
4
Non-Inverting input

-VEE = -15V
DC power supply for an OP-AMP

+ VCC

+15V
Inverting input 2
- 7
6 Output
741
3
+
Non-Inverting input 4
-15V

-VEE

Dual polarity supply

DC power supply for an OP-AMP

+ VCC +15V
Inverting input 2
- 7
6 Output
OPAMP
3
+
Non-Inverting input 4
-VEE

Negative supply is
connected to ground

Single polarity supply

 Ideal
Vd
Differential
Amplifier Vo = V1 – V2
+ +

V1 V2
- -

 Common mode rejection ratio (CMRR) :

 Common mode rejection ration (CMRR) is the ability of a
differential amplifier to reject the common mode signal
successfully.
 CMRR is defined as the ratio of differential gain Ad and
common mode gain Ac. It is denoted by letter “ρ”
 CMRR = ρ = Ad / Ac
 Ideally CMRR should be infinite and practically it should be as
high as possible.
Equivalent circuit of an OP-AMP

+ VCC

Inverting input
-

Ro Output
Vd Ri
+ +
AVVd
+ Vo RL
-
Non-Inverting input
-

-VEE
The ideal OP-AMP Parameters
Ri

8
IB2= 0
V2 - Ro 0

Zero differential Ro Output

V d= 0 Ri Vo = AVVD
Input voltage +
AVVd
+
-

8
V1 AV
IB1= 0

Important characteristics of Op-Amp

1.Infinite voltage gain ( AV )
8

the open loop gain of an ideal OP-AMP is denoted by Av. It is the

differential voltage gain and its value for an ideal OP-AMP is infinite.

Vo = AV*VD
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AV/Vd
Vd = 0 +
AVVd
+
V1 -
AV

8
IB1= 0

2. Infinite input resistance (Ri ➔ ∞)

the input resistance Ri of an ideal OP-amp is infinite. Due to this,
the current flowing in each input terminal will be zero. IB1= 0 IB2= 0
due to infinite input resistance, almost any source can drive it and
there is no loading of the source.
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AV/Vd
Vd = 0 +
AVVd
+
V1 -
AV

8
IB1= 0

3. Zero output resistance ( RO = 0 )

the output resistance Ro of an ideal OP-amp is zero.
Due to this, the ideal Op-amp can handle infinite
number of other devices.
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AVVD
Vd = 0 +
AVVd
+
V1 -
AV

8
IB1= 0

4. Zero offset voltage

in practical Op-amps a small output voltage is present even though
both the inputs V1 ad V2 are having a zero value.
This voltage is called as the offset voltage.
for ideal Op-amp the offset voltage is zero.
That means output voltage is zero when input voltage is zero.
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AVVD
Vd = 0 +
AVVD
+
V1 -
AV

8
IB1= 0

5. Infinite Bandwidth
Bandwidth of an amplifier is the range of frequencies over which all
the signal frequencies are amplified almost equally.
The bandwidth of an ideal Op-amp is infinite. So it can amplify any
frequency from zero to infinite hertz.
Thus the gain of an ideal amplifier is constant from zero to infinite hertz.
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AVVD
Vd = 0 +
AVVD
+
V1 -
AV

8
IB1= 0

6. Infinite CMRR
for an Op-amp, the common mode rejection ratio (CMRR) id
defined as the ratio of differential gain to common mode gain.
CMRR is infinite for the ideal Op-amp.
Thus the output voltage corresponding to the common mode noise
is zero.
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AVVD
Vd = 0 +
AVVD
+
V1 -
AV

8
IB1= 0

7. Infinite slew rate.

the slew rate of an ideal Op-amp is infinite so that the
output voltage changes occur simultaneously with the
input voltage changes.
The ideal OP-AMP
Ri

8
IB2= 0
- Ro 0
V2

Zero differential Ro Output

Input voltage Ri Vo = AVVD
Vd = 0 +
AVVD
+
V1 -
AV

8
IB1= 0

8. Zero power supply rejection ratio (PSRR).

PSRR is a parameter which specifies the degree of the dependence
of the Op-amp output on the changes in power supply output. For an
ideal Op-amp, PSRR = 0. that means the output voltage does not
Change due to fluctuation in supply voltage
The practical characteristics of OP-AMP
 Input offset voltage (VIOS) :
 Ideally, for a zero input voltage, the Op-amp output voltage
should be zero.
 But practically it is not so. This is due to the unavoidable
unbalances inside the Op-amp, specially the unbalances in its
differential input stage.
 So we have to apply a small differential voltage at the input of
the Op-amp to make the output voltage zero, which is called
input offset voltage.
 The input offset voltage is denoted by Vios.
 This input offset voltage is normally in a few mV range.
 The value of input offset voltage is temperature dependent.
The practical characteristics of OP-AMP

 Input bias current (IB) :

 Input bias current IB is the average of the currents flowing into
the two input terminals of the Op-amp.
 Ideally the currents IB1 and IB2 must be zero.
 But for practical Op-amp they do exist due to the finite value of
input resistance Ri. Due to slight difference in the
characteristics of the transistors used in the input stage of an
Op-amp, the two currents IB1 and IB2 are not equal.
 The maximum value of IB is 50nA for IC 741.
 It can reduced to pA level using FET Op-amps.
 The value of input bias current is temperature dependent.
The practical characteristics of OP-AMP
 Input offset current (IIOS) :
 The algebraic difference between the currents flowing into the
inverting and non-inverting terminals of Op-amp is called as “
input offset current”.

 IIOS = IB1 – IB2

 Ideally, the input offset current must be zero and practically it

should be as small as possible.
 The input offset current exists due to the unequal currents IB1
and IB2 flowing into the input terminals of the Op-amp.
 The input offset currents for the Op-amp is few tens or
hundreds of nA.
 For IC 741 the maximum input offset current is 6 nA.
The practical characteristics of OP-AMP

 Common mode rejection ratio (CMRR) :

 CMRR of a practical Op-amp is not infinity.
 However it is very high.
 For IC 741 the CMRR is 90 dB or 31622.
 Such high CMRR is helps to reject the common mode signals
such as noise successfully.
The practical characteristics of OP-AMP

 Power supply rejection ratio (PSRR) :

 The change in the Op-amps input offset voltage caused by
variation in the supply voltage is called as power supply
rejection ratio (PSRR).
 It is also called as supply voltage rejection ratio (SVRR) .
 PSRR is expressed either in microvolt per volt or in decibels.

 For IC 741, PSRR = 150 μV/V

 Slew rate :
 Slew rate is defined as the maximum rate of change of output
voltage per unit time and it is expressed in volts/microseconds.
 Importance of Slew rate :
 Slew rate decides the capability of Op-amp to change its
output rapidly, hence it decides the highest frequency of
operation of a given Op-amp.

 Slew rate changes with change in voltage gain. Therefore it is

generally specified at unit gain.

 Slew rate should be ideally infinite and practically as high as

possible.

 Slew rate of IC 741 op-amp is only 0.5 V/μS

Important characteristics of OP-AMP IC 741

Sr. No. Characteristics Value for IC Ideal value

741
1 Input resistance Ri 2 MΩ

8
2 Output resistance Ro 75 Ω 0
3 Voltage gain Av 2 X 105

8
4 Bandwidth BW 1 MHz

8
5 CMRR 90 dB

8
6 Slew rate S 0.5 V/μS

8
7 Input offset voltage 2 mV 0
8 PSRR 150 μV/V 0
9 Input bias current 50 nA 0
10 Input offset current 6 nA 0
Close loop configuration of OP-AMP
 In the closed loop configuration some kind
of “feedback” is introduced in the circuit.
 A part of output is returned back or fed
back to the input.

 Types of feedback
 Positive feedback or Regenerative feedback
 Negative feedback or Degenerative feedback.
Positive feedback or regenerative feedback

 If the feedback signal and the original input signal are in

phase with each other then it is called as the positive
feedback.

 Positive feedback is used in the application

such as “Oscillators” and Schmitt triggers
or regenerative comparators.
Negative feedback or Degenerative feedback

 If the signal is fed back to the input and the original input
signal are 1800 out of phase, then it is called as the negative
feedback.

 In the application of Op-amp as an amplifier,

the negative feedback is used.
 Concept of virtual short and virtual ground

 According to virtual short

concept, the potential difference
between the two input terminals
of an OP-amp is almost zero.
 Both the input terminals are
approximately at the same
potential.
 Virtual short

+VCC
Ri

8
I=0
-
V2

Output
Ri Vo = AVVD
Vd

+
V1

-VEE

The input impedance Ri of an Op-amp is ideally infinite.

Hence current “I” flowing from one input terminal to the other will be zero.
Thus the voltage drop across Ri will be zero and both the input terminals
will be at same potential, in other words they are virtually shorted to each
other.
 Virtual ground
RF

Feedback resistor

V2 2
-

6 Vo
OP-AMP

V1 3
+

If non inverting terminal (+) of Op-amp is connected to ground

as shown in figure, then due to “virtual short” existing
between the two input terminals, the inverting terminal will
also be at ground terminal.
Hence it is said to be “ virtual ground”
 The Inverting Amplifier

V2
-
+ -
IB2 = 0
R1
Vd
VS +
OP-AMP
Vo
V1 + AV =

8
-
 The Inverting Amplifier

- input
+
RF VS

I
t
V2 0
-
+ -
IB2 = 0
R1
Vd
VS +
OP-AMP VO
Vo
V1 + AV = t

8
0
-

VO = AV X Vd
 VO = AV X Vd
therefore Vd = VO / AV
Where AV = open loop gain of Op-Amp

As we know AV of an open loop Op-Amp

8
therefore Vd = VO / = 0

8
Vd = 0

But Vd = V1 – V2
V1 – V2 = 0
V1 – V2 = 0
As the non inverting terminal is connected to ground,
V1 = 0 substituting this Value in above equation we get V2 = 0
Thus V2 is at virtual ground
 8
Since the input resistance Ri = , the current flowing into the Op-amp will be
zero. Therefore the current “I” that passes through R1 will also pass
As voltage V2 = 0,
The input voltage VS is voltage across R1 and Voltage across RF is output
voltage.
The input voltage VS is given by
VS = I X R1 and

Expression for the closed loop voltage gain (AVF)

The input voltage VS is given by
VS = I X R1 and
And the output voltage VO given by
VO = - I X RF

Closed loop gain AVF is given by

AVF = VO / VS
Substituting the expression for VO and VS we get
AVF = - IRF / IR1 AVF = - RF / R1
 The Inverting Amplifier

- input
+
RF VS

I
t
V2 0
-
+ -
IB2 = 0
R1
Vd
VS +
OP-AMP VO
Vo
V1 + AV = t

8
0
-

Expression for the closed loop voltage gain (AVF)

AVF = - RF / R1
0
The negative sign indicates that there is a phase shift of 180
Between the input and output voltages.
 Conclusion from the expression for AVF

 The value of closed loop voltage gain AVF does not depend
on the value of open loop voltage gain AV.

 Value of AVF can be very easily adjusted the adjusting the

values of the resistors RF and R1.

 Generally the feedback resistor RF is a potentiometer to

adjust the gain to its desired value.

 The output is an amplified inverted version of input.

The Non-Inverting Amplifier
-
- +
+ RF input
R1
VS
V2
-
I2 = 0 t
0
OP-AMP
I1 = 0
Vo
V1 + AV =

8
+ VO

VS
0 t

-
The Non-Inverting Amplifier

-
- +
+ RF input
R1
VS
V2
-
I2 = 0 t
0
OP-AMP
I1 = 0
Vo
V1 + AV =

8
+ VO

VS
0 t

As input impedance of ideal Op-amp is infinite

Therefore the current entering into both the input terminals
of Op-amp will have zero values. (I1 = I2 = 0 )
 Expression for the closed loop voltage gain (AVF)
As input impedance of ideal Op-amp is infinite
Therefore the current entering into both the input terminals of Op-amp
will have zero values. (I1 = I2 = 0 )
Therefore voltage across R1 is given by

As per the virtual concept

V1 = V2 = VS
Therefore

Therefore the closed loop voltage gain AVF is given as :

AVF = VO = R1 + RF
VS R1

AVF = 1 + RF/ R1
 Conclusion from the expression for AVF
 The positive sign of equation indicates that the input and
output are in phase with each other.

 The closed loop control gain is always greater than unity.

 AVF is adjustable and its value can be adjusted by varying

the values of RF and R1.

 Generally a variable resistor is used in place of RF to adjust

the closed loop gain to its desired value.

 AVF is independent of the open loop gain of Op-amp. It

depends only on the values of RF and R1
Parameter Inverting Amplifier Non Inverting
Amplifier
Voltage Gain

Phase Relation between 180 out of phase In Phase

input and output
Value of Voltage Gain Can be Greater than, Always greater than
Less than or equal to or equal to unity
unity
Input Resistance Very large Equal to Ri
Application Summing amplifier Voltage Follower
,Inverter , Integrator,
Differentiator ,
Diagram
The Voltage follower ( unity gain buffer )
-
- +
+ RF = 0
R1 =

8
V2
-
I2 = 0

OP-AMP
I1 = 0
Vo
V1 + AV =

8
+

VS

When R1 is infinite and RF = 0 the non-inverting amplifier gets converted into a voltage follower
or unity gain.
The Voltage follower ( unity gain buffer )

VS
input

V2
- +VCC Vm
t
0
OP-AMP
Vo VO
V1 +
+ -VEE Vm
VS t
0

When R1 is infinite and RF = 0 the non-inverting amplifier gets converted into a voltage follower or
unity gain.
The Voltage follower ( unity gain buffer )

VS
input

V2
- +VCC Vm
t
0
OP-AMP
Vo VO
V1 +
+ -VEE Vm
VS t
0

Expression for the closed loop voltage gain (AVF)

Therefore the closed loop voltage gain AVF is given as :

AVF = 1 + RF/ R1
Substitute the values of RF = 0 and R1 =
8

AVF = 1
The Voltage follower ( unity gain buffer )

VS
input

V2
- +VCC Vm
t
0
OP-AMP
Vo VO
V1 +
+ -VEE Vm
VS t
0

Expression for the closed loop voltage gain (AVF)

AVF = 1
Therefore the output voltage will be equal to and in phase with the input voltage, as shown in figure.
Thus the voltage follower is a non-inverting amplifier with a voltage gain of unity.
The Voltage follower ( unity gain buffer )

VS
input

V2
- +VCC Vm
t
0
OP-AMP
Vo VO
V1 +
+ -VEE Vm
VS t
0

Features of voltage follower circuit

Closed loop gain equal to 1 i.e. output is equal to input with no phase shift.
Very high input impedance
Very low output impedance
Large bandwidth.
 Numerical 1.
Calculate output vantage Vo of Op-amp circuit shown in fig.
Draw Input & output waveforms.
SOLUTION
Numerical 2.
Solution
Numerical 3.
Solution
•END OF UNIT 2