HVDC Systems for Engineers
HVDC Systems for Engineers
LINE COMMUTATED
      CONVERTERS
          GEGridSolutions.com
DC Transmission Systems: Line Commutated Converters. © GE Vernova, 2023
ISBN: 978-0-9809331-2-3
Forth edition
GE VERNOVA
The Lord Nelson Building
Redhill Business Park
William Bagnall Drive
Stafford, ST16 1WS
www.GEVernova.com
DC TRANSMISSION SYSTEMS
LINE COMMUTATED
CONVERTERS
                       FOREWORD
                          The requirements for power networks are continuously evolving. Modern electricity generation,
                          transmission and distribution networks demand high security, high efficiency and good network stability.
                          There is also a shift towards harnessing renewable energy resources. High Voltage Direct Current (HVDC)
                          Transmission technology offers an effective solution to these aspects. HVDC is seen as an attractive option
                          due to its low transmission loss over long distances, its ability to inter-connect asynchronous systems
                          and its fast controllability. It has enabled countries like China, India, the USA and Brazil to harness remote
                          energy resources and convey the energy to large urban centres. It is increasingly being used in Europe and
                          other parts of the world for evacuating power from off-shore wind farms. In North America, it has permitted
                          the interconnection of asynchronous parts of continental networks, which could not have been achievable
                          with traditional ac transmission.
                          The use of HVDC transmission is growing rapidly. For today’s engineer to become proficient in this area
                          requires a knowledge of power engineering, power electronics and control systems. A resource that
                          consolidates these areas is not easy to come by. This book addresses this important need. An excellent
                          book on the subject was published about a decade ago by several of the authors of the current book.
                          However, HVDC is a rapidly growing field and the current book builds on the previous one and includes
                          significant new material as well as an updating of the old material. In particular there is a comprehensive
                          coverage of current and past HVDC projects fromGE Vernova (and all former entities including Alstom)
                          and a modernising of the material on control and protection. The material on valve testing now includes
                          GE Vernova’s latest VTF (valve test facility) in Stafford, UK. A very useful addition is the inclusion of modern
                          methods for the planning of HVDC projects.
                          Indeed, this book is probably the best single knowledge-resource for HVDC transmission and should prove
                          to be invaluable to the university student, the practicing engineer and the expert alike.
                          Ani GOLE
                          Professor Ani Gole is Distinguished Professor and NSERC Industrial Research Chair at the Universty of
                          Manitoba, Canada. He is an expert on the modelling and simulation of HVDC systems and Flexible ac
                          transmission systems (FACTS). He was one of the original design team members for the PSCAD/EMTDC
                          simulation program, which is widely used for simulating HVDC systems. Dr. Gole is a recipient of the IEEE
                          PES Nari Hingorani FACTS award. He is a Fellow of the IEEE and a Fellow of the Canadian Academy of
                          Engineering. He is a registered professional engineer in the Province of Manitoba, Canada.
 The transmission of bulk electricity has revolutionized the way we live and work. From the early days of the
 ‘battle of the currents’ between Direct Current (DC) and Alternating Current (AC), our industry has been
 fuelled by continuous innovation and challenged by ever increasing customer demands. Thomas Edison,
 the founder of GE Vernova, was also the leading proponent of DC transmission in the late 19th Century,
 and although the battle of the currents was initially won by AC, since the 1950s, High Voltage Direct
 Current (HVDC) using Line Commutated Converters (LCC) gradually began to re-establish itself as a niche
 application. HVDC interconnections allowed the delivery of bulk power in ever increasing voltage ratings
 with reduced losses compared to AC connections and in the last 10 years, HVDC has made the transition
 from a niche technology to an important part of mainstream electrical power transmission.
 As thyristors (another GE Vernova innovation) started to become available at higher power ratings in
 the 1960s, solid state technology began to replace the older mercury arc technology, bringing improved
 reliability and higher power ratings to HVDC. GE Vernova and its ancestors have supplied both the
 world’s first fully thyristor-based HVDC system (1972) and the last and largest mercury-arc-based system
 (completed in 1977) as well as the world’s first multi-terminal HVDC system (1988) and many other
 important firsts.
 Today, power sector challenges have dramatically changed. Environmental concerns, the skyrocketing cost
 of land for transmission lines and substations and the price of the energy itself are making energy managers
 and engineers take another look at HVDC transmission. Wider adoption of renewable energy sources bring
 new challenges of control and stability to AC grids. Innovations in Direct Current technology, the development
 of ever more powerful semiconductor devices, improved mastery of insulating materials and the progress of
 AC/DC converter transformers have allowed us to move into transmission ratings that our forefathers would
 never have dreamed possible. Our technologies now allow us to truly create the energy highways of the future
 with DC transmission voltages as high as 1100 kV. Renewable energies can be connected to the grid with
 minimal losses. Bulk power can be transmitted longer distances.
 GE Vernova and our ancestor companies have been innovating the HVDC world for over half a century.
 Our experience and expertise in this highly complex field is the basis for this book. For future generations
 to continue the development, they must understand the roots of history. This book serves not only as a
 complete, detailed explanation of the High Voltage Direct Current world – for use by energy managers – but
 can be considered an academic reference for students and researchers. The team of authors has covered
 all aspects required to plan, specify and build a LCC-HVDC interconnection or transmission scheme. A later
 volume will present a similar treatment of the newer Voltage Source Converter (VSC) HVDC technology,
 which is starting to revolutionize the power transmission market once again. Special acknowledgement
 and thanks must be given to contributors – customers, colleagues and academics - for their valuable input
 on subjects where they are considered world authorities. We hope that all our readers will find answers to
 their questions; that these answers will drive them to seek new challenges, to push the limits further and
 to continue the innovation. It is now with great pleasure that I introduce you to our world: High Voltage
 Direct Current.
 Thomas Bjork
 CTO, Grid Systems Integration
 GE Vernova
                          This book is the result of a collaborative effort by many technical experts within GE Vernova. This team of
                          dedicated professionals have shown impressive team work and the willingness to share their collective
                          experience and expertise.
                          Several industry experts also contributed their time and expertise to this book. Recognition and thanks are
                          given to the following authors for their contribution of specific subject matter presented in the book:
                          The authors would like to thank their predecessors for the steps they made in understanding the technology
                          and developing it, which has made it possible for us to produce this book today. Special thanks must go to
                          John AINSWORTH, whose wide-ranging experience and fundamental understanding of all aspects of HVDC
                          and power engineering have helped to form the basis for many parts of this book.
 The Uno Lamm High Voltage Direct Current Award was established in 1980 by the Power Engineering Society
 of the IEEE on the recommendation of the DC transmission Subcommittee. It provides a means for special
 recognition of those outstanding engineers and scientists who have contributed to the advancement of high
 voltage direct current (HVDC) technology.
 The award is named for the man most responsible for the research and development that led to the first
 practical application of an HVDC connection between AC systems. The keys to the solution of this problem
 were the development of an electric valve which could be used in high capacity, high voltage converters, and
 a fundamental system technology. This outstanding engineer and scientist was Dr. Uno Lamm, an IEEE Fellow
 and the 1965 recipient of the Benjamin Lamme Medal.
 Recipients of the Uno Lamm Award are an elite fraternity, and GE Vernova is proud to have had so many
 within our ranks over the years that these achievements have been recognized. The contributions toward
 the advancement of HVDC technology made by these GE Vernova engineers has been impactful and
 meaningful, with many of their innovations still in practice today across the industry.
 GE Vernova recognizes the significance that these pioneers have meant to our own HVDC legacy as well
 as the mark they have made on the HVDC community at large. We are forever thankful to have worked
 alongside many of them … to learn from them, to be mentored by them, and to count them as true friends.
                                      1
                                                      A BRIEF HISTORY OF
                                                      GE VERNOVA AND HVDC                                                                                          14
                                                      1.1 GE VERNOVA GRID HVDC: PAST TO PRESENT............................................. 17
                                                      1.2 GE VERNOVA GRID INNOVATIONS..................................................................... 20
                                                      1.3 GE VERNOVA GRID HVDC EXPERIENCE.......................................................... 37
                                      2
                                                      HVDC CONVERTER THEORY                                                                                        66
                                                      2.1 DC TRANSMISSION APPLICATIONS.................................................................... 69
                                                      2.2 STEADY-STATE ANALYSIS OF CONVERTER BRIDGE OPERATION..... 74
                                                      2.3 REACTIVE POWER EXCHANGE BETWEEN HVDC
                                                          CONVERTER STATIONS AND AC SYSTEMS.................................................... 95
                                      3
                                                      HVDC CONVERTER THEORY                                                                                     110
                                                      3.1 HVDC CONVERTER STATION CONFIGURATIONS.................................... 113
                                                      3.2 HVDC STATION INSULATION CO-ORDINATION....................................... 127
                                                      3.3 TRANSIENT OVERVOLTAGE STUDIES............................................................. 134
                                                      3.4 CONVERTER STATION LAYOUTS....................................................................... 141
                                      4
                                                      HARMONICS: CAUSES,
                                                      CALCULATIONS AND FILTERING                                                                               158
                                                      4.1 SOURCES, EFFECTS AND LIMITS OF HARMONIC DISTORTION................. 161
                                                      4.2 HARMONIC IMPEDANCE OF AC AND DC SYSTEMS...................................... 164
                                                      4.3 HVDC CONVERTER HARMONICS....................................................................... 173
                                                      4.4 CONVERTER DC HARMONICS............................................................................. 178
                                                      4.5 AC HARMONIC FILTERS......................................................................................... 182
                                                      4.6 DC HARMONIC FILTERS......................................................................................... 203
                                                      4.7 POWER LINE CARRIER FREQUENCY FILTERS.................................................. 213
                                                      4.8 RADIATED INTERFERENCE AND EMC................................................................ 221
6
    HVDC CONVERTER
    STATION EQUIPMENT                                                                                               276
    6.1 THYRISTORS FOR HVDC.................................................................................... 279
    6.2 THYRISTOR CONVERTERS................................................................................. 295
    6.3 VALVE COOLING SYSTEM................................................................................. 335
    6.4 HVDC TRANSFORMERS..................................................................................... 338
    6.5 DC SMOOTHING REACTOR............................................................................... 352
    6.6 MEASURING TRANSDUCER.............................................................................. 362
    6.7 OVERVOLTAGE PROTECTION........................................................................... 368
    6.8 CIRCUIT BREAKERS............................................................................................. 370
    6.9 WALL BUSHINGS................................................................................................. 383
    6.10 AUXILIARY POWER SUPPLIES.......................................................................... 384
                                      8
                                                      DC TRANSMISSION CIRCUITS                                                                                   434
                                                      8.1 HVDC OVERHEAD TRANSMISSION LINES................................................... 461
                                                      8.2 HVDC SUBMARINE AND UNDERGROUND CABLES.................................. 474
                                                      8.3 EARTH / SEA ELECTRODES............................................................................. 474
                                      9
                                                      HVDC SCHEME PERFORMANCE                                                                                    484
                                                      9.1 CONVERTER STATION ELECTRICAL LOSSES............................................. 487
                                                      9.2 MODELING OF HVDC CONVERTER SCHEMES.......................................... 493
                                                      9.3 DYNAMIC PERFORMANCE STUDIES............................................................ 501
                                                      9.4 TRANSIENT AND DYNAMIC STABILITY INVESTIGATION......................... 512
                                                      9.5 C
                                                           ONTROLS DYNAMIC PERFORMANCE
                                                          ASSESSMENT INVESTIGATION...................................................................... 516
                                                      9.6 FUNDAMENTAL FREQUENCY TOV STUDY................................................. 518
                                                      9.7 TYPICAL STUDY RESULTS............................................................................... 520
                                                      9.8 RELIABILITY, AVAILABILITY AND MAINTAINABILITY................................ 523
APPENDIX 564
APPENDIX
           APPENDIX RELATED TO CHAPTER 2................................................................564
           APPENDIX RELATED TO CHAPTER 4................................................................572
           APPENDIX RELATED TO CHAPTER 6................................................................584
           APPENDIX RELATED TO CHAPTER 9................................................................586
ACRONYMS..................................................................................................................596
BIBLIOGRAPHY ............................................................................................ 64
TOC
     1.1. GE VERNOVA HVDC: PAST TO PRESENT
          Since the birth of the electrical power industry in the late 19th century, alternating current (AC) quickly
          became established as the preferred method for power transmission, principally because it enabled power
          transformers to step-up and step-down the voltage to convenient levels, which was not possible with the
          competing technology of DC (the technology championed by GE’s founder, Thomas Edison). However, DC
          transmission was never entirely defeated in the ‘Battle of the Currents’, and it was realized at an early
          date that DC had advantages over AC in some special circumstances. In the USA, GE built an experimental
          HVDC scheme from a hydro-electric power plant at Mechanicville to its factory in Schenectady, New York
          in the 1930s, but the system was ahead of its time and the technology was not commercialised until later.
          From the 1950s onwards, interest in DC transmission started to increase in several countries, and one
          of the ancestors of GE Vernova’s modern-day HVDC business, the English Electric Company in Stafford,
          UK, was one of the first industrial companies to realize the potential of this new technology. This section
          describes how English Electric first entered the HVDC market and how the business has grown, both
          organically and by mergers and acquisitions, with CGEÉ Alsthom (France) and AEG (Germany) both joining
          English Electric’s successor GEC as part of the Alstom organization before Alstom was in turn acquired by
          GE Vernova (then operating as GE) in 2015.
                          Fig. 1.1a– An English Electric 15 kV single anode glass bulb rectifier [5]. This was a rectifier developed by the
                          English Electric Rectifier Department, providing power for the BBC (British Broadcasting Corporation) radio
                          transmitters in association with the Marconi Company, which was a subsidiary of English Electric Co., Ltd.
                          English Electric’s Nelson Research Laboratories were actively developing higher voltage mercury-arc valves
                          and analytical methods of AC and DC system operation, including an AC/DC/AC analog simulator.
                          This simulator used passive components to represent a scalable version of a real power system along with
                          English Electric ‘mercury-pool’ valves rated at 1000 V, 2 A, connected in any arrangement through a plug-
                          board. The main purpose of the simulator was to investigate the interactions between AC and DC systems
                          and then to establish ways of optimizing the performance of the HVDC controller within the AC system.
                          Here, John Ainsworth, an engineer who was to have a major impact on HVDC in future years (see section
                          1.2), was able to develop English Electric’s understanding of how to control power conversion equipment.
                          Whilst English Electric and almost all other worldwide manufacturers had been involved in other activities
                          during World War II, ASEA of Sweden, under the guidance of the brilliant Uno Lamm, was heavily involved in
                          high voltage DC transmission research. The concept used by ASEA of applying power conversion equipment
                          to create DC from AC and vice versa, had the advantage of being able to be integrated into existing AC power
                          systems. By the early 1950s, ASEA had developed a 100 kV mercury-arc valve converter which they installed
                          in a 20 MW interconnection between mainland Sweden and the island of Gotland, a transmission distance of
                          96 km, which was too far for AC cable transmission.
                          In 1961 ASEA commissioned their second HVDC submarine cable link, which connected England with France.
                          This again operated at a voltage of 100 kVdc, but the power transmission capacity had risen to 160 MW.
                          English Electric’s management and engineers had closely watched ASEA’s progress. Whilst the UK’s Central
                          Electricity Generating Board (CEGB) was discussing the link to France with ASEA, they were also actively
                          in discussion with English Electric engineers. Discussions ranged from the technical issues of HVDC to the
                          schemes they were considering for the future.
                          In 1960 the English Electric representative in Italy heard that a mining company, named Carbosada, in Sardinia,
                          was proposing to build a power station and were in discussion with ASEA for a HVDC link in order to transmit
                          the power to mainland Italy. English Electric approached Carbosada, who were pleased to have competition for
BACK TO        18   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
          ASEA, but had strong reservations over English Electric’s lack of proven technical experience. Circumstances
          were about to change this.
          Unknown to English Electric at the time, ASEA’s management had concluded that there was a great deal
          of potential business for HVDC in the global market but, without the possibility of competitive bidding
          many utilities would not consider it as an option. ASEA therefore approached English Electric to propose
          a collaboration and, towards the end of 1961, English Electric reached an agreement with ASEA which
          allowed for technical collaboration between the two companies whilst maintaining complete commercial
          independence, thereby allowing the two companies to compete in the market-place. This agreement meant
          that English Electric was able to reassure Carbosada with regard to its technical capabilities. For ASEA and
          utilities around the world this ensured competitive bidding and for English Electric it was a technical insurance
          policy. From this, a new business unit was born.
                                                                                  5 January 1962
                                             Stafford Works General Notice no 1/62
                                       A new specialised activity to be known as the
                                       DC Transmission Department, responsible for
                                       the Commercial and Engineering aspects of DC
                                       Transmission of Power, is to be created in Stafford.
          This new department comprised four people: Tom Calverley, Unit Manager, Denys Montgomery, Manager
          (Sales and Contracts), Aleksa Gavrilovic, Chief Engineer and Mrs Clarke, Tom Calverley’s Secretary.
          Note: Tom Calverley was the son of the man who some years earlier had developed the Highfield-Calverley Transverter (see
          section 1.1.1).
          Work started in earnest on two fronts: firstly it was necessary to build up the resource capacity of this new
          business unit and secondly, there was now a contract to be executed which had stiff penalties attached.
          The work force was built up from existing employees of other business units in English Electric and those
          completing their apprenticeship, all of whom wanted to be part of this new technological adventure.
          ASEA may have thought that English Electric would simply act as a project supplier, purchasing valve and
          control equipment from them. However, English Electric was determined to stand on its own and saw
          the collaboration agreement as a way of accelerating their own development activities whilst, at the
          same time, establishing itself in the market place. The research department focused on their own ideas
          regarding the control of HVDC converters, something which would later revolutionize the whole HVDC
          industry (see section 1.2.1.3). In parallel, developments in Stafford of the single-anode mercury-arc valve
          technology, then state-of-the-art, was undertaken in a collaborative effort between the DC Transmission
          Department and the Rectifier Department, leading to English Electric being the first to market with a 133
          kVdc mercury-arc converter for the CEGB’s Kingsnorth project. They later developed the 150 kV valves for
          the Nelson River project in Canada.
          Over the next ten years, English Electric and ASEA engineering departments were to closely collaborate
          on both developments and problem solving, with the technology transfer agreement only ending with the
          emergence of thyristor valve technology.
Fig.1.2a– One of the Kingsnorth valve halls showing the English Electric ARAG/4 4-anode mercury-arc valves in service
Fig. 1.2b– A controllable reactor used in a "self-tuning" filter, part of the Kingsnorth scheme
Fig. 1.2c– The ARBJ/6 mercury-arc valves for the Nelson River project
                                  ➙ Load area frequency changes, mimicking the action of governors with fixed frequency droop
                                    characteristics
                                  ➙ Phase angle changes on the Dorsey 230 kVac bus
                                  ➙ Frequency changes at the rectifier station AC bus, to assist the governors on the generators at Kettle
                                    generating station in their task of maintaining the frequency of the Kettle AC bus.
                              Whilst these principles had been used on some earlier HVDC schemes, the Nelson River scheme made greater
                              use of this technique than any scheme to date.
                        HighÊcurrent                                                   HighÊvoltage
                           circuit                                                        circuit
                                                     V1
                                                           TestÊvalve
                                                           andÊlocal
                                                             circuit
Fig. 1.2i– H210 thyristor valves at the Sellindge converter station of the Cross-Channel HVDC scheme
Fig. 1.2j– Air-cooled thyristor valves for Les Mandarins converter station
          An additional objective of this development exercise was to ensure that the valve cooling system could
          be cooled not only by pure de-ionized water, but also by de-ionized water/glycol mixtures, so that valve
          cooling systems in cold climates could be provided with single-circuit cooling instead of the dual-circuit
          cooling which was usual at the time.
Fig. 1.2n– Suspended H400 quadrivalve for the Konti-Skan Pole 1 replacement project
          power, some for several weeks in the middle of the Canadian winter. To prevent a recurrence of this problem,
          Hydro-Québec embarked on an extensive program to reinforce their 315 kV and 735 kVac networks in the
          crucial Montréal-Québec corridor.
          One of the major measures taken by Hydro-Québec was to install a power electronics based transmission
          line de-icer at Lévis substation. This equipment is, in principle, half a HVDC scheme (the rectifier only) and
          during ice storms is connected to an AC transmission line, after removing the line from service. A high DC
          current of up to 7200 A is circulated along the transmission line, through a deliberately-applied short at the
          far end, and back again. The very high resistive heating of the transmission line conductors causes any ice
          to melt and drop off. This process can be repeated in turn on up to five different transmission lines which all
          radiate out from Lévis substation.
          For this solution [17], GE Vernova (then operating as Alstom) chose its new H400 valve and installed two
          6-pulse converter bridges to be connected in parallel, with a total power of 250 MW at ±17.4 kV. However,
          the most novel aspect of this circuit was that, during the vast majority of its life, when not required to
          operate as a de-icer, it operates instead as a Static VAr Compensator (SVC). The changeover between the
          two modes uses motorized disconnectors to re-arrange the thyristor valves from de-icer mode (essentially
          the standard HVDC configuration) to that of a delta-connected Thyristor Controlled Reactor (TCR).
          HVDC converters (such as the McNeill back-to-back) had previously been used for short periods of time
          in so-called TCR mode, but it is extremely inefficient to operate in this mode for long periods of time. The
          re-arrangement of the thyristor valves at the Lévis de-icer installation allows TCR mode to be achieved with
          much better efficiency than on other HVDC schemes, and close to the efficiency that can be obtained with
          a purpose-built SVC.
          Fig. 1.2o shows a view of the inside of the valve hall of the Lévis de-icer installation, showing the H400
          valves and the disconnect switches used for the mode change.
                          Bahrain, Qatar, United Arab Emirates and Oman, as shown on Fig. 1.2p. Each of the three 600 MW back-
                          to-back converters is identical and completely independent, with a nominal DC voltage of 222 kV and a
                          nominal DC current of 2700 A – which is quite low by today’s standards, for reasons which will become clear.
                          At first sight this project appears to be a standard 50 Hz/60 Hz back-to-back frequency converter, similar to
                          the many such installations in Japan and South America. However, a number of special features of this project
                          [25] made it far from ordinary.
                          The converter station, the first HVDC installation in the Middle East, is located in the desert in Northern
                          Saudi Arabia, with intense dust storms and ambient temperatures of up to 55°C in summer. The very high
                          temperatures meant that the H400 thyristor valves needed to be operated at lower current than would be
                          usual, and the water coolant circulating system had to be dimensioned for very high water flow rates in order
                          to keep the thyristor valves cool. The cooling plants designed for this project were the largest (in terms of
                          flow rate) of any HVDC installation in the world to date. Being in the desert there is no access to water for
                          evaporative cooling, so only dry cooling was permitted.
                          However, the most unusual aspects of this project arose from the way in which the scheme was to be used.
                          Rather than simply being used for trading power between the 50 Hz and 60 Hz AC systems, the intention for
                          this converter station was that it would sit idle for much of the time, but be ready to transmit power in either
                          direction at very short notice (seconds) in response to the loss of a major generating station on either AC
                          system. The basic principle is for the station to be used to share the spinning reserve between the two AC
                          systems, a technique referred to as Dynamic Reserve Power Sharing (DRPS).
                          Normally, when a HVDC converter is required to transmit power at short notice, it is kept in the ‘energized
                          but blocked’ state, where the converter transformer is energized but the thyristor valves are not carrying
                          current. However, operating for long periods in this mode wastes a considerable amount of energy, so
                          GE Vernova’s engineers designed a special control strategy to allow the converters to be completely
                          de-energized, but automatically detect when one AC system suddenly needs power, and then go through
                          the normal energization and deblocking sequence much faster than normal.
                          Tests on the control system in the simulator laboratory confirmed that the scheme was capable of changing
                          from completely de-energized to the transmission of 600 MW (one converter pole) within one second and
                          the transmission of 1200 MW (two converter poles) within five seconds.
Fig. 1.2q– A converter in the Cheju-Haenam HVDC refurbishment project using the updated H450 valve.
                         Bulk power transfer between independent systems of Sardinia, Corsica & Italy by overhead line (292 km) and submarine
                         cable (121 km)
                         Bulk power transfer from Kingsnorth generating station to metropolitan London via an 82 km underground cable. The scheme
                         fed two receiving stations and supports the adjacent AC system without increasing short-circuit levels.
                         The main function of the link was urban network reinforcement within an AC interconnected system. Normal transmission
                         direction was from Kingsnorth to Beddington and Willesden, however transmission between Beddington and Willesden
                         was also possible (reversible) using an interconnection mode.
                         Many innovative features were incorporated into the design of this scheme, as described in section 1.2.1.
                         Bulk power transfer by 930 km overhead line from remote hydro-electric generation on Nelson River to Winnipeg load centre.
                         The Nelson River flows north, down from the Canadian prairies to the Hudson Bay and this is where Manitoba Hydro
                         developed its hydro generation plants, to supply power to the entire Province and its neighbors, including the USA. As there
                         is a long transmission distance involved, the potential for seasonal bush fires and lightning strikes created the concern
                         that an AC transmission system would suffer disconnection problems causing poor reliability. DC transmission became
                         the preferred option.
                         The HVDC link was installed in 1972, with a rating of 1,620 MW, transmitted on the 890 km of HVDC overhead lines to
                         Winnipeg. At 450 kV, created from three 150 kV bridges in series per pole, which is the highest DC voltage ever used by
                         mercury-arc valves.
                         The scheme transmits half the total generated power in Manitoba and is controlled to assist AC stability.
                         The bipole 1 project was implemented in three construction stages (810 MW in 1972, 270 MW in 1973 and 540 MW in 1977).
      Replacement of mercury-arc valve with a thyristor valve in England – France 64 km submarine cable scheme, as
      described in section 1.2.4.1 above.
      Bulk power transfer interconnection between Songo in Mozambique and Apollo, near Johannesburg, South Africa, by
      1420 km of overhead line.
      The utilities involved were Hidroelectrica de Cahora Bassa, Mozambique (220 kV) and the Electricity Supply Commission,
      Eskom, Johannesburg, South Africa (275 kV)
      The suppliers were the ZAMCO consortium, consisting of AEG-Telefunken, BBC and Siemens AG, Germany.
      Commissioning dates were
      Stage I: March 1977 (4 bridges)
      Stage II: April 1978 (2 bridges)
      Stage III: June 1979 (2 bridges)
      The configuration is a bipole, 1920 MW at ±533 kVdc and 1800 A/pole, with no overload capability, and earth return is
      available for monopole operation.
      Single-phase, 2-winding transformers are used at both terminals, rated at 96.7 MVA.
      No DC filters were initially installed, but were added later by modifying the DC surge capacitors.
      The thyristor valves were originally installed as a double valves, oil-insulated and oil-cooled
      Stage I: (4 bridges) 280 thyristor levels in series connection per valve arm and two thyristors in parallel, giving a total for
      one double valve of 560 thyristor levels or 1120 thyristors.
      For a 6 pulse converter unit this makes 3360 thyristors for 133 kVdc and 1800 A.
      Stages II and III: (4 bridges) 192 thyristor levels in series connection per valve arm, two thyristors in parallel, giving one
      double valve a total of 384 thyristor levels or 768 thyristors.
      For a 6-pulse converter unit this makes 2304 thyristors for 133 kV and 1800 A.
      Each terminal has a total of eight 6-pulse bridges, giving a total of 11,328 thyristor levels or 22,656 thyristors.
      AC harmonic filters are provided at each terminal, designed as two identical filters with total ratings of 210 MVAr at Songo,
      and 195 MVAr at Apollo.
       This Back-to-Back HVDC interconnection forms an asynchronous link between the WECC and Eastern Interconnection
       networks. The link feeds energy to a relatively weak part of the Rocky Mountains area network.
       The converters were designed with 10% continuous overload capability. The converters consist of 2 thyristor valve
       structures housed indoors in one valve hall, with each valve having 3 modules in series connection, each module having 10
       thyristor levels in series and each thyristor level has 4 thyristors connected in parallel. This makes a total of 120 thyristors
       per valve arm or 720 thyristors per 6-pulse converter unit.
       The valves are air-insulated and air-cooled. The valve cooling system consists of two closed loops and an evaporative-
       assisted outdoor cooler. The heat from the air is moved from the lower plenum heat exchangers by means of a pumped
       water-glycol loop to the heat-exchanger in the outdoor evaporative cooler.
       DC Reactor Rating 0.06H at 2000A
       There is 1x AC Harmonic Filter on each side, rated at 30Mvar, tuned to 11th harmonic.
       In addition, there is 1x 30Mvar shunt capacitor on each side.
       The Converter Transformers are 3-phase, 3-winding units, connecting to the 230kV AC network voltage on the line side
       windings.
       Transformer Data: 123.3 MVA, 230+16%-6%/23.8/23.8 kV
                         This HVDC system connects the mainland converter station at Arnott, Delta,
                         Vancouver to Duncan, Vancouver Island, a total circuit length of 73.6 km,
                         comprising both overhead line and submarine cable sections. The scope
                         of this project was to add a second pole to the existing pole 1 mercury arc
                         converter.
                         The thyristor valves for the pole 2 converters are air-cooled, housed indoors
                         and in the form of double valve structures, each valve consisting of 15 modules,
                         and each module contains 12 thyristors. This gives a total of 2160 thyristors in
                         each converter.
                          The valves are cooled by a forced air primary cooling loop which transfers heat
                         from the valve assemblies to a secondary cooling loop employing a water-glycol
                         solution. The secondary loop transfers heat to the atmosphere via outdoor
                         evaporative coolers.
                         The converter transformers at both stations are configured as 1-phase,
                         2-winding units, a total of 6 units per pole.
                         Vancouver Terminal: 83.1 MVA, 236 {+ 15% / - 13%} / 119.2 kV
                         Vancouver Island Terminal: 83.1 MVA, 236 {+ 15% / -13%} / 119.2 kV
                         The AC harmonic filters at each terminal are the same, with one 94 Mvar bank, with sub-banks tuned to 5th, 7th, 11th,
                         13th, HP.
                         There are no DC filters.
                         The DC Reactor is placed on the High Voltage circuit, and rated at 0.068 H, 280 kV, 1320A.
                         Replacement of mercury-arc valve with an air-cooled thyristor valve in Kingsnorth underground cable scheme. This
                         was a prototype of the valve to be later installed at the Sellindge converter station of the Cross-Channel scheme, as
                         described in section 1.2.4.2 above.
                         The Kingsnorth scheme was decommissioned in 1987.
      This Back-to-Back HVDC system forms an asynchronous interconnection between the ERCOT (Texas) and Eastern
      Interconnection networks, both connections are at 345 kV. The main function of this system is to allow energy trading
      between the two networks to take advantage of variation in generation and load patterns.
      The valves are rated at 200 MW, and designed with 10% continuous overload capability, 25% for 1 hour. There are 8
      thyristor levels in each module, and 2 parallel thyristors at each thyristor level. Three modules are connected make up a
      complete valve, leading to a total of 1152 thyristors in the HVDC system.
      The valves are cooled by a forced air primary cooling loop which transfers heat from the valve assemblies to a secondary
      cooling loop employing a water-glycol solution. The secondary loop transfers heat to the atmosphere via outdoor
      evaporative coolers.
      The converter transformers are 3-phase 3-winding units, with a voltage rating of 345 / 35.4 / 35.4 kV.
      The AC harmonic filters on the Oklahoma side comprises two 30 Mvar 11th and 13th HP filters, and a 30 Mvar shunt
      capacitor. On the Texas side there are two 30 Mvar 11th and 13th HP filters, and a 30 Mvar shunt reactor.
                         This Back-to-Back system links the Hydro Quebec 315 kV network to the New Brunswick Power 345 kV network, allowing
                         an asynchronous interconnection to feed hydro generation into the NBP system.
                         The converters were designed with approximately 25% overload capability.
                         The converter consists of thyristor valve structures housed indoors in the valve hall, with each valve having 6 modules
                         in series connection, each module having 16 thyristor levels in series. This gives a total of 2304 thyristors in the system.
                         The valves are air-insulated and air-cooled. The valve cooling system consists of two closed loops and an evaporative-
                         assisted outdoor cooler. The heat from the air is moved from the lower plenum heat exchangers by means of a pumped
                         water-glycol loop to the heat-exchanger in the outdoor evaporative cooler.
                         DC Reactor Rating 2 x 0.05H at 2500A
                         On the HQ side there are three 40.6 Mvar filter sub-banks connected at 315kV, each sub-bank tuned at 12th harmonic,
                         and three 30.1 Mvar filter sub-banks tuned at 24th harmonic, also connected at 315 kV. A total of 212.1 Mvar.
                         On the NB side there are two 55.6 Mvar filter sub-banks connected at 345kV, each sub-bank tuned at 12th harmonic, and
                         two 55.3 Mvar filter sub-banks tuned at 24th harmonic, also connected at 345 kV. A total of 221.8 Mvar. Also, on the NB
                         side there are two 55 Mvar shunt reactors connected at 345 kV.
                         The Converter Transformers are 1-phase, 3-winding units, with the following rating data:
                           ➙ 134.2 MVA, 315±6%/55/55 kV
                           ➙ 134.2 MVA, 345±6%/55/55 kV
      The Phase 1 Bipole HVDC system links the Hydro Quebec and New England asynchronous AC networks between the Des
      Cantons converter station at Sherbrooke, QC and the Comerford converter station at Monroe, NH. The purpose was to
      transmit hydro energy from Quebec to the Boston load center. The total DC circuit length is 172km, including a buried
      cable in a tunnel under the St Lawrence River.
      The converters are connected to the AC systems on both sides of the link at 230 kV.
      Converter Transformers
        ➙ The transformers are 1-phase, 3-winding units
        ➙ Des Cantons: 328.2 MVA, 230 kV {+12.4% / -7.4%} / 180.7 / 180.7
        ➙ Comerford: 167 MVA, 230 kV
      AC Harmonic Filters
      Des Cantons:
        ➙ Total filter rating 244.6 Mvar
        ➙ 2 Filter Banks, each with sub-banks tuned at 3rd (2 x 13.7 Mvar), 11th (2 x 30.2Mvar), 13th (2 x 29.5 Mvar), 24th (2 x
          48.9 Mvar) harmonics
        ➙ 2 Capacitor Banks
      Comerford:
          ➙ 4 Shunt Capacitor Banks, each rated at 31.5 Mvar
          ➙ 2 Shunt Capacitor Banks, each rated at 63 Mvar
          ➙ 2 Filter banks each rated at 63 Mvar, tuned to 2nd +25th, 23rd, 11th +37th, 3rd + 13th
          ➙ In addition, there are twelve 19 Mvar shunt reactors connected at 13.8 kV.
      DC Filters
      Des Cantons: Single Pole operation: Triple tuned filters, Bipole Operation: Double tuned filters
      Comerford: One 6th harmonic, and One 12th harmonic shunt connected DC filter on each pole.
      Thyristor Valves
          ➙ The air-cooled thyristor valves are arranged in quadrivalve structures.
          ➙ Each 12-pulse converter has 6 quadrivalve structures, with 16 modules per valve.
          ➙ Each module contains 8 thyristors, giving a total of 3072 thyristors for the bipole at each converter station.
      Valve Cooling
      The valves are cooled by a forced air primary cooling loop which transfers heat from the valve assemblies to a secondary
      cooling loop employing a water-glycol solution. The secondary loop transfers heat to the atmosphere via outdoor
      evaporative coolers.
                         HVDC was chosen as the preferred option as it links the networks asynchronously, and contracts were awarded for the
                         construction of HVDC converter stations on each side of the channel, rated at 2000 MW in a double bipole configuration
                         with eight submarine cables at 270 kVdc.
                         In both stations, the four poles, each of 500 MW rating (270 kVdc, 1852 Adc) arranged as two 1000 MW bipoles, are in
                         separate valve halls and linked by a central control block. Each pole has a single 12-pulse converter, with the twelve valves
                         housed in three indoor quadrivalve structures.
                         The UK converter station is situated at Sellindge, close to the Kent coast. The solution at Sellindge covers a 14 hectare
                         site, and includes 400 kV harmonic filters, two Static VAr Compensators (SVC), and an indoor, 400 kV GIS substation. The
                         Sellindge installation includes:
                            ➙ 125 valve modules per valve, each module comprising two parallel-connected 56 mm air-cooled thyristors
                            ➙ Two 3-phase, 2-winding, converter transformers per pole, rated at 316 MVA each
                            ➙ Two C-type and two second order damped filters per bipole, each of 130 MVAr
                            ➙ 15 GIS bays, 63 kA 400 kV arranged in double busbar configuration
                            ➙ Two ±150 MVAr Static VAr Compensators, each with 500 MVAr 0.5 sec absorption capability to mitigate
                               overvoltages caused by faults on the France side.
                         The French converter station is at Les Mandarins, close to Calais, and includes:
                           ➙ 12 valve modules per valve, each module comprising eight thyristor levels in series
                           ➙ Each thyristor level has two parallel-connected 75 mm air-cooled thyristors
                           ➙ Three single phase, 3-winding converter transformers per pole, rated at 206/103/103 MVA
                           ➙ AC Harmonic Filters with a total installed rating of 1280 MVAr, divided into eight (high-pass, damped type) filters
                              of 160 MVAr each
                           ➙ One DC reactor per converter, rated for ±270 kVdc, 370 mH at 1852 A.
                         Bulk power transfer between independent systems of Sardinia, Corsica and Italy by overhead line (292 km)
                         and submarine cable (121 km). The first stage was completed in 1967 using mercury-arc valves (see
                         section 1.3.2.1). In 1986, a 50 MW tap, using air-cooled thyristor valves, was added in Corsica to make the scheme
                         the first multi-terminal HVDC link in the world. In 1992 the original mercury-arc valves at the two ends of the scheme
                         were replaced by thyristor valves and the scheme rating increased to 300 MW.
                         The interconnection is between Codrongianos on Sardinia Island, Lucciana (Bastia) on Corsica Island and Suvereto on the
                         Italian Mainland, with a total route length of 385 km.
                         The three stations are connected in parallel on a line which is operated at rated voltage of 200 kV: earth and sea return
                         were used.
                         The converter stations are rated and configured as follows:
                         Codrongianos: 300 MW at 200 kVdc and 1500 A. Anode situated on the Sardinian coast.
                         Suvereto: 300 MW, at 200 kVdc and 1500 A. Cathode situated on the coast.
                         Lucciana: 50 MW, at 200 kVdc and 250 A. Earth electrode on the shore used as an anode or a cathode.
                         The purpose of the link included:
                           ➙ Frequency support for the Sardinian AC network by power/frequency control
                           ➙ Energy supply, frequency control and static spinning reserve on Corsica
                         The power flow direction between the two main stations (Codrongianos and Suvereto) dictates the polarity of the DC
                         line voltage. The direction of the flow on the Corsican network was made independent of this polarity by reversing the
                         connection of the Corsican converters by high-speed isolating switches.
                         Automatic power reversal between the main stations is possible by a sequence eliminating the Corsican converters for
                         500 ms.
      Bulk power transfer by 930 km of overhead lines from remote hydro-electric generation on Nelson river to the Winnipeg
      load centre. Bipole 2 Project implemented in three stages.
      Interconnection between Henday, near Gillam, and Dorsey, near Winnipeg, both in the Province of Manitoba, Canada.
      The bipole 2 rating is 2000 MW at ± 500 kV / 2000 A with a total route length of 930 km.
      Each valve contains 16 thyristor modules and eight valve reactor modules and each thyristor module has six thyristor
      levels in series and two in parallel connection.
      Each valve therefore contains 96 thyristor pairs in series, including five redundant levels.
      The thyristor modules are air-insulated and water-cooled.
                         The McNeill HVDC link was awarded to GEC-Alsthom in December 1987 to provide an asynchronous power connection
                         between the Alberta and Saskatchewan provinces, requiring a 150 MW back-to-back HVDC converter station to be
                         built on the Alberta / Saskatchewan border.
                         To overcome difficulties with the weak systems on both sides of this link, the design incorporated many significant
                         innovations, which are fully described in section 1.2.5.
                         The full project specification included:
                           ➙ 150 MW back-to-back mono-pole
                           ➙ No DC smoothing reactor
                           ➙ 3-phase 4-winding transformers
                           ➙ 25 kV tertiary busbars for all filters and reactive power banks
                           ➙ Water glycol mixture in a single loop cooling system, safe to -50ºC
                           ➙ Transient overvoltage limited by multi-column surge arresters, permanently connected at 25 kV
                           ➙ Equivalent Short-Circuit Ratio (ESCR) drops to 1.0, on Saskatchewan side when operating as an inverter.
      Bulk power transfer by 100 km submarine cable from mainland grid at Haenam to Cheju island and replace existing local
      generation.
      The island of Cheju is 100 km off the coast of South Korea, it has no installed natural energy resource of its own, and the
      energy costs are therefore very high. The expansion of tourism on the island caused a significant growth in power demands,
      creating a need for additional power generation. However with tourism a key driver for development, the use of traditional
      diesel and oil-fired steam generation did not match the environmental and aesthetic restrictions.
                         This was the first time HVDC technology had been used in Korea. Two converter stations were needed for the 300 MW
                         HVDC interconnection: one at Haenam on the mainland and the other close to the coast on Cheju island.
                         As the HVDC link was the sole source of power to the isolated island, innovative design features were needed to ensure the
                         minimum risk to supply. Due to the converter station’s proximity to the sea, it was essential that the design of equipment
                         took into consideration the extreme levels of salt contamination. As a further precaution, at the Cheju terminal the AC
                         filters are accommodated indoors for added protection against the saline elements.
                         Since the aim of the project was to allow the local generation on the island to be shut down and the HVDC station to
                         supply the complete power consumption of the island, even in the absence of telecommunications between the two
                         ends, the scheme included a number of novel and innovative features, further details of which can be found in section
                         1.2.6.
                         HVDC technical data
                           ➙ 300 MW ±180 kV bipole
                           ➙ Two 101 km 800 mm2 sea cables, single wire-armored
                           ➙3  -phase, 188 MVA star/star/delta converter transformers
                           ➙ Four 27.5 MVAr 154 kV filters per terminal
                           ➙ Two 70 MVA synchronous compensators at Cheju
                           ➙S  ea electrodes rated 834 A continuous and 1530 A for 10 seconds, 15 km from the converter stations
                           ➙ Minimum ESCR (Cheju): 1.45 (1.10 monopolar)
                           ➙ Valves: H300 type, 100 mm, 5.2 kV thyristors, 46 per valve (Haenam) or 48 per valve (Cheju)
                           ➙ Thyristor valve cooling: 3:1 water/glycol.
                         Interconnection between the Western and Southern electricity networks of India. India’s Southern and Western power
                         regions had originally operated as separate power networks.
                         The Western region’s power reserves come from coal sources and are drawn upon all year round for power generation.
                         The Southern region relies heavily on generation from hydro sources which are plentiful during the monsoon but leave
                         power shortages in other seasons.
                         The opportunity to trade energy and reserve power between the two regions would aid the South, by enabling them to
                         use the coal reserves of the West, and help the West conserve these valuable reserves during the generation surplus of
                         the South in wetter periods.
                         Interconnection between the Eastern and Southern electricity networks of India. The design details and function of this
                         link are very similar to those of the Chandrapur back-to-back installation, except that the Visakhapatnam (Vizag) link is
                         a single monopole installation.
      The McNeill Back-to-Back system was first commissioned in 1989, and since that time the link has become a dependable
      and essential part of the ATCO network. The system exchanges energy between the Alberta and Saskatchewan network
      at the northern extremes of the WECC and Eastern Interconnected networks across the US and Canada.
      The 2 AC networks are relatively weak at this location and the HVDC uses an extreme tap range and a large number of
      low Mvar, AC harmonic filters, connected on a MV tertiary winding on the converter transformers to accommodate this.
      After 20 years of service the availability of spare components for the control system was the motivation behind the plan
      for replacement of the control system at McNeill. The scope of this contract was the turnkey replacement of the HVDC
      Control & Protection System, and the MV Filter Circuit Breakers.
                         The contract was for the replacement of the mercury-arc valves of pole 1 with thyristor valves. This link is the
                         interconnection of two systems (Sweden-Denmark) by a 90 km undersea cable and 25 km transmission line.
                         Svenska Kraftnät is the owner and operator of Sweden’s transmission network, with responsibility for the national
                         electricity grid and the country’s 400 and 220 kV power lines. Energinet, its Danish counterpart, owns and operates the
                         400 kV transmission network for Jutland and Funen in western Denmark and is responsible for the overall security of the
                         supply, including the connections to neighboring countries.
                         Originally built in the 1960s, the mercury-arc HVDC system of pole 1 of the Konti-Skan HVDC undersea electricity
                         transmission link was nearing the end of its design lifetime and was scheduled for replacement and upgrading to match
                         the power rating of the conductor circuit (which had been enhanced over the years), and pole 2, built in the 1980s.
                         GE Vernova was selected to provide a cost-effective replacement, with the latest HVDC thyristor valve technology
                         replacing the old mercury-arc system. The submarine cable link, co-operated by Svenska Kraftnät and Energinet, spans
                         the Kattegat seaway between Sweden and Denmark and allows the two countries to exchange power.
                         When the Konti-Skan connection was originally built it put an end to independent, country-exclusive energy systems in
                         Scandinavia and reduced the two countries’ reliance on individual hydro or thermal sources.
                         As western Denmark is directly connected to the UCTE European network, Konti-Skan permits Sweden access to energy
                         from continental Europe, providing increased flexibility in dry and wet years and an increased security of supply.
                         The necessity to upgrade their grid management and trading system in a proactive, timely manner enables a more efficient
                         utilization of imported power - something that is of increasing importance to all energy managers.
                         This important re-investment program covered the complete renewal of the converter station in Vester Hassing, Denmark,
                         using state-of-the-art technologies. In Sweden, a new converter station with the same specification was built at Lindome
                         near Gothenburg, and required a 25 km extension to the overhead lines from Stenkullen to the new site. A key optimization
                         factor in the project specifications was the increase in the ratings of the new pole 1 equipment to utilize the unused
                         capacity in the cable/overhead line DC circuit, which had been separately modified and upgraded over the years.
                         The heart of the new installation is the latest version of GE Vernova's HVDC thyristor valve, the H400. These valves use
                         series-connected, fully protected thyristors, each with 8.5 kV rating and 125 mm diameter. The thyristors are controlled
                         by GE Vernova's industry leading Series V digital control and protection system, offering fully redundant operation,
                         including monitoring and alarm capabilities. Both the Swedish and Danish sites include two 203 MVA, 415/111.5 kV
                         HVDC converter transformers, one star-star connected and the other star-delta connected.
      Interconnection of Saudi Arabia (60 Hz) into the 50 Hz Gulf AC Interconnector scheme
      The Gulf Cooperation Council Interconnection Authority (GCCIA) was created to provide an effective means of exchanging
      energy between the six member states in the region (Bahrain, Kuwait, Oman, Qatar, Saudi Arabia and the United Arab
      Emirates):
        ➙ Interconnect the member states’ electrical power networks by providing the necessary investments for power sharing
           to anticipate power generation loss in emergency situations
        ➙ Reduce the spinning reserves of each member state
        ➙ Improve the economic power system efficiency throughout the member states
        ➙ Provide cost-effective power sharing capabilities amongst the member states and strengthen collective electrical
           supply reliability
        ➙ Deal with the existing companies and authorities in charge of the electricity sector in the member states and
           elsewhere in order to coordinate their operations and strengthen the efficiency of operation with due regard to the
           circumstances relating to each state
        ➙ Apply modern technological developments in the field of electricity.
      Phase 1 of the project is focused on the northern portion of the interconnection.
      Saudi Arabia runs its electricity transmission network at 380 kV, 60 Hz, whereas the other five countries use 400 kV, 50 Hz.
      Based on the asynchronous nature of the states to be interconnected, the best solution which would allow Saudi Arabia
      to participate in the exchange was to add a HVDC interconnection.
      The Phase I system components linking the networks of Kuwait, Saudi Arabia, Bahrain and Qatar include:
        ➙ A double-circuit 400 kV, 50 Hz line from Al Zour (Kuwait) to Doha South (Qatar) via Ghunan (Saudi Arabia), with an
           intermediate connection at Al Fadhili (Saudi Arabia) and associated substations
        ➙ A back-to-back HVDC interconnection to the Saudi Arabia 380 kV, 60 Hz system at Al Fadhili
        ➙ A double-circuit 400 kV interconnection comprising overhead lines and submarine link from Ghunan to Al-Jasra
           (Bahrain) and associated substations.
                         The control center located at Ghunan is linked with each member country’s national control center and will ensure security,
                         control, interconnection access, perform frequency and interchange regulation, coordinate interconnection operation and
                         facilitate transaction recording and billing.
                         The GE Vernova solution involved the creation of a 1,800 MW HVDC back-to-back link configured as three separate 600
                         MW substations. All three substations were built at the same location and constructed simultaneously. Each substation
                         can operate autonomously or in a coordinated manner. This 3-pole HVDC converter interconnection substation is
                         located next to Saudi Electric Company’s existing Al Fadhili 380 kVac substation.
                         One of the main functions of this HVDC facility is to constantly look for the occurrence of a power generation loss in the
                         interconnected networks. When a loss of generation is detected, the HVDC link injects power into the system and, through
                         the use of frequency control, restores the system to normal conditions.
                         The main equipment at the Al Fadhili converter station includes:
                           ➙ 3 x 600 MW back-to-back HVDC links
                           ➙ H400 thyristor valves, using 8.5 kV / 125 mm thyristors
                           ➙ 12 converter transformers, three of each of the following ratings:
                              – 385.3 MVA, 380/97 kV, 60 Hz, Star/Star
                              – 385.3 MVA, 380/97 kV, 60 Hz, Star/Delta
                              – 380 MVA, 400/96 kV, 50 Hz, Star/Star
                              – 380 MVA, 400/96 kV, 50 Hz, Star/Delta.
                         The very high ambient temperature (up to 55°C) on this project posed a significant challenge. Because the temperature
                         of the valves’ active part (the silicon in the thyristors) needs to be limited to 90°C, the water-cooling plant required higher
                         coolant flow rates than a standard HVDC link. The cooling pipe arrangement within the valve was changed to a parallel
                         circuit to increase the total flow rate into the converter. This required the largest water-cooling plant ever built for a HVDC
                         installation.
                         HVDC converters need to be installed in a controlled environment with low levels of dust (converters have a tendency to
                         act as an electrostatic precipitator and to accumulate dust on insulating surfaces).
      Asynchronous interconnection of the Northwest China and North China power grids. The scope of supply on this project
      was for the valves and VBE of one converter only, the other converter being provided by others. The converters on this
      valve are the first use of 150 mm (6”) thyristors rated at 4500 Adc.
      Sole supplier of thyristor valves and VBE cubicles at each station for bulk hydro power transfer on overhead lines from
      Central China to Shanghai or the East Coast.
      Sole supplier of thyristor valves and VBE cubicles at each station for bulk hydro power transfer on overhead lines from
      North Western China to the East Coast, close to Beijing.
      Refurbishment of the bulk power interconnection of English and French electricity systems by 45 km submarine cable
      and 26 km underground cable. The original IFA2000 project was constructed in the mid-1980s interconnecting the UK
      and France using air-cooled valves (see section 1.3.3.2).
      The link is highly utilized and has become an essential part of the National Grid and RTE networks for energy trading
      between the two countries. The equipment at each end of the link is different and the owners were experiencing increasing
      failure rates and difficulty locating spares for obsolete components. They decided to replace the equipment in stages over
      2 scheduled outages in 2010 and 2011, each outage with a scheduled duration of only 42 days. This requires that, as much
      as possible, installation and testing work is carried out prior to the outage while the link remains in service.
      The normal mechanical configuration of the H400 valve is ceiling-suspended, which requires the building structure for the
      valve hall to be capable of supporting the load. In the case of this project however, the original valves were floor-standing,
      so to avoid having to redesign and strengthen the building, a specially designed floor-standing version of the H400 valve
      was created.
      The equipment replaced under this contract includes:
         ➙ Thyristor valves
         ➙ Control equipment
         ➙ Cooling plant.
      All other equipment including the HVDC cables, AC harmonic filters, converter transformers, switchgear, auxiliary power
      supplies, etc remains unchanged.
                         Asynchronous interconnection between Uruguay and Brazil, since Uruguay operates at 50 Hz and Brazil operates at
                         60 Hz. UTE already has the Rivera HVDC 70 MW link in operation (see section 1.3.4.8).
                         The turnkey scope for this project includes:
                           ➙ 500 MW back-to-back Station at Melo (leaving provision for a possible expansion to 1000 MW in the future)
                           ➙ 500 kV switchyard and substation on the Uruguay side
                           ➙ Design and supply of 500 kV equipment for the extension of the substation in San Carlos on the Brazilian side, with
                               civil works and installation being carried out by the utility
                           ➙ Design, supply and installation of the new and replacement control & protection system (SCADA) of the substation
                               in San Carlos.
                         The link is to be operated unmanned and under remote control similar to the previous Rivera HVDC link.
                         The second HVDC interconnection between the mainland of South Korea at JinDo and Jeju (formerly spelt "Cheju")
                         island.
                         The future development of the AC network on the island of Jeju is planned to include significant levels of renewable
                         generation, especially wind, and there is a need for more flexibility in the transfer of power between the mainland and
                         the island. This second HVDC link between island and mainland is at a higher rating than the first.
                         This new 400 MW bipole HVDC link was implemented using a third cable as metallic return conductor: there is no sea
                         electrodes in this installation. The total cable route is 120 km.
                         The transmission utility in Brazil (Furnas) already operates two 3150 MW / ±600 kV HVDC links. These take the hydro power
                         from the Itaipu generation plant in SW Brazil to the Rio de Janeiro and Sao Paulo load centers. The plan for developing
                         hydro generation and HVDC transmission is being replicated in the Rio Madeira project.
                         The project scope is for the turnkey supply of two converter stations rated at ±600 kVdc / 3150 MW (in 2 x 1575 MW
                         poles), for bulk hydro power transfer over 2375 km overhead lines. The link interconnects the Rio Madeira Hydro-plants
                         (at Santo Antonio and Jirau) in NW Brazil to the major load centers in South / Southeast Brazil, and as of 2018 was the
                         longest HVDC line in service in the world.
      Point to Point Interconnection between Buk-Dangjin and Godeok by Land and Submarine Cable, two cables rated
      at 500kVdc, and the other at MV for the return current path. The purpose of the link is to allow the injection of large
      amounts of energy into a rapidly growing commercial and industrial region south of Seoul. The scope of this project
      was the supply of the first pole equipment, with provision for the future addition of a second pole to form a bipole.
      Each Pole is rated at 500kVdc, 3000A, and the rating is capable of delivering 3000MW at the inverter end AC terminals.
      The thyristor valves are arranged as water-cooled, ceiling-suspended quadrivalves, with 72 thyristors in each valve,
      including 3 redundant levels. There are 6 valve modules in each valve, leading to a total of 72 x 12 x 2 = 1728 thyristors
      at each converter station.
      Reactive Power banks are provided at each converter station, which constitute the requirement for one pole, as follows:
      Dangjin
        ➙ -4 x 238 Mvar
      Godeok
        ➙ -9 x 136 Mvar
        ➙ -1 x 80 Mvar Shunt Reactor
      The converter transformers are configured and rated as follows:
      315/315 MVA, YN/y0 and YN/d11, 345/220 kV, 17% Impedance, +32% / -8% Tap range.
                         The function of this LCC Bipole HVDC link is for the transmission of hydro energy from the Lower Churchill dam in Labrador,
                         to the St John's area on Newfoundland. Converter stations at Muskrat Falls (Labrador) and Soldiers Pond (Newfoundland),
                         two transition compounds at the Strait of Belle Isle.
                         The converters are connected to the AC systems at Muskrat Falls at 315 kV and at 230 kV at Soldiers Pond. The Bipole link
                         is rated at 900 MW delivered at Soldiers Pond, and at 815 MW for power transfer in the reverse direction.
                         One key design consideration for this DC system is the relatively weak short circuit level at both ends of this link, going as
                         low as 1500MVA at the Muskrat Falls (rectifier) end, and around 2000 at the Soldiers Pond (inverter) end. Synchronous
                         compensators are being added at the inverter end, to support the converter and the AC network operation.
                         The low nominal current and high DC voltage rating of the converters in this system, has enabled the use of increased
                         current for overload (though only under specific DC line and cable configurations), and the converters are rated for 1.5pu
                         continuous overload, and 2pu for 10mins.
                         Reduced DC voltage operation is also possible down to 80% of the nominal 350 kVdc value.
                         The DC circuit consists of 2 HVDC conductors configured as a bipole circuit, and an electrode line from each converter
                         station to an electrode station. The electrode line from the Muskrat Falls converter is extremely long at 400km, while the
                         line at Soldiers Pond is 12km distant.
                         The DC smoothing reactors are located in the HV part of the circuit, rated at 150mH
                         The converter transformers are configured and rated as follows:
                         Muskrat Falls:
                          ➙ 1-phase / 3-winding, YN/y0/d11, 393 / 196.5 / 196.5 MVA, 315 / 145 / 145 kV, +25 / -15 % Tap Range, 14% impedance.
                          ➙ Soldiers Pond:
                          ➙ 1-phase / 3-winding, YN/y0/d11, 348 / 174 / 174 MVA, 230 / 128 / 128 kV, +21 / -19 % Tap Range, 16% impedance.
                         The converters are thyristor-based, line-commutated converters, with 12-pulse valves. The valves are arranged as
                         water-cooled, floor-mounted quadrivalves, with 45 thyristors (44 at Soldiers Pond) in each valve, with 3 redundant
                         levels. There are 4 valve modules in each valve.
      Bulk power transfer from generation resources on the east coast of Korea into the Seoul metropolitan area by 220 km
      of land cable.
TOC   DC TRAnsmission
             68 |    DC
                      Systems:
                        Transmission
                               Line Commutated
                                      Systems: Line
                                                 Converters
                                                    Commutated Converters
     2.1. DC TRANSMISSION APPLICATIONS
          Although AC has long been the dominant method for electrical power transmission, there are certain niche
          areas where DC transmission is preferable, as described below.
Fig. 2.1a– Comparison of an AC and a DC overhead line tower for comparable power transmission
                                                          DC                     Break even
                                                                                 distance
                            DC
                                                     AC
                    converter
                      stations
                                                               600 km – 800 km   40 km – 70 km
                           AC                                         Overhead   Submarine
                     stations                                         line       cable
                                                                                                   Transmission
                                                                                                   distance
          Fig. 2.1c– HVDC versus AC transmission break-even distance
AC SYSTEM
          A          B          C   +                           –   A           B           C
                                                                                                    +                   –
                                                                                            
                    (i) DC operation of an AC line                       (iii) Insulator rearrangement for conversion
               without change to insulator arrangement                        of a multi-conductor AC line to HVDC
          A          B          C       +                   –
                                                                                                        +          –
                                                                                               
              (ii) Insulator rearrangement for conversion                       (iv) Conversion to HVDC by
                of a single-conductor AC line to HVDC use               rearrangement of tower head and insulators
Fig. 2.1f– Potential increase in power transfer by conversion from AC (as thermal rating) to DC
Ld → ∞ Id
                                               ea               D1          D3            D5
                                                           Ia
                                               eb
                                                           Ib
                                                                                                                          Vd
                                               ec
                                                           Ic
D4 D6 D2
                                                                                                             Id
                         Fig. 2.2.1b– 6-pulse converter
                         Each diode conducts for 120° in every 360° cycle, so that the successive conducting pairs of valves are 1 and
                         2, 2 and 3, 3 and 4, 4 and 5, 5 and 6 and 6 and 1.
                         The conducting pair is always that pair which exhibits the largest voltage difference compared to any of
                         the other five pairs of diodes, because the circuit imposes reverse voltage on all of the other diodes. With
                         time, the relative amplitudes of the converter’s three AC supply phases (valve-winding voltages) change,
                         so in Fig. 2.2.1d, the voltage B-C becomes greater than the voltage A-C and valve 3 takes over the current
                         which had been flowing in valve 1. This process is known as commutation. The phasor representation of
                         the AC voltage sequence and hence the conduction sequence is shown in Fig. 2.2.1c.
BACK TO       74   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
                                                                                                     1            3
                                             Firing                                        ec
                                             sequence
                                 1
                                  ea
                                                                                           ea
                                                                                                                                     Vdi0
          6 -e
                b
                                                  -ec   2
                                                            Direction of rotating          eb
                                                            phase vector                                      2
                ec                                eb
          5                                             3
                                                                                      i1
                                 -ea
                                 4                                                    i2
i4
                             1               3                                        i5
           ec
                                                                                      i6
                                                                                      Id
           ea
                                                                          Vdi0
ia
           eb
                                         2                                            ib
ic
                                                                                                                         t
          Fig. 2.2.1e– The average DC voltage during the
          conduction period of one diode                                            Fig. 2.2.1d– Switching pattern of a 6-pulse converter
Giving:
                                      3
                            Vdi 0 =     ⋅ 2 ⋅ 3 ⋅ Em                                                                             [Eqn 2.2.1d]
                                      π
                         As 3 ⋅ Em is equal to the line-to-line applied AC voltage (ELL) Eqn 2.2.1d can be rewritten to give the more
                         common form of the equation:
                                      3⋅ 2
                            Vdi 0 =        ⋅ ELL                                                                                 [Eqn 2.2.1e]
                                        π
                         The RMS valve winding current (IRMS), as a function of the DC current (Id), can be shown (Appendix A2.2.1)
                         to be:
                                       2
                            I RMS =      ⋅ Id                                                                                     [Eqn 2.2.1f]
                                       3
And the fundamental component of current (I1), Fig. 2.2.2c, can also be shown (Appendix A2.2.1) to be:
                                    6
                            I1 =      ⋅ Id                                                                                       [Eqn 2.2.1g]
                                   π
                                                                          VAC                   VTHY     ig                         t
                       ea
                                                             Vd
                                                                                                                  ig
                       eb                                                                                                           t
                                         2                                                                        iL
                                                                                                                                    t
                  i1
                                                                          Fig. 2.2.1g– The gating and commutation of a thyristor
                  i2
                                                                       Fig. 2.2.1g shows a simple thyristor circuit.
                                                                       When a gate pulse (Ig) is applied while positive
                  i3
                                                                       forward voltage is imposed between the anode
                                                                       and cathode (VTHY), the thyristor will conduct
                  i4                                                   current (I L). Conduction continues without
                                                                       further gate pulses as long as current flows in
                  i5
                                                                       the forward direction. Thyristor turn-off takes
                                                                       place only when the current tries to reverse.
                                                                       Hence, a thyristor converter requires an existing
                  i6                                                   alternating AC voltage (Vac) in order to operate
                                                                       as an inverter. This is why the thyristor-based
                  Id
                                                                       converter topology used in HVDC is known as a
                                                                       Line-Commutated Converter (LCC).
                  ib
                                                                       2.2.1.3. Introduction of Delay Angle
                                                                                 Control to a 6-Pulse Bridge
                  ic
                                                                       Let us look again at the operation of a diode
                                                                       bridge as shown in Fig. 2.2.1b. This time we will
                                                         t            consider the use of thyristors instead of diodes
                                                                       and we will use a time delay on the energization
               Fig. 2.2.1h– Ideal thyristor controlled 6-pulse bridge of the gate terminal. As the 6-pulse bridge
               operation                                               operates cyclically, it is common to refer to this
                                                                       time delay in terms of electrical degrees with 0°
          being the point on wave where the ideal diode bridge would conduct. This delay angle is referred to as the
          ‘firing’ or ‘trigger’ angle and is given the symbol a.
          Fig. 2.2.1h shows the impact of delaying the conduction of the thyristor by some arbitrary value between
          0° and 90°.
          From Fig. 2.2.1i it can be seen that by introducing a delay in firing the thyristors the area under the curve
          (highlighted in green), representing the average DC voltage, has reduced – compared to what it would
          have been without the delay. This waveform can be analyzed using the method previously described in
          section 2.2.1.1 for the diode bridge. However, in this case it is performed more easily if the waveform is
                                                                                                                    
                              Firing delay angle
                    
                                                                                                               ec
                              1                3
              ec
                                                                                                               ea
                                                                                      Step 1                                                                  Vd
               ea
                                                               Vd
                                                                                                               eb
ec
                                                                                      Giving                                   A
                                                                                                               ea
                                                                                                                                                              Vd
                                                                                                                                       B
eb
                                                                                                                             A2         A1
                                                                                                               ec
                                                                                                               ea
                                                                                      Step 2                                                                  Vd
eb
                                               1
                                                   2⋅π
                                        A1 =             2 ⋅ 3 ⋅ Em ⋅ sin(ω ⋅ t ) d (ω ⋅ t )
                                               π ∫3
                                                 ⋅ π3                                                                                                     [Eqn 2.2.1h]
                     1 3
                          π
              A2 =        2 ⋅ 3 ⋅ Em ⋅ sin(ω ⋅ t ) d (ω ⋅ t )
                     π ∫α
                      ⋅                                                                                         [Eqn 2.2.1i]
                     3
              Vd =     ⋅ 2 ⋅ 3 ⋅ Em ⋅ cos(α )                                                                   [Eqn 2.2.1j]
                     π
          Again, as 3 ⋅ Em is equal to the line-to-line applied AC voltage Eqn 2.2.1j combined with Eqn 2.2.1e gives
          the more common form of the equation:
              Vd = Vdi0  cos(a)                                                                                 [Eqn 2.2.k]
          A further assumption has been made here in order to simplify the steady-state theory of the ideal 6-pulse
          bridge - and that is that the firing angle a, for each valve, is equal.
          From Eqn 2.2.k, it can be seen that with a firing
          angle equal to 90° the DC voltage will be zero. This
          can be confirmed by examination of Fig. 2.2.1k. In                    = 90°
          Fig. 2.2.1k it can be seen that with a firing angle of
          90°, area A and area B above the zero axis equal
                                                                                             1            3
          the equivalent areas below the zero axis, hence, the          ec
          average DC voltage is zero.
          An important point to note from Fig. 2.2.1k is                                 A B
          that there is always a pair of thyristors within                                                              Vd
                                                                        ea
          the 6-pulse bridge turned on, hence, there is a
          continuous current path through the converter. This
          is important when considering the operation of a
          HVDC scheme where two (or more) converters are
                                                                        eb
          connected in series: there is always a continuous                                        2
          DC current path.
Ld → ∞ Id
                                      ea                          T1                T3        T5
                                             Lc         ia
                                      eb
                                             Lc         ib
                                                                                                                                    Vd
                                      ec
                                             Lc         ic
T4 T6 T2
Id
                         Note that in the following analysis, a further assumption is made: that the commutating impedances in
                         each phase connected to the 6-pulse bridge are all equal. The commutating impedance will reduce the
                         rate of change of current through the valves, which is theoretically infinite in the simplified case, when
                         the current path through the 6-pulse bridge changes from one valve to another. This can be analyzed by
                         considering the circuit during the interval when the voltage of phase b, in Fig. 2.2.1m, is more positive than
                         that of phase a and a gate pulse is applied to T3, which now has a positive voltage between its terminals.
                         The equivalent circuit for this is shown in Fig. 2.2.2a.
Ld → ∞ Id
                                       ea                              T1                T3        T5
                                              Lc             ia
                                       eb
                                              Lc             ib
                                       ec                                                                                                Vd
                                              Lc             ic
T4 T6 T2
Id
                                                                                              eb
          However, more important than the di/dt is the
                                                                                   3 ⋅ Em                                            i
          overlap time, the time required for the changeover
          from 1.0 p.u. current flowing in T1, to 1.0 p.u., the                                                di
                                                                                              ea
          current flowing in T3.                                                                               dt
          Considering that at the instant valve T3 is fired at
          angle a, the T3 valve current is zero and the rate-
          of-change of valve current is also zero, then from                     Fig. 2.2.2a– Equivalent circuit of the commutation process
          Eqn 2.2.2b:
              w t0 = a                                                                                                   [Eqn 2.2.2c]
          Hence:
                     α
              t0 =                                                                                                       [Eqn 2.2.2d]
                     ω
          At some time later, ‘t1’, the current through valve T3 will equal 1.0 p.u. Therefore, integrating Eqn 2.2.2b
          between t0 and t1, with respect to the final value t1, gives:
                             t1   3 ⋅ 2 ⋅ Em ⋅ sin(ω ⋅ t1 )
              1.0 =      ∫                                  dt1                                                          [Eqn 2.2.2e]
                                         2 ⋅ Lc
                             α
                             ω
          The time taken for the current to change between zero and 1.0 p.u. in a valve is called the overlap time
          and, as with the firing angle, it is normally referred to in electrical degrees. The symbol used for the overlap
          angle is ‘m’. In Eqn 2.2.2f above the value of w t1 must equal the initial angle a, plus this overlap angle, m.
          Hence, this equation can be re-written as:
As 1.0 p.u. current is the DC current, Eqn 2.2.2g can be re-written as:
                                    2 ⋅ ω ⋅ Lc      
              µ = cos −1  cos(α ) −            ⋅ Id  − α [Eqn 2.2.2i]
                                      2 ⋅ ELL       
                                    1
                                         2⋅π
                             A1 =               2 ⋅ 3 ⋅ Em ⋅ sin(ω ⋅ t ) d (ω ⋅ t )
                                    π ∫3
                                      ⋅ π3                                                                                [Eqn 2.2.2j]
                         However, area ‘A2’ is now a function of the firing angle and the overlap angle, and for a firing angle plus
                         overlap (a + m) of less than or equal to 60°, this can be described by the equation:
                                    1 α +µ
                             A2 =          2 ⋅ 3 ⋅ Em ⋅ sin(ω ⋅ t ) d (ω ⋅ t )
                                    π ∫α
                                     ⋅                                                                                    [Eqn 2.2.2k]
A third area ‘A3’ must now be added, representing the period of the overlap:
                                    1 3          3
                                          π
                             A3=             2⋅    ⋅ Em ⋅ sin(ω ⋅ t ) d (ω ⋅ t )
                                    π ∫α + µ
                                     ⋅                                                                                    [Eqn 2.2.2l]
                                                2
                                     3
                            Vd =        ⋅ 2 ⋅ 3 ⋅ Em ⋅ (cos(α ) + cos(α + µ ))                                           [Eqn 2.2.2m]
                                    2⋅π
                                1
                            Vd = ⋅ Vdi 0 ⋅ (cos(α ) + cos(α + µ ))                                                       [Eqn 2.2.2n]
                                2
                                                        3
                            Vd = Vdi 0 ⋅ cos(α ) −        ⋅ ω ⋅ Lc ⋅ Id                                                   [Eqn 2.2.2o]
                                                        π
                         Eqn 2.2.2o is commonly used as a basis for converter bridge analysis and can be used in the form shown or
                         it can be converted to a p.u. base (Appendix A2.2.2), resulting in equations 2.2.2p and 2.2.2q. The derivation
                         of the p.u. current is given in Appendix A2.2.1.
                                                              Xc                 
                            Vd p.u . = k⋅V LL p.u.⋅  cos(α ) − p.u . ⋅ Id p .u .                                       [Eqn 2.2.2p]
                                                               2                 
                         Where:
                                  Vdp.u.               1
                            k=             ⋅
                                  VLL p.u.                   Xc p .u .                                                   [Eqn 2.2.2q]
                                               cos(α 0 ) −
                                                              2
                         Fig 2.2.2c shows the impact of the overlap angle on the valve and phase current. In addition, the voltage
                         developed across a valve, which includes ‘notches’ resulting from the commutation of other valves within
                         the bridge, is shown.
                                                           ea
                                                                                                                Vd
                                                           eb
                                                                                                    0.5  (eab-ebc)
                                                                    eac       eba       ecb                       0.5  (eab-eca)
                                                                                                                              0.5  (ebc-eca)
                                       Valve 1 voltage
                                                                                        eab   eac
                                       Valve 1 current
                                                                                                               Fundamental
                                                                                                               component of current
                                       ‘A’ Phase current
t
Fig. 2.2.2c– Valve voltage and current considering both firing angle and overlap for rectifier operation
          winding voltage is low, or when there is a short-circuit on the DC side, the converter can enter what is
          known as double overlap mode.
          In the single overlap mode, a commutation in the upper half of a 6-pulse bridge is always complete before
          a commutation in the lower half starts. In the double overlap mode, the next commutation commences
          before the previous one is completed. Hence, there are either three valves or four valves in conduction
          during any time interval. Moreover, during the time interval when four valves are in conduction, the
          converter appears as a 3-phase short-circuit to the AC system and the DC voltage will be zero. During the
          interval when only three valves are conducting then, as with the single overlap mode, the DC voltage will
          follow a sine wave with a magnitude of 1.5 × Em.
                                    9                          9
                             Vd =     ⋅ 2 ⋅ Em ⋅ cos(α − 30°) − ⋅ ω ⋅ Lc ⋅ Id                                                        [Eqn 2.2.2r]
                                    π                          π
                         Comparing this to Eqn 2.2.2o, it can be seen that in double overlap mode the slope of the Vd – I d
                         characteristic (the voltage drop with increasing DC current) increases by a factor of three from the single
                         overlap mode.
                         From this, we can also derive that the maximum DC short-circuit current (Ids-c) that can flow equals:
                                         2 ⋅ Em
                             IdS −C =                                                                                                [Eqn 2.2.2s]
                                        ω ⋅ Lc
                                     2 ⋅ E LL ⋅ (cos(γ ) − cos(γ + µ ))
                             Id =                                                                                                   [Eqn 2.2.3b]
                                                  2 ⋅ ω ⋅ Lc
                                                   2 ⋅ ω ⋅ Lc       
                             µ = cos −1  cos(γ ) −             ⋅ Id  − γ
                                                     2  ⋅ E LL      
                                                                                                                                     [Eqn 2.2.3c]
                                                 Xc                 
              Vd p .u . = k⋅V LL p.u.⋅  cos(γ ) − p.u . ⋅ Id p .u .                                                           [Eqn 2.2.3e]
                                                  2                 
          Where:
                   Vdp.u.                   1
              k=            ⋅
                   VLL p.u.                       Xc p.u .                                                                      [Eqn 2.2.3f]
                                cos(γ 0 ) −
                                                   2
          It must be noted that the control of the output voltage of a 6-pulse bridge is only achieved by the firing
          angle, a. The extinction angle, g, is a measure of the available turn-off time for the valve following the point
          in time when the valve is fired. The extinction angle can therefore not be ‘controlled’, as it relates to events
          which are still in the future at the time when the valve is fired: consequently, g can only be predicted.
          When it is part of a HVDC interconnection, a 6-pulse bridge cannot operate as an inverter in the double
          overlap mode because, with four valves in conduction, two of the valves turned on will be in the same
          phase, resulting in a commutation failure.
                                           Ld
                                                                                                          6
                                                                                                    α              2
                                                     2       6    4        LS       A   C
                                                                      iA   LS       B
                                 Vd             Vʻ
                                                 d
                                                                      iB   LS E 1   C
                                                                      iC                    A
                                                     5       3    1
                                      ld
                                                                                                B
                                                                                                               γ       3
                                                                                                               1
                                                                                                           5
          connected to the same phase in the 6-pulse bridge conducts, a short-circuit, known as a commutation
          failure occurs. There is then a temporary cessation of power transfer until a control action has removed
          the DC short-circuit. See Fig. 2.2.3b.
Ld → ∞ ID
                          ea                D1            D5             D9
                                      Ia
                         eb           Ib                                                                  Vd
                                                                                       BRIDGE 1            2
                          ec
                                      lc
D7 D11 D3
Vd
                         ea - 30 °          D12           D4             D8
                                      Ia
                         e b - 30 °
                                      Ib                                                                  Vd
                                                                                       BRIDGE 2            2
                         ec- 30 °
                                      Ic
D6 D10 D2
Id
          arrangement shown in Fig. 2.2.5a can be realized by using a transformer with one line winding (AC system
          side) connected in star and two valve side windings, one connected in star (that is, in-phase with the supply
          voltage) and one in delta (that is, displaced from the supply voltage by 30°).
          The normal notation used to denote the phase relationship between the valve side star and delta windings
          is to relate the phase displacement to that of a 12-hour clock face (noting that a round clock face is 360°
          and this is divided by 12 points, denoting the hours, hence each hour represents a 30° displacement). In
BACK TO                                                                         DC Transmission Systems: Line Commutated Converters   |   87
CHAPTER
          2| HVDC CONVERTER THEORY
                                                                                                         Firing
                                                                 30° phase shift                         sequence
                                                                 = 11 oʼclock
                                                                                     12
                                                                        11          ea - 30°         1         Direction of rotating
                                                                                                               phase vector
                                                                              -eb               ea
9 ec -ec 3
                                                             ec - 30°                                     eb - 30°
                                                        8                                                             4
                                                                              -ea               eb
                                                                          7         -ea - 30°
                                                                                                     5
                                                                                      6
                         Fig. 2.2.5b– The phasor diagram of the conduction sequence of a 12-pulse bridge (Note that this diagram has been
                         drawn with ‘12’ at the top to reflect the orientation of a clock face. Normally, firing instance ‘1’ is drawn at the top)
                         the arrangement shown in Fig. 2.2.5a, the applied voltage to Bridge 2 lags behind that applied to Bridge
                         1 by 30°, that is, it is connected as yd11: see Fig 2.2.5b. However, any arrangement could be used which
                         produces a phase shift of 30° between the bridges, for example yd1, yd5, yd7.
                         Consider the conduction sequence phasor diagram shown in Fig.2.2.1c. The equivalent diagram for this
                         configuration is shown below in Fig. 2.2.5b.
                         With a 12-pulse bridge the maximum overlap angle that can exist without there being more than one
                         commutation happening at any instant (operating in single overlap mode), is 30°.
                             ➙ Between 30° and 60° of overlap, the 12-pulse bridge is in double overlap mode
                             ➙ Between 60° and 90° of overlap, it is in triple overlap mode
                             ➙ Between 90° and 120° of overlap, it is in quadruple overlap mode
                         However, for operation with overlap up to 60°, in the ideal case, the converter voltage can be considered
                         to be twice the resultant from the single overlap, 6-pulse equations. Equally, for overlaps above 60°, in
                         the ideal case, the converter can be considered to be twice the resultant from the double overlap 6-pulse
                         equations.
L2
               Vemf         Xsys
                                                          L1
                                                                                                                              Vd
L2
              Commutating
                 bus
                                                                                              Valve winding
                                                                                               impedance
                                                        AC harmonic
                                                            filter
                                                                                                                       Negative common
                                                                                                                            impedance
                                            40                                                      No common
                                                                                                     impedance
                                            20
-20
-40
                                           -60
                                                                                                                                         Positive common
                                           -80                                                                                                impedance
-100
-120
                                                                                 Negative common
                                                                               impedance increases
                                                                              valve voltage stresses
                                     will result in a valve voltage waveform as shown in Fig. 2.2.5e. This includes the effect of the notch as the
                                     valve voltage crosses zero.
                                     As can be seen from Fig. 2.2.5e the common impedance has little impact on the firing instance of the
                                     valve, but a negative impedance may increase the peak voltage during part of the valve voltage waveform,
                                     thereby increasing the voltage stress on the valve damping components (see section 6.2) and the valve
                                     surge arrester (see section 6.7).
                                     Now consider the same converter (X2 = 0.14 p.u. and X1 = ±0.014 p.u.) which is now operating as an inverter,
                                                                                                     Negative common
                                                                                                   impedance increases
                                                                                                  valve voltage stresses
                                                           γ > 15°
                                          γ < 15°
                                                           γ = 15°
                                                120
100
                                                80
                            Valve voltage (%)
60
40
                                                20
                                                                                 Time (electrical degrees)
                                                 0
                                                      0                50          100                       150           200            250
                                                -20
                                                                            Negative common
                                                -40                             impedance
          Positive common
               impedance
                                                          No common
                                                           impedance
          and hence the parameters of the converter transformer; consequently this is an iterative process between
          the transformer designer and the scheme designer.
          The change in effective extinction angle (Dg  ) can be calculated as:
                                      1       
              ∆γ = 30° − tan −1                                                                                                    [Eqn 2.2.5b]
                                 3 ⋅ (1 − m ) 
          The double, triple and quadruple overlap modes of operation cannot be analyzed using the same algebraic
          methods as discussed in section 2.2.5.1 above, as interaction between the bridges will reduce the average
          DC output.
          It should be noted that where a 4-winding converter transformer is employed with the AC harmonic filters
          connected to a transformer winding (see section 3.1.4.2), then the effective impedance between the
          star, delta and filter winding can be configured to be negative and relatively large, thereby increasing the
          effective extinction angle. This is particularly useful, as the 4-winding converter transformer configuration is
          most applicable where the AC system Short-Circuit Level is low (see section 5.1). The converter transformer
          tapchanger can be used to maintain the filter bus voltage constant in steady-state, compensating for
          variations in the AC system voltage and thereby keeping the reactive power generated by the filters
                                                           2 ⋅ [ cos(α ) − cos(α + µ )]      
                                           2 ⋅ E LL                                          
                            Id =                          ⋅            − cos(α + 30°)                                [Eqn 2.2.5d]
                                 2 ⋅ ω ⋅ Lc ⋅ (2 + m ⋅ 3 ) + m ⋅ 3 ⋅                      
                                                                       + cos(α + µ − 30°)  
                                           2 ⋅ ELL
                            Id =                         ⋅ [ sin(α + 60°) + sin(α + µ − 60°)]                            [Eqn 2.2.5h]
                                   2 ⋅ ω ⋅ Lc ⋅ (1 + m )
Short-circuit - 12
          In the following sections, discontinuous current operating modes will be introduced and the consequence of
          finite DC reactance will be introduced for the single overlap case. Further assessment of the impact of finite
          DC reactance on operating modes at higher DC currents will not be reviewed because, as may be seen from
          the single overlap case, the impact diminishes significantly with increasing DC current.
                                      2 ⋅ ELL
             Id =                                             ⋅
                    4 ⋅ π ⋅ ω ⋅ Lc ⋅ (2 ⋅ a 2 + 15 ⋅ a + 28 )
                                   π             6⋅µ                                          
                 ( 2 ⋅ a + 7 ) ⋅      + 12  +           ⋅ ( sin(α + µ ) + sin(α ))                         [Eqn 2.2.6c]
                                    3−2           3 − 2                                        
                                                                                                  
                − (cos(α + µ ) − cos(α )) ⋅  µ ⋅ (12 ⋅ a + 42 ) + π ⋅ (2 ⋅ a + 7 )2 − 12  
                                                                                     3 − 2  
                           Side A                                                                                   Side B
                                                                          Id                                                       Instantaneous current
                                                                                                                                   path through converter
ea Lc la T1 T5 T9 T1 T5 T9 1 ec
eb Lc lb eb
ec Lc lc 2 ea
                                            T7       T11          T3                 T7        T11
                                                                                                            T3
                                                                               Vd
eb-30° Lc lb 3 eb-30°
ec-30° Lc lc ea-30°
                                            T6       T10         T2                 T6         T10         T2
                                                                          Id                                     Effective DC reactance as seen from Side A
                                                                                                                 is 4 x leakage reactance of Side B
Fig. 2.2.6b – The effective DC reactance of a back-to-back converter without a separate DC reactor
          Fig. 2.2.6c shows a graph of calculated errors in firing angle (a) and overlap angle (m) for a typical 12-pulse
          converter operating at 1.0 p.u. DC voltage for currents between zero and 1.0 p.u., assuming a commutating
          impedance of 0.12 p.u. and varying values of DC reactance. Note that the x-axis of the graph represents
          the case of infinite DC reactance and that as the finite value of DC reactance increases with respect to the
          commutating impedance of the converter, the operation of the converter becomes closer to the infinite
          reactor case, that is, the classical theory.
          In Fig. 2.2.6c it can be seen that the maximum error in overlap (m) is around 1.1° in the worst case, but when
          considering a practical case the error is much smaller. The maximum error in firing angle (a) is around 0.5°
          when the converter is operating in single overlap mode. Below a minimum DC current value the current
          becomes discontinuous, hence overlap is irrelevant and the firing angle error increases rapidly.
                                     1.5                                                                            Ld
                                                                                                               a=
                                                                                                                    Lc
                          Error in     1                            a=0
                          overlap                                                                      μ
                                                                  a=1
                          angle μ    0.5
                         (degrees)                          a=3
                                       0
                                            0         0.1     0.2         0.3     0.4        0.5       0.6          0.7        0.8      0.9       1
                                                a=3
                          Error in   -0.5             a=1
                                                                                                                    DC current (p.u.)
                           firing                     a=0
                          angle α                                                   α
                         (degrees)     -1
-1.5
                         Fig. 2.2.6c– Angle errors resulting from the use of classical theory with a finite DC reactor (12-pulse converter, Vdc =
                         1.0 p.u., Xc = 0.12 p.u.)
                         inductance within all elements of the power system, including transmission lines, transformers, machines,
                         cables, etc. Its effect is to shift, in phase, the current AC waveform with respect to the voltage AC waveform,
                         hence reducing the instantaneous value of voltage multiplied by current. In order to assess the effect of
                         this phase shift, the AC power is considered as two components: the ‘Real’ power which results from the
                         in-phase component of voltage and current and the 90° out-of-phase component of voltage and current
                         which is referred to as ‘Reactive’ power.
                         Reactive power can either be leading (current waveform is phase advanced with respect to the voltage
                         waveform) or lagging (current waveform is phase delayed with respect to the voltage waveform). In HVDC
                         systems it is conventional to consider leading reactive power as a source or generator of reactive power
                         and lagging reactive power as a load or absorber of reactive power. Conceptually speaking, reactive power
                         resulting from capacitance is generated and reactive power resulting from inductance and from the converter
                         is absorbed.
                         An AC system is composed of generators, VAr compensators, transmission lines and various inductive and
                         capacitive loads. Reactive power flow through the AC system results in voltage variation between busbars.
                         Part of the system operator’s function is to ensure that the power system operates in the steady-state,
                         with the voltages at the AC system busbars within their normal operating limits; for example maintaining
                         the voltage at each busbar to a range of 0.95 p.u. and 1.05 p.u. In order to achieve this voltage control with
                         changing system load conditions and configurations (for example, lines switched in or out), controllable
                         elements within the AC system are used.
                         Examples of such control elements are: switchable line-end shunt reactors, switchable shunt capacitors
                         (a special case of these is the Mechanically Switched Damped Capacitor Network, MSCDN, which provides
                         some harmonic damping on the AC system as well as fundamental frequency reactive power), transmission
                         transformer tapchangers and Automatic Voltage Regulator (AVR) controllers on generators. There may be
                         other reactive power devices within the AC system such as Static VAr Compensators and STATCOMs, etc., but
                         such devices are usually reserved by the System Operator for dynamic reactive power control (for example
                         to assist with fault recovery) and thus should not be considered as contributing to the steady-state reactive
                         power control of the AC system.
                         When any major new piece of equipment is added to the network, it is important to optimize the design of
                         that equipment and this includes the reactive power exchange limits within which the equipment is permitted
                         to operate in order to maintain the steady-state AC busbar voltages.
Pdc (MW)
Fig. 2.3a– Calculated reactive power limits at a converter busbar for different system conditions [8]
                                      QSWITCH
                            ∆V =                                                                                                       [Eqn 2.3a]
                                   SCLmin − QTOTAL
                         Where:
                         DV      = the change to AC voltage (p.u.)
                         SCLmin =	the minimum Short-Circuit Level of the AC system on which the switching operation is to take
                                   place (MVA)
                         QSWITCH = the reactive power step to be imposed on the AC system (MVAr)
                         QTOTAL =	the total reactive power connected to the converter bus including the reactive power to be
                                   switched (MVAr)
                         A typical value of DV imposed by clients is 3%.
                         A more exact voltage change can be calculated using the Thévenin equivalent circuit of the AC system
                         connected to the HVDC station busbar, Fig. 2.3b.
                         The magnitude of the AC system source voltage, ‘E’, shown in Fig. 2.3b can be derived from:
                                        ( Pac + jQac ) ⋅
                            E = Vac +
                                             Vac
                                                           ( 0 − jXSYS )   [Eqn 2.3b]     AC system       AC system                 HVDC
                                                                                        source voltage   short circuit             station
                                                                                                         impedance
                         Where:
                                                                                                              X sys
                         E = the Thévenin equivalent voltage of the AC
                         system
                         Vac = the HVDC station busbar voltage                            E                                  Vac         Pac + jQac
                         Pac = HVDC station real AC power
                         Qac = HVDC station reactive AC power
                         XSYS = the Thévenin equivalent short-circuit                   Fig. 2.3b– A simple Thévenin equivalent circuit of the
                         impedance of the AC system                                     AC system connected to an HVDC station busbar
                                                                                                                                            Converter absorption
              Capacitive reactive power
            exchanged between the HVDC
                                                          Converter absorption slowly     Capacitive reactive power                       rapidly increased back
                                                           returned to steady-state     exchanged between the HVDC                            to steady-state
              station and the AC system
                                                                                          station and the AC system
          associated phasor diagram. We can see that when the operating angle (firing angle, a or g, plus overlap
          angle, m) equals 90°, the converter exchanges no real power with the AC system but still absorbs reactive
          power. This is an important operating characteristic of line commutated converter HVDC, which prevents
          voltage collapses in one AC system being exported into the interconnected AC system: see section 5.1.
          The converter operating overlap angle is a function of the operating current and the converter transformer
          leakage reactance, as described in section 2.2.1.
                          Where:
                          Qdc0p.u. = the reactive power absorption of the converter at rated DC current (p.u.)
                                                                        (α + μ) = 0° IDEAL Case
                                           Vc
                                 Vb                                                                                 Converter line current
                                                                                                                                                            Ia   Va
                                                                                      210                     330   360
                          -30    0    30        60       90     120    150     180          240   270   300                390
                                                                                                                Fundamental component of
                                                     μ = 16°                                                    converter line current
                                                                                                                                                       Φ
                                                                                                                                                                 Va
Ia
(α + μ) = 68°
                                                                                                                                                                 Va
                                                                                                                                                       Φ
                                                                                                                                                  Ia
(α + μ) = 90°
Va
                                                                                                                                                       Φ
                                                                                                                                             Ia
                                                         (α + μ) = 165°
Va
Ia Φ
                                   Vac 2 f
               Qfilt = Qfilt 0 ⋅        ⋅                                                                     [Eqn 2.3d]
                                   Vac02 f0
          Where:
          Qfilt =    the actual reactive power supplied by the filters
          Qfilt0 =   the reactive power supplied by the filters at 1.0 p.u. voltage and frequency
          Vac =      the actual HVDC station busbar voltage
          Vac0 =     the 1.0 p.u. value of AC system voltage
          f      =   the actual HVDC station busbar frequency
          f0     =   the 1.0 p.u. value of AC system frequency
          Other factors will affect the actual reactive power generated by the AC harmonic filters such as component
          manufacturing tolerances and ambient temperature. All of these variations, if required by the client, are taken
          into consideration when calculating the net reactive power exchange with the AC system.
                                                                                          0
                                                                                              0     0.1    0.2      0.3      0.4       0.5         0.6       0.7           0.8        0.9          1    1.1
-0.1
                                                                                     -0.2                                                                          Increasing γ
                                      Converter reactive power absorbtion (p.u.)
-0.3 Increasing Xc
-0.4
                                                                                     -0.5
                                                                                                                                                                                                         Xc = 12%
                                                                                                                                                                                                         Xc = 12%
                                                                                     -0.6
                                                                                                                                                                                                          Xc = 18%
-0.7 Xc = 18%
                                                                                     -0.8
                                                                                                                                    DC real power (p.u.)
Fig. 2.3f– Reactive power absorption of a converter operating with CEA control
                                                                                     0
                                                                                          0       0.1     0.2     0.3       0.4       0.5         0.6        0.7           0.8        0.9          1    1.1
                                                                                   -0.1
                                                                                                                                             Increasing Xc
                                                                                   -0.2
                        Converter reactive power absorbtion (p.u.)
-0.4
                                                                                   -0.5
                                                                                                                                                                                                          Xc = 12%
                                                                                                                                                                                                          Xc = 12%
                                                                                   -0.6
                                                                                                                                                                                                          Xc = 18%
                                                                                   -0.7                                                                                                                   Xc = 18%
                                                                                   -0.8
                                                                                                                                   DC real power (p.u.)
Fig. 2.3g– Reactive power absorption of a converter operating with constant valve winding voltage control
                                                         0
                                                              0    0.1          0.2         0.3         0.4         0.5          0.6      0.7         0.8             0.9        1          1.1
-0.1
                                                       -0.2
          Converter reactive power absorbtion (p.u.)
                                                                                                                                                     Increasing γ
                                                       -0.3
                                                                  Constant γ control
                                                                                                                                                                            Increasing Xc
                                                       -0.4
-0.6
-0.7 Xc = 18%
                                                       -0.8
                                                                                                                  DC real power (p.u.)
Fig. 2.3h– Comparison of the reactive power absorption of a constant valve winding voltage control scheme and a CEA control
           control action maintains the operating angle at a constant minimum value in CEA control, in constant
           valve winding voltage control the scheme is designed so that, allowing for manufacturing tolerances and
           measurement errors, the actual operating angle is at least the minimum value. Consequently, with constant
           valve winding voltage control the actual operating angle will be greater than the minimum design limit and
           hence the reactive power absorbed by the converter will also be greater.
                                                  hn 2
                              Qfilt 0 = Qcap ⋅                        [Eqn 2.3e]
                                                 hn 2 − 1
                          Where:
                          Qfilt0 = reactive power supplied by the filters at 1.0 p.u. voltage and frequency
                          Qcap = reactive power supplied by the filter’s main capacitor at 1.0 p.u. voltage and frequency
                          hn = harmonic number to which the filter is tuned
                          Therefore, for the 11th harmonic, the filter will generate more reactive power than would a plain capacitor
                          bank of the same value (Eqn 2.3f):
                               112          
                               112 − 1 − 1 ⋅ 100 = 0.8%                                                                     [Eqn 2.3f]
                                                  0.6
                                                                                                         AC harmonic filter
                                                                   AC harmonic filter reactive           switch point
                                                  0.4              power generation
                                                    0
                                                         0   0.1          0.2          0.3         0.4          0.5           0.6   0.7   0.8        0.9         1            1.1
-0.2
                                                  -0.4
                                                                              Converter reactive power
                                                                              absorption
                                                  -0.6
                                                  -0.8
                                                                                                                DC power (p.u.)
Fig. 2.3j– Filters switched with changing DC power and resultant reactive power exchange with the AC system
                           the prevailing AC and DC conditions, as well as a set of rules established at the design stage.
                           However, in the case of a closed-loop reactive power controller, the open-loop filter switch point controller
                           always takes precedence. The closed-loop reactive power controller can energize an AC harmonic filter earlier,
                           or de-energize it later than demanded by the AC harmonic filters, but it is not permitted to energize it later
                           or de-energize it sooner than dictated by the AC harmonic filter open-loop controller. In this way, harmonic
                           performance is given priority over reactive power performance and filter operating parameters are maintained
                           within filter equipment ratings.
                           As can be seen from Fig. 2.3j there is almost always some reactive power exchange with the AC system.
                           The important design criterion is to ensure that the net exchange remains within the limits established as
                                      0
                                           0     0.1           0.2         0.3         0.4          0.5           0.6         0.7     0.8        0.9         1            1.1
-0.2
                                    -0.4
                                                                  Converter reactive power
                                                                  absorption
                                    -0.6
                                    -0.8
                                                                                                    DC power (p.u.)
          Fig. 2.3k– Filters switched with changing DC power and resultant reactive power exchange with the AC system.
          Assuming two filters energized at start-up
          per section 2.3.2. This usually means allowing for the complete range of steady-state AC system voltage
          and frequency, as well as allowing for measurement errors on the DC side of the converter and equipment
          manufacturing tolerances.
          An important issue concerning the permitted reactive power exchange, particularly at low DC power
          transmission levels, is that of compatibility with the AC harmonic filtering requirements. If the AC harmonic
          constraints are too great, either because the limits are onerous or because the AC system is poorly damped,
          it may be necessary to have multiple filters energized at start-up, as shown in Fig. 2.3k.
          The reactive power exchange with the AC system shown in Fig. 2.3k results in a low power factor at DC
          power transmission levels below about 0.4 p.u. The power factor, cosf, is defined by:
0.9
0.8
                                     0.7
            Power factor (cos φ )
0.6
0.5
0.4
0.3
0.2
0.1
                                      0
                                           0   0.1       0.2         0.3      0.4      0.5        0.6       0.7         0.8     0.9   1       1.1
                                                                                       DC power (p.u.)
          Fig. 2.3l– The power factor (cos f) of the converter scheme shown in Fig. 2.3k
                          100
                           Target DC Voltage (%)
                                                                                                           100
                                                                                  DC power (%)
                          absorbed by the converter, in order to reduce the capacitive reactive power being exported to the AC
                          system from the HVDC converter station.
                          The change in DC conditions is achieved by lowering the DC voltage which requires the firing delay angle to be
                          increased. With an increase in DC current (to maintain the DC power constant) the overlap angle increases,
                          hence the reactive power absorbed by the converter increases [13]. Note that as the DC side of the converter
                          is common to both the rectifier and inverter, changing the DC conditions will change the reactive power load
                          at both rectifier and inverter.
                          In Fig. 2.3m, the upper limit is defined by the minimum allowable operating angles of the converter and
     BIBLIOGRAPHY
          [1] B. M. Weedy, B. J. Cory, “Electrical Power Systems”, John Wiley & Sons, 1999, Chapter 1.
          [2] B. R. Andersen, C. D. Barker, “The application of HVDC and the benefits that the development of voltage
          sourced converters could bring”, CEPSI 2000, Manilla, Philippines, October 23-27 2000.
          [3] N. M. MacLeod, C. D. Barker, D. R. Critchley. “HVDC Submarine cable inter-connectors: A review of the
          Socio-economic and technical issues of existing schemes”, AORC-CIGRÉ Regional Conference, Jakarta,
          Indonesia, April 2008.
          [4] H. L. Thanawala, M. H. Baker, G. R. Moore, “Discussion on embedding of DC transmission in AC networks”,
          CIGRÉ Symposium, London, 1999.
          [5] C. Horwill, C. C. Davidson, “A Power-electronics-based transmission line de-icing system”, IEE 8th ACDC
          Conference, 2006.
          [6] E. W. Kimbark , “Direct Current Transmission Vol. I”, Wiley-Interscience, 1971, Chapter 3.
          [7] R. P. Burgess, J. D. Ainsworth, H. L. Thanawala, M. Jain, R. S. Burton, “Voltage/Var Control at McNeill
          Back-to-Back HVDC Converter Station”, CIGRÉ Paper 14-104, Paris, 1990.
          [8] B. T. Barrett, N. M. MacLeod, S. Sud, R. S. Al-Nasser, A. I. Al-Mohaisen, “Planning and Design of the
          Al-Fadhili 1800 MW HVDC inter-connector in Saudi-Arabia”, CIGRÉ Paper B4-113, Paris, 2008.
          [9] P. L. Sorensen, B. Franzén, J. D. Wheeler, R. E. Bonchang, C. D. Barker, R. M. Preedy, M. H. Baker, “Konti-
          Skan 1 HVDC Pole Replacement”, CIGRÉ Paper, B4-207, Paris, 2004.
          [10] Y. H. Song, A. T. Johns, “Flexible AC transmission systems (FACTS)”, Published by The Institute of
          Electrical Engineers, 1999, Chapter 4.
          [11] S. Sadullah, N. M. MacLeod, “Enhancement of Power Transmission through HVDC & SVC Technology”,
          IEEE Pakistan, 21st Multi-topic International Symposium, Lahore, April 2006.
          [12] D. J. Hanson, “A Transmission SVC for National Grid Company Incorporating a +/- 75 MVAr STATCOM”,
          IEE Colloquium on FACTS, 23 November 1998.
          [13] J. D. Wheeler, J. L. Haddock, “Chandrapur Back to Back HVDC Scheme in India”, ICPST Conference in
          Beijing China, October 1994.
3.1c
          This configuration is used as the first stage of a bipolar scheme, avoiding ground currents when construction
                   3.1d
          of electrode lines and ground electrodes is environmentally unacceptable (see section 8.3). It is also
          used when the necessary length of electrode line, or the value of the earth resistivity, would result in an
          uneconomic solution.
MRTB
Fig. 3.1f– Bipole HVDC scheme with metallic return for pole outage
          The3.1f
              configurations described in the preceding sections use a single converter unit per pole. However, a
          HVDC scheme can also be built with two or more 12-pulse bridges connected in series per pole, in either
          monopolar or bipolar configuration. This series bridge HVDC configuration is generally used where higher
          transmission voltages are required in order to transfer bulk power across long distances.
          Fig. 3.1g, 3.1h and 3.1i respectively show a monopolar scheme with earth return, a monopolar scheme with
          metallic return and a bipolar scheme, all using the series bridge configuration.
                          Fig. 3.1g– Series bridge connected HVDC scheme with earth return
                                 3.1g
                          Fig. 3.1h– Series bridge connected HVDC scheme with metallic return
                                 3.1h
                                                                                                                                                          DCÊvoltage
                                                                                                                                                         measurement
                                                                                                                                                                                                                                 3| HVDC STATION DESIGN
                                                                                                                                                                                                                    DCÊpoleÊ2
                                                                                                                                                                                                                    HVÊline
                                                                                                                                                                                                                    connection
3.1j
                                                        Fig. 3.1j– Typical Single Line Diagram (SLD) for a bipole HVDC converter station
          3.1.3. HVDC SCHEMES AND MAIN COMPONENTS
          The following section reviews the major components which make up a converter station.
          3.1.3.1. AC Switchyard
          The AC system connects to a HVDC converter station via a converter bus, which is simply the AC busbar to
          which the converter is connected. The AC connection(s), the HVDC connection(s), along with connections to
          AC harmonic filters and other possible loads such as auxiliary supply transformer, additional reactive power
          equipment, etc. can be arranged in several ways normally dictated by reliability/redundancy requirements,
          the number of separately switchable converters and utility practices in AC substation design.
          Fig. 3.1j to Fig. 3.1o illustrate a selection of typical AC connection arrangements that are used in HVDC
          converter stations.
          Fig. 3.1j below shows a typical Single Line Diagram (SLD) of one end of a bipole HVDC converter station.
          Fig. 3.1k shows a simple, single, 3-phase busbar with one switchable connection to the AC system and the
          switchable AC harmonic filters connected directly to it. In such an arrangement, it is not possible to use the
          AC harmonic filters for reactive power support of the AC system without having the converter energized
          (as the AC system connection is common).
          Fig. 3.1l shows a scheme consisting of two converters and includes an additional circuit breaker dedicated
          to each converter. In this arrangement, the AC harmonic filters can be used for AC reactive power support
          without energizing the converter. However, a busbar fault would
          result in the complete outage of the converter station.
                                                                                                                                Converter
                                                                                      AC
                                                                                    system
            AC
                                                                   Converter
          system
                                                                                                                                Filter
                                                                                                                                Filter
                                      Filter        Filter
          Fig. 3.1k– Simple single busbar scheme                                    Fig. 3.1l– Single busbar scheme with separate
                                                                                     converter breaker
Converter
                AC                                                                             AC
              system                                                                                                       Filter
                                                                                             system
                                                              Filter
                                                                                              Filter                   Converter
Filter
Fig. 3.1n– Double busbar, double breaker scheme Fig. 3.1o– Breaker and a half scheme
          3.1.3.5. Converter
          The converter provides the transformation from AC to DC or DC to AC as required. The basic building block
          of the converter is the 6-pulse bridge, however most HVDC converters are connected as 12-pulse bridges.
          The 12-pulse bridge is composed of 12 valves (see section 6.2), each of which may contain many series
          connected thyristors in order to achieve the DC rating of the HVDC scheme.
          3.1.3.7. DC Filter
          Converter operation results in voltage harmonics being generated at the DC terminals of the converter,
          that is, there are sinusoidal AC harmonic components superimposed on the DC terminal voltage. This
          AC harmonic component of voltage will result in AC harmonic current flow in the DC circuit and the
          field generated by this AC harmonic current flow can link with adjacent conductors, such as open-wire
          telecommunication systems, and induce harmonic current flow in these other circuits.
          In a back-to-back scheme these harmonics are contained within the valve hall with adequate shielding and
          with a cable scheme the cable screen typically provides adequate shielding.
          However, with open wire (overhead line) DC transmission it may be necessary to provide DC filters to limit
          the amount of harmonic current flowing in the DC line if this harmonic interference will be detrimental to
                          3.1.3.8. DC Switchgear
                          Switchgear on the DC side of the converter is typically limited to disconnectors and earth switches for
                          scheme reconfiguration and safe maintenance operation. Interruption of fault events is achieved by the
                          controlled action of the converter and therefore, with the exception of the Neutral Bus Switch (NBS), does
                          not require switchgear with current interruption capability.
                          Where more than one HVDC pole shares a common transmission conductor (typically the neutral), it is
                          advantageous to be able to commutate the DC current between transmission paths without interrupting
                          the DC power flow. As a result, several items of DC switchgear are typically required. The following switches
                          can be identified from Fig. 3.1j.
                          NBGS - Neutral Bus Ground Switch
                          	This switch is normally open but when closed it solidly connects the converter neutral to the
                            station earth mat. Operation with this switch can normally be maintained if the converter can be
                            operated in a bipole mode with balanced currents between the poles, that is, the DC current to
                            earth is very small. The switch is also able to open, commutating a small DC unbalance current
                            out of the switch and into the DC circuit.
                          NBS -      Neutral Bus Switch
                          	A NBS is in series with the neutral connection of each pole. In the event of an earth fault on one
                            pole, that pole will be blocked. However, the pole remaining in service will continue to feed DC
                            current into the fault via the common neutral connection. The NBS is used to interrupt the fault
                            current flowing through the blocked pole to ground.
                          ERTB -     Earth Return Transfer Breaker
                          	The connection between the HVDC conductor and the neutral point includes both a high voltage
                            disconnector and an ERTB, which is used as part of the switching operation to configure the HVDC
                            scheme as either a bipole scheme or a metallic return monopole. The ERTB is sometimes also
                            referred to as a Ground Return Transfer Switch (GRTS).
                          	The disconnector is maintained open if the HV conductor is energized in order to isolate the
                            medium voltage ERTB from the high voltage. The ERTB is closed, following the closing of the
                            disconnector in order to put the HV conductor in parallel with the earth path. The ERTB is also used
                            to commutate the load current from the HV conductor, transferring the path to the ground return
                            path. Once current flow through the HV conductor is detected as having stopped, the disconnector
                            can be opened allowing the HV conductor to be re-energized at high voltage.
                          MRTB - Metallic Return Transfer Breaker
                          	The MRTB is used in conjunction with the ERTB to commutate the DC load current between the
                            ground return and a parallel, otherwise unused, HV conductor (metallic return). The MRTB closes
                            in order to put the low impedance earth return path in parallel with the much higher impedance
                            metallic return path. The MRTB must also be able to open causing current flowing through the
                            earth return to commutate into the much higher impedance metallic return path.
                          3.1.3.9. DC Transducer
                          DC connected transducers fall into two types, those measuring the DC voltage of the scheme and those
                          measuring the DC current. They are explained in section 6.6 of this book.
DCÊreactor
ACÊsystem ElectrodeÊline
Fig. 3.1p– CCC HVDC scheme with commutation capacitors on the valve side
DCÊreactor
ACÊsystem ElectrodeÊline
Fig. 3.1q– CCC HVDC scheme with commutation capacitors on the line side
                          3.1q
                          Once the DC conditions are fixed, the reactive power absorbed by the converter at any power level is
                          determined by the capacitance of the commutation capacitor. Therefore, the size of the commutation
                          capacitor can be chosen so that at full load the reactive power consumption of the converter is small and
                          can be compensated for by the reactive power generated by one small AC filter. Therefore, the filtering and
                          reactive power supply functions are nearly fully separated and the need for switchable shunt capacitor banks
                          for reactive power consumption is reduced.
                          Another advantage of CCC is that Temporary OverVoltages (TOV) are lower because the converter requires
                          much less shunt reactive power compensation and the load rejection TOV is mainly determined by the amount
                          of shunt reactive power connected.
                          CCC has also the following disadvantages:
                              ➙	Whilst for conventional HVDC schemes the only series component which can impact the overall
                                 availability and reliability of a back-to-back is the converter transformer, in a CCC there is the additional
                                 capacitor bank which will directly impact the failure rate of the converter station
                              ➙	The series capacitor bank is under DC stress and therefore, if mounted externally, is subjected to
                                 additional pollution risk
                              ➙	The additional exposed conductors associated with the capacitor bank will increase the RFI radiated
                                 from the converter station
                              ➙	In order to avoid the risk of pollution build-up on the capacitor insulation and increased RFI generation,
                                 the capacitor can be located indoors. However, the additional civil works will have an associated
                                 additional cost and as the capacitor will be oil-filled, special fire protection methods must be employed
                              ➙	The series capacitor forces the converter to operate at higher firing angles thereby increasing the
                                 harmonic current generated by the converter
                              ➙	The large amount of series capacitive energy can cause severe damage to the converter valve in the
                                 event of bushing flashover; hence a large earthing resistor must be incorporated into the converter
                                 DC circuit
                                               1.0
                           MagnitudeÊ(p.u.)
0.9
0.5
0.3
T1
Tp
T2
Time
                                                                                   5000 μs ≥ Tp ≥ 20 μs
                                                                                        T2 ≤ 20 ms
                                                                                       (Fig. 3.2a)
                                               Slow front – Switching
                                                                                IEC standard wave shape
                                                                                  Voltage 250/2500 μs
                                                                                   Current 36/90 μs
                                                                                    20 μs ≥ T1 ≥ 0.1 μs
                                                                                       T2 ≤ 300 μs
                                                                                       (Fig. 3.2a)
                                                Fast front – Lightning
                                                                                IEC standard wave shape
                                                                                   Voltage 1.2/50 μs
                                                                                    Current 8/20 μs
                                                                                    2 μs ≥ T1 ≥ 0.1 μs
                                                                                        T2 ≤ 5 μs
                                              Fast front – Front of wave               (Fig. 3.2a)
                                                                                IEC standard wave shape
                                                                                    Current 1/2 μs
                        Table 3.2a– Categories of electrical system overvoltage (IEC 60071-1)
                                                                                                           DR
                                                                                                                                   HVDCÊline
V DL
                                                                                                   B
                                                                                          V
                                                                                                            COMPONENTS
                                                                                                                             FD
                                                                                                             AUXILIARY
                                                                                                             DCÊFILTER
                               AFB            AT*                                         V
                                                                                                   M
                                                                                          V
                                                                                                                                      EL2
                                                                                              CN                                         LVDCÊline
                                       *ÊIfÊrequired
                                                                                                                                            EL
Fig. 3.2b– Typical surge arrester arrangement for a point-to-point HVDC scheme
                                                                                                                                                       Clearance
                                                                                                   Creepage
                  with industry standards, the creepage
                  distance is corrected to a higher value if the
                  diameter of the insulator is typically beyond
                  300 mm [7]. k di is the creepage distance
                  multiplication factor used where
                  kdi = 1 for average diameter Dm < 300 mm
              		 = 1.1 for 300 < Dm < 500 mm
              		 = 1.2 for Dm > 500 mm
              ➙ Positioning of the insulators (the build-up
                 of dirt on the insulation and partial washing
                 effect of the rain is a function of the position
                                                                     Fig. 3.2c– Creepage and clearance distance
                 of the insulation: vertical, horizontal, etc.).
                 This affects the creepage distance and also
                 the definition of the maintenance cycle.
          Industrial experience and a large number of studies have culminated in IEC 60815, the standards which
          define the applicable creepage factors for AC installations.
                                                                                                    3.2c
          For outdoor installation, the creepage distance per kV of DC voltage in the same environment is generally
          higher than that of line-to-line AC voltage.
          Where: m =	1 for lightning withstand voltage. m is found from Figure 9 of IEC60071-2 for switching
                      withstand voltage. m has a value between 0 and 1 and is an inverse function of the impulse
                      withstand voltage
                 H = altitude in meters above sea level
          There is also a modified IEC 60071-2 method, which considers the reference altitude as 1000 m above sea
          level and the altitude correction factor equation is modified to:
                         H −1000 
                       m
                         8150                                                                                [Eqn. 3.2h]
              Ka = e
          This modified method relies on extensive industry experience of installations up to 1000 m above sea level
          involving equipment such as transformers, bushings, breakers, instrument transformers, etc.
          There is a very limited experience in the area of high altitude high voltage electrical installations (altitude
          greater than 2000 m). Some of the highest installations around the world include:
             ➙ Colorado USA (up to 3333 m) – Rocky mountain region (≤ 345 kVac)
             ➙ Peru (up to 4330 m) – Andes mountain region (≤ 230 kVac)
          Owing to the empirical nature of calculation of the clearance and environmental correction factors, extension
          of environmental correction factors for altitudes greater than 2000 m above sea level is limited by the
          availability of up to date research (experimental data followed by statistical analysis) on the assessment of
          the dielectric properties of air at high altitudes. The earliest assessment of the dielectric properties of air at
          high altitudes was by F.W. Peek in the 1920s. Recent contributions to this area of study include Chicoutimi
          University – Québec, Canada and Chongqing University - China. [14 – 21]
          Some key considerations for selecting the appropriate method of calculation of environmental correction
          factors are:
              ➙	The IEC 60060 method is substantially accurate for altitudes less than 2000 m, for ambient conditions
                 within the range identified by the standard
              ➙	The IEC 60071-2 method provides safe clearance definitions up to altitudes of 2000 m, as long as the
                 base withstand voltage is identified appropriately
              ➙	The modified IEC 60071-2 method can be applied on equipment with substantial operating experience
                 for altitudes up to 1000 m
CREEPAGE CLEARANCE
VoltageÊriseÊtime
Precipitation
Contamination
AirÊdensityÊ(altitude)
Humidity
                           3.2e
                            • For altitudes greater than 2000 m, the IEC 60071-2 method may be applied. At present, research entities
                              and industry are working together on defining a calculation methodology of clearance for high voltage and
                              high altitude installations (with due consideration for non-linear behavior of long air gaps on application
                              of impulses) for different conductor configurations.
                        1 - It is noted that this time domain solution method contrasts with the frequency domain solution method employed for the load flow
                             studies of section 5.11.1; the frequency domain solution method does not simulate transient states accurately, but is a much more
                             suitable tool for load flow studies.
                        2 - In the context of switching transient event studies, a fault is a short circuit; this may be between a conductor and ground, or, in the case
                             of an ungrounded fault, between two or more conductors. In the latter case, all three AC phase conductors may be shorted together to
                             form a 3-phase fault. In practice, a fault may be caused by a simple metallic short-circuit resulting from a mechanical malfunction, or it may
                             be caused by the formation of an arc of ionized air that provides a low resistance path between conductors – such arc formation is often
                             referred to as a flashover. Within a switching type simulation, the occurrence of any fault may be modeled as an instantaneous resistance
                             collapse.
          3.3.1.1. AC Sources
          These may be modeled by an ideal voltage source, together with an RL impedance using the topology in
          Fig. 3.3b.
          All three single-phase representations are identical to one another, except of course for the sinusoidal voltage
          waveforms of the idealized voltage sources being mutually 120° out of phase.
          The formulae for calculating the values of the three components of the impedance are the following:
                         V2                                                               ω LP
              ➙ LP =         in henries          ➙ Rp = wLpQ in ohms             ➙ RS =        in ohms
                       ω SCL                                                               Q
          Where: w = 2pf, where f is the system frequency in Hz
                 Q is the chosen quality factor for the supply
                 V is the RMS line-to-line system voltage in kV
                 SCL is the chosen 3-phase short-circuit level (SCL) of the source in MVA.
          In the model, if the converter and its associated filters are out of service, the SCL at the converter’s local
                                                                Local
                           Remote                             switchyard                                                     LineÊside ValveÊside
                        substationÊ#1
                         ACÊsource
                            Ê#1
                                                             Line
                                                           breakers
                                                                                                                                                              DC
                                                                                                                                                           smoothing
                                                                        Converter                                                                           reactor
                 Line                     doubleÊcircuit                breakers
               breakers                 overheadÊlineÊ#1                                                                                                                                 HVDCÊline
                                                                                                                     PLC
                                                                                                                    filter                        12
                                                                                               Filter                                            pulse
                                                                                                                                                bridge                    DC        ToÊother
                                                                                             breakers                                                                    filter   sideÊofÊlink
                           Remote                                                                                                              converter
                        substationÊ#2                                                          Filter
                                                                                               main                                                                               LowÊvoltage
                         ACÊsource                                                           capacitors                                                          DC
                            Ê#2                                                                                                                                neutral             lineÊforÊDC
                                                             Line                                                                                               filter            returnÊpath
                                                           breakers                                                               Converter
                                                                                      AC                    AC                  transformers
                                                                                    filter                filter
                                                                                     #1                    #2
                 Line                     doubleÊcircuit
               breakers                 overheadÊlineÊ#2
Fig. 3.3a– System model for switching type transient overvoltage studies
                                                                         PhaseÊAÊ
                                                                       ofÊidealisedÊ                                                                 PhaseÊA
                                                                                                               Rp
                                                                        3-phaseÊAC                                                                connectionÊto
                                                                      voltageÊsource                                                             systemÊnetwork
                                                                                                                                   Rs
              3.3a                                                                                             Lp
                                                                         PhaseÊBÊ
                                                                       ofÊidealisedÊ
                                                                                                               Rp                                    PhaseÊB
                                                                        3-phaseÊAC
                                                                                                                                                  connectionÊto
                                                                      voltageÊsource
                                                                                                                                   Rs            systemÊnetwork
                                                                                                               Lp
                                                                         PhaseÊCÊ
                                                                       ofÊidealisedÊ                                                                  PhaseÊC
                                                                                                               Rp
                                                                        3-phaseÊAC                                                                 connectionÊto
                                                                      voltageÊsource                                                              systemÊnetwork
                                                                                                                                   Rs
                                                                                                               Lp
                                  switchyard is the net effect of the AC sources and the impedance of the transmission lines that connect these
                                  sources to the converter station. The converter station equipment is designed for operation with the actual
                                  system SCL being between specified minimum and maximum values. Note that fault studies are normally
                                  carried out at minimum SCL, as these give the highest overvoltages. However, routine energization studies
                                                        3.3b
                                  are often carried out at maximum SCL, since these produce higher inrush currents into the equipment items
                                  that are being energized.
          3.3.1.3. Filters
          These are represented by their R, L and C component values, using the topology of the actual filter. Any filter
          surge arresters are normally included in this representation. In the case of the PLC filter, the representation
          may be simplified by including only the principal components.
          3.3.1.6. Converters
          In switching studies, every converter that is represented is modeled by its arrangement of individual
          thyristor valves and surge arresters. The converter model includes a detailed control system for the
          valves’ firing control actions. Each valve may be represented by using a model of a thyristor with snubber
          components: a single thyristor model represents the series arrangement of actual thyristors in a physical
          valve, and the snubber component values in the model are aggregated values to represent the combined
          effect of these components in the physical valve.
101.1ÊmH 5Êm
6Êm
                                                                                                                                          4Êm
                                               CapacitorÊC1          4Êm                                                CapacitorÊC1
                                                 lowerÊpart                                                               upperÊpart
                                              withÊassociatedÊ             6.56ʵF                                     withÊassociatedÊ         6.56ʵF
                                                  internal                                               CT                internal
                                                 connection                                             point            connection
                                                   lengths           4Êm                                                   lengths        4Êm
                                                                    3Êm
                                      3Êm               3Êm                 4Êm
                                   Filter         Filter
                                                  surge               L1                        R1
                                   surge
                                                 arrester           15ÊmH                       404 Ω
                                  arrester
                                     #1             #2
                                                         3Êm                4Êm
                                4Êm
4Êm 4Êm
                                                     C2              L2                         R2
                                                     117ʵF          0.42ÊmH                    404 Ω
                                                       4Êm                 4Êm
                                                                          18Êm
          3.3.2.2. Transformers
          For the high frequencies associated with a lightning surge, the stray capacitance effects dominate over
          the electromagnetic coupling between the windings, so the electromagnetic model of the transformer
          as employed in the switching type studies is never used in lightning type studies. Where a transformer is
          represented in a lightning type simulation, it is often sufficient to represent it by its bushing capacitance
          to ground. Additionally, HVDC converter transformers usually have a center entry line side winding. For
          this design of transformer, the magnitude of the capacitive-transferred surge at the terminals of the valve
          side tends to be insignificant, and so the transformer and the equipment on the DC converter side of the
          transformers is not modeled.
current
Ipeak
Ipeak / 2
                                          0
                                                                t1                                                           time
t2
Fig. 3.3d– Current surge waveform used for lightning strike in simulations
                          pulse commencement at which the current falls back to half its peak value.
                          For systems protected against lightning strikes by guard wires, direct strikes only occur as the result of shielding
                          failure. The peak amplitude of strikes for which this can happen has an upper limit defined by the shield design.
                          In the event the surge arresters are coordinated for discharge currents greater than shield failure current (as
                          is often the case) and equipment withstand levels are appropriately coordinated, direct lightning type study
                          for arrester rating and equipment insulation rating is superfluous. Assessment of distance effect, i.e. distance
                                           3.2i from the equipment is beyond the scope of this book. Empirical assessment of distance
                          of the surge arrester
                          effect is included in [4, 12]. For the simulation of lightning strikes whose peak current is 20 kAp or less, a rise
                          time of 3 μs is used and the time to fall to half peak value is 77 μs. These values follow from a statistical analysis
                          of lightning strikes [9].
                          In the case of a tower back flashover event, this commences with a lightning strike to the top of a transmission
                          tower. For a simulation intended to predict the worst-case overvoltages and surge arrester energies, the
                          maximum realistically possible value of peak current must be used. The IEEE statistical analysis [9] indicates
                          that the peak current is always below 200 kApk, therefore 200 kApk is a suitable, conservative value to use in
                          simulations as the peak amplitude if there is no justification for the use of a lower value in a particular project,
                          such as a specific peak value supplied by the customer. The rise time is normally taken as 8 μs, and the time
                          to fall to half peak value taken as 20 μs.
                                                          Control               BipoleÊ1
                                           BipoleÊ2       building
ACÊfilters
ACÊfilters
                             CableÊroute
                                                             SVCÊ2       GIS          SVCÊ1
                                          2 x 3 ph/2 wdg
                                                                                                              6 x 1 ph/2 wdg
                          Fig. 3.4b– Converter transformer arrangements
                                    S
                  S                 +                                 S
                                                          S
                                    D                                 +
                                                                      D
                  D
                                    S
                                    +                                                           VALVE
                                    D                     D
                                                                                                HALL
                  S
                                    S
                                    +
                                    D
                  D
Fig. 3.4d– Bushing turrets are bonded to the Faraday cage where they protrude into the valve hall
          cladding. Where wire mesh is used, the mesh size dictates the amount of shielding, and for cladding the
          spacing of screws connecting the cladding panels together dictates the shielding. In addition to the walls,
          floor and roof, all openings need to be shielded, so the converter transformer turret, where it protrudes
          into the valve hall, is also bonded to the shield as shown in Fig. 3.4d.
          Observation windows in the valve hall must also have a wire mesh across them: doors, when closed, must form
          part of the RFI shield and conduits out of the valve hall must be bonded to the RFI shield and be constructed
          from a metal tube with sufficient length to attenuate any interference.
          As described in section 6.2, the valves are typically arranged as stacks of four valves, physically arranged
          one on top of another. This arrangement is known as a quadrivalve and a typical valve hall containing one
          12-pulse bridge, arranged as three quadrivalves is shown in Fig. 3.4e, Fig. 3.4f and Fig.3.4g.
                                                                                 ValveÊhall
                                                     ThyristorÊquadrivalves
MVDCÊwallÊbushing
ControlÊbuilding
                          ConverterÊtransformers
                         (single-phase,Ê3-winding)
                                                                                                             HVDCÊwallÊbushing
                                                                              ConverterÊtransformer
                                                                                     cooler
                          Fig. 3.4e– Typical thyristor valve hall containing three quadrivalves and with single-phase, 3-winding converter
                          transformers adjacent to the valve hall
3.4e
Fig. 3.4f– 285 kVdc thyristor valve hall containing three quadrivalves
                                                                             HV/UHVÊconnection                                                              MV/HVÊconnection
                                                                                      Id                                                                            Id
T1 T5 T9 T6 T10 T2
                       las                                                                             lad
                       lbs                                                          BridgeÊ1           lbd                                                  BridgeÊ2
                       lcs                                                                             lcd
                                     T7               T11            T3                                               T12         T4            T8
T12 T4 T8 T7 T11 T3
                       lad                                                                             lcs
                       lbd                                                          BridgeÊ2           lbs                                                  BridgeÊ1
                       lcd                                                                             las
                                     T6               T10            T2                                               T1          T5            T9
                                                                                      Id                                                                            Id
                                                                              MV/HVÊconnection                                                             HV/UHVÊconnection
                                                                                     PhysicalÊpointÊofÊsuspension
                                                                                                                                                             12ÊpulseÊmidpoint
                                                                                                                                                                    connection
                                                                                                       Id
                                                T12         T4                 T8                                       T7         T11              T3
                              lad                                                                                                                                        las
                              lbd                                                                                                                                        lbs
                              lcd                                                                                                                                        lcs
                                                T6          T10                T2                                       T1         T5               T9
                                    Id                                                                                                                         Id
                       MV/HVÊDCÊconnection                                                                                                               HV/UHVÊDCÊconnection
                          In some applications, the physical height of the valve may preclude the use of quadrivalves because
                          of seismic constraints, building height limitations or simply because of access to the valve. In such
                          circumstances, it is possible to use a double-valve arrangement, that is two thyristor valves stacked on
                          top of each other, resulting in six structures within the valve hall for a 12-pulse bridge (see Fig. 3.4g and
                          Fig 3.4h).
                          As can be seen from Fig. 3.4e the quadrivalves are normally suspended from the roof with the lower
                          voltage connection (usually the DC neutral) at the top of the structure and the high voltage connection
                          at the bottom of the structure. Hence the highest insulation is provided by air between the bottom of the
                          quadrivalve and the valve hall floor and walls. Where double-valves are used, it is more typical to suspend
                          the double-valve structures at the mid-point voltage so that all structures are physically the same and the
                          buswork is simplified as shown in Fig. 3.4g.
                          Access for maintenance within the valve hall is achieved with the aid of an access platform. This is normally
                          a battery-powered motorized mobile platform (the more common fossil fuel powered platforms would
                          introduce pollution into the valve hall) which can elevate an operator platform in order to obtain access to
                          all levels of the valve for inspection or testing purposes, Fig. 3.4i.
                          As discussed in section 6.2, the valve is designed so that all the valve components are self-extinguishing in
                          the event of a fire. This principle is extended to the rest of the valve hall ensuring that the risk of fire within
                          the valve hall is minimized. Of particular concern is the valve hall wall adjacent to the converter transformers.
                          Typically this is designed with a two hour fire rating and any holes in the wall, for example where the converter
                          transformer bushings protrude through, are filled with a suitable fire retardant foam.
                          3.4.1.3. DC Area
                          The DC area refers to the DC switchyard, that is all of the switchgear, transducers, circuit protection,
                          DC harmonic filtering and the smoothing reactors required between the converters and the outgoing
                          transmission circuit. As discussed in section 3.1 for a back-to-back converter there is no DC area and hence
                          both sets of valves are located in the same valve hall, as shown in Fig. 3.4i. However, as shown in section 3.1,
                          whenever there is a transmission circuit there will always be some additional components associated with
ValveÊhall
MVDCÊwallÊbushing HVDCÊharmonicÊfilter
                                                                                    }
                                                                                                             DCÊswitchyard
                                              HVDCÊwallÊbushing
                                                                                 DCÊsmoothingÊreactor
                               the DC circuit.
                               The most cost-effective DC area is typically outdoors as shown in Fig. 3.4j. Where practical, the components
                               within the DC area can be built on top of support structures to allow the DC area to be a ‘walk around’
                               switchyard.
                               Some equipment, such as the capacitor associated with a DC harmonic filter (Fig. 3.4k), is not suitable for
                        3.4j
          location on top of a structure and therefore is either suspended from a frame or gantry, or located within a
          fenced off compound. Where the environment in which the converter station is polluted or where there is a
          seismic requirement which requires the insulation, and hence structure heights to be minimized, it may be
          necessary to enclose the DC area within a building.
          Even when enclosed within a building, some of the components are still mounted on top of structures in order
          to allow personnel to walk through the indoor DC area, with other areas fenced off to reduce the insulation
          and allow the equipment to be ground-mounted.
          Where an enclosed DC area is used, air is circulated in order to remove the heat losses from the equipment, but
          larger creepage levels than in the valve hall are used. Consequently, it is not necessary to maintain a positive
          pressure with respect to the outdoors and less filtering is normally employed compared with the valve hall.
ValveÊhall
DCÊsmoothingÊreactor
ControlÊbuilding
                                                                                                 ControlÊroom
                          (i)                                                      (containingÊcontrolÊandÊprotectionÊpanels)
3.4mÊ(i)
(ii)
          3.4.3. AC SWITCHYARD
          The AC switchyard is what connects together all of the elements of the HVDC converter station on the AC
          side and is essentially the same technology as is used for conventional AC substations. There are two basic
          types of switchyard that can be used: AIS (Air Insulated Switchgear) and GIS (Gas Insulated Substation). GIS
          is essentially much more compact than AIS, but incurs an increased capital cost. GIS is therefore typically
          Where:
          Lw(x) = the sound pressure at a distance x (in meters)
          Pw = the acoustic sound power of the point source (dB(A))
          x     = the distance from the point source at which the sound pressure is to be calculated (in meters)
                                                                           DC
           HVDC      Total HVDC       Transmission                                   AC swyrd AC filter                     Area               Acres/
                                                                        voltage                         m            m                Acres
           rating    MW configuration    circuit                                      rating  voltage                        m2                 MW
                                                                         rating
                                                                                    230 kV / 345 25 kV / 25
           200 MW        210         Monopole              BTB            50 kV                             150 120         18000      4.45     0.021
                                                                                         kV          kV
                                                                                    400 kV / 400
           500 MW        500         Monopole              BTB            205 kV                  400 kV 400 450           180000      44.5     0.089
                                                                                         kV
             2×
                         500           Bipole             Cable         +/-250 kV      275 kV       275 kV    126 250       31500      7.78     0.016
           250 MW
             2×
                         1000          Bipole              OHL          +/-500 kV      500 kV       500 kV    300 325       97500      24.1     0.024
           500 MW
             2×
                         2000          Bipole              OHL          +/-500 kV      500 kV       500 kV    380 400      152000      37.6     0.019
          1000 MW
             2×                                                                       500 kV +
                         3000          Bipole              OHL          +/-500 kV                   500 kV    400 600      240000      59.3     0.020
          1500 MW                                                                      220 kV
                               Table 3.4a– A range of typical converter station land requirements, according to circuit configuration and AC and DC
                               voltages. All of these installations are based on the use of AIS equipment.
TOC         158 |    DC
      HVDC: Connecting toTransmission
                          the future Systems: Line Commutated Converters
      4
                        HARMONICS:
                        CAUSES,
                        CALCULATIONS &
                        FILTERING
      Unfortunately, harmonics exist in all AC power systems. If excessive,
      these harmonics can cause undesirable distortion in the AC supply
      voltage. In this chapter we will briefly describe sources of harmonic
      distortion and their effects on equipment connected to the network.
      As you might expect, various international bodies have introduced
      limits to ensure that harmonic distortion does not cause a detrimental
      effect on connected equipment.
      As you read this chapter, you will be provided with extensive and
      valuable information about the harmonics produced by HVDC
      converters under all operating conditions and the types of filters used
      to ensure that the various converters comply with their respective
      harmonic limits.
      We also present a filter design process giving the essential equations
      to enable the main components of each filter type to be defined.
      Additionally, the issue of interference radiated from the converters is
      described, as well as how we achieve the required electromagnetic
      compatibility for the whole converter station.
      Detailed mathematical equations to support these calculations can
      be found in the chapter’s appendice.
                                                                    ElectricalÊdegrees
                                1.1
                               0.55
           AmplitudeÊ(p.u.)
                                  0
                                       0          100   200      300              400          500        600        700
-Ê0.55
                               -Ê1.1
                                                              UndistortedÊ(fundamentalÊonly)
                                                                    ElectricalÊdegrees
                                1.1
                               0.55
           Amplitude
                                  0
                                       0          100   200      300              400          500        600        700
-Ê0.55
-Ê1.1
UndistortedÊ+Ê5%Ê5thÊharmonic
                                                     5
                           HarmonicÊdistortionÊ%
                                                     0
                                                   27/06/2004   28/06/2004 29/06/2004   30/06/2004   01/07/2004   02/07/2004      03/07/2004   04/07/2004 05/07/2004
                                                      00:00        00:00      00:00        00:00        00:00        00:00           00:00        00:00      00:00
                          4.1.2.5. Lighting
                          Many modern types of lighting devices such as fluorescent or discharge lights can generate harmonic currents.
5 5 2 3 4 2 2 1.8 1.4
7 4 2 9 1.2 1 4 1 0.8
                               ANSI/IEEE 519
                                     Bus voltage at PCC             Individual voltage distortion (%) Total voltage distortion (THD) (%)
                                       69 kV and below                              3.0                                5.0
                                                                 X
                                                                          S = PÊ+ÊjQ
                U1
                                                                                           InjectedÊharmonic
                                                                                             currentÊsource    I2
                                                            Z1
SimplifiedÊACÊsystem
             4.2a
          impedances, shunt connected devices, system loads and transmission line impedances). The busbar voltage
          Ux is obtained from the solved load flow solution.
          Fig. 4.2.a shows a harmonic current source I2. In the harmonic impedance calculation, the injected harmonic
          current source is automatically applied through a dummy generator by using a harmonic scanning program,
          such as the IPLAN based GE Vernova program. The harmonic frequency can be changed from 1 p.u. to 70
          p.u. with a step or interval (e.g. 0.1 p.u.) during the harmonic impedance calculation. In the program, the
          harmonic impedance Zx of the network is calculated in three steps as follows:
          Step 1: Calculation of the voltage Ux,bef :
          The voltage Ux,bef , which is the voltage at node X before injection of the harmonic current (see Fig. 4.2a),
          is given by:
                                     Z1
              U x ,bef = U 1 ⋅                                                                                      [Eqn 4.2.1a]
                                 Z 1 + Z u1
          The voltage Ux,bef is calculated and obtained in the IPLAN program by solving the load flow of the AC network
          without the harmonic current source. After retrieving the angle j and the magnitude |U|, Ux,bef is stored as
          real and imaginary parts.
          Where:
          j = phase angle of Ux,bef
          Step 2: Calculation of the voltage Ux,aft :
          After connecting the harmonic current source to the network (see Fig. 4.2a in the dashed lines) the overall
          voltage Ux,aft is now composed of the voltage Ux,bef and a voltage Ux(I2) which is a function of the harmonic
          current I2. By superposition, the overall voltage Ux,aft is given by:
                           V2
              X1 = X M                              [Eqn 4.2.2d]                        R2                R1
                         Km ⋅ K ⋅ P
              R1 = X1/K3                            [Eqn 4.2.2e]
          Km is the ‘install’ factor, defined as Km = 1/power factor
          (≈ 1.2)                                                           Fig. 4.2c– Representation of aggregate load
          XM is the p.u. value of motor locked rotor reactance              model (Model 6 in [6])
          expressed on the motor rating (≈ 0.15-0.25)
          K3 is the effective quality factor of the motor circuit (≈ 8)
          The skin effect of the motive part R1 is considered in the same way as for generators [5] (i.e., by the
          expression R1 _ skin = R1 n ).                       4.2c
          Similarly, for the resistive part, the skin effect of R2 is represented by R2 _ skin = R2 n .
          Where:
          Kg is a factor corresponding to a sub-transient time constant of 32 ms [5]: Kg = 0.1 for a 50 Hz system, Kg
          = 0.083 for a 60 Hz system.
          Taking into account skin effect, the generator frequency dependent resistance Rgenn is given by:
          Where:
          n is the harmonic number.
BACK TO                                                                           DC Transmission Systems: Line Commutated Converters   |   167
CHAPTER
          4| HARMONICS: CAUSES, CALCULATIONS AND FILTERING
                          As the rotating magnetic field created by stator
                          harmonics rotates at a speed significantly higher
                          than that of the rotor, the harmonic impedance of
                          the generator approaches its negative sequence                                               Rgenn
                          impedance. The IEEE Task Force on Harmonics
                          Modeling and Simulation [6] suggests the
                          synchronous machine harmonic inductance is
                          usually taken to be either the negative sequence                                             Xgenn
                          impedance or equivalently the average of direct and
                          quadrature sub-transient reactances. The generator
                          reactance is represented by [8]:
                                                       ( X d′′ + X q′′)
                              X genn = n ⋅ X 2 = n ⋅                      [Eqn 4.2.2h]   Fig. 4.2d– Representation of a synchronous generator
                                                               2
                          However, in PSS/E data sheets, if most generators are of the round rotor type (Xd″ = Xq″), their arithmetic
                          average = Xd″ can be used in the study.                          4.2d
                          The harmonic impedance representation for a generator is shown in Fig. 4.2d.
                                    Z sin n YZ
                             Z′ =                                                                                                   [Eqn 4.2.2i]
                                         YZ
                                                                                          4.2e
                                          YZ
                             Y′    tan n
                                =Y        2                                                                                         [Eqn 4.2.2j]
                             2          YZ
                          Where:
                          Z = R1 + jnX1 is the series impedance of the line at harmonic number n
                          Y = G1 + jnB1 is the shunt admittance of the line at harmonic number n
                          R1, X1, G1 and B1 are the lumped resistance, reactance, shunt conductance and shunt susceptance of the
                          line at fundamental frequency. Normally, G1 is zero in load flow data.
                          As no information on the types and configurations of lines and cables is available, the estimated factors for
                          skin effect of the overhead lines and cables are applied by increasing the line resistance R with harmonic
                          frequency number using the typical corrections [7].
                          For lines of voltage 200 kV and above:
                             ➙ where n ≤ 4 (50 Hz system), n ≤ 3.3333 (60 Hz system)
                                              3.45 n 2 
                                 Rn = R1  1 +                                                                                      [Eqn 4.2.2k]
                                          192 + 2.77 n 2 
                             ➙ where 4 < n ≤ 8 (50 Hz system), 3.3333 < n ≤ 6.6667 (60 Hz system)
                      XT
              Rs =                                                                                            [Eqn 4.2.2r]
                     tan ϕ
                              jX p Rp          jnXT Rp         n2 X 2 R          nX R 2 
              ZT = Rs +                = Rs +          =  Rs + 2 T 2 p 2  +   j  2 T 2p 2                 [Eqn 4.2.2u]
                             Rp + jX p        Rp + jnXT       R p + n XT         R p + n XT 
          Eqn 4.2.2u shows the real part of the equivalent impedance is a function of harmonic frequency order n,
          indicating that skin effect of the transformer resistance is also considered in the model.
XÊ(ohms)
                          It is often advantageous to calculate harmonic impedances at intervals smaller than integer harmonics
                          to establish the entire range of harmonic impedance variation. Referring to Fig. 4.2g it is clear that these
                          intervals can often be quite small: for example, an interval of 0.1 time fundamental may be required to
                                                      4.2g
                          establish the detail of the impedance locus.
                          This impedance diagram represents one operating condition of the AC system. The study needs to be repeated
                          for all probable operating conditions of the system, for both present and future conditions. Clearly, such a
                          complicated impedance model would be difficult to use in a filter design program, especially as there may
                          be many hundreds of different operating conditions to be considered. Therefore it is necessary to define a
                          simpler harmonic model to represent the harmonic impedance of the AC system.
-jX
          The polygon impedance model provides the most accurate harmonic impedance model of an AC system as
          this method gives a realistic assessment of the system impedances and avoids any problems of over-designing
          the filter. However, where sufficient AC system data is unavailable a more general AC system representation
          can be used.
                          4.2h
          4.2.3.2. The Individual or General Sector Model
          The model is shown in Fig. 4.2i together with the typical parameter values. The boundary that encloses the
          actual impedances is related to the minimum and maximum short-circuit impedances of the system. It
          can be presented individually for each harmonic or more generally, one sector for a number of harmonics,
          for example, one sector for harmonics n < 5, one for 5 ≤ n < 11 and one for n ≥ 11.
                                                                           +jX
            +jX    Zmax
                                                                                                             R2
           Zmin                                                                       Θ
                    Θ                                                            R1
                                                                  R
                                                                                                                   R
                                         ΘÊmaxÊ=Ê80¡ÊforÊÊÊÊÊÊÊÊÊÊnÊ<Ê5
                                         Θ max = 75° for 5 ≤ n < 11
             -jX                         Θ max = 70° for 11 ≤ n
                                         Zmin = Zmin s.c. . √n             -jX
                                         ZmaxÊ=ÊZmaxÊs.c.Ê.Ên
Fig. 4.2i– The general sector model Fig. 4.2j– The general circle model
                   2⋅ 3                   1          1           1              
              i=        ⋅ I d ⋅  cos ω t − cos 5ω t + cos 7ω t − cos11ω t + ....                             [Eqn 4.3b]
                     π                    5          7          11              
          Where:
          Id = direct current.
          The fundamental and the nth harmonic are then given by:
                      6
              I1 =      ⋅ Id                                                                                   [Eqn 4.3c]
                     π
                     I1
              In =                                                                                             [Eqn 4.3d]
                     n
          The current for a star/delta transformer feeding a 6-pulse group is shown in Fig. 4.3b.
                                                         PhaseÊA
                                                         PhaseÊB
                                                         PhaseÊC
                            Magnitude
--240 -180 -120 --60 0 60 120 180 240 300 360 420 480
                                                                                                                                   AngleÊ(¡)Ê➜
                          Fig. 4.3a– Phase currents for the star/star connected 6-pulse bridge, ignoring overlap
                                                     PhaseÊA
                                                     PhaseÊB
                                                     PhaseÊC
                                           4.3a
                            Magnitude
--240 -180 -120 --60 0 60 120 180 240 300 360 420 480
AngleÊ(¡)Ê➜
Fig. 4.3b– Phase currents for the star/delta connected 6-pulse bridge, ignoring overlap
are phase shifted 180° between the two transformers and are eliminated, giving:
                         4⋅ 3                    1               1              1               1                
                  i=          ⋅ Ιd ⋅  cos ω t −    cos 11 ω t +    cos 13 ω t −    cos 23 ω t +    cos 25 ω t ...    [Eqn 4.3g]
                           π                    11              13              23              25               
Thus, a 12-pulse converter will generate only the harmonics of the following order:
                                     PhaseÊA
                                     PhaseÊB
                                     PhaseÊC
            Magnitude
--240 -180 -120 --60 0 60 120 180 240 300 360 420 480
AngleÊ(¡)Ê➜
Fig. 4.3c– Phase currents for the 12-pulse bridge, ignoring overlap
0.07
0.06
0.05
                                                                                                                                                                              11
                            HarmonicÊcurrentÊ(kAÊrms)
                                                                                                                                                                              13
                                                        0.04                                                                                                                  23
                                                                                                                                                                              25
                                                                                                                                                                              35
                                                        0.03                                                                                                                  37
                                                                                                                                                                              47
                                                                                                                                                                              49
0.02
0.01
Fig. 4.3d– Typical level of characteristic harmonics for different DC power levels
                                                                    that is, the DC reactor is infinite; and secondly that the AC system voltage waveforms are sinusoidal. Because
                                                                    both of these assumptions are not valid for practical systems, more complex calculations are necessary and
                                                                    purpose-built computer programs are used. A description of these tools is beyond the scope of this book.
                                                                4.3d
                                                                The usual published formulae and graphs for these currents give magnitudes only. For special purposes (e.g.
                                                                    net harmonic contribution from two or more bridges of slightly different firing angles or reactances) both
                                                                    magnitude and phase (i.e. vector solutions) are required. For a 6-pulse converter bridge having a transformer
                                                                    of zero phase-shift, the harmonic current from Phase A at the AC busbar is given by:
                                                                        In = An + j Bn                                                                                          [Eqn 4.3i]
                                                                    Where:
                                                                                     Ι1
                                                                        An =                   ( n sin (α + µ ) sin n (α + µ ) − sin α sin nα  +  cos (α + µ ) cos n (α + µ ) − cos α cos nα    )
                                                                               nx (n 2 − 1) id
sin (α + µ ) sin n (α + µ ) − sin α sin nα  +  cos (α + µ ) cos n (α + µ ) − cos α cos nα  ) [Eqn 4.3j]
                                                                                     Ι1
                                                                        Bn =                   ( n sin (α + µ ) cos n (α + µ ) − sin α cos nα  +  − cos (α + µ ) sin n (α + µ ) − cos α sin nα 
                                                                               nx (n 2 − 1) id
sin (α + µ ) cos n (α + µ ) − sin α cos nα  +  − cos (α + µ ) sin n (α + µ ) − cos α sin nα  ) [Eqn 4.3k]
                          4.3.2.6. Inter-Harmonics
                          In schemes that connect two systems with different AC fundamental frequencies, the harmonics generated
                          on one side of the scheme will be transferred to the other side, creating sources of current at frequencies
                          that are not harmonics of the fundamental frequency. These frequencies are usually named ‘inter-
                          harmonics’ or ‘non-integer harmonics’. The presence of a large DC smoothing reactor or transmission line
                          can reduce, but not completely eliminate, these inter-harmonics. The order of these non-integer harmonics
                          may be calculated according to the following formula:
                                     (nA ± 1) ⋅ fA ± fB
                              nB =                                                                                           [Eqn 4.3o]
                                             fB
                          Where: nA     =   order of harmonic current generated in the AC system A
                                 nB     =   order of harmonic current generated in the AC system B
                                 fA     =   fundamental frequency of the AC system A
                                 fB     =   fundamental frequency of the AC system B
                          These transferred characteristic harmonics can be of a significant magnitude (typically 10 – 20% of the
                          characteristic integer harmonics). The transferred non-characteristic harmonics are normally of much lower
                          magnitudes.
                          The same phenomena may occur when connecting two non-synchronous systems with the same nominal
                          fundamental frequency, when the actual frequencies of the two systems may differ substantially (by 1 to 2 Hz).
                                                                                                                                         DCÊvoltageÊ(p.u.)
                                                                                                                     DCÊvoltageÊ(p.u.)
                               0.6                     0.6                                                                               0.6                     0.6
                                     0                  0                                                                                      0                  0
                                                   0         0    100   100     200     200       300   300                                                  0         0     100     100        200     200       300   300
                                                                                 ElectricalÊdegrees
                                                                         ElectricalÊdegrees                                                                                                      ElectricalÊdegrees
                                                                                                                                                                                         ElectricalÊdegrees
           Fig.4.4a– The idealized voltage across the DC terminals of a                                                                 Fig. 4.4b– The idealized voltage across the DC terminals of a
           6-pulse bridge                                                                                                                12-pulse bridge
          where k = 1, 2, 3, …
                                                                                                                                                                                                         L3p
          These are the characteristic harmonics for a 3-pulse group
          and they may be calculated as a function of the main circuit
          parameters.
          A 12-pulse converter consists of two 6-pulse converters where
          the supply voltages of the two bridges have been phase-shifted                                                                                                                                 L3p
          by 30° with respect to each other. If the supply voltage of the
          upper 6-pulse bridge is chosen as a reference, the commutation
          voltage of the lower bridge will be phase shifted by 30°
                                                                                                                                                                                   Csl
          electrical. This is done by connecting one 6-pulse bridge to a star
          (Y)-connected transformer, while the other bridge is connected
                                                                                                                                                                                                         L3p
          to the delta (Δ)-connected transformer. The complete 12-pulse
          bridge is represented by the circuit according to Fig. 4.4c below.
          This configuration can be reduced to the configuration shown
          in Fig. 4.4d.
          The following sections describe the main processes for the                                                                                         Fig. 4.4c– 3-pulse representation of
          calculation and choice of the harmonic voltages used for the                                                                                       a 12-pulse converter (where L3p is
                                                                                                                                                             the equivalent 3-pulse commutating
          calculation of performance and steady-state rating of the DC filters.                                                                              inductance).
                     Un
              Dn =      ⋅ 100%                                                                            [Eqn 4.5.2a]
                     U1
          Where:
          U1 = the line to neutral nominal fundamental frequency system voltage (RMS)
          Un = the nth order harmonic line to neutral voltage appearing at the bus under consideration
          A typical limit of Dn is 1%. Different limits may be applied for different types of harmonics, for example:
              ➙ 3rd, 5th, 7th harmonic              1.5%
              ➙ characteristic harmonics              1%
              ➙ other odd harmonics                 0.5%
              ➙ other even harmonics               0.25%
          • Total Harmonic Distortion THD or Deff (%)
          This provides a measure of the effective harmonic distortion, by evaluation of the square root of the sum of
          the squares (known as RSS) of the individual harmonic components.
                         N
              THD =      ∑D  2
                             n                                                                            [Eqn 4.5.2b]
                         2
                                     pn ⋅ n ⋅ f0
                              Fn =                                                                                         [Eqn 4.5.2f]
                                       800
                          pn is the psophometric weighting factor (see Appendix A4.2 and [16])
                          f0 is the fundamental frequency
                          The required limit of THFF for HVDC schemes is typically around 1%.
                          It should be noted that THFF is the only voltage criterion that refers the harmonic voltage level to the level
                          of RMS voltage. All other criteria refer to the level of fundamental voltage.
                          b) Equivalent disturbing current Ip is defined according to CCITT, by:
                                      1
                              Ip =
                                     p800
                                          ⋅         ∑ (h     f   ⋅ p f ⋅ I f )2                                            [Eqn 4.5.2g]
                                                     f
                          Where:
                          If is the component at frequency f of the current causing the disturbance
                          pf is the psophometric weighting factor at frequency f
                          hf is a factor which is a function of frequency and which takes into account the type of coupling between
                              the lines concerned. By convention h800 = 1 (h800 is the coupling factor at 800 Hz)
                          • Criteria According to North American Practices
                          c) Telephone Interference Factor, TIF, as defined by IEEE 519 [2]:
                                                                     2
                                            N
                                              U         
                              TIF =        ∑  Un ⋅ Wn                                                                  [Eqn 4.5.2h]
                                            1            1
                          Where:
                          Un is the single frequency RMS voltage at harmonic n
                          N is the maximum harmonic number to be considered
                          U1 is the fundamental line to neutral voltage (RMS)
                          Where:
                          In is the single frequency RMS current at harmonic n
                          N is the maximum harmonic number to be considered
                          Wn = Cn ⋅ 5 ⋅ n ⋅ f0 is the single frequency TIF weighting at harmonic n
BACK TO
CHAPTER                                                                                         4.7a Line Commutated Converters
                                                                                DC Transmission Systems:                          |   185
          4| HARMONICS: CAUSES, CALCULATIONS AND FILTERING
1.0E+05 90
                                                     1.0E+04
                                                                                                                                      45
                                  MagnitudeÊ(ohms)
                                                     1.0E+03
                                                                                                                                             PhaseÊ(¡)
                                                                                                                                      0
1.0E+02
                                                                                                                                      -Ê45
                                                     1.0E+01
1.0E+00 -Ê90
                                                               0   4      8    12   16   20    24     28     32   36   40   44   48
                                                                   Magnitude
                                                                   Phase                 HarmonicÊnumber
                                                   1 
                              Z BP = R + j  ω L −                                           [Eqn 4.5.3a]
                                                  ωC 
                          The resonance frequency of this filter is:
                                                     1
                              ωn =                                                            [Eqn 4.5.3b]
                                                     LC
                          Defining a relative frequency deviation:
                                        ω − ωn
                              δ=                                                              [Eqn 4.5.3c]
                                          ωn
                          and the filter quality factor at resonance frequency:
                                           L
                                 ωn ⋅ L
                                        = C
                                                                                                                                          [Eqn 4.5.3d]
                              q=
                                  R       R
                          The filter impedance can be now expressed as:
                                                        2 +δ 
                              Z BP = R  1 + j ⋅ q ⋅ δ ⋅                                                                                  [Eqn 4.5.3e]
                                                        1+δ 
                          For small frequency deviations, d << 1, the impedance can be approximated with:
                          ZBP = R(1 + j ⋅ 2 ⋅ d ⋅ q)                                                                                       [Eqn 4.5.3f]
1.0E+05 90
                                    1.0E+04
                                                                                                                            45
                 MagnitudeÊ(ohms)
                                    1.0E+03
                                                                                                                                     PhaseÊ(¡)
1.0E+02
                                                                                                                            -Ê45
                                    1.0E+01
1.0E+00 -Ê90
                                              0   4      8    12   16   20    24     28     32    36     40       44   48
                                                  Magnitude
                                                  Phase                 HarmonicÊnumber
          Fig. 4.5d– Double-tuned band-pass filter, impedance characteristic
1.0E+05 4.7e 90
                                                 1.0E+04
                                                                                                                                            45
                              MagnitudeÊ(ohms)
1.0E+03
                                                                                                                                                   PhaseÊ(¡)
                                                                                                                                            0
1.0E+02
                                                                                                                                            -Ê45
                                                 1.0E+01
1.0E+00 -Ê90
                                                           0   4      8    12   16    20    24     28    32        36   40        44   48
                                                               Magnitude
                                                               Phase                  HarmonicÊnumber
Fig. 4.5f– Triple-tuned band-pass filter tuned to 3rd, 11th and 24th harmonic, impedance characteristic
                                  4.7f
BACK TO       188   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
          Disadvantages:
              ➙ Sensitive to de-tuning effects
              ➙ May require possibility of adjusting reactors
          or capacitors                                                                            C1
              ➙ Complex interconnection, with 4 or 5 C-L-R
          components
              ➙ Requires two arresters to control insulation
          levels
          • Triple-Tuned Band-Pass Filter                                                          L1           C2
          This type of filter is electrically equivalent to three
          parallel-connected tuned filters, but is implemented
          as a single combined filter. Fig. 4.5e shows the
          circuit arrangement and Fig. 4.5f the impedance/
          frequency response for a typical triple-tuned filter.                                    R1
                                    1.0E+05
                                                                                                        4.7g              90
                                    1.0E+04
                                                                                                                          45
                 MagnitudeÊ(ohms)
                                    1.0E+03
                                                                                                                                 PhaseÊ(¡)
1.0E+02
                                                                                                                          -Ê45
                                    1.0E+01
1.0E+00 -Ê90
                                              0   4      8    12   16   20    24     28     32    36     40    44    48
                                                  Magnitude
                                                  Phase                 HarmonicÊnumber
Fig. 4.5h– Single-tuned band-pass filter with parallel capacitor, impedance characteristic
                     4.7h
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CHAPTER
          4| HARMONICS: CAUSES, CALCULATIONS AND FILTERING
                          By doing this, a capacitive path will be created from the top to the
                          bottom of the filter, giving low impedance for frequencies above the
                          highest series resonance frequency. The disadvantage of this solution
                          is creating an extra parallel resonance frequency and around it a                                   C
                          high impedance frequency span. Fig. 4.5g shows a circuit of a single-
                          tuned band-pass filter with parallel capacitor and Fig. 4.5h shows the
                          impedance characteristic of this filter.
                          As can be seen in the impedance diagram, the impedance of the
                                                                                                                                  L              R
                          filter is higher than the single-tuned 12th harmonic filter in harmonic
                          region 14th to 17th, but lower for harmonic frequencies > 17th.
                          The equations to solve the filter are given in Appendix A4.3.
                          The advantages and the disadvantages of a band-pass filter
                          with parallel capacitor in comparison to one without the parallel
                          capacitor are as follows:
                          Advantages:
                             ➙	Low impedance for frequencies above the highest parallel
                                frequency
                          Disadvantages:
                              ➙	More complex design with only one extra component                                   Fig. 4.5i– High-pass filter, circuit
                              ➙	Extra parallel frequency n p gives a high impedance
                                 characteristic in the frequency range close to this parallel
                                 frequency np
1.0E+05 90
                                                     1.0E+04
                                                                                                                                                45
                                  MagnitudeÊ(ohms)
                                                     1.0E+03
                                                                                                                                                       PhaseÊ(¡)
1.0E+02
                                                                                                                                                -Ê45
                                                     1.0E+01
1.0E+00 -Ê90
                                                               0   4      8    12   16   20    24     28   32   36       40           44   48
                                                                   Magnitude
                                                                   Phase                 HarmonicÊnumber
                       q2 + 1 1
              ωr =           ⋅                                       [Eqn 4.5.3j]
                        q2     LC
          Where:
                    R
              q=          is the quality factor of the filter.                                                      [Eqn 4.5.3k]
                   ωr ⋅ L
          High-pass filters are normally built with low q-values, typically in the range 2-10, in order to provide
          damping for a large number of harmonics.
          In some applications, only high-pass filters have
          been used. The configuration would then be:
          HP12 + HP24 (High-pass at 12th harmonic and high-                              C1
1.0E+05 90
                                                     1.0E+04
                                                                                                                                          45
MagnitudeÊ(ohms) 1.0E+03
                                                                                                                                                 PhaseÊ(¡)
                                                                                                                                          0
1.0E+02
                                                                                                                                          -Ê45
                                                     1.0E+01
1.0E+00 -Ê90
                                                               0   4      8    12   16   20    24     28   32   36        40   44    48
                                                                   Magnitude
                                                                   Phase                 HarmonicÊnumber
                          Disadvantages:
                              ➙	May require larger installed MVAr rating than
                                 multiple tuned branches
                              ➙	Losses are higher than tuned filters
                                                                                                                 C1
                                      4.7l
                          • 3rd Order Damped Filter
                          In this topology, an auxiliary capacitor (C2) is                                       C2
                          connected in series with the resistor to act as a
                          blocking impedance, as shown in Fig. 4.5k. The main
                          application of such a filter would be at low harmonic                                      L1         R1
                          orders where the losses in a 2nd order filter resistor
                          would be unacceptable. The impedance/frequency
                          response of such a filter at 3rd harmonic is shown
                          in Fig. 4.5l.
                          At fundamental frequency C2 has a high impedance,
                          thus reducing fundamental losses in the resistor
                          as current preferentially flows through the reactor.
                          At higher frequencies, as the impedance of bank
                          C2 decreases, harmonic current flows through R1,
                          providing the required damping. The choice of C2 is        Fig. 4.5m– C-type high-pass filter, circuit
                          essentially a question of economics, as the reduced
                          power dissipation and hence lower cost of the resistor, plus the reduced capitalized losses, must cover the
                          costs of the C2 bank. The presence of the C2 bank slightly degrades the filter admittance characteristic,
                          thus a slightly larger MVAr rating may be needed to maintain performance.
                          To summarize, the advantages and disadvantages of the high-pass filter described above apply, plus:
                          Advantage:                                                          4.7m
                                                                                        nd
                             ➙ Lower fundamental frequency losses in the resistor than 2 order damped design
                                     1.0E+04
                                                                                                                    45
                  MagnitudeÊ(ohms)
1.0E+03
                                                                                                                           PhaseÊ(¡)
                                                                                                                    0
1.0E+02
                                                                                                                    -Ê45
                                     1.0E+01
1.0E+00 -Ê90
                                               0   4      8    12   16   20    24     28   32   36   40   44   48
                                                   Magnitude
                                                   Phase                 HarmonicÊnumber
          Disadvantages:
              ➙ Slightly poorer performance compared with 2nd order damped design
              ➙ More complex filter, with four C-L-R components
          • C-type Filter
          Here, an4.7n
                   auxiliary capacitor (C2) is connected in series with the reactor and is tuned to form a fundamental
          frequency bypass of the resistor. Fig. 4.5m shows the circuit arrangement and Fig. 4.5n the impedance/
          frequency response for a typical C-type filter.
          By creating a tuned filter section C2-L1 within a 2nd order filter, virtually all fundamental current is excluded
          from the resistor. At frequencies above the fundamental, harmonic current flows through R1, thus achieving
          the desired damping. As C2-L1 is a tuned filter, de-tuning can occur due to variations in L or C values from
          the rated values. However, in this case the effect of de-tuning is to increase the resistor rating rather than
          degrade overall filter performance. The presence of the C2 capacitor has a small effect on the impedance
          characteristic.
          To summarize, the advantages and disadvantages of the high-pass filter described above apply, plus:
          Advantage:
             ➙ Negligible fundamental frequency loss in resistor
          Disadvantages:
              ➙ Resistor rating is very susceptible to de-tuning effects
              ➙ May require possibility of adjusting reactors or capacitors
              ➙ Is a more complex filter, with four C-L-R components
              ➙ Gives slightly poorer performance compared with 2nd order damped design
                                        ∆f 1  ∆C ∆L 
                              δ ekv =     +     +                                                                         [Eqn 4.5.4a]
                                        f0 2  C   L 
                          Where:
                          ∆f
                             is the AC system frequency deviation
                          f0
∆L1 ∆L1
∆LÊtot
                        Sk min
              n=                                                                                                [Eqn 4.5.4c]
                         Q
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CHAPTER
          4| HARMONICS: CAUSES, CALCULATIONS AND FILTERING
                          Where:
                          Sk min is minimum short-circuit power of the AC network
                          Q is maximum installed reactive power (filters and shunt capacitors)
                          Note that if n ≤ 3 – 3.3, there may be a need for a 3rd harmonic filter in the system.
                          4.5.5.1. Performance
                          The definitions of the performance quantities relevant for filter design together with typical requirements
                          are given in section 4.5.2. The filter performance has to be calculated for all specified operating conditions
                          and the complete load range, including any continuous overload conditions. This implies that several sets
                          of harmonic currents generated by the converter have to be calculated for different operating conditions
                          and loads. To improve performance, the branch sizes, q-factors and resonance frequencies of the filters
                          can be modified.
However other approaches are also widely used for evaluation of rating.
          Where:
          U1 is the fundamental harmonic voltage across the capacitor
          Un is the nth harmonic voltage across the capacitor
          c) Maximum installed reactive power per phase
                                             N
                                                                 
              Qinst = MAX  ω 0 ⋅ C ⋅ U M2 , ∑ ω 0 ⋅ n ⋅ C ⋅ U n2                                          [Eqn 4.5.5c]
                                            1                    
          Where: C is the capacitance of the main capacitor
          d) Maximum capacitor thermal current
                        N
              I CT =   ∑I      2
                               Cn                                                                          [Eqn 4.5.5d]
                        1
          Where:
          k = 1.0 if the banks can be protected or fused units are used
          k > 1.0 if the banks cannot be protected or fuseless units are used (a suitable derating factor used in a
          number of projects is 1.25)
          kSIWL = ratio of USIWL to rated voltage: typically 4 or another number as agreed with capacitor supplier
                              • Reactors
                              a) Maximum reactor thermal current
                                            N
                                  I LT =   ∑I   2
                                                Ln                                                                                   [Eqn 4.5.5i]
                                            1
                                                                                                         S
                                                                                                                      CF
L net
LC L CF
                                                            E ac
                                                                                   C
           Eac - AC voltage source
           Lnet - AC network inductance                                                                  IA                  L          R
           C - capacitor already energized
           LC - inductance of the energized capacitor bank
           S - switch
           CF - capacitor of the filter to be energized
           LCF - inductance of the capacitor bank
           L, R- filter reactor and resistor
           IA - arrester (voltage dependent current source)
          4.5.5.6. Losses
          The filter losses are calculated for all the components. Both fundamental current losses and harmonic
          current losses are determined. The losses are generally calculated at nominal conditions. This means that
          the harmonic currents are to be calculated specially for this condition. It should be noted that the harmonic
          losses of AC filters are inversely proportional to the q-factor of the filter. This should be taken into account
          when choosing the optimal filter design.
                                                                                +                                Z1
                                                                       U SIPL           CF
                                                                                -
L CF
IA L R
          CF - filter capacitor
          LCF - inductance of the capacitor bank
          L, R - filter reactor and resistor
          Z1 - total impedance of the conductors and ground
                  connection to the fault location
          USIPL - initial capacitor voltage equal to the SIPL value
          IA - arrester (voltage dependent current source)
          Transient rating calculations are generally made separately for each filter branch. If the impedance calculations
          show that parallel resonances may occur between the filter branches that would influence the rating, then a
          special investigation including the parallel branches has to be performed.
                                                                                    4.10b
          4.5.6.1. Filter Representation
          The HV capacitors are represented by their capacitance in series with an inductance corresponding to the
          number of series and parallel connected units. The typical value of inductance value per unit is 1 – 1.5 μH.
          Filter reactors and resistors are represented by their inductance and resistance respectively.
CF
L CF
E SI
IA L R
                              For a series connected resistor, the resistor current is equal to the reactor current. For the resistor connected
                              in parallel with the reactor, the maximum resistor current will be:
                                                                     4.10c
                                        LIPLR
                                   IR =                                                                                          [Eqn 4.5.6a]
                                         Rmin
FilterÊcapacitorÊunbalance
                                                                              FilterÊcapacitorÊovervoltage
                                                                                  &ÊharmonicÊoverload
SETÊ2ÊPROTECTIONS
                      TOÊBUSBAR
                      PROTECTION                                               FilterÊcapacitorÊunbalance
                         Metering
                                                                             FilterÊovercurrentÊ&ÊearthÊfault
          Where:
          LIPLR is the lightning impulse level for the arrester across the resistor
          Rmin is the minimum resistor value (normally 90% of Rnom)
                                              4.11a
          The energy dissipation in the resistor may be determined from:
                     1
              WR =     ⋅ C ⋅ SIPL2bus                                                                           [Eqn 4.5.6b]
                     2
          Where:
          C       = capacitance of bank
          SIPLbus = switching impulse protective level
          A typical circuit is shown in Fig. 4.5q.
          For the 3rd harmonic filter, the worst case is the single phase to ground fault creating a very high level of
          negative-sequence fundamental voltage in the AC network. This high level of negative-sequence voltage
          generates a very high level of the 2nd harmonic on the DC side and the 3rd harmonic on the AC side causing
          high stresses in the filter tuned to the 3rd harmonic during the time before the fault is cleared.
Csh
                2L3p
                                    DCÊfilter                                                                   DCÊfilter
              Csl
L3p
                                                            Zel                                     Zel
                                  Cnb                                                                                        Cnb
Cnb Cnb
DCÊfilter DCÊfilter
Ylp Ylp
Csh
                   2L3p
                                        DCÊfilter                                                              DCÊfilter
                 Csl
L3p
                                                          Zel                                      Zel
                                      Cnb                                                                                   Cnb
                                                    Yel         Yel                         Yel          Yel
Ylp Ylp
Zlp
Csh
                   2L3p
                                        DCÊfilter                                                              DCÊfilter
                 Csl
L3p
                                                          Zel                                     Zel
                                      Cnb                                                                                  Cnb
L 3P = ξ ⋅ L C [Eqn 4.6e]
                   1 1.5µ 60 − µ
              ξ=    ⋅    +                                                                                      [Eqn 4.6f]
                   2 60    60
          µ is the overlap angle (deg)
          Csh is the sum of stray capacitances of the upper 6-pulse group
          Csl is the sum of stray capacitances of the lower 6-pulse group
DCÊfilter DCÊfilter
LsmÊnb
          Fig. 4.6d– Configuration with a split smoothing             Fig. 4.6e– Configuration with a smoothing
          reactor                                                      reactor split between pole and neutral bus
                          Where:
                          L = Lsm + Li Smoothing reactor inductance plus the average value of the 12-pulse commutating inductance
                          (see section 4.6.2.7)
                          C is the DC filter capacitance
                          As the average of the commutating inductance varies with the firing and overlap angles, different operational
                          conditions should be investigated.
                          When calculating the size of the smoothing reactor, the possibility of a split of this reactor should also be
                          taken into consideration. In some cases, it may be advantageous to connect the DC filter in between the
                          two parts of the smoothing reactor as shown in Fig. 4.6d below.
                          The reactor may also be split between the pole and neutral bus conductors as shown in Fig. 4.6e below.
          • Detuning Conditions
          The value of the AC system frequency deviation
                                                                      C                           R
          used for rating calculation is normally greater than
          the value used for the performance calculations.
          The component tolerances and the possible tuning
                                                                      C                           R
          errors are assumed to be the same as for the
          performance calculations.
                                                                      C                           R
          4.6.4.4. Rating Quantities
          The following rating quantities are normally
          calculated and defined in the specification of the
                                                                          Fig. 4.6f– Grading resistors of the HV DC capacitor
          different filter components.
          • High Voltage Capacitors                                            4.13a
          The high voltage capacitor is the capacitor connected to the DC pole line. This capacitor is subjected to the
          full DC voltage as well as to the AC harmonic voltages.
          The maximum peak capacitor voltage is calculated as:
                                                 n
              U C max = U DC max + 2 ⋅ ∑ U CRi
                                           2
                                               + U CIi
                                                   2
                                                                                                                         [Eqn 4.6h]
                                                i =1
          Where:
          UDC max is the highest DC voltage that can occur in the system during steady-state conditions
          UCRi is the RMS harmonic voltage of order i across the capacitor, caused by the harmonic voltages generated
          by the rectifier
          UCIi is the RMS harmonic voltage of order i across the capacitor, caused by the harmonic voltages generated
          by the inverter
          The maximum thermal current is calculated as:
                        n
              I CT =   ∑ (I   2
                              CRi   + I CIi
                                        2
                                            )                                                                             [Eqn 4.6i]
                       i =1
                          Where:	UCRi is the RMS harmonic voltage of order i across the capacitor, caused by the harmonic voltages
                                        generated by the rectifier.
                          	UCIi is the RMS harmonic voltage of order i across the capacitor, caused by the harmonic voltages
                                      generated by the inverter.
                          b) Switching impulse withstand level across the capacitor (USIWL)
                          The value of USIWL together with the value of UM will be used to define the rated voltage of the LV capacitor:
                                                  U     
                              U R = MAX  k ⋅ U M , SIWL                                                                      [Eqn 4.6k]
                                                  kSIWL 
                          Where: k = 1.0 if the banks can be protected or fused units are used
                          	k > 1.0 if the banks cannot be protected or fuseless units are used (a suitable derating factor used
                                 in a number of projects is 1.25)
                          	kSIWL = ratio of USIWL to rated voltage – typically 4 or such other number as agreed with capacitor
                                 supplier
                          c) Maximum installed reactive power per phase
                                                             N
                                                                                 
                              Qinst = MAX  ω 0 ⋅ C ⋅ U R2 , ∑ ω 0 ⋅ n ⋅ C ⋅ U n2                                              [Eqn 4.6l]
                                                            1                    
                          Where:
                          ICRi is the capacitor current of order i caused by the harmonic voltages generated by the rectifier
                          ICIi is the capacitor current of order i caused by the harmonic voltages generated by the inverter
                          In addition, the harmonic current spectra for worst-case operation have to be specified for rating of the LV
                          capacitors, as well as the spectra for noise and loss calculations.
                          • Reactors
          Where:
          ILRi is the reactor current of order i caused by the harmonic voltages generated by the rectifier
          ILIi is the reactor current of order i caused by the harmonic voltages generated by the inverter
          In addition, the harmonic current spectra for worst-case operation have to be specified for the rating of the
          resistors as well as the spectra for noise and loss calculations.
          • Resistors
          The maximum thermal current through the resistor is calculated as:
                          n
              I RT =    ∑ (I    2
                                RRi   + I RIi
                                          2
                                              )                                                                             [Eqn 4.6o]
                         i =1
          Where:
          IRRi is the resistor current of order i caused by the harmonic voltages generated by the rectifier
          IRIi is the resistor current of order i caused by the harmonic voltages generated by the inverter
          • Neutral Bus Capacitors
          The maximum peak voltage across the neutral bus capacitor is calculated as:
                                                   n
              U C max = U DC max + 2 ∗ ∑ U CRi
                                           2
                                              i
                                                + U CIi
                                                    2
                                                                                                                            [Eqn 4.6p]
                                                  i =1
          Where:
          UDC max is the highest DC voltage that can occur on the neutral bus during steady-state conditions
          UCRi is the RMS harmonic voltage of order i across the capacitor, caused by the harmonic voltages generated
                 by the rectifier
          UCIi is the RMS harmonic voltage of order i across the capacitor, caused by the harmonic voltages generated
                by the inverter
Pole
                                                                                        +                                       Z1
                                                                                   U SIPL           CF
                                                                                            -
L CF
          CF - filter capacitor
          LCF - inductance of the capacitor bank
          L, R - filter reactor and resistor
          Z1 - total impedance of the conductors
                 and ground connection between                                                                                           S
                 the converter station and the fault                     IA                     L                 R
                 location
          USIPL         - initial capacitor voltage equal
                           to the SIPL value                                  Le
          IA - filter arrester (voltage dependent                                                                    NeutralÊbus
                 current source)
          An - neutral bus arrester (voltage
                 dependent current source)                                                           Cnb
          Cnb - neutral bus capacitor                                                                                          An
          Le - electrode line inductance
Pole
                                                                                                +
                                                                                           U SIPL           CF                         Z1
                                                                                                    -
L CF
           CF - filter capacitor
           LCF - inductance of the capacitor bank
           L, R - filter reactor and resistor
           Z1 - total impedance of the conductors and ground                                                                                           S
                  connection between the converter station and the fault
                  location                                                          IA                  L          R
           USIPL         - initial capacitor voltage equal to the SIPL value
           IA - filter arrester (voltage dependent current source)
                                                                                                                              NeutralÊbus
                                Fig. 4.6h– Typical pole-to-neutral fault circuit
                                The transient cases decisive for the rating of the DC filter components are ground faults and the short-circuits
                                between pole and neutral. These faults will cause a fast discharge of the main capacitor which will stress the
                                LV filter components. High transient stresses may also be caused by the switching surge overvoltages and
                                lightning overvoltages.
                                The most frequent faults will be faults along the DC line. In these cases, the impedance of the DC line between
                                the station and the fault location will contribute to reduce the stresses on the filter components. The decisive
                                faults for the filter component ratings will then4.13c
                                                                                  be the faults occurring in the station. The frequency of these
                                faults is very low; nevertheless, they should be considered for the design of the filter components.
CF
L CF
          4.6.6. PROTECTION
          The only type of filter protection is the harmonic overload protection. The purpose is to detect steady-state
          harmonic currents in excess of those specified flowing through the filter reactors and resistors.
          In addition to this protection, the reactors and resistors will be protected against the transient overvoltage by arresters.
          The capacitor units of the HV capacitor bank will be most often protected by the internal fuses which
          disconnect the faulty elements in the bank without disturbing the voltage distribution and with only
          minimal changes of the capacitor value (Celement< 0.02% ⋅ Cbank).
                                                        ACÊHARMONIC
              ACÊNETWORK                                 FILTERSÊAND                       PLCÊFILTERS                           CONVERTER/
                                                         SUBSTATION                                                                SOURCE
                                                           BUSBARS
                                C7                                       C8                                            C7
                                                     L3                                        L3                                                      ÊÊÊÊL4Ê
                                     L2                                       L2                                            L2                                        C6
                                                                                                                                                           C9
                C1         L1         C3                  C1        L1         C3                      C1         L1
                                                                                                                                  C3
                      C6                        V1             C6                                           C6Ê                       V5Ê
                C2         L1              C4             C2        L1                                 C2         L1
                                                                                    C4                                           C4
                            C                                        B                                             AÊ
                      C6                        V4             C6                    V6                     C6                        V2
                                                                                                                  L1
                                                     L3                                         L3                                                               L4
                C2         L1          C3                 C2        L1          C3                     C2         L1             C3
                                                                                                                                                                 C9
                                                                                                                                                                       C6
                      C6                        V1             C6                    V3                     C6                        V5
                C2         L1                             C2        L1                                 C2         L1
                                       C4                                       C4                                               C4
                            C                                        B                                             A
                      C6                        V4             C6                                           C6
                                                                                                                                                 VAa
                C1         L1                             C1        L1                                 C1         L1
                                       C5                                           C5                                           C5
                                                                                                                   a
                                      L2                                       L2                                           L2
                                                                                                                                            L4
                                                     L3                                   L3
                            C7                                           C8                                            C7
                                                                                                                                            C9
Lrs
4.14c
                                            Lru               Re
                                                                                              Cs
                                                                          LrsÊ-ÊAirÊcoreÊinductanceÊofÊtheÊsaturableÊreactor
                                                    Cd                    LruÊ-ÊMagnetizingÊinductanceÊofÊtheÊsaturableÊreactor
                                                                          ReÊ -ÊEddyÊcurrentÊresistanceÊofÊtheÊsaturableÊreactor
                                                                          CsÊ -ÊStrayÊcapacitanceÊofÊtheÊsaturableÊreactor
                                                                          CdÊ -ÊDampingÊcapacitance
                                                                      Veq                                                      Lrs         Cs
                                                            C11
                                                   VeqÊisÊtheÊthyristor                                           (30-500ÊkHz)Ê(PLCÊrange)
                                                  voltageÊbreakÊdown                                            BeginningÊofÊtheÊcommutation
                                                                                                                 (valveÊstillÊfullÊconducting)
                                                   Turning-onÊvalve
                                                           4.14d                                                       Turning-offÊvalve
                          Fig. 4.7e– Turning-on and turning-off valves
                           V 0 ⋅ K1
              V eq ≈
                       ω 1 + (ω ⋅ T 0 )2                                                                    [Eqn 4.7a]
          Where:
          Veq = equivalent noise voltage at angular frequency w
          V0 = breakdown voltage
          K1 = bandwidth (Dw) for PLC frequency voltage measurement
          w = angular frequency
          T0 = breakdown time
          The voltage between the terminals of the thyristor valve during turn-on is derived from the valve design
          studies. For this purpose a detailed model of the thyristor valve and surrounding components and busbars
          is used. From these studies, a worst-case thyristor valve turn-on case is found (with maximum switching
          voltage and minimum switching time) to maximize Eqn 4.7a.
          The turn-on event is brought about by a change of valve impedance from near open circuit to near short-
          circuit. The sudden collapse of voltage brings about the discharge of any parallel-connected capacitances,
          generating oscillations in circuits that are affected by it. The resulting high frequency currents are then
          distributed via the busbars to the transmission lines.
                                                                               ACÊlineÊnoiseÊwithÊPLCÊfilter
                                    50
WithoutÊPLCÊfilters Limit
                                    25
                          NoiseÊ(dBm)
-25
                                   -50
                                              0       50   100   150         200            250           300         350              400   450           500
FrequencyÊ(kHz)
                                              4.14f
                                                                   ACÊlineÊnoiseÊwithÊPLCÊfilter
                                        50
WithÊPLCÊfilters Limit
                                        25
                            NoiseÊ(dBm)
-25
                                        -50
                                              0       50   100   150           200           250           300         350             400   450           500
FrequencyÊ(kHz)
Converter ACÊsystem
                                                          L2A                                                 L4A
                               C1A                                              C3A
                         C1B                                                  C3B
                                            R1B                                                 R3B
                                L1B                                                 L3B
                         C1C                                                  C3C
                                            R1C                                                 R3C
                                L1C                                                 L3C
                    Converter                                                                                                          ACÊsystem
                                                          L2A                                                L4A
                           C1A                                                 C3A
                         C1B                                                  C3B
                                            R1B                                             R3B
                                L1B                                                 L3B
                         C1C                                                  C3C
                                            R1C                                             R3C
                                L1C                                                 L3C
0.06
0.05
                                                0.04
                               AdmittanceÊ(S)
                                                0.03
0.02
0.01
                                                  0
                                                       0       100      200                     300       400             500
                                                                              FrequencyÊ(kHz)
                          Fig. 4.7j– Admittance of PLC filter
                          In general, a single-phase transformer model can be used since the interphase coupling of even a 3-phase
                          transformer at PLC frequencies is small.
                                                      ACÊHARMONIC
               ACÊNETWORK                              FILTERSÊAND                    PLCÊFILTERS                        CONVERTER/
                                                       SUBSTATION                                                          SOURCE
                                                         BUSBARS
                            In general HVDC converters generate radiated noise in the range from 150 kHz to approximately 10 MHz.
                            At higher frequencies other sources such as corona are more significant. At lower frequencies the radiation
                            process is not efficient and conducted noise is more significant.
                            The design requirement of the RFI shielding is that it should limit the interference appearing to the limits
                            specified.
200 18
                                                                                                                                                               16
                                                150
                                                                                                                                                               14
                                                                                                                                                                     RateÊofÊchangeÊofÊvalveÊvoltage
                                                100                                                                                                            12
                           ValveÊvoltageÊ(kV)
10
                                                                                                                                                                                (kV/μs)
                                                 50
                                                                                                                                                               8
                                                  0                                                                                                            6
                                                       0    2          4        6         8         10         12        14        16          18        20
                                                                                                                                                               4
                                                 -50
                                                                                                                                                               2
                                                -100                                                                                                           0
                                                                                                 TimeÊ(μs)
120 300
                       100                                                                                                                                          250
                     4.15b
                                                                                                                                                                                           RateÊofÊchangeÊofÊvoltageÊ(kV/μs)
                                      80                                                                                                                            200
                  VoltageÊ(kV)
60 150
40 100
20 50
              ➙	RF noise due to corona from the high voltage equipment and busbars
          The scheme can be divided into a number of discrete elements: the thyristor valves, the converter transformer,
          the AC systems (AC harmonic filters and a simplified representation of the relevant AC system). Fig. 4.8a
          shows a block diagram of the converter station model used to analyze the radiated interference.
          Because of the range of operating states for the HVDC converters and the uncertainty regarding the duration
          in each mode, any prediction regarding frequency and duration of particular operating conditions is difficult to
                    4.15c
          establish accurately without the benefit of operational experience. Because the valve turn-on event is rarely,
          if ever, completely ‘coherent’, interference levels will not reach the maximum levels described below even
          when a HVDC converter is operating at high breakdown voltages.
                                           V 0 ⋅ K1
                             V eq ≈                                                                                         [Eqn 4.8a]
                                      ω ⋅ 1 + (ω ⋅ T 0 )2
                          Where:
                          Veq = equivalent noise voltage at angular frequency w
                          V0 = breakdown voltage
                          K1 = 6320 × A(n) for RF quasi peak measurement
                          A(n) = pulse repetition rate weighting factor from ANSI C63.2 = 1.3
                          w = angular frequency
                          T0 = breakdown time
          4.8.4.3. Corona
          The corona noise from the HVDC converter is similar in nature to that of conventional substations. Care is
          taken to control corona in the HVDC converters by paying close attention to layout and equipment design.
          Reference [20] describes briefly the corona performance of high voltage lines and equipment.
RadiationÊfromÊthyristorÊvalveÊoperation
                                       100.00
                                                                                                      UnshieldedÊnoiseÊ(dB)
                                        80.00                                                         LIMIT
                                                                                                      ShieldedÊnoiseÊ(dB)
                                        60.00
                                        40.00
           ElectricÊfieldÊ(dB/1µV/m)
20.00
0.00
-20.00
-40.00
-60.00
-80.00
                                       -100.00
                                                 0.1   1                     10                          100                  1000
                                                                        FrequencyÊ(MHz)
          Fig. 4.8d– Typical RF noise level at the converter station perimeter due to radiation from the thyristor valves -
          showing the effects of valve hall screening (mesh size typically 100 mm × 100 mm)
                   4.15h
          4.8.6. CONVERTER TRANSFORMER
          The converter transformer model is the same as used for the PLC frequency studies described in section 4.7.7.
                          Where:
                          r = distance from valve
                          I =d  isplacement current at wavelength l in valve due to change in voltage
                          q = angle between measurement point and valve orientation (0° vertically above valve, 90° level with valve)
                          h = height of valve
                          c = speed of light
                          l = wavelength of interest
                          x = position on radiating structure
                          The radiated noise in the frequency range of interest is shown in Fig. 4.8d, with and without the shielding
                          described below for the electric field component. (The magnetic field in µA/m is equal to the electric field
                          in µV/m when multiplied by the impedance of free space, 120p W in the far field region i.e. r > 300 m.)
                                                                                                                                         3 m bonding to
                                                                                  Typically 100 mm bonding (from
                                                  Wire centers                                                                         represent building
                                                                                           reference [23])
                                                                                                                                            structure
     Note 1: At high frequencies, e.g. above 1 MHz, the relative permeability of most magnetic materials approaches unity
     Table 4.8a– Properties of typical RFI screen
                                                                                  RadiationÊfromÊbusbarÊcurrent
                                        100.00
                                                                                                                        UnshieldedÊnoiseÊ(dB)
                                                                                                                        LIMIT
                                         50.00
           ElectricÊfieldÊ(dB/1μV/m)
0.00
-50.00
                                        -100.00
                                                  0.1                      1                  10                             100                        1000
-150.00
FrequencyÊ(MHz)
Fig. 4.8e– Typical RF noise level at the converter station perimeter due to conducted interference on the high voltage busbars
                                                                                                        500Êm
                          the models described above. The resulting circuit                                                 fenceÊ
                          is analyzed over a range of frequencies and the
                          results are plotted in Fig. 4.8e.
                                                                                           500Êm                          500Êm
                          4.8.10. SITE MEASUREMENTS                                   X                                                 X
                          A program of site measurements can be performed
                          to verif y the achievement of the specified
                          performance requirements.
                                                                                                        500Êm
  TOC         230 |    DC
        HVDC: Connecting toTransmission
                            the future Systems: Line Commutated Converters
      5                 AC/DC SYSTEM
                        INTERACTIONS
      It may not surprise you that interactions occur between a HVDC
      converter and the AC network to which it is connected. Any HVDC
      scheme which is introduced into an AC system will interact with that
      system in terms of both real power exchange and reactive power
      exchange. The impact of these interactions on both the steady-state
      and dynamic behavior of the AC system and the DC system will be
      influenced by the relative power transmission capacity of the HVDC
      link with respect to the AC system Short-Circuit Level at the point
      where the HVDC link is connected.
      In this chapter you will gain a detailed understanding of these
      interactions - together with the effect of AC network characteristics
      on the control of the HVDC converter. We also consider the static
      characteristics of the HVDC converter for stable operations under many
      different AC and DC system operating conditions, for both rectifying
      and inverting modes, as well as multi-terminal characteristics.
      Methods of predicting and calculating the steady-state and temporary
      expected performance are introduced along with the design techniques
      which will influence this behavior.
      The chapter concludes by illustrating how the HVDC system is
      represented in system studies.
      5.3.          SYSTEM INERTIA ....................................................................... 240   5.11.          S TABLE OPERATION OF A HVDC CONVERTER
      5.3.1.        Interruptions in DC Power Transfer................................... 241                                    IN AN AC SYSTEM......................................................................    268
                                                                                                                 5.11.1.         Load Flow Studies.....................................................................   268
      5.4.    HVDC CONVERTER STATIC CHARACTERISTICS............ 242                                             5.11.2.         Objectives and Criteria...........................................................       268
      5.4.1. 	Basic Requirements of the                                                                         5.11.3.      	Balanced Load Flow
              Converter Control System..................................................... 243                                (Newton Raphson Algorithm) .............................................                   269
                                                                                                                 5.11.4.       Unbalanced Load Flow............................................................           271
      5.5.    EFFECTS OF AC SYSTEM VOLTAGE....................................                            248
      5.5.1. 	
              Effects of Sending End AC Voltage                                                                  5.12. 	 SYSTEM REPRESENTATION................................................... 271
              on Rectifier Operation.............................................................         248
      5.5.2. 	
              Effects of Receiving End AC Voltage on                                                             BIBLIOGRAPHY ............................................................................................ 275
              Inverter Operation....................................................................      251
      5.5.3. Multiple Operating Points......................................................              251
          Where:
          SCL = the Short-Circuit Level at the bus under examination
          Vac = the nominal phase-to-phase RMS voltage at the bus
          Iac = the RMS solid 3-phase line fault current
          Therefore, the AC system behind any particular
                                                                       VAC ∠0 °
          AC bus can be represented as a simple Thévenin
                                                                                                  ZÊSYS ∠θ
          equivalent circuit with the phase voltage derived
          from Eqn 5.1b and the impedance derived from
          Eqn 5.1c. The equivalent circuit is shown in Fig. 5.1a.
                     Vac
              V1 =                                   [Eqn 5.1b]
                       3
                         Vac2
              Z SYS =                                 [Eqn 5.1c]
                        SCL
                                                                      Fig. 5.1a– Thévenin equivalent circuit
          A simplified representation of a DC link feeding 1.0 p.u. power into an AC system of impedance ZSYS is shown
          in Fig. 5.2a(i). The AC system voltage Vac lags the converter bus voltage VCONV by a phase angle f, and VCONV
          has a voltage magnitude of 1.0 p.u. at a phase angle of 0°. Assuming a converter absorbs around 0.55 p.u.
          reactive power while transmitting 1.0 p.u. real power, the converter reactive power absorption will be
          compensated for by shunt connected capacitor banks, which may be configured as AC harmonic filters.
          The shunt connected capacitor banks are typically rated to give a power factor of 1.0 at rated power and at
          a converter bus voltage of 1.0 p.u. Therefore, the shunt capacitance generates 0.55 p.u. reactive power to
          fully compensate the reactive power being absorbed by the converter. The phasor diagram for the circuit
          in Fig. 5.2a(i) is shown in Fig. 5.2a(ii) assuming that ZSYS is purely inductive, that is, q is 90°.
          In Fig. 5.2a(i) the phase angle f of the AC system voltage Vac is a function of the current IL injected into
          the AC system through the system impedance ZSYS. The phasor diagram in Fig. 5.2a(ii) corresponds to the
          converter in combination with the shunt capacitor operating at unity power factor and hence IL is a purely
          real current flowing from the HVDC inverter. AC system impedance voltage phasor IL ⋅ ZSYS leads the current
          IL by an angle q, where:
                         X 
              θ = tan −1  SYS                                                                                 [Eqn 5.2a]
                          RSYS 
          • XSYS/RSYS is the inductive reactance/resistance ratio of the AC system impedance ZSYS.
          The phasor diagram in Fig. 5.2a(iii) shows the influence on the network of an increase in the inverter
          current, IC, beyond 1.0 p.u. The inverter absorbs more reactive power, creating a reactive power deficit at
          the inverter station bus. The inverter bus voltage, VCONV, is no longer in phase with the increased current
          IL flowing into the AC system. In order to maintain the inverter bus voltage VCONV at 1.0 p.u. under these
          conditions, the AC system voltage Vac must be increased, otherwise VCONV will fall, reducing the power at
          the converter bus, VCONV ⋅ IL.
                              (i)                                                                               +Ê1.0ÊP
                                                                                                                -Ê0.55ÊQ
                                                                                                                                            VAC
                                                                                 IQ
                                                                  VAC
                                                                                                      φ)
            IQ (imaginary component)
                                                                                                                                   VCONV
                                                                                                 IL
                                                                            Ic
                           IL (real component)                   VCONV
                                                                                 Ic' (imaginary component)
            IC                           (ii)                                                                     (iii)
                     2
                              VacÊ(SCRÊ=Ê1.5)
                    1.8
                    1.6
                              VacÊ(SCRÊ=Ê2.0)
                    1.4                                                                                     PacÊ(SCRÊ=Ê5.0)
                              VacÊ(SCRÊ=Ê3.0)
                    1.2
                                                                                                            PacÊ(SCRÊ=Ê3.0)
                              VacÊ(SCRÊ=Ê5.0)
           (p.u.)
                     1
                    0.8
                    0.6
                                                                                                             PacÊ(SCRÊ=Ê2.0)
                    0.4
                                                                                                     PacÊ(SCRÊ=Ê1.5)
                    0.2
                     0
                          0            0.2      0.4   0.6   0.8            1             1.2        1.4          1.6           1.8   2
                                                                  DCÊcurrentÊ(IdÊp.u.)
          Fig. 5.2c – Variation in injected AC power with DC current at various SCRs, assuming: commutating reactance (Xc) =
          0.15 p.u., g = 18°, Qfilter = 0.55 . Pdc
BACK TO                          Ê5.2c
                                                                                               DC Transmission Systems: Line Commutated Converters   |   235
CHAPTER
          5| AC/DC SYSTEM INTERACTIONS
                          5.2.3. Alternative Calculations of Minimum SCR
                          The SCR indicates the impact the transmitted power can have on the local converter bus voltage. However,
                          this relationship ignores the impact of the local, shunt connected, reactive power banks used to compensate
                          for the reactive power absorbed by the converter. In order to take the local shunt reactive power banks into
                          account, the SCR must be modified, giving the Equivalent Short-Circuit Ratio (ESCR) which is defined as:
                                         SCL − Q f
                                ESCR =                                                                                     [Eqn 5.2c]
                                            Pdc
                          Where:
                          Qf = MVArs generated by the shunt connected reactive power banks at rated Vac.
                          As discussed in section 5.2.2, beyond a certain level of power transmission, any further increase in the
                          DC current for constant extinction angle will result in a reduction in the converter bus AC voltage and
                          transmitted power. For a given AC system, the relationship between the SCL and the maximum DC power
                          that can be transmitted before the converter bus AC voltage falls can be defined as the Critical Equivalent
                          Short-Circuit Ratio (CESCR), which can be approximated by Eqn 5.2d [1] [6]. The equation for CESCR
                          assumes that the AC system is purely inductive, that is q in Fig. 5.2a equals 90°.
                          Where:
                                f = 90° – g – m                                                                            [Eqn 5.2e]
                          g     = inverter extinction angle (°)
                          m     = inverter overlap angle (°)
                          Pdc   = active power supplied to the AC system (p.u.)
                          Qdc   = reactive power consumed by the inverter (p.u.)
                          Vc    = converter bus AC voltage (p.u.)
                          In order to understand the application of the equation for CESCR, consider an AC system into which it is
                          proposed to connect a 500 MW HVDC transmission system. The HVDC inverter operates in CEA control
                          (see section 7.2.3.1) with an extinction angle of 18° and a commutating reactance of 0.15 p.u. From Eqn
                          2.2.2i and Eqn 2.3c we calculate that the overlap (m) is 18.8° and the converter absorbed reactive power
                          (Qdc) is 0.55 p.u.
                          Assume that the AC voltage on the bus where the converter will be connected may transiently fall to 0.95
                          p.u. and the converter is expected to continue to transmit rated power. Here, a transient disturbance is
                          considered as the response during the 100 ms to 300 ms after the disturbance, when the converter has
                          had time to respond, but the converter transformer tapchanger and the AC generator automatic voltage
                          controllers, etc. have not had time to act. In the case of the example scheme above, the operating gamma
                          will remain at 18°, but because of the reduction in AC voltage and the resultant increase in DC current, in
                          an attempt to maintain 1.0 p.u. AC power the overlap will increase to 20.3°.
                          Assuming that there is sufficient shunt connected capacitive reactive power to achieve unity power factor
                          at 1.0 p.u. AC voltage, then the CESCR becomes:
                          CESCR = 1.677
                          Therefore, the minimum SCL at the converter bus for the Eqn 5.2f is calculated as follows:
                          SCL = (CESCR + Qf) ⋅ MW
                          SCL = (1.677 + 0.55) ⋅ 500 MW
                          SCL = 1114 MVA
BACK TO       236   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
          Hence, if system studies show that under line or generator outage conditions the SCL at the proposed
          converter bus can fall below 1114 MVA, attempting to operate with constant power control at or near to
          rated power would not be possible.
          Note: Fig. 7.2g illustrates how the minimum SCR necessary to avoid power loop instability varies with the maximum applied
          voltage step.
x x
x x
                                                                             C                                                           M
                                              E                                             D                ConstantÊγÊminimum                       L
                                                               B
                                                                       ConstantÊγÊminimum
                   Power
                                                  A                                                                                          K
                                                                                                     Power
                                                           F
                                                                   G
                                                                                                                      ConstantÊvoltage
0 Id Idmax Id 0 Id Idmax Id
                                                                                    Observed AC bus
                               MIIF
                                                                  Inverter 1            Inverter 2         Inverter 3
                                                                          ∆V1                   ∆V2                  ∆V3
                                        Inverter 1              MIIF1,1 =             MIIF2,1 =          MIIF3,1 =
                                                                          ∆V1                   ∆V1                  ∆V1
        AC bus at which                                                     ∆V1                   ∆V2                ∆V3
            voltage                     Inverter 2              MIIF1,2 =             MIIF2,2 =          MIIF3,2 =
                                                                            ∆V2                   ∆V2                ∆V2
      reduction is applied
                                                                            ∆V1                   ∆V2                ∆V3
                                        Inverter 3              MIIF1,3 =             MIIF2,3 =          MIIF3,3 =
                                                                            ∆V3                   ∆V3                ∆V3
     Table 5.2a– A three-element MIIF matrix
          Consider the simple example of an AC system which contains three HVDC converter terminals. A matrix of
          MIIFs can be constructed as shown above in Table 5.2a.
          Having established the MIIF matrix in Table 5.2a, it is possible to look at the relative impact of each converter
          on the other by multiplying the MIIF by the DC power rating of the converter at the observed bus, creating
          Table 5.2b.
                                                                                    Observed AC bus
                               MIIF
                                                                  Inverter 1            Inverter 2         Inverter 3
                                Inverter 1           Pdc1             Pdc1              MIIF2,1 ⋅ Pdc2     MIIF3,1 ⋅ Pdc3
           AC bus at which
          voltage reduction     Inverter 2           Pdc2         MIIF1,2 ⋅ Pdc1            Pdc2           MIIF3,2 ⋅ Pdc3
              is applied
                                Inverter 3           Pdc3         MIIF1,3 ⋅ Pdc1        MIIF2,3 ⋅ Pdc2         Pdc3
     Table 5.2b– A three-element MIIF matrix comparing converter rating influence
          As a guide to the amount of interaction, CIGRÉ [7] proposes that the resultant power of the observed AC
          bus is compared to the rated power of the converter at the bus on which the voltage reduction is applied.
          If the resultant of MIIF ⋅ Pdc is less than 15% of the local converter rating then there will be negligible
          interaction between these two converters. However, if the resultant is between 15% and 40% there
          will be some possibility of interaction and, if the value is above 40%, there will be a strong possibility of
          interaction between the converters. It can be seen from this analysis that a large, remote HVDC converter
          may influence the behavior of a particular converter far more than a closer, but smaller converter.
          As an example, consider two inverters transferring power into an AC system: the first rated at 2500 MW
          dc (for example a large bulk-power transmission line) and the second at 250 MW dc (for example a small
          back-to-back tie). Assuming the MIIF from converter 1 and converter 2 (MIIF2,1) is 0.8, whilst the MIIF from
          converter 2 to converter 1 (MIIF1,2) is 0.7, this gives:
                          Where:
                          j represents all electrically connected converters. This gives:
                                                     SCLi − Q f i
                               MIESCR =                                                                                             [Eqn 5.2i]
                                             Pdci + ∑ j MIIFj ,i ⋅ Pdcj
                          A critical value of MIESCR can be established for each converter in order to assess the power/voltage
                          stability limit. Unlike the simple evaluation of ESCR, in order to find the multi infeed quantities transient
                          stability analysis tools are required in order to find the MIIF figures. Taking the example shown in Table
                          5.2d, we can see the effect on the ESCRs when considering the effect of MIIFs.
               df =
                      ( Pm − Pe )⋅ fo ⋅ dt                                                                 [Eqn 5.3a]
                             2⋅H
          Where:
          fo = system nominal frequency (Hz)
          H = the inertia constant of the machine (MW·s/MVA)
          Pm = machine mechanical power (p.u.)
          Pe = machine electrical power (p.u.)
          The inertia constant (H) can be converted to the base of DC power to give an effective inertia constant Hdc.
               df =
                      ( ∆Pdc )⋅ fo ⋅ dt                                                                    [Eqn 5.3c]
                          2 ⋅ H dc
or
               H dc =
                        ( ∆Pdc )⋅ dt ⋅ fo                                                                  [Eqn 5.3d]
                             2 ⋅ df
               H dc =
                        ( 0 − 1)⋅(100 + 200 )⋅10 −3 ⋅1                                                     [Eqn 5.3e]
                                      2 ⋅ 0.05
                   = – 3 MW ⋅ s/MVA
          A conventional H constant for a synchronous compensator is approximately 1.25. Therefore, from Eqn 5.3b:
Idc
Xl
                                                      Xl
                                                                                                                 Vdc
                                                      Xl
                                                                                                                                  [Eqn 5.3g]
                                         (1− 0 )⋅(100+200) 10−3 1        Ê5.4a
                                H dc   =
                                                  2 ⋅ 0.05
                                       =        ⋅
                                       = – 3 MW ⋅ s/MVA
                          and again, assuming a synchronous compensator H constant of approximately 1.25 and using Eqn 5.3f
                          gives a minimum machine rating of 240 MVA.
                                 αmin                                                                  αmin
                 A                                                                        A
                                                     B                                                                       B
                   Vdc                                                                             Vdc
                             CONVERTER                                                                      CONVERTER
                                 A                                                                              A
                     A                              B                                                A                    B
                                         X          OP                                                                        X
                                                                    Y                                                                           Y
                                               ∆I                                                                          ∆I
                                         W          C                                                                     C   W                     Idc
                                                                        Idc
                                                        Iorder                                                                Iorder
OP
                             CONVERTER                                                                      CONVERTER
                                 B                                                                              B
                  -Vdc                                                                            -Vdc
           Fig. 5.4d– Basic two terminal static characteristics – Power                  Fig. 5.4e– Basic two terminal static characteristics – Power
           flow A to B                                                                    flow B to A
                    Ê5.4d
                               By placing both the inverter and the rectifier characteristics for both converters on the same Vdc/Idc graph,
                                                                                     Ê5.4e
                               the steady-state or static operating characteristics for  the DC system are obtained. This is illustrated in
                               Fig. 5.4d for power flow from converter A to converter B.
                               The intercept of the two characteristics is the operating point (OP) for the scheme and determines the DC
                               current and DC voltage and thus the transferred DC power. Changing the current order changes the DC
                               current, and thus the DC power. However, as a consequence of the slope of the inverter g characteristic,
                               the DC voltage will also change with changes to the DC current.
                               If the current orders of the two converters are swapped over, that is converter B current order is greater
                               than that of converter A, the intercept point remains on the constant DC current line, but the DC voltage
                               polarity, and thus the power flow direction, reverses. This means that the power flow is now from converter
                               B to converter A as shown in Fig. 5.4e. [12].
                               In the diagrams Fig 5.4b to 5.4e, the DC voltage is not directly controlled: it is determined by the intercept
                               on the inverter extinction angle characteristic, which is in turn determined by the magnitude of the inverter
                               converter AC terminal voltage.
B B
                                              C                                                               C
                                                                           Idc                                                          Idc
                                              Iorder                                                        Iorder
                                     A                                                            B
          Fig. 5.4f– A) Variable amin characteristics (constant AC voltage) and B) Constant amin characteristics (variable AC voltage)
                                                  Increasing γ                                                    Decreasing
                                                                                                                         E llÊ
                                                                                 Idc                                                          Idc
                                         A                                                              B
          Fig. 5.4g– A) Variable g characteristics (constant AC voltage) and B) Constant g characteristics (variable AC voltage)
          5.4.1.2. Extinction
                      5.4g    Angle (g ) Characteristics
          Similar to the rectifier constant amin characteristic, the inverter g characteristic is dependent upon both DC
          and AC parameters. The relationship is defined by:
                     3⋅ 2                   Xc      V                 
              Vd =        ⋅ VLL ⋅  cos(γ ) − p.u . ⋅ LL − 0 Id p .u .                                                               [Eqn 5.4b]
                       π                     2       VLL              
          Fig. 5.4g (A) illustrates g lines for different values of g drawn on the static characteristics and Fig. 5.4g (B)
          illustrates a constant g characteristic with different values of AC terminal voltages.
Vdc
                                                                      OP1
                                                                                         OP2
                                                                                                       OP3             CONVERTER
                                                                                                                            B
PdcÊ=Ê3P
PdcÊ=Ê2P
PdcÊ=Ê1P
                                                                                                           CONVERTER                 ConstantÊÊ
                                                                                                               A                  DCÊpowerÊlinesÊ
                                                                                                                            Idc
                                                          Iorder Ê1          Iorder Ê2         Iorder Ê3
                          For example, moving the operating point from OP2 to OP3 results in a decreased DC voltage and the DC
                          current has to be increased further to achieve the demanded power. For power reductions the reverse is
                          true, moving from OP2 to OP1 results in a rise in DC voltage and again a correspondingly smaller change
                          in DC current to achieve the new power order.
                                   Ê5.4h
                          5.4.1.4. Reactive Power Characteristics
                          A HVDC converter not only exchanges real power with the AC system but also absorbs reactive power (Q)
                          from the system. That is, the converter appears to be an inductive element as seen from the perspective of
                          the AC system. The amount of reactive power absorbed depends upon the operating state of the converter.
                          The relationship (p.u. values) between the reactive power absorbed and the AC and DC parameters are
                          given by the following equations:
          Note that values are in per unit and the suffix ‘op’ indicates the values at the nominal operating point e.g.
          OP1 in Fig. 5.4i.
          By substituting values for either the DC current or voltage for a given scheme, the constant reactive power
          lines can be generated and placed on the static characteristics as shown in Fig. 5.4i.
          In all practical AC systems, the AC source impedance at any point in the network is inductive at fundamental
          frequency. Assuming that the AC system is a simple inductor leads to the observation that increasing the
Vdc
                                         CONVERTER
                                             A
                                                                                                        ConstantÊreactiveÊ
                                                                                                           powerÊlinesÊ
                                                                           OP1                                 0.1Q
                                                                                                               0.3Q
                                                                                                               0.5Q
                                                                                                               0.7Q
                                                                                     OP2
                                                                                                          CONVERTER
                                                                                                              B
PdcÊ=Ê3P
PdcÊ=Ê2P
                                                                                                            ConstantÊÊ
                                                                                                         DCÊpowerÊlinesÊ
                                                                                    I                                   Idc
                                                                Iorder Ê1        Iorder Ê2
          reactive power demand on the AC system (reactive current flows from the AC system to the converter) will
          cause the converter AC terminal voltage to decrease. Conversely decreasing the reactive power demand
          on the AC system will cause the converter AC terminal voltage to increase.
          Therefore the constant reactive power lines in Fig. 5.4i can, to a first approximation, also be viewed as
                           Ê5.4i lines where increasing values of Q relate to decreasing values of converter terminal
          constant AC voltage
          voltage as illustrated in Fig. 5.4j.
                                                                  Increasing                                                  Decreasing
                                                                   reactive                                                   ACÊvoltage
                                                                  powerÊ(Q)                                                     (Vac)
                             Vdc                                                             Vdc
                                       CONVERTER                                                   CONVERTER
                                           A                                                           A
                                                                                     0.1Q                                                   1.2Vac
                                                                                     0.3Q                                                   1.1Vac
                                                            OP1                      0.5Q                              OP1                  1.0Vac
                                                                                     0.7QÊ                                                  0.9Vac
                                                                               CONVERTER                                              CONVERTER
                                                                                   B                                                      B
                                                          I                         Idc                               I                    Idc
                                                       IorderÊ1                                                    IorderÊ1
                                                      A                                                        B
Fig. 5.4j– A) Constant reactive power lines and B) Constant AC voltage lines
                     A
                                    CONVERTER
                                        A
                    A1
                    A2                                                                             CONVERTERÊBÊ
                                                                                                 ConstantÊreactiveÊ
                                                                       B                            powerÊlinesÊ
                                                                OP1ʼ                                   0.3QÊ
                                                                                                       0.5Q
                                                                           B1                          0.7Q
                    A3                                                          OP1                    0.8Q
                                                              OP2          B2
                                                                                              CONVERTER
                                                                                                  B
                    A4                                        OP3
                                                                           B3
                                                              OP4
                                                                           B4
                                                                           C
                                                                                                                Idc
                                                                       Iorder
          point OP1 is determined by the rectifier constant current characteristic BC. However if the AC voltage
          reduces further to point A1B1, the rectifier will reach a point where it cannot develop sufficient voltage to
          overcome the voltage presented by the inverter and consequently cannot maintain the DC current at the
          ordered value. At this point the rectifier is in both constant current and amin mode of control and a further
                        Ê5.5a in the rectifier AC voltage could cause the operating point to move to OP1’.
          very small reduction
          Conversely, a very small increase in the rectifier AC terminal voltage will cause the operating point to move
          back to OP1. Similarly small changes in the inverter AC busbar voltage will also cause the operating point to
          move between OP1 and OP1’. However moving the operating point to OP1’ will reduce the reactive power
          taken from the sending end AC system and cause an increase in the rectifier AC busbar voltage (see section
          5.4.1.4).
          Increasing the rectifier AC terminal voltage will move the amin line upwards and depending on the relative
          slopes of the amin and g characteristics and the strength of the sending end AC system, the operating point
          may move back to OP1. The process thus repeats and the operating point oscillates between the two
          locations. This is a highly undesirable phenomenon giving rise to power oscillations in the both AC and
          the DC systems. In practice this phenomenon is avoided by careful design of the inverter characteristics.
          Further reductions in the rectifier AC system busbar voltage will cause the amin characteristic to move down
          the Vdc axis and the operating point will move down the inverter constant current characteristic to OP2
          with lower DC voltage and hence lower DC power transmission. Progressively greater reductions in the AC
          busbar voltage will cause the operating point to move further down to OP3 and OP4 etc.
Vdc
                                            CONVERTER
                                                A
                                                                                                          CONVERTERÊAÊ
                                                                                                        ConstantÊreactiveÊ
                                                                                                           powerÊlinesÊ
                                                                                                              0.3Q
                                                                                   OP1                        0.5Q
                                                                      X1
                                                                                                              0.7Q
                                                                                   OP2                        0.8Q
                                                                      X2
                                                                                                       Y1
X3 OP3 Y2
                                                                                           CONVERTER
                                                                                               B       Y3
                                                                                                                Idc
                                                                                Iorder
                          Fig. 5.5b– Reduced receiving end AC busbar voltage
                          An important consideration other than simply the loss of DC power transmission is the increased reactive
                                  Ê5.5b
                          power consumption     of the inverter converter. Fig. 5.5a shows the rectifier amin characteristic sweeping
                          through increasing reactive power lines of the inverter. If the inverter is connected to a relatively strong
                          AC system, that is very low impedance between the inverter and its AC voltage source, then the increase
                          in reactive power consumption will be of little consequence. However if the inverter AC system connection
                          point is weak, the increased reactive power consumption of the inverter will result in the inverter busbar
                          voltage being reduced. In extreme cases, it can be seen that faults in the sending end AC system result
                          in significant and unacceptable reductions in the inverter AC busbar voltage. This means that the fault in
                          the sending end AC system is exported to the receiving AC system and will adversely affect consumers
                          connected to that system. This relationship between converter operation and busbar voltage gives rise to
                          adverse interactions and possible instabilities.
                          A further consideration is the reactive power exchange between the rectifier and its own AC system under
                          reduced voltage operation. At first glance the reactive power equation (see section 5.4.1.4) would suggest
                          that once the rectifier is operating on its amin characteristic, the reduction in AC system voltage would result
                          in reduced reactive power consumption by the rectifier. If this is the case, the reduction in the reactive
                          power supplied by the rectifier AC filters/capacitors is much greater, as this is related to the square of the
                          applied AC voltage. Consequently, the net reactive power absorbed from the AC system increases as the
                          AC system voltage falls. In any practical AC system the source impedance of the system is inductive at
                          fundamental frequency and thus any increase in reactive power consumption by the rectifier will cause the
                          AC terminal voltage to reduce further than caused by the initial fault. This is a positive feedback system
                          and, particularly with weak AC systems, can lead to instability and eventual collapse of the sending end
                          AC system voltage.
Vdc
                                                                                   CONVERTER
                                   A                                                   A
                                                                                                                                               Idc
                                           Iorder ÊB         Idc ÊBÊ                      Iorder ÊC                               Iorder ÊA
                                                        = Iorder ÊAÊ- Iorder ÊC
                          Fig 5.6a – Multi-terminal HVDC static characteristics
                                  Vdc
                                                                                   CONVERTER
                                       A                Ê5.6b                          A
                                                                       CONVERTER
                                                                           B
                                           OPB                                                            OPC
                                                                                                                   CONVERTER
                                                                                                                       C
                                                                                                                                               Idc
                                            Iorder ÊB                                      Iorder ÊC         Idc ÊBÊ               Iorder ÊA
                                                                                                        = Iorder ÊAÊ- Iorder ÊC
                          Fig. 5.6b– Multi-terminal HVDC static characteristics – reduced AC voltage at converter C
Vdc
                        A                                                                                  B
                                      OPB            CONVERTER   OPC           CONVERTER
                                                         B                         C
                                                                                              CONVERTER
                                                                                                  A
                                                                                                                    Idc
                                            Idc ÊB                 Iorder ÊC                         Iorder ÊA
          Fig. 5.6c– Alternative multi-terminal static characteristics
                                        Vdc
                                                                                                                        ConstantÊreactiveÊ
                                                                                                                            powerÊlinesÊ
                                                                                                                                0.3Q
                                  1.2
                                          A                                   B        C                                        0.5Q
                                          T
                                                                                           Y                     U
                                  1.0                                                                                           0.7Q
                                                                                           OP
                                                                              X                             Z
                                  0.8
                                                                                  ∆I
                                                                             W
                                  0.6
                                  0.4
                                          V
                                                     E
                                                                                             D
0.2
                                                         F                                                      Idc
                                               0.2           0.4   0.6      0.8        1.0       1.2
                  0.8
                                                                ∆I
                                                           W             Dʼ
                  0.6
                  0.4
                          V
                                      E
                                                                           D
                  0.2
                                          F                                                      Idc
                                0.2           0.4   0.6   0.8        1.0       1.2
              ➙	CD is a constant Idc characteristic. This is usually the main control mode for the rectifier. The control
                         5.7b
                 loop maintains  the DC current at a value (Iorder), although this value is itself often derived from an
                 outer control loop, for example DC power control.
              ➙	DEF is the rectifier’s Low Voltage Current Clamp Characteristic (LVCC).This characteristic is only
                 invoked if the DC voltage falls below a preset level (typically 0.3 p.u.) as a result of receiving AC
                 system faults or DC line to ground faults. Historically the intercept with the DC current axis (F) was
                 chosen to be 0.3 p.u., so that the valves of a non-commutating inverter are typically subjected to
                 the same average current as normal operation and thus do not experience excessive heating. On
                 more modern control characteristics the current axis intercept is often a variable determined by the
                 DC current order, so as to minimize the change in reactive power consumption of both converters
                 between the fault and non-fault conditions.
          There are many variations of these characteristics in use. A common variation is the use of a
          Low Voltage Current Order Limit (LVCOL) rather than the current clamp characteristic (LVCC):
          this characteristic (D’E) is intended to reduce the reactive power consumption at both converters,
          in particular the inverter, during faults in the receiving AC system.
          During such faults, the operating point moves down the rectifier constant current characteristic and
          significantly increases the reactive power consumption of both converters. This in turn leads to further
          voltage reductions and exacerbates the original problem, ultimately leading to an inverter commutation
          failure. By reducing the reactive power consumption, the voltage reduction will be opposed and the inverter
          commutation process will be assisted. In effect the characteristic holds the inverter busbar voltage in
          negative feedback and is theoretically capable of stable steady-state operation.
          A counter argument is that this characteristic reduces the difference between the effective current orders
          of the two converters during recovery of the DC voltage following a fault. It is the difference between the
          two converters’ DC currents which drives the recovery of the scheme. This current difference provides the
          charging current for the DC system capacitance and the error signal which drives the converter control
          system in returning the firing angles to their normal operating points. Note that the capacitance can be
          considerable in a cable scheme. This latter consideration is present at all times and in the case of back-to-
          back systems, is the major factor in determining the recovery time of the system following faults.
                                        Vdc
                                                                                                                        ConstantÊreactiveÊ
                                                                                                                            powerÊlinesÊ
                                  1.2                                                                                           0.3Q
                                          A                                          B        C                                 0.5Q
                                          T                                                       Y                U
                                  1.0                                                                                           0.7Q
                                                                                                  OP
                                                                                 X                            Z
                                  0.8
                                                                                         ∆I
                                                                                W
                                  0.6
                                  0.4
                                          V
                                                           E
                                                                                                    D
                                  0.2
                                                               F                                                  Idc
                                                     0.2           0.4   0.6   0.8            1.0       1.2
                         Vdc
                                                                                                            ConstantÊreactiveÊ
                                                                                                               powerÊlinesÊ
                                                                                                                    0.3Q
                   1.2
                           A                                   B
                                                                        C                                           0.5Q
                           T                                                  Y
                   1.0                                                                                 U            0.7Q
                                                                            OP
                                                               X                                  Z
                   0.8
                                                                   ∆I
                                                              W
                  0.6
                  0.4
                               V
                                         E
                                                                              D
                  0.2
                                             F                                                        Idc
                                   0.2           0.4   0.6   0.8        1.0       1.2
Vdc
                                 1.4
                                             G                                                                       ConstantÊreactiveÊ
                                                                                                                         powerÊlinesÊ
                                                                                                                             0.3Q
                                 1.2                                           B
                                             A
                                                                                      C                                      0.5Q
                                 0.8                                                                                   Z
                                                                                                                 H
0.6
                                 0.4
                                             V         W
                                 0.2
                                                            E
                                                            F                              D
                                                                                                           Idc
                                                      0.2   0.4   0.6       0.8      1.0        1.2
Vdc
                                 1.4
                                                                                                                                   CONVERTERÊBÊ
                                                                                                                                  ConstantÊreactive
                                                                                                                                    powerÊlines
                                 1.2
                                                                                                                                        0.3Q
                                 1.0      Vo1                                           OP 1                                            0.5Q
                                          Vo2                                                                                           0.7Q
                                                                                             OP 2
                                                                                                                                        0.8Q
                                 0.8      Vo3                                                         OP 3
                                          Vo4                                                                 OP 4
                                 0.6
                                                                                                                                     ConstantÊDCÊ
                                                                                                                                      powerÊlineÊ
                                 0.4
                                 0.2
                                                            E
                                                            F                           l o1 l o2 l o3 l o4
                                                                                                                            Idc
                                                 0.2        0.4        0.6        0.8           1.0          1.2     1.4
                ➙	Inverter Low Voltage characteristic (LVCL): if one or both of the AC systems are weak, the drawing
                   of excessive reactive power during faults in either system can result in the collapse of the healthy
                   or unfaulted system. By giving the inverter constant current characteristic a slope, the variations
                   in the inverter reactive power consumption can be minimized (see Fig. 5.8c).
                     In practice the slope is chosen for a particular scheme to give a small decrease in reactive power
                     consumption5.8bwith an acceptable rise (typically 10%) in the associated AC system voltages. A
                     constant low voltage limit (VW) is used to prevent inadvertent inverter operation in the rectification
                     region during major transients.
                ➙	Rectifier LVCC characteristic (DEF): this characteristic is intended to operate when the inverter
                   is suffering a commutation failure. With the converter operating range allowing reduced DC
                   voltage, the larger firing angles employed give rise to increased DC harmonic components. Without
                   significant signal filtering this could lead to false or intermittent triggering of the low voltage
                   characteristics. Such filtering would lead to control delays and affect the control system response
                   to transients. To avoid this, the characteristic is initiated by the inverter, which monitors its own
                   valve winding currents for early indications of commutation failure.
Vdc
                                        1.4         G
                                                                                                                                        CONVERTERÊBÊ
                                                                                                                                      ConstantÊreactiveÊ
                                        1.2                                                                                              powerÊlinesÊ
                                                    A
                                                                                                                                               0.3Q
                                                    Vorder                                                                                     0.5Q
                                        1.0                                               X                      Y                             0.7Q
                                                                                                      OP                                       0.8Q
                                        0.8         B                                                                                 Z
                                                                                                                                 H
0.6 OPʼ
                                                                                                  C
                                        0.4
                                                    V          W
                                        0.2
                                                                    E
                                                                    F                                 D                    Idc
                                                             0.2    0.4             0.6   0.8     1.0      1.2       1.4
                                              Vdc
                                                             5.8c
                                        1.4
                                                                                                                                        CONVERTERÊBÊ
                                        1.2                                                                                           ConstantÊreactiveÊ
                                                                                                                                         powerÊlinesÊ
                                                A                                             B   C
                                        1.0                                                                                                     0.3Q
                                                                                                                                                0.5Q
                                                Vorder                                    X                      Y                              0.7Q
                                                                                                      OP                                        0.8Q
                                        0.8
                                                G                                                                                     Z
                                                                              Yʼ
                                        0.6                             OPʼ
                                        0.4
                                                V              W
                                                                                                                                 Zʼ
                                        0.2                                                                                      H
                                                                    E
                                                                    F                                 D                    Idc
                                                             0.2    0.4             0.6   0.8     1.0      1.2       1.4
                                               5.8d
BACK TO       260   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
              ➙	Rectifier Control of Inverter Extinction Angle (GH): the reduction in the receiving system AC terminal
                 voltage with the inverter in constant extinction angle control (XY) moves the Operating Point (OP)
                 down the rectifier constant current line (CD). Unfortunately this leads to an increase in reactive
                 power consumption by both converters. In particular, at the inverter the increased reactive power
                 consumption will cause further voltage reduction and can eventually precipitate commutation
                 failure of the converter. With weak AC systems, the converter will not be able to regain normal
                 steady-state commutation and repeated commutation failures will ensue with further disturbances
                 to both AC systems. However, with back-to-back HVDC schemes there is no difficulty in transferring
                 inverter control parameters to the rectifier. By allowing the rectifier to control the inverter extinction
                 angle to a predetermined minimum value, the operating point is forced down the inverter low
                 voltage characteristic (WX) and the reactive power consumption of the inverter remains either
                 unchanged or, in practice, decreases (see Fig. 5.8d).
          		Reducing the reactive power consumption of the inverter will oppose the initial busbar voltage
             reduction and acts to stabilize the AC system. This control mode was first used on the Chandrapur
             2 × 500 MW back-to-back HVDC scheme in India [13] and has been used on other schemes in India,
             Uruguay and Saudi Arabia.
Vdc
               1.4
                       G                                                                                             CONVERTERÊAÊorÊBÊ
                                                                                                                   ConstantÊVacÊerrorÊlinesÊ
               1.2                                                                                                    VacÊorderÊ=Ê1.2Êp.u.Ê
                       A                               B   C                                       VacÊsourceÊ=Ê1.1Êp.u.Ê      VacÊconverterÊ=Ê1.0Êp.u.
               1.0     Vorder                      X                       Y                       VacÊsourceÊ=Ê1.2Êp.u.Ê      VacÊconverterÊ=Ê1.2Êp.u.
                                                               OP1                                 VacÊsourceÊ=Ê1.3Êp.u.Ê      VacÊconverterÊ=Ê1.2Êp.u.
                                                                                                   VacÊsourceÊ=Ê1.4Êp.u.Ê      VacÊconverterÊ=Ê1.2Êp.u.
               0.8                                                                             Z
                                                               OP2
                                                                                           H
               0.6
                                                               OP3
               0.4
                       V         W
               0.2
                                      E
                                      F                        D                     Idc
                                0.2   0.4    0.6   0.8     1.0       1.2       1.4
BACK TO                               5.8e
                                                                                     DC Transmission Systems: Line Commutated Converters                  |   261
CHAPTER
          5| AC/DC SYSTEM INTERACTIONS
                          optimum choice for such a control feature. In order to cover all operating conditions, it is necessary to involve
                          both converters in reactive power and/or AC voltage control.
                          With a back-to-back HVDC scheme, the ability to use measurements from both converters offers the
                          opportunity to extend the converter characteristics to the control of AC overvoltages in either AC system.
                          By comparing each AC system voltage (3-phase RMS) with a set ordered maximum (e.g. 1.2 p.u. but typically
                          a dynamic quantity), an AC voltage error signal can be derived and this can be drawn over the static
                          characteristics (Fig. 5.8e). This characteristic can be drawn for differing AC system voltages and hence
                          differing errors. In the following discussion, it is assumed that the rectifier is in DC current control and that
                          there is no outer DC power control loop.
                          In Fig. 5.8e, with the AC voltage at or below the ordered maximum value, the converters will operate normally
                          (OP1). However if the AC system voltage and thus the converter busbar voltage rises, the characteristic
                          moves to the right until the control loop error reaches zero and the operating voltage now equals the ordered
                          maximum while the converter starts to exert control (OP1). Continued increase in the source voltage will
                          move the error characteristic further to the right and the operating point will move down the rectifier constant
                          current characteristic (OP2). Further increases of the source voltage will require the operating point to move
                          to OP3 so that the converter reactive power consumption holds the AC terminal voltage to the desired value.
                          This process can continue, however due to the slope of the constant reactive power lines at lower DC voltage
                          there is a disproportionate change in DC voltage for a given change in the AC source voltage. At very low DC
                          voltages, the characteristic is practically vertical and the inverter has little control over the reactive power
                          and AC terminal voltages. Any further control must now be achieved by increasing the DC current, which is
                          controlled via the rectifier.
                          The use of the converters to dynamically limit AC overvoltages at either converter AC busbar should be seen
                          as a temporary measure to assist the AC systems and avoid tripping the scheme and/or AC filters. It is only
                          a control measure to provide time for the AC system(s) to re-establish ‘normal’ operation. When AC voltage
                          control is exercised, both converters are operating with excessive firing angles leading to increased losses
                          and harmonic generation. This is acceptable for short periods of up to a few seconds but not in steady-state
                          operation. If these extreme operating conditions persist, then the tripping of AC filters and capacitors will
                          be necessary and the operation of the scheme will be compromised. Eventually, tripping of the complete
                          scheme will be necessary.
                          When AC voltage control mode is invoked, both converters are operating with increased reactive power
                          consumption. While this will limit the AC voltage rise at one converter AC busbar, it will also result in a change
                          in AC voltage (potentially an undervoltage) at the other AC terminal. If the two AC systems are of considerably
                          different short-circuit levels (one is relatively strong and the other weak), the effects on the weaker AC system
                          from overvoltages in the stronger system will be disproportionately severe. In general it can be assumed that
                          overvoltages are more dangerous to equipment than undervoltages and therefore dynamic AC overvoltage
                          control can be tolerated only for short periods.
                          In this extreme condition, the inverter busbar voltage may be depressed to the point where the inverter valves
                          have insufficient voltage to commutate as the overlap angle approaches 60˚. To prevent the collapse of the
                          inverter operation the rectifier converter takes control of the inverter extinction angle. The practical effect of
                          this is for both the DC current and DC voltage to be reduced (see Fig. 5.8f).
                          The use of the converters to control either of the AC system voltages is possible with back-to-back HVDC
                          schemes where measurements from both terminals are readily accessible to both control systems. With
                          transmission schemes, the delays associated with communications between the two ends and/or the
                          requirements to operate with or without communications, means that the options for AC voltage control are
                          restricted. Nonetheless, the use of converters to control modest AC system voltage rises and/or mitigate the
                          switching or reactive elements at the AC terminals of the converter has been employed on several schemes
                          e.g. KEPCO, Cheju 1 HVDC link.
                     1.4         G1                                                                                                                                                   CONVERTERÊAÊorÊBÊ
                                                                                                                                                                                    ConstantÊVacÊerrorÊlinesÊ
                     1.2                                                                                                                                                               VacÊorderÊ=Ê1.2Êp.u.Ê
                                 A                                                        B           C                                                            VacÊsourceÊ=Ê1.0Êp.u.Ê       VacÊconverterÊ=Ê1.0Êp.u.
                     1.0         G2                                                   X                                   Y                                        VacÊsourceÊ=Ê1.2Êp.u.Ê       VacÊconverterÊ=Ê1.2Êp.u.
                                                                                                          OP1                                                      VacÊsourceÊ=Ê1.3Êp.u.Ê       VacÊconverterÊ=Ê1.2Êp.u.
                                                                                                                                                                   VacÊsourceÊ=Ê1.4Êp.u.Ê       VacÊconverterÊ=Ê1.2Êp.u.
                     0.8                                                                                                                                   Z
                                 G3                                                                       OP2
                                                                                                                                                          H1
                                                                             OP2ʼ
                     0.6
                                                                                                          OP3
                     0.4                                                              OP3ʼ                                                                H2
                                 V          W
                     0.2
                                                       E                                                                                                  H3
                                                       F                                                  D                                     Idc
                                           0.2         0.4             0.6             0.8          1.0             1.2             1.4
                      Vdc
                               5.8f
               1.4
                           G                                                                                                                                                     CONVERTERÊAÊorÊBÊ
                                                                                                                                                                               ConstantÊVacÊerrorÊlinesÊ
               1.2                                                                                                                                                                VacÊorderÊ=Ê1.2Êp.u.Ê
                           A                                                      B           C
                                                                                                                                                               VacÊsourceÊ=Ê1.0Êp.u.Ê       VacÊconverterÊ=Ê1.0Êp.u.
               1.0         Vorder                                             X                                     Y                                          VacÊsourceÊ=Ê1.2Êp.u.Ê       VacÊconverterÊ=Ê1.2Êp.u.
                                                                                                  OP1                                                          VacÊsourceÊ=Ê1.3Êp.u.Ê       VacÊconverterÊ=Ê1.2Êp.u.
                                                                                                                                                               VacÊsourceÊ=Ê1.4Êp.u.Ê       VacÊconverterÊ=Ê1.2Êp.u.
               0.8                                                                                                                                    Z
                                                                                                                                                 H
0.6
               0.4
                           V          W
               0.2
                                                 E
                                                 F         OP2     OP3                OP4         D                                       Idc
                                     0.2         0.4             0.6          0.8             1.0             1.2             1.4
                                     5.8g
BACK TO                                                                                                                                    DC Transmission Systems: Line Commutated Converters                             |   263
CHAPTER
          5| AC/DC SYSTEM INTERACTIONS
Vdc
                        1.4
                                G                                                                                                          CONVERTERÊAÊorÊBÊ
                                                                                                                                        ConstantÊVacÊerrorÊlinesÊ
                        1.2                                                                                                                VacÊorderÊ=Ê1.2Êp.u.Ê
                                A                                      B         C                                       VacÊsourceÊ=Ê1.0Êp.u.Ê        VacÊconverterÊ=Ê1.0Êp.u.
                        1.0     Vorder                             X                             Y                       VacÊsourceÊ=Ê1.2Êp.u.Ê        VacÊconverterÊ=Ê1.2Êp.u.
                                                                                     OP1                                 VacÊsourceÊ=Ê1.3Êp.u.Ê        VacÊconverterÊ=Ê1.2Êp.u.
                                                                                                                         VacÊsourceÊ=Ê1.4Êp.u.Ê        VacÊconverterÊ=Ê1.2Êp.u.
                        0.8                                                                                          Z
                                                                                                                 H
0.6
                        0.4
                                V         W
                        0.2
                                               E
                                               F     OP2     OP3           OP4       D                     Idc
                                         0.2   0.4         0.6     0.8           1.0       1.2       1.4
                                           5.8hattached to the unfaulted AC system is a rectifier, it will now operate on its LVCC characteristic
                              If the converter
                              (see Fig. 5.8g) and the reactive power absorbed from the system should be sufficient to keep the AC terminal
                              voltages at a reasonable level.
                              If the AC system is exceptionally weak, has highly resistive (long) AC lines or a relatively small capacity
                              compared with the DC link rating, the AC terminal voltages may rise above acceptable levels. Under such
                              conditions the AC voltage control mode may be used to increase the DC current above the LVCC level (E)
                              and limit the AC terminal voltage to a controlled value: OP2, OP3, etc. Under these circumstances, the
                              converter is performing the same role as a Thyristor Controlled Reactor (TCR) [14]. It should be noted
                              however that the non-commutating thyristor valves at the inverter terminal are now subjected to greater
                              conduction losses than they would normally experience and care must be taken not to exceed their thermal
                              limits. If the DC current flow is excessive, or the duration of the fault is too great, then the removal of filters/
                              capacitors may be required and a return to the pre-fault power level may not be possible when the inverter
                              AC system is restored.
                              If the converter attached to the unfaulted AC system is an inverter, the normal inverter static characteristics
                              will bring the operating point onto the DC voltage axis at zero DC current. The inverter reactive power
                              consumption will be zero and the AC terminal voltage will increase. If the voltage rise is excessive, the inverter
                              can make use of an AC voltage control mode and, by removing the minimum DC voltage characteristic (VW),
                              reduce its firing angle (a < 90˚) and circulate a DC current through the faulted rectifier (see Fig. 5.8h).
                              In effect, the inverter is now operating just inside the firing angle region normally associated with rectifier
                              operation. This condition is no different to the one described above for the rectifier converter and the same
                              considerations regarding valve ratings apply.
Vdc
                          Y1
              1.4
                                                                Y2
              1.2     A
                                                                    OP     B                                                    Z
                                                                                                                  C
              1.0
0.8
              0.6                                                   X2
                      W
              0.4         X1
                                     E
                                                                                                                      D
0.2
                                         F                     Io                                   IoMAX
                                                                                                                                Idc
                               0.2           0.4   0.6   0.8             1.0   1.2    1.4     1.6           1.8           2.0
Fig. 5.9a– Cheju 1 HVDC scheme – mainland to island power flow characteristics
                                                                  +Vdc
                                                                                              X2l                  X1l           Y1l
                                                        +VoÊMAX
                                                                                                                                                               Z1l
                                                                  AR                                                  BR
                                                                            OP1*                            OP1
                                                                                                                                                        CR
           PowerÊflowÊisolatedÊsystemÊtoÊgridÊsystemÊ
A1 R B1 R
C1R
                                                                                                                                             GridÊsystemÊ
                                                                                                                                             QmaxÊlimitÊ
                                                                         OP2*                         OP2
                                                                                                                                                  Idc
                                                                         W2 l                         W1l
                                                                                                                                            IsolatedÊsystemÊ
                                                                                                                                            ImaxÊlimitÊ
           PowerÊflowÊgridÊsystemÊtoÊisolatedÊsystemÊ
C1l
                                                                  A1 l                B1l
                                                                                                                                                        Cl
                                                                          OP3*                              OP3
                                                        -VoÊMAX   Al                                                     Bl
                                                                                                                                                               ZR
                                                                                              X2 R                    X1 R           Y1 R
                                                                  -Vdc
                                                                                   IsolatedÊsystemÊ               GridÊsystemÊ
                                                                                   characteristicsÊ               characteristicsÊ
                  ∆ P (V ,θ )                              
                                             ∆θ          
                  ∆Pterm (V ,θ , x )         ∆θ term     
                                                         
                  ∆Q(V ,θ )           =  J   ∆V                                                        [Eqn.5.11h]
                                             ∆V          
                  ∆Qterm (V ,θ , x )              term
                                                              
                                            ∆ x
                 R(Vterm , x )                           
          Where:
          J is the matrix of first order partial derivatives (Jacobian)
          ∆Pterm = Ptermsp – Pterm(ac) – Pterm(dc)                                                           [Eqn. 5.11i]
          ∆Qterm = Qtermsp – Qterm(ac) – Qterm(dc)                                                           [Eqn. 5.11j]
          and as noted earlier:
          Pterm(dc) = f (Vterm . x)                                                                          [Eqn 5.11k]
          Qterm(dc) = f (Vterm . x)                                                                           [Eqn 5.11l]
                                                                                                (a)
                                                        T1
T2 Vd Rect
Id Rect
                                                        α Rect_meas                α Rect
                                                                                   Phase
                                                                                  locked               Regulator
                                                                                 oscillator                                        -
                                                                                                                        +         Id*Rect
                                                             Tap_Up
                                                             Tap_Down
                                                                                    Tap               α up_threshold
                                                                                 controller
                                                                                                      α dn_threshold
                                                                                                                  RectifierÊcontroller
                                                                                               (b)
                                                                                                                                       T1
                                               Vd Inv
T2
Id Inv
                                                                                                                               γ Inv_meas
                                                                                  α Inv         Phase
                                                                                               locked           Regulator
                                                                                              oscillator                                     -
                                                                                                                                   +        γ order
                                                                                          Tap_Up
                                               Vd up_threshold               Tap
                                                                          controller      Tap_Down
                                               Vd dn_threshold
                                                                                                                             InverterÊcontroller
                          Fig.5.11a– DC scheme operation
                             ➙	AC harmonic filters on a DC scheme are represented by shunt capacitor banks, which supply the
                                           Ê5.11a
                                equivalent fundamental frequency reactive power.
                             ➙	Surge arresters are not modeled, as they are dynamic protective models operating at the cyclic level.
                             ➙	If the load flow is to be used in dynamic studies using the DC models, a dummy offline machine with
                                ID corresponding to the DC line number must be included at the terminal busbars of the DC line. This
                                is because the DC dynamic model is a current injecting machine model, so the dummy machine may
                                not be necessary for other non-machine type DC models.
                          A typical DC data set for such studies is shown below in Table 5.12a.
  274
                                                                                                                                                                                                                               IDCX
      |
                                                                                                                                                                                                                     0.2[ohm]Ê                                             0.2[ohm]Ê
                                                                                                                                                                        2               2                  2
                                                                                                                                                                   TÊ       F1X    TÊ    F5X          TÊ        F9X                                                                        TÊ                   TÊ                 TÊ
                                                                                                                                                                                                                                                                                                            2               F7Y2
                                                                                                                                                       IVWSAX                                                                                                                       F3Y2             F11Y                                      IVWSAY
                                                                                                                                                                                                                                        TLineÊ1             TLineÊ1
                                                                                                                                                                        2               2                   2                                                                                                                                                                        TAPY
                                                                                                                                                                   TÊ    F12X      TÊ       F4X       TÊ        F8X                                                                        TÊ                   TÊ                 TÊ
                                                                                                              TAPX Tap
                                                                                                                       A B C                                                                                                                                                                                                                                     C           B A Tap
                                                                                                                 A                      A                                                                                                                                           F2Y 2            F10Y 2                 F6Y2
                                                                                                                                                                                                                                                                                                                                                        A                             A
                                                                                                                         324.0Ê[MVA]                                                                                                                                                                                                                                        324.0Ê[MVA]                                      BRKY1
                                                        SCL                                                                                            IVWDAX                                                                                                                                                                                  IVWDAY                                                                                SCL
                                                                    BRKX1                                        B #1                #3 B                                                                                                                                                                                                               B   #3                        B
                                                                                                                                                                                                                                                                                                                                                                                  #1
                                                                                                                                                                                                                                                                                                                                                                                                              A
                                                                                                                                                       IVWDBX                                                                                                                                                                                  IVWDBY
                                                        50ÊHz                                                    C                      C                                                                                                                                                                                                               C                             C                                              60ÊHz
                                                                                                                   500Ê[kV] 70Ê[kV] 70Ê[kV]
                                                                                           A
                                                                                               V
                                                                                                                                                       IVWDCX                                                                                                                                                                                  IVWDCY       70Ê[kV] 70Ê[kV] 500Ê[kV]
                                                                                                                                                                                                                                                                                                                                                                                                           Q=Ê390V
2 2 2
                                                                               Q=Ê308.6
                                                                                                                                                                                                                                                                                                                                                                                                          P=Ê-1.017
                                                                              P=Ê-0.7568
                                                                                                                                                                                                                                                                                    F8Y2               F4Y2                 F12Y2
                                                                                                                          1.0e6Ê[ohm]
                                                                                                                                                                                                                                                                                                                                                                     1.0e6Ê[ohm]
                                                                                                                                                                                                                                                                          IDCY
                                                                                                                                                                                                                                                                                                                                                                                                                                             5| AC/DC SYSTEM INTERACTIONS
VDCX2
BLK
                               Approx.Ê125Êmm
                                                                                           Approx.Ê175Êmm
Cathode
Anode
Fig. 6.1a– Modern 8.5 kV 125 mm thyristor: silicon wafer (left) and complete capsule (right). © Infineon Technologies AG.
          discussed in section 6.1.9 below. The rest of this chapter relates to the more common type, the Electrically
          Triggered Thyristor.
          In the following sections, a brief explanation will be given first of the basic physics of a thyristor, followed by
          a short description of its construction and then a discussion of its two stable states (ON and OFF) and two
          transitional states (turn-ON and turn-OFF).
          Terminology for thyristors is covered in [1].
                                                            Cathode                                                  Cathode
                                                                n                                                        n
                                                  gate          p           gate             p                           p
                                                                 n                          n                            n
                                                                 p                          p
                                                               Anode                      Anode                                Cathode
                                                                                                                    Emitter
                                                           G    K               Gate
                                                                                            Collector            Base
                                                                                                                   Collector
                                                                                                      Base
                                                                A                           Emitter
                                                                                        Anode
                          Fig. 6.1b– The two-transistor model of a thyristor
                          To turn-on the thyristor, a pulse of current is injected into the gate terminal at a time when the anode is
                          positive compared to the cathode. The effect of this is to introduce current into the base of the NPN transistor.
                          Since bipolar transistors behave as current amplifiers, this causes the NPN transistor to pass a larger current
                                                          6.1b current passed into the NPN transistor results in base current being
                          from collector to emitter. The collector
                          drawn out of the PNP transistor. By the same current-amplifying action as for the NPN transistor, this causes
                          the PNP transistor to pass more current from its emitter to collector.
                          The collector current from the PNP transistor feeds back into the base of the NPN transistor, causing even
                          more current to be passed from its collector to its emitter, causing more current in the PNP transistor, and
                          so on. A positive feedback mechanism has been created and the thyristor ‘latches’ into the conducting state.
                          Once turned on, the thyristor remains on until the external circuit forces the current to drop below the
                          holding current, which for large thyristors is so much less than the normal rated current that it can be
                          approximated as zero.
                          6.1.3. Construction
                          In its most basic form, a thyristor consists of a simple four-layer p-n-p-n structure as shown in Fig. 6.1c.
                          The alternating p-n-p-n structure is apparent from this diagram. The n-layer used to form the cathode
                          connection is usually more highly doped than the other layers (for reasons that will be explained in section
                          6.1.3.1 below) and is referred to as an ‘n+’ layer.
                          However, for high-power thyristors suitable for HVDC there are two modifications that are commonly made
                          to this basic structure. First, an amplifying gate structure is normally used.
n+ p n+ G K
                                                                 p
                                                                                                                               A
                    AluminiumÊmetallisation                     Anode
          The amplifying gate consists of a small pilot thyristor integrated into the main silicon slice and arranged so
          that its cathode feeds into the gate of the main thyristor. The amplifying gate allows a large thyristor to be
          turned on efficiently by a relatively small pulse of gate current. The amplifying gate structure is normally
             6.1c with an inter-digitated gate arrangement, whereby the outer edge of the amplifying gate is
          combined
          extended via ‘fingers’ so that it gives access to a large proportion of the total area of the silicon, as can be
          seen on the left side of Fig. 6.1.a. This is an efficient way of turning a large-area thyristor on rapidly and
          reducing the spreading time, however the inter-digitated gate does use up some of the area available for
          carrying on-state current.
          Secondly, the cathode side of the thyristor is usually equipped with small regions known as ‘cathode shorts’.
          These are small regions on the cathode side where the n+ layer is missing and the p base (gate) is directly
          connected to the cathode. The effect of this is equivalent to connecting a resistor from the gate terminal
          to the cathode. It makes the thyristor less sensitive to dv/dt and spurious triggering due to induced gate
          currents (thyristors can be spontaneously turned on by excessive positive dv/dt as explained in section
          6.1.4 below). Fig. 6.1d shows a thyristor with an amplifying gate and cathode shorts.
p K
n G
                                                                        p
                                                                                                              PilotÊ
                                                                     anode                                    thyristor
                                                                                                                                A
          Fig. 6.1 d– Thyristor with amplifying gate and cathode shorts
n n
n n
                                                                 p                                                                  p
                                                                                                                                  Anode
                          Fig. 6.1e– Diffusion steps to produce thyristor wafer
                          6.1.3.2. Bonding
                          In the finished thyristor, the silicon slice is always sandwiched between two discs of a metal such as
                             6.1e
                          molybdenum,    chosen to have a coefficient of thermal expansion similar to that of silicon (so as to alleviate
                          lateral stresses due to thermal expansion/contraction). In some designs of thyristor, the silicon is fully-
                          floating, with no permanent bond to the molybdenum discs on either side.
                          In other designs, the molybdenum disc is bonded or alloyed to the silicon slice on the anode side. Compared
                          with fully floating silicon, thyristors made by this process can have improved thermal impedance and better
                          surge current performance, but the bonding process, if not performed carefully, can lead to distortion of the
                          silicon and therefore to a greater risk of mechanical failure.
                          Normally the bonding process (where used) is performed after the diffusion and metallization.
FullyÊfloatingÊsilicon BondedÊsilicon
Mo Mo Mo
Si Si Si
Mo Mo Mo
=ÊÊProtectiveÊsiliconeÊrubberÊcoating
          After beveling, the high-field region at the edge of the device may also be ‘passivated’ in order to reduce its
          vulnerability to surface trapped charges. Typically this is done with a thin semi-conducting coating (various
          different techniques are possible to achieve this), which is then covered by a protective coating of silicone rubber.
                                              Molybdenum                                                         SiliconÊwafer
                                                 discs
Cathode
                                                                              Copper
                                                                                                                                             Gate
Copper
                             ProtectiveÊsilicone                                                                                 Porcelain
                              rubberÊcoating                                                                                     envelope
                         allow current to pass in either direction. It does so because there is always at least one reverse-biased p-n
                        6.1g
                         junction (a reverse-biased diode) in each direction.
                          When the thyristor is positively biased (anode is positive compared to the cathode), the voltage is supported
                          by the junction between the upper p layer and lower n layer. This is a p-n junction similar to that inside a
                          diode, and it behaves in the same way: for a short distance either side of the junction, the charge carriers
                          (electrons and holes) are cancelled out and a depletion region, also known as a space-charge region (Fig.
                          6.1h) is created, where the semiconductor behaves like an electrical insulator. Like any thin insulating layer,
                          the depletion region behaves as a capacitance; hence an off-state thyristor has a measurable capacitance
                          known as its junction capacitance. Because the width of the depletion region increases with the applied
                          voltage, the junction capacitance is non-linear, reducing as voltage is increased.
                          When the thyristor is negatively biased (anode is negative compared with cathode), two depletion regions
                          form, one at the junction between the cathode and gate, and one at the junction between the anode and the
                          lower n region (the so-called n-base). The latter takes up most of the voltage across the thyristor, the gate-
                          cathode junction being capable of withstanding only a quite low voltage.
                                    DepletionÊregion
                                                                                                        n
                                       n
                                                                                                     DepletionÊregion
p p
Anode Anode
             (a)ÊForwardÊblocking                                           (b)ÊReverseÊblocking
          Fig. 6.1h– Depletion regions during forward blocking state (a) or reverse blocking state (b)
                                                                                                                                                        IdealÊthyristor
                                                                       OFF-state
             6.1h                                 l                                                                         l                           RealÊthyristor
                                                                       ON-state                                                                         (25¡C)
                                                                                                                                                        RealÊthyristor
                                                                                                                                                        (125¡C)
                                                                                        DominatedÊby      DominatedÊby          VBOÊself-triggering
                                                                                        avalancheÊcurrent leakageÊcurrent       (usuallyÊdestructive)
V V
                                                                                              ReverseÊavalancheÊbreakdown
                                                                                              (safeÊifÊenergyÊlimited)
Fig. 6.1i– Off-state V-I characteristics of an idealized (left) and a real (right) thyristor
              ➙ L eakage current: this applies at all values of voltage and for any dv/dt (including the static case of
                 DC voltage). Leakage current arises from charge carriers (electrons and holes) that are thermally
                 excited (created by the random thermal vibration of the silicon crystal structure). This effect follows
              6.1ian Arrhenius-type sensitivity to temperature, with leakage currents increasing exponentially with
                 temperature. On the other hand, leakage currents vary relatively little with voltage (a modest leakage
                 current appears at very low applied voltage and does not increase very much as the voltage is raised).
              ➙	Avalanche current: A thyristor subjected to off-state voltage will experience a high electric field
                 in its depletion regions, and this high field will cause charge carriers to be accelerated. Some of
                 these fast-moving charge carriers will collide with atoms in the crystal structure, causing further
                 generation of holes and electrons which then accelerate in opposite directions. A positive feedback
                 avalanche mechanism is created, giving rapid multiplication of current, which can be damaging if
                 the energy is not limited. The avalanche effect is similar, but not quite identical, to the Zener effect
                 used in Zener diodes. Unlike leakage current, avalanche current depends much more strongly on
                 voltage than on temperature. It increases with voltage raised to a power, but for a given voltage,
                 the avalanche current actually decreases as the temperature increases.
              ➙	Displacement current: this depends primarily on dv/dt, since it arises from the capacitive properties
                 of an off-state thyristor, where the depletion region(s) act as a voltage-dependent capacitance.
100%
                                                                                             DominatedÊby
                                                                                             leakageÊcurrent
50%
                                                          ShortÊriseÊtime
                                                          (egÊ<250Êns)
                                                100%
                                                                                            DecayÊtime-constant
                                         Gate                                               typicallyÊaÊfewÊμs                 GateÊpulseÊtypicallyÊcontinues
                                         current                                                                               ofÊseveralÊtensÊofÊμs
                                                   10%
                                                    0%
                                                                                                                                                                   t
                                                                            Turn-onÊdelay                                                           IdealÊthyristor
                                                                            timeÊ(td)
                                                                                                                                                    RealÊthyristor
                                                100%                                            RiseÊtimeÊ(tr)
                                                 90%
                                         Thyristor
                                         voltage
                                                                            di/dtÊlimitedÊonlyÊby
                                                                            saturatedÊinductanceÊof
                                                                            reactor
                                                         6.1k
                                                                   Reactor
                                           Thyristor
                                                                   saturates
                                           current
                                                          di/dtÊlimitedÊby
                                                          unsaturatedÊinductance
                                                          ofÊreactor
                                                                                               DampingÊcircuitÊcurrent
                                                                                                 ≈(V/R)eÊ(-t/RC)
                                                                 0             1           2          3            4          5          6
                                                                                                                                                             t (μs)
                                                                                                    Time
                          Fig. 6.1l– Total thyristor inrush current
                          Typically, for turn-on from the full rated voltage of the thyristor, it will take 3-5 μs for the di/dt reactor to
                          saturate. During the unsaturated phase, the current will only have risen by a few hundred amps, but after
                          the reactor saturates, the rate of rise of current will be much greater. For a typical repetitive condition, the
                                                    6.1l
                          peak current reached might be around 1000-1500 A, at 6-8 μs after turn-on. However, if the valve turns on
                          while its surge arrester is carrying current, the saturated stage carries on for much longer and can reach a
                          peak of 6-8 kA after about 10 μs. This event does not occur repetitively but can occur for 3-5 consecutive
                          cycles (the detection and tripping time of the converter AC breaker) in cases of severe AC-side temporary
                          overvoltage. It represents the most severe turn-on duty a HVDC thyristor has to withstand.
                                                            Valve
                                                            current
                                                                      0
                                                                                                                                                                    t
                                                                                                                                                      IdealÊthyristor
                                                                      3
                                                                                                                                                      RealÊthyristor
                                                       Thyristor      2
                                                       voltage
                                                       (volts)        0
                                                                      0
                                                                                                                                                                    t
                                                                                                    ʻSpreading lossʼ- typically a
                                                                                                    ÊfewÊjoules
                                                           Thyristor
                                                           power
          Fig. 6.1m– Illustration of the spreading        (=V.I)
          phase of a thyristor (note the much longer                  0
          time-scale in comparison with 6.1k)                                         0      1     2      3      4     5      6       7                             t(ms)
          Spreading losses generally amount only to a few Joules each cycle. Thus, they are not particularly important
          in the overall losses of a thyristor. Nevertheless, they need to be calculated as part of the declaration of
          power losses for the station.
                                                   di/dtÊdeterminedÊby
                                                                                               IdealÊthyristor
                                                   externalÊcircuit
                              I                                                                RealÊthyristor
                                                          TypicalÊsplit:
                                                        40%           60%
                              0
                                                                                                            t
                             Irr   PeakÊreverse
                                                                                ShadedÊareaÊ=Êstored
                                   currentÊ(Irr)
                                                                                chargeÊ(Qrr)
                                                       Reverse
                                                       recovery
                                                       timeÊ(trr)
          The total area under this curve represents the stored charge (Qrr) of the thyristor. Typically, about 40% of Qrr
          occurs before the peak of reverse current and 60% after it, although this varies from thyristor to thyristor.
                              6.1q
          Qrr and Irr are very important parameters that need to be known with a high accuracy so that the valve design
          may proceed. They are important for two main reasons:
               ➙	Irr, and to a lesser extent Qrr, greatly increase the commutation overshoot which occurs after the
                  thyristor turns off compared to an ideal thyristor. This effect is discussed in section 6.2
               ➙	The spread (tolerance) of Qrr (referred to as ∆Qrr) amongst the different thyristors in a valve has a huge
                  adverse effect on voltage sharing in the valve after turn-off, an effect which can persist for seconds
                  (easily long enough to last until the thyristors are next turned on again)
                                                                                                   Forward
                                                                                                   recovery
                                                                                                   failure
                                         IÊ(thy)
                                                                     Turn-off
                                                                     timeÊ(tq)                                 Externally
                                                                                                               imposed
                                                                                                               transient
                                         VÊ(thy)
Fig. 6.1r– Voltage and current across a thyristor with re-applied forward voltage
                          Most of GE Vernova’s HVDC valves have included a sophisticated forward recovery protection in which the
                          TCU provides forward recovery protection locally at each thyristor level and the thresholds of this protection
                          depend on the 6.1r
                                         junction temperature and rate of re-applied voltage (dv/dt).
ITSM
Current
                         0.7ÊVDRM
                                         TypicalÊconduction
                                           angleÊ=Ê330¡
                           Voltage
Fig. 6.1s– Idealized current, voltage and junction temperature for a single-cycle valve insulation fault
ITSM
                                         Current
                                                                                                                         OpenÊbreaker
                                                                                                                         here
                                                                         360                  720                 1080
                                                                                   TimeÊ(electricalÊdegrees)
                                                    TypicalÊconduction
                                                      angleÊ=Ê330¡
                                         Voltage
0.7ÊVDRM
Fig. 6.1t– Idealized current, voltage and junction temperature for a multiple-cycle valve insulation fault
                          potential as the thyristor cathode. The Thyristor Control Unit (TCU) has to get its energy from somewhere,
                          which is not easy at the very high voltages at which the valve operates. The TCU also contains around 90%
                          of the total component count in the valve, and therefore has an impact on the calculated reliability of the
                          valve, which must be taken into consideration when calculating redundancy requirements to meet the
                                                6.1trequirements.
                          overall system reliability
                          A Light-Triggered Thyristor (LTT) has no electrical connection to its gate, instead using a light guide to direct a
                          short pulse of infrared radiation from a laser onto a photosensitive region of the silicon in the gate area. The
                          optical pulse generates electron-hole pairs, which then perform the same function as the electrical current
                          pulse from a TCU (although a more sensitive amplifying gate is usually required, since the optical signal is
                          weaker than the current pulse from a TCU).
                          Since the LTT requires no electrical signal to turn it on, the laser and its power supply can conveniently be
                          located at ground potential in the Valve Base Electronics (VBE) cubicle.
                          Fig. 6.1u shows a LTT manufactured by Infineon Bipolar.
                          LTTs are not new; they have been in production for more than 20 years by several different manufacturers.
                          For high voltage applications such as HVDC, LTTs offer some advantages because of the great simplification
                          that is possible in terms of valve electronics. However, they still have a number of shortcomings. At the time
                          of writing, there are three principal shortcomings:
                              ➙	In HVDC, the TCU does much more than just turn the thyristor on in response to a control command.
                                  It also needs to turn the thyristor on autonomously during faults, in response to overvoltage, dv/dt
                                  etc. There is really no point in providing an LTT if the thyristor level still needs a separate electronics
                                  card to provide the protection functions. So in order to realise the full potential of the LTT, the device
                                  needs to include in-built protection for these aspects (a so-called “fully Self-Protected LTT”).
                              ➙	LTTs are significantly more expensive than ETTs. The differential cost of the LTT with respect to the
                                  ETT may be more than the cost of the gate electronics that it makes obsolete.
                              ➙	LTTs are at present only available from a very limited number of suppliers.
          LTTs with in-built protection are available today. VBO and dv/dt protection have been commercially available
          for more than 20 years but forward recovery protection has only become commercially available at a cost-
          effective price in the last few years, and the price premium compared with ETTs remains high.
          In addition, the in-built VBO level of an LTT is fixed, unlike the VBO level for an ETT which is determined by the
          TCU and can therefore be adjusted. The adjustability of the VBO level with an ETT allows the valve to operate
          in discontinuous current mode even when a thyristor level is operating on its VBO protection, a feature which
          is not available with an LTT.
                          6.2.2.2 Valve Circuit with Distributed                       Fig. 6.2.2.a– Basic (minimal) circuit of one
                          di/dt Reactors                                               thyristor level, with electrically-triggered
                          In this circuit, every thyristor level is an exact,          thyristors
                          miniature replica of a complete valve. In particular,
                          each thyristor level has its own (small) di/dt reactor (Fig. 6.2.2b).
                          An advantage of this circuit is that, because each di/dt 6.2.2a
                                                                                    reactor is very small, the circuit lends itself to a
                          very simple construction method for the reactor, in which it is easy and cheap to provide a center-tap.
                          The center tap is very useful for connecting a fast-grading capacitor, as will be discussed in later sections.
                          The disadvantages are that the component count, and hence the overall cost, is high. In addition, it can
                          make the mechanical design of the valve more complex.
                                                di/dt                                            TL
                                                reactor
                                                                                                 TCU
                                                                                                              Valve
                                                                   Cd                            TL
                                                                                                 TCU
                                                        Rdc       Rd
                                                                                                 TL
                      TCU
                                                                                                 TCU
di/dt reactor
TCU
                                                                                     Thyristor
                                                          TCU                        level
                                                                                                                 Valve
TCU
                                                                                                       VS
                                                          TCU
TCU
TCU
                                                                                               Frequency range
              Cause of voltage imbalance                                               50 Hz      Switching        Lightning
                                                                      DC                                                             Steep front
                                                                                       60 Hz       impulse          impulse
                 Damping capacitor tolerance
                  Damping resistor tolerance
                 DC grading resistor tolerance
                 Fast-grading cap* ⋅ tolerance
                 Valve section cap* ⋅ tolerance
                     di/dt reactor tolerance
                 Inductance of damping circuit
                        Stray capacitances
                Variations of water pipe length
                      ΔQrr - deblocked only
                        ΔID - blocked only
     * Where fitted
         = Very important effect /             = Some effect /   = Minor effect only
     Table 6.2.3a– Factors affecting voltage distribution in an HVDC valve
V1 V3 V5 V3ÊturnsÊon V4ÊturnsÊon
V4 V6 V2
                             MaximumÊContinuous
                             AppliedÊVoltageÊ(MCAV)
                              PeakÊContinuousÊAppliedÊ
                              VoltageÊ(PCAV)
                                                                                                                                          Secondary
                                                                                                                                          recovery
                                                                                                                                          transients
                                 Principal
                                 recovery
                                 transient
                                                              V4ÊturnsÊoff   V5ÊturnsÊoff   V6ÊturnsÊoff     V1ÊturnsÊoff
Fig. 6.2.3b– Definition of MCAV and PCAV for valve surge arrester
          6.2.5.1. Requirements
          To be effective in its main role as a voltage divider, the damping  6.2.4a
                                                                                  capacitor must have an extremely stable
          capacitance value – that is to say, the initial manufacturing tolerance must be very tight and there should
          be little or no drift over its life. An overall end-of-life tolerance of ± a few percent is required.
          6.2.6.1. Requirements                                                                                         +
          The damping resistor is a demanding application for                                                          Cd
          a power resistor, since not only is the total power
          dissipation very high (several kW) but virtually all of                                                      Rd
          this power comes in the form of short, high-energy                           TCU
          pulses (Fig. 6.2.6b).
          Note: the power dissipation is principally a function of the                    ∼1µs                                   Vthy
                                                                         V
          damping capacitor value and is almost independent of the                                                               VRd
          ohmic value of the damping resistor; the dissipation arising
          mainly from the abrupt voltage steps which occur during the
          off-state interval, as discussed later in section 6.2.11.1.                                 Exponential decay
                                                                                                      (time constant = Cd . Rd)
          Like the damping capacitor, the resistor also
          requires a close manufacturing tolerance and high                             O            10 µs        20 µs
                                                                                                                                    t
          stability. Although the damping capacitor plays the
          main role in ensuring voltage grading under normal
          conditions, for very fast transients the damping               I
          resistor becomes the dominant component and                                                 Peak current = Vthy /Rd
          hence it too needs to be matched to ± a few percent
          over its lifetime.
          The damping circuit, comprising the damping
          resistor, the damping capacitor and the associated
                                                                                        O            10 µs        20 µs
          interconnecting wiring, must have low stray                                                                               t
          inductance. The typical requirement is for the L/R                 Fig. 6.2.6a– Role of damping circuit in limiting
                                                                             discharge current at turn-on
          time constant to be ≤ 0.1 μs.
                                      VÊ(Rd)
                                                4
Ñ2
Ñ4
Ñ6
Fig. 6.2.6b– Typical pattern of voltage pulses across a damping resistor in normal HVDC operation
                          Thick-film resistors allow very low inductance and facilitate good heat transfer from the resistive substrate to
                          the coolant, but have limited capability to handle the high-energy pulses of power inherent to this application.
                          Wire-wound resistors are much better at coping with the pulse energy demands, but can be more difficult
                          to cool and tend to be more inductive.
                          Cooling can be indirect (the resistor is mounted on a separate water-cooled heatsink) or direct (coolant is
                          passed through ducts or channels that are an integral part of the resistor). Direct-cooled resistors tend to
                                             6.2.6b
                          give less short-time overload capacity (because the thermal capacity is lower) but are significantly more
                          compact and are therefore preferred in most modern HVDC valves.
                          Fig. 6.2.6c shows a design of a direct-cooled damping resistors used on recent HVDC valves.
          6.2.7.1. Requirements
          As with the damping components, close tolerance and high stability are
          important considerations. In its role of controlling DC voltage distribution
          the tolerance requirements are somewhat less onerous than for the damping
          capacitor but, when used as the top-end of a voltage divider, demands for
          accuracy in voltage measurement usually override this.
          In comparison to the damping resistor, the power dissipation rating of the DC
          grading resistor is quite modest, although with high voltage thyristors it still tends
          to be high enough to justify water-cooling. However, there is no pulse energy
          duty, unlike the damping resistor. This allows for a variety of different resistor
          technologies to be used.
          Failure mode is an important consideration, since a failure of a DC grading           Fig. 6.2.6c– Direct-cooled HVDC
          resistor to a short-circuit condition would be extremely dangerous (it would          damping resistors
          short-circuit the thyristor externally, potentially creating a fire risk). It is
          therefore essential that the DC grading resistor should fail only to an open-circuit condition.
                                                                 di-dtÊreactor                                                                  ReactorÊmustÊ
           ACÊsystem                  Stray                                                                    Oscillatory
                                                                                                  Thyristor                                     provideÊenough
           +Êconverter                capacitance                                                              dischargeÊdueÊto                 dampingÊto
                                                                                                  current
           transformer                                           Thyristor(s)                                  externalÊstray                   preventÊthyristor
                                  +
                                                                                 +                             capacitance       Damping        currentÊfrom
                                                                                     RC                                       circuitÊcurrent
                                                                                                                                                reachingÊzero
                                                                                     damping                                  ≈(V/R)eÊ(-t/RC)
                                                                                                                                                              OK
                                                                                     (snubber)
                                                                                     circuit                                  time
                                                                                                                                                    Dangerous!
           Fig. 6.2.9a– Discharge of external stray capacitance when valve turns on             Fig. 6.2.9b– Effect of di/dt reactor on valve
                                                                                                 current in first 10-20 μs
                                  Firstly, the peak voltage reached is substantially reduced. This means that only the Switching Impulse
                                  Protective Level (SIPL) of the valve arrester is relevant for calculating the minimum number of series
                                                                                                    6.2.9b
                                  connected thyristors required in a valve. Although the LIPL and STIPL are higher than the SIPL, the peak
                                  voltages experienced by the thyristors are lower because of the buffering effect provided by the reactor.
                         6.2.9a   Secondly, the dv/dt of the resulting voltage transient, as seen by the thyristors, is reduced. The
                                  principal protection against such an event is for the TCU to include a dv/dt-sensitive protective firing
                                  system which preemptively turns on the thyristor via its gate (which is safe), instead of allowing
                                  it to turn on spontaneously. However, if the valve relied only on dv/dt protective firing (and the
                                  di/dt reactor gave no buffering effect), spurious dv/dt firing could become a nuisance under some conditions.
                                  The buffering effect provided by the di/dt reactor allows the dv/dt protective firing threshold to be set at a
                                  level which does not interfere with the normal operation of the converter.
                                                                             FastÊ
                                                                             transient
                                                                             voltage
                                                                             source                                  RC
                                                                                                 VÊ(thy)             damping
                                                                                                                     circuits
             0        1ʵs            2ʵs         3ʵs     t
                               TotalÊappliedÊvoltage
                               VoltageÊacrossÊthyristors
Fig. 6.2.9c– Beneficial effect of di/dt reactor for suppressing dv/dt on thyristor
          than the maximum step current that the thyristor can tolerate.
          It is also important for the reactor to have a low value of equivalent parallel capacitance, as this capacitance
          reduces the effectiveness of the reactor in suppressing dv/dt.
          Lastly, the reactor must be designed to withstand short-circuit currents at least as great as those for
             6.2.9c
          which  the thyristors are rated. The main consideration here is not the heating effect of the current but the
          electromagnetic forces it generates.
          Overall, the di/dt reactor is a difficult component to optimize, as there are many conflicting parameters.
                            Thermal
                            compound                                          CoolingÊduct
                                                                Primary                                                   I
                              FerromagneticÊcore                conductor
                          The main disadvantage of the multi-turn reactor is that it requires substantial electrical insulation between
                          turns of the primary winding and from the winding to the cores. Hence, the construction is more complex
                          than for a single-turn reactor.
                          Fig. 6.2.9h shows a multi-turn reactor using this second approach, for the H450 valve design, in this
                          case using 6.2.9d
                                       six, 8.5 kV thyristors per valve section. The reactor shown is equivalent to more than
                          10 of the reactors shown in Fig. 6.2.9d.
B B
I I
                                                                           Cast resin
                                                                           insulation
              Ferromagnetic core Primary                                          Ferromagnetic core Primary
                                 conductor                                                           conductor
Fig. 6.2.9f– Multi-turn primary winding with winding fitted around cores
          magnetic core(s) of the inductor to provide the required damping (Fig. 6.2.9i (a)). Alternatively, the resistor
          may be a discrete, physical resistor connected externally to the inductor (Fig. 6.2.9i (b-e)). The resistor
          may be directly connected to the inductor (Fig. 6.2.9i (b and c)) or transformer-coupled (Fig. 6.2.9i (d and
          e)). In some cases the resistor may have a diode connected in series with it (Fig. 6.2.9i (c and e)) which
          disconnects the damping resistor during the rising part of the current waveform (so that the resistor does
                6.2.9f
          not allow a damaging step-current into the thyristor at turn-on) and only provides damping on the falling
          part of the current waveform.
          Each of the options in Fig. 6.2.9i is possible and has both advantages and disadvantages. In the interests
          of simplicity, the H300 and H400 valve series used the first option (using the naturally occurring damping
          due to eddy current losses in the core material). It has the big advantage that it does not require additional
          equipment which would need to be supported, electrically insulated and cooled.
                                              Primary
                    FerromagneticÊcore       conductor
                                                               B
                                                                       I
                                                                                               CastÊresin
                                                               CoolingÊduct                    insulation
          Fig. 6.2.9g– Multi-turn primary winding with cores fitted around winding
                                                                                 CouplingÊdiode                                                   CouplingÊdiode
                    EquivalentÊparallel                External                  External                            External                     External
                    resistanceÊofÊcores                damping                   damping                             damping                      damping
                                                       resistor                  resistor                            resistor                     resistor
                                                                                                     Multi-wayÊconnector
                                                                                                     toÊvoltageÊdivider
            HeatsinkÊforÊmain
            semiconductor                                                                            Fast-chargeÊcapacitor
            components
MainÊstorageÊcapacitor
                 Optical                                                                             InterferenceÊshieldÊover
                 components                                                                          FPGAÊandÊother
                                                                                                     sensitiveÊcomponents
          Since the resistors have a relatively high capacitance to the heatsink, a capacitor is connected in parallel
          with the DC grading resistor, of a value large enough to dominate over these parasitic capacitance
          effects. The high voltage capacitor and DC grading resistor together form a precision, high-bandwidth
          voltage divider. The divider generates high-precision outputs representing voltage and dv/dt to the TCU
          (Fig. 6.2.10c).
                                             6.2.10b
Voltage divider
                                                                              Thy
                                                                                                               Rd2               Rd1
dV/dt VAK
TCU
                                Firing &
                               databack
                                 fibres              Fig. 6.2.10c– Simplified circuit of thyristor level for H400 and H450 valves,
                                                     showing voltage divider
                          With Electrically Triggered Thyristors, relatively low-cost LEDs are suitable as the transmitting device, and
                          lasers are not required (although they were used on English Electric’s first thyristor valve in 1971). However,
                          this situation changes with LTTs.
10%
15% PV1
PV6
                                                                                                             PV7
                                                                                             60%
                                                   15%                                                       Others
Fig. 6.2.11a– Typical breakdown of valve losses at full load power, by category
PV3 Other conduction losses In the busbars and di/dt reactor primary conductors which cause them.
                                                                     – 55-65% (corresponding to the Qrr which occurs after peak reverse current) in
                                                                       the thyristor.
               PV7          Thyristor turn-off losses
                                                                     – Remainder mainly in the damping resistors but with some in the di/dt reactor
                                                                       cores.
                                              7%
                                     8%
                                                                                             Thyristor
                             15%
                                                                                             DampingÊresistor
                                                                                             di/dtÊreactor
                                                                       70%
                                                                                             Others
Fig. 6.2.11b– Typical breakdown of valve losses at full load power, by component
                                                                                                         StackedÊgrills
                                                                                                         andÊcoverÊplate
Fig. 6.2.11c– Thyristor heatsink designs from H300 and H400 HVDC valves
                          Although it was not immediately accepted by the industry, water-cooling of high voltage equipment is perfectly
                          safe as long as the water is ultra-pure. This is because very pure water is a good electrical insulator and only
                             6.2.11celectricity to any appreciable extent as a result of ionic contaminants (salts etc.).
                          conducts
                          A separate coolant circulating and purifying system provides the valve with very low-conductivity coolant.
                          The waste heat is rejected in outdoor coolers (see section 6.3).
                          Water-cooling is always provided for the thyristors and damping resistors, and usually also for the di/dt reactor
                          and DC grading resistor. These components are at a multitude of different electrical potentials and hence the
                          distribution of the water coolant within the valve needs to be done with insulating plastic pipes.
                          The water-cooling circuit needs to be designed with care, in order to ensure that the system provides adequate
                          flow rates in all critical areas, avoiding excessively high flow rates that could cause erosion, or low flow-rates
                          that lead to accumulation of gas pockets.
                          The most important objective of the cooling system is to minimize the value of thermal impedance from
                          the thyristor junction to the coolant liquid. In this way, the thyristor junction temperature is minimized for
                          a given power dissipation. However, although minimizing thyristor junction temperature is important, it is
                          not sufficient. It is also important to ensure that all thyristors within a valve have similar values of junction
                          temperature. This is because thyristors have many temperature-dependent characteristics (not least, Qrr)
                          and matched temperatures mean more closely matched characteristics, which is an important requirement
                          when many thyristors are operated in series.
                          Ultra-pure water has very low conductivity, but the conductivity is never zero because the H2O molecules
                          dissociate into H+ and OH– ions at a rate dependent on temperature. There is therefore a small residual
                          conductivity, of the order of 0.05 μS/cm, which cannot be eliminated.
AluminumÊheatsink
PEXÊhose
StainlessÊsteelÊelectrode
                                            ConverterÊtransformerÊvalveÊwinding
                                            (shownÊwithÊstarÊconnection)
Xc
Xc
Xc
                                                               2 . VLLÊ(PK)Ê VLLÊ(PK)Ê
                                            PeakÊcurrent*: IPK=Ê            =
                                                                 2 . XC        XC
                                            PeakÊrecoveryÊvoltage:ÊVrecÊ=ÊVLLÊ(PK)
                                            *
                                             *
                                             neglectingÊdamping
                          protection system does not respond sufficiently quickly, the third valve on the same row (shown in blue)
                          may also feed into the fault.
                          Under the worst possible conditions, this gives rise to a damped offset cosine-wave fault current whose
                                         6.2.11eover 10 times the normal DC current Id (the amplitude of fault current is given
                          amplitude is typically
                          approximately by I f = 2 ⋅ Id/Xc, where Xc is the per-unit commutating reactance). The current can be
                          approximately modeled as a damped offset cosine function.
                          Normally, the protection system will try to suppress this fault by blocking the forward-feeding valve at the
                          earliest available opportunity (the end of the first cycle of current). This gives rise to a single-cycle fault
                          current followed by two or three cycles of AC voltage until the converter breaker opens. The most stressful
                          point for the thyristor is normally the first forward peak of recovery voltage, 1¼ cycles after fault initiation.
                          At this point the thyristor is still very hot and may have reduced forward voltage withstand capability.
                          Occasionally however, other protections may intervene and prevent the valve from blocking at this point.
                          The fault then becomes a repetitive event, with three or four cycles of fault current terminated by breaker
                          opening. The most stressful point for the thyristor is normally the commutation overshoot at the end of
                          the penultimate cycle of current. At this point the thyristor is still very hot (even hotter than for the single-
                          cycle fault) and may have reduced reverse voltage withstand capability.
                                                                                                ValveÊvoltage
                                                                          opens                                            angleÊ=Ê330¡                          opens
          ValveÊvoltage
                                     angleÊ=Ê330¡
                                                                           here                                                                                   here
                                                                                                                                                             Maximum
                                                                                                                                                              stress
          JunctionÊtemperature
JunctionÊtemperature
          Fig. 6.2.11f– Valve voltage, current and junction temperatures resulting from a fault across a valve: single-cycle (left)
          and multiple-cycle (right)
          The clamping system must apply this force without creating a short-circuit between the two sides of the
          thyristor, so it is not possible simply to use a clamping bolt. The technique used on the H300 and H400
              6.2.11f
          valves is to use tension bands made of a high-performance composite material (glass-reinforced plastic)
          with a load-spreader and disc springs at each end.
          The disc springs, and the natural flexibility of the tension band itself, give the required compliance, which
          allows the clamping system to keep the clamping force within the specified limits while allowing for thermal
          expansion and contraction effects.
                                                                                  ClampingÊforceÊ≈ 135ÊkN
                                                                                  forÊ125ÊmmÊthyristor
                                                                                   Thyristor
                                                    DiscÊspring
                                                                                                                                   GRPÊtensionÊband
                                                                                          Heatsink
                          As a minimum, it is normal to fit two thyristor valves (from the same AC phase of the same 6-pulse bridge)
                          into an MVU, making a double-valve. In this way, the insulating support structure is shared between the
                          two valves. Each pole then contains six such double valves, three for the lower 6-pulse bridge and three for
                          the higher 6-pulse bridge, one possible arrangement of which is illustrated in Fig. 6.2.12d.
                          The double-valve structure is commonly used for very high voltage HVDC schemes where single-phase,
                          two-winding converter transformers are used, because the size of these transformers dictates the size of
                          the valve hall.
                          On lower-voltage HVDC schemes, a more common arrangement is with four valves associated with the
                          same AC phase stacked vertically into quadrivalve structures; three such quadrivalves being required at
                          each end of each pole (see Fig. 6.2.12e). The quadrivalve arrangement decreases the area of the valve hall,
                          but makes the valve hall taller.
                          The MVU structure can be very large; typically 6 m × 4 m × 10 m tall. Fig. 6.2.12f shows a typical suspended
                          Multiple Valve Unit. Suspended designs are common today because of the lower cost of structural
                          components2.
                                                            ValveÊsupportÊexposedÊtoÊ50%
                                                            ofÊratedÊpoleÊDCÊvoltage
DCÊneutralÊ HVDC
                          ValveÊsupportÊexposedÊonlyÊ
                            toÊDCÊneutralÊpotential                                  DCÊneutral                                            TopÊstressÊshield
                                                                                                        Module                Module
                                                           DC
                                                           Neutral                                      Module                Module
                                                                                           AC
                                                                                         (Delta)        Module                Module
                                                            0.5ÊVdc
                                                                                   DCÊmidpoint                                             CenterÊstressÊshield
                                                                                                        Module                Module
                                                            HVDC
                                       Vdc                                                              Module                Module
                                                                                            AC
                                                                                          (Star)        Module                Module
                                                                                         HVDC                                              BottomÊstressÊshield
           Fig. 6.2.12e– 12-pulse group of valves
           implemented as quadrivalves                                         Fig. 6.2.12f– Typical suspended MVU for HVDC
               6.2.12e              if it is excited by ground movements of sufficiently low frequency (<1 Hz) then very large displacements can
                                    result. The problem is therefore one of ensuring that electrical clearances in the valve hall remain sufficient.
                                    These issues are illustrated in Fig. 6.2.12h.
                                    For either approach, a detailed Finite Element Analysis (FEA) of the valve structure is required.
                                    Thyristor valves need comprehensive testing: both routine testing in the factory and type testing on new
                                    designs. The type testing in particular is very specialized and complicated.
                                2 – It is a misconception that suspending the valve from the ceiling solves all problems in seismic applications. The truth is that
                                the suspended design presents a different and generally more manageable set of challenges than a floor-mounted design.
BACK TO         326   |         DC Transmission Systems: Line Commutated Converters
CHAPTER
          Fig. 6.2.12g– External corona profiling of H400 HVDC valves
                                                                                                            StressÊshield
                                                                                                             StressÊshield   StressÊshield
                                                                                                                              StressÊshield
                    Movement
                     Movement
                    ofÊvalveÊduring
                     ofÊvalveÊduring                                                                          Module
                                                                                                               Module          Module
                                                                                                                                Module
                    earthquake
                     earthquake
                                         StressÊshield
                                          StressÊshield    StressÊshield
                                                            StressÊshield                                     Module
                                                                                                               Module          Module
                                                                                                                                Module
                                           Module
                                            Module           Module
                                                              Module                                          Module
                                                                                                               Module          Module
                                                                                                                                Module
                                           Module
                                            Module           Module
                                                              Module                                        StressÊshield
                                                                                                             StressÊshield   StressÊshield
                                                                                                                              StressÊshield
                                                                                     Movement
                                                                                      Movement
                                           Module
                                            Module           Module
                                                              Module                 ofÊvalveÊduring
                                                                                      ofÊvalveÊduring
                                                                                     earthquake
                                                                                      earthquake              Module
                                                                                                               Module          Module
                                                                                                                                Module
                                         StressÊshield
                                          StressÊshield    StressÊshield
                                                            StressÊshield                                     Module
                                                                                                               Module          Module
                                                                                                                                Module
                                           Module
                                            Module           Module
                                                              Module                                          Module
                                                                                                               Module          Module
                                                                                                                                Module
                       Excessive
                        Excessive          Module
                                            Module           Module
                                                              Module                                        StressÊshield
                                                                                                             StressÊshield   StressÊshield
                                                                                                                              StressÊshield
                       bendingÊstress
                        bendingÊstress
                       onÊinsulatorsÊ
                        onÊinsulatorsÊ     Module
                                            Module           Module
                                                              Module
                                                                                  ExcessiveÊdisplacement,
                                                                                 ExcessiveÊdisplacement,
                                                                                  potentiallyÊviolating
                                                                                 potentiallyÊviolating
                                         StressÊshield
                                          StressÊshield    StressÊshield
                                                            StressÊshield
                                                                                  electricalÊclearances
                                                                                 electricalÊclearances
Fig. 6.2.12h– Typical response of a floor-mounted (left) and suspended valve (right) during an earthquake event
          Dielectric tests are aimed essentially at verifying that the thyristor valve can support the voltage (and dv/
          dt) applied across it. They appear, superficially, to be quite similar to the dielectric tests performed on most
          conventional electrical equipment. However, their apparent similarity to conventional equipment tests
          belies the fact that they can still be quite difficult tests to perform on a thyristor valve.
              6.2.12h
               6.2.12h
          Dielectric tests fall into three sub-categories:
          (a) Tests on the valve support
          (b) Tests between valve terminals
          (c) Tests on a multiple valve unit (see Fig. 6.2.13a)
                                                                  On-state:
                                                                  • Peak current
                                                                                                              Turn-on:
                                                                  • Rms current
                                                                                                              • ∆V
                                                                                                              • di/dt
                            Valve                                                                             • Stray capacitance
                            voltage                                                Turn-off:
                                                                                   • Prospective ∆V
                            Valve                                                  • di/dt
                            current                                                • Stray capacitance
                                                     Off-state:
                                                     • Σ(∆V)2
Fig. 6.2.13b– Important factors for periodic firing and extinction tests
                          The surge injection circuit, consisting of an impulse generator and triggered spark gap, is used to perform the
                          ‘positive voltage transient during recovery’ tests, which demonstrate the turn-off time of the thyristor and the
                          correct action of the forward recovery protection.
                                      6.2.13b
                          Fig. 6.2.13e shows, in idealized form, the voltage and current waveforms obtained from the high current
                          and high voltage circuits. Although all the voltage applied to the test object comes from the high voltage
                          circuit, the current in the test object comes from both the high current and high voltage circuits.
                          Although the synthetic test circuit has enabled large sections of thyristor valves to be tested under
                          realistic voltage and current conditions, including at frequencies different to the local grid frequency, the
                          voltage and current waveforms it produces are not fully representative of those experienced by a valve
                          in service. In that respect, the 6-pulse back to back test circuit was better, although it was not perfect
                          and its limitations of power rating and the inability to operate at a frequency other than the local supply
                          frequency were major drawbacks.
Impulse
HI HV
Fig. 6.2.13c– 6-pulse back-to-back circuit (left) and synthetic test circuit (right)
                                                                                                                                        DC3
                                                                                                                                  +
                              STATCOM          V2                                                                        V5
                                                                                 L1A         V3             L2                          L6
+ DC2
L3 +
                              C3
                                              V1X        V1
                                                                                                      V4
                    DC1                                                                                          C1A
Fig. 6.2.13d– A synthetic test circuit for periodic firing and extinction tests
          For this reason, when GE Vernova decided to build a brand new Valve Test Facility, a different path was
          taken 6.2.13d
                and GE Vernova once again found itself in the role of pioneer.
          The new test facility inaugurated in 2019 operates on a quite different principle [12], which combines the
          advantages of both of the previous methods: instead of using separate, interleaved high-voltage and high-
          current sources, the new facility derives both the high voltage and high current from a single, high-power
          Voltage-Sourced Converter (VSC). The VSC uses four parallel-connected branches of 48 “Full-Bridge” VSC
          submodules connected in series as shown on Fig. 6.2.13f. the VSC submodules are operated, in effect, as
          a “programmable voltage source”.
          With the new test circuit it is possible to reproduce the off-state voltage and on-state current waveforms
          of the valve with exceptional accuracy. Fig. 6.2.13g illustrates the valve voltage and current waveforms
          that can be obtained with the test circuit. As can be seen, the results are very close to those applicable
          to real operation in inverter mode.
          The new facility can, in addition, also perform all the other required operational tests including operation
          in intermittent direct current and the application of fast voltage impulses during the recovery interval of an
          inverter valve.
          b. Overcurrent Tests
          For HVDC valves, the overcurrent test proves that the valve can safely survive the very large fault current,
          and subsequent recovery voltage, that results from a short-circuit across one valve in the bridge (see
          section 6.2.11.6). With large, modern thyristors, this typically gives a fault current of 40-50 kA peak. At
          the end of the fault current, the test object may be required to block forward and/or reverse voltages of
          several tens of kV.
          For the overcurrent tests, the test circuit can be a fairly conventional high power test circuit similar to that
          used for testing circuit breakers.
V1(HIÊcircuit) V1(HVÊcircuit)
                                                                                                RealisticÊdi/dtÊat
                             I                                                                turn-onÊandÊturn-off
Êt
                                              ÊV1                    ÊC1A
                                                                                                                                   Peak
                                                                                                                                   firing
                                                                                                                                   voltage
                                                                                                                                   PFV
                           ÊV
                                                                                                                              Êt
                                                                                                                                   Prospective
                                                                                                                                   recovery
                                                                                                                                   voltage
                                                                                                                                   PRV
Fig. 6.2.13e– Voltage and current waveforms for synthetic test circuit
Fig. 6.2.13f– Schematic view of new test circuit for operational tests
Fig. 6.2.13g – Voltage and current waveforms from the new test circuit in inverter mode
                          6.2.14.3. Fire
                          Great care must be taken to minimize the risk of fire since unless adequate precautions are taken thyristor
                          valves can be very vulnerable to fire. Between 1989 and 1993, three high-profile incidents on HVDC projects
                          built by other manufacturers [13] resulted in complete thyristor quadrivalves being destroyed by fire.
                          GE Vernova’s HVDC valve designs have always used materials of low flammability and care has been taken to
                          avoid the events which could lead to a fire in the first instance. This means generously rating all components
                          for the worst conditions they can be expected to encounter.
                          Choice of materials is also very important. Virtually any material will burn if given an adequate supply of oxygen
                          and sufficient heat input. However, the key requirement is that the material must be self-extinguishing, that
                          is to say that it may burn if subjected to heat input, but that the flames will extinguish when the heat source
                          is removed. The applicable standard is Underwriters Laboratory (UL) 94, which has several classifications, of
                          which the most onerous is V0.
                          Some older valve designs used oil-impregnated capacitors. The oil in these capacitors represents a source of
                          fuel which could leak out and, once ignited, continue to supply heat for many minutes. From the H400 valve
                          onwards, these oil-filled capacitors have been replaced by dry capacitors.
                                                                                      Dp
                                                                                                                                                                                 Thyristor
                                                                                                         Cm               Cm                                                      valves
                                                                                                                               Nitrogen
                                                                                                                               bottle(s)
                                                                                                                                                     Exp.Êtank
                                                                                                                                                                     L
                                                                                                                               F
                                                                                Main
                                                                              deioniser         Filter            Cm
                                                                             Make-up                              Cm
                                                                                                Deioniser                 Filter
                                                                              pump
                                                                   MakeÊup
                                                                    tank
                                                                             P                                                                   P               T
                                                   3-wayÊvalves
                                                                                                                                     Degassing
                                                                                                          MainÊpumps
                                                                                                                                       tank
                                                   (1Êredundant)                                                                                                             F
                                                                                                          (1Êredundant)
                           KeyÊtoÊsensors
                             T     Temperature                                   Cm        Conductivity
                             F     Flow                                          P         Pressure
                             L     Level                                         Dp        DifferentialÊpressure
Fig. 6.3a– Typical HVDC cooling plant flow diagram – main circuit
          Thyristor valves require very little maintenance. Normally, a shutdown every year or two is acceptable, during
          which time the operations that are typically performed are:
             ➙	6.3a
                 Replacing failed components
             ➙	Cleaning external surfaces of highly-stressed insulation: for example the inter-tier insulators and water
                 pipes
          When a thyristor needs to be replaced, a purpose-built thyristor changing kit is used. Typically this comprises
          two tools: a primary hydraulic loading tool which pressurizes the clamped assembly, and a spreader tool to
          separate the heatsinks either side of the failed thyristor.
                          6.3.1. Coolant
                          The cooling system uses pure de-ionized water or (where freezing conditions can occur) a water/glycol
                          mixture, for the coolant. General-Purpose Reagent grade (GPR) ethylene glycol is specified with no additives.
                          It also has a very low conductivity (0.3 µS/cm or better) and a very low level of impurities (1% or less).
                          Propylene glycol can be used as alternative to ethylene glycol. Propylene glycol is less toxic than ethylene
                          glycol but is more difficult to use in very cold climates because the viscosity increases more rapidly at low
                          temperatures than that of ethylene glycol.
                          6.3.2. Filtering
                          A full flow filter is typically included in the main cooling circuit before the thyristor valves, to prevent debris
                          trapped in the system from entering the thyristor valves. The filter may be fitted with a full flow bypass
                          circuit to allow the replacement/cleaning of the filter basket while the system is in operation. A differential
                          pressure switch positioned across the filter will indicate a blockage in the filter basket.
                          6.3.3. De-Ionization
                          The main de-ionizer system is typically a secondary circuit off the main circuit. A small percentage of the
                          main flow is passed through the main de-ionizer cylinder to maintain the conductivity of the coolant below
                          a set limit. This circuit also contains a fine filter on the outlet side, a flow detection sensor and conductivity
                          meter to monitor the coolant leaving the de-ionizer system before it re-enters the main system.
                          6.3.6. Coolers
                          The coolant is generally circulated from the pumps to the cooler units located outside. These coolers can
                          be of a variety of different types, depending on environmental conditions and customer preferences:
                              ➙	Dry air-blast coolers (the most common type)
                              ➙	Air-blast coolers with supplementary spray cooling
                              ➙	Evaporative coolers
                              ➙	Water-to-water heat exchangers, where a secondary (raw) cooling water circuit exists
          6.3.9. Control
          The cooling plant controller is typically PLC based and controls the inlet temperature to be between 20°C
          and 60°C, with a target temperature adjustable between 25°C and 55°C. The controller controls the fans
          and the position of the motorized bypass valve so that this is achieved. The controller evens out the duty
          of the pumps by rotating the duty of the pumps on a periodic basis.
          A display is provided that enables the plant to be controlled automatically or manually and gives analog and
          status information as well as alarm information. Typically, three different modes of control are provided: full
          automatic, manual via the PLC and manual via control switches.
          6.3.10. Instrumentation
          Typically, the instruments, gauges, sensors and switches, listed in Table 6.3a are provided at the locations
          shown in Fig. 6.3a:
          6.3.11. Alarms
          Individual alarms are displayed on the local control point. The following local alarms are typically provided
          as a minimum.
Idc
                                                                                                      Upper
                                                                                                      6-pulse bridge
                                               AC system
                                                              Filter
                                                                                                      DC system
                                                                   Transformer
                                                                   bank                               Lower
                                                                                                      6-pulse bridge
                                                                                                      Lower
                                                                                                      6-pulse bridge
                                               AC system
                                                              Filter
                                                                                                      DC system
                                                                   Transformer
                                                                   bank                               Upper
                                                                                                      6-pulse bridge
Idc
Fig. 6.4a– Typical 12-pulse bridge schematic, shown for a bipolar scheme
                                     -1.0
                                                                                                         b
                                     -2.0
                                     -3.0
                                     -4.0
                                                                 transformerÊsecondaryÊ(d)ÊL-LÊvoltage
                                       2.0                               a
                                       1.5
                                       1.0
                                       0.5                                             b
                       p.u.
                                       0.0
                                     -0.5
                                      -1.0
                                      -1.5
                                      -2.0
                                                                 transformerÊsecondaryÊ(s)ÊL-LÊvoltage
                                      2.0
                                                                                 a
                                      1.5
                                      1.0
                                      0.5                                     b
                       p.u.
                                      0.0
                                     -0.5
                                     -1.0
                                     -1.5
                                     -2.0
          Fig. 6.4b– Valve winding voltage waveforms
                                                    6.4b
           LineÊregulatingÊwinding
                                                                                                                                                  LineÊregulatingÊwinding
                                                     ValveÊwinding
                                                                                                             ValveÊwinding
                                     LineÊwinding
LineÊwinding
CoreÊlimb CoreÊlimb
ValveÊwindingÊnextÊtoÊcoreÊlimb LineÊregulatingÊwindingÊnextÊtoÊcoreÊlimb
                                                                                                                                2.175e+007Ê:Ê>2.289e+007
                                                                                                                                2.060e+007Ê:Ê2.175e+007
                                                      WindingÊendÊpressboard                                                    1.946e+007Ê:Ê2.060e+007
                            TopÊclampingÊplatform
                                                      insulationÊstructure                                                      1.831e+007Ê:Ê1.946e+007
                                                                                                                                1.717e+007Ê:Ê1.831e+007
                    AngleÊring                                                                                                  1.602e+007Ê:Ê1.717e+007
                                                                                                                                1.488e+007Ê:Ê1.602e+007
                                                          BoxÊring
                                                                                                                                1.373e+007Ê:Ê1.488e+007
                                                                                                                                1.259e+007Ê:Ê1.373e+007
                                                                                                                                1.144e+007Ê:Ê1.259e+007
           Core
                                                                                                                                1.030e+007Ê:Ê1.144e+007
                                  ShieldÊring                                                                                   9.156e+006Ê:Ê1.130e+007
                                                                               ShieldÊring                                      8.011e+006Ê:Ê9.156e+006
                                                                                                                                6.867e+006Ê:Ê8.011e+006
                                                                                                                                5.722e+006Ê:Ê6.867e+006
                                 ValveÊwinding                             LineÊwinding                                         4.578e+006Ê:Ê5.722e+006
                                                                                                                                3.433e+006Ê:Ê4.578e+006
                                                                                                                                2.289e+006Ê:Ê3.433e+006
                                                                                                                                1.144e+006Ê:Ê2.289e+006
                                                                                                                                <0.000e+000Ê:Ê1.144e+006
                                                                                                                         DensityÊplotÊ:ÊIÊEÊI,ÊV/m
                                   A wide variation of voltage output is required from a converter transformer to allow flexible control of power
                                   flows and therefore regulating (tap) windings are an essential provision. The converter transformer may be
                                   required to provide voltage ratio increments of less than 1.25%, with a total tapping range of up to 40%. In
                                   addition to an AC voltage superimposed on a DC voltage level, other transient or short time stresses can be
                                   imposed on the valve windings as a result of converter operations and faults.
           6.4.1d                  These include:
                                      ➙	Normal converter control operations, such as blocking and starting of power transmission
                                      ➙	Polarity reversal of the converter bridge DC voltage during line faults
                                      ➙	External overvoltages such as lightning strikes to the DC line, induced overvoltages in the healthy
                                          pole during ground faults on the other pole and from the AC side via transformed overvoltages
                                      ➙	Power reversal carried out by reversing the DC voltage for long time operation in this condition
BACK TO           340   |     DC Transmission Systems: Line Commutated Converters
CHAPTER
          6.4.1. Insulation Design
          The insulation structure must be designed to be suitable for both the combined AC and DC service voltages
          and the various test voltages applied during Factory Acceptance Testing. Testing consists of both normal
          AC testing of the transformers such as AC power frequency, lightning impulse and switching impulse, but
          also includes additional testing with DC withstand voltage, polarity reversal voltage testing and extended
          AC withstand voltage associated with the valve windings.
                                                                                                                       1.426e+007Ê:Ê>1.501e+007
                                                                                                                       1.351e+007Ê:Ê1.426e+007
                                                                                                                       1.276e+007Ê:Ê1.351e+007
                                                                                                                       1.201e+007Ê:Ê1.276e+007
                                                                                                                       1.126e+007Ê:Ê1.201e+007
                                                                                                                       1.051e+007Ê:Ê1.126e+007
                                                                                                                       9.758e+006Ê:Ê1.051e+007
                                                                                                                       9.007e+006Ê:Ê9.758e+006
                                                                                                                       8.257e+006Ê:Ê9.007e+006
                                                                                                                       7.506e+006Ê:Ê8.257e+006
      Core
                                                                                                                       6.755e+006Ê:Ê7.506e+006
                                                                                                                       6.005e+006Ê:Ê6.755e+006
                                ShieldÊring
                                                                      ShieldÊring                                      5.254e+006Ê:Ê6.005e+006
                                                                                                                       4.504e+006Ê:Ê5.254e+006
                                                                                                                       3.753e+006Ê:Ê4.504e+006
                              ValveÊwinding                          LineÊwinding                                      3.002e+006Ê:Ê3.753e+006
                                                                                                                       2.252e+006Ê:Ê3.002e+006
                                                                                                                       1.501e+006Ê:Ê2.252e+006
                                                                                                                       7.506e+005Ê:Ê1.501e+006
                                                                                                                       <0.000e+000Ê:Ê7.506e+005
                                                                                                                DensityÊplotÊ:ÊIÊEÊI,ÊV/m
                                                                                                                       2.175e+007Ê:Ê>2.289e+007
                                                                                                                       2.060e+007Ê:Ê2.175e+007
                                                                                                                       1.946e+007Ê:Ê2.060e+007
                                                                                                                       1.831e+007Ê:Ê1.946e+007
                                                                                                                       1.717e+007Ê:Ê1.831e+007
          6.4.1e                                                                                                       1.602e+007Ê:Ê1.717e+007
                                                                                                                       1.488e+007Ê:Ê1.602e+007
                                                                                                                       1.373e+007Ê:Ê1.488e+007
                                                                                                                       1.259e+007Ê:Ê1.373e+007
                                                                                                                       1.144e+007Ê:Ê1.259e+007
      Core
                                                                                                                       1.030e+007Ê:Ê1.144e+007
                                                                                                                       9.156e+006Ê:Ê1.030e+007
                               StressÊring                                                                             8.011e+006Ê:Ê9.156e+006
                                                                      StressÊring
                                                                                                                       6.867e+006Ê:Ê8.011e+006
                                                                                                                       5.722e+006Ê:Ê6.867e+006
                              ValveÊwinding                          LineÊwinding                                      4.578e+006Ê:Ê5.722e+006
                                                                                                                       3.433e+006Ê:Ê4.578e+006
                                                                                                                       2.289e+006Ê:Ê3.433e+006
                                                                                                                       1.144e+006Ê:Ê2.289e+006
                                                                                                                       <0.000e+000Ê:Ê1.144e+006
                                                                                                                DensityÊplotÊ:ÊIÊEÊI,ÊV/m
       At the start of a DC voltage test, on applying DC voltage, the highest voltage stress is in the oil. With time,
       charge migration transfers the stress concentrations to the solid insulation, and within a length of time
       and certainly by the end of the 2 hour applied DC withstand test, the majority (approximately 95%) of the
       voltage appears across the solid insulation. Considerably more insulation (paper and pressboard) is required
       to accommodate the DC stresses than is needed for the equivalent AC insulation structure. Valve windings
       have a large number of insulating angle rings and box rings at the winding ends to help distribute DC
      6.4.1f
       stresses evenly and reduce the voltage gradients at the termination points of solid insulation components
       as shown in the cross section view of a typical 300 kVdc level winding arrangement in Fig. 6.4.1d.
BACK TO                                                                             DC Transmission Systems: Line Commutated Converters           |   341
CHAPTER
          6| HVDC CONVERTER STATION EQUIPMENT
                          The minimum clearances between windings are generally set to give an intrinsically safe average equivalent
                          oil stress based on combined AC and DC working voltages. The test conditions are carefully checked and the
                          insulation structure is verified by a series of Finite Element Method (FEM) studies for AC, DC and polarity
                          reversal test conditions.
                          The inter-winding insulation structure typically consists of a series of radially disposed pressboard cylinders
                          interspersed with oil gaps, whilst the end insulation structure comprises alternate angle rings or box rings,
                          again interspersed with oil gaps.
                                                              20
                                                                       StressÊlevelÊdueÊto              HigherÊstressÊlevelÊon
                                                                       initialÊcapacitive               polarityÊreversalÊdueÊto
                                                                       distribution                     existingÊspaceÊcharge
                                                              15
                           ElectricalÊstressÊlevelÊinÊkV/mm
10
                                                                       StressÊmigratesÊinto       Polarity
                                                                       pressboard                 reversal
                                                              0
                                                                   0                          5                     10                 15   20ÊxÊ103
                                                                                                             ElapsedÊtimeÊinÊseconds
                          The voltage distribution in the transformer insulation differs significantly between AC/transient applications
                          and DC applications. The AC (power frequency and impulse) distribution is governed by the relative permittivity
                                 6.4.1g
                          of the component insulation materials, which vary over only a narrow range of:
                              ➙	2.8 for the structure that makes up the oil gaps
                              ➙	3.6 for oil impregnated paper
                              ➙	4.2 for oil impregnated pressboard
                              ➙	2.2 for the oil
                          On the other hand, the steady-state DC distribution is governed by the ratio of resistivities of the component
                          insulation materials, which is of the order of 10:1 at 20°C and can increase ten or one hundredfold as the oil
                          temperature rises to 100°C or more. The DC stress is also sensitive to changes in the voltage stress, moisture
                          content, ageing and effects of impurities, in addition to the temperature effects.
                          The transient performance may be affected by pre-stress conditions and by any stored space charge,
                          particularly when polarity reversal occurs. Therefore the design of the insulation structure for a converter
                          transformer is much more complex than for a normal power transformer which is not subject to the DC
                          component of voltage.
                          The modulus of the stress distribution in an oil duct within a barrier insulation structure is shown in
                          Fig. 6.4.1g below for a standard double polarity reversal test. The stress rises to a value related to the
                          capacitive distribution during the application of the initial voltage but then gradually falls as the space
                          charge migrates from the oil into the solid pressboard insulation. It then increases again on each reversal
                          of the applied voltage, and because of the existing space charge, it actually attains a much higher value
                          (approaching twice) than that of the stress appearing at the initial application of voltage. The insulation
                          design must take these enhanced stresses into account.
          6.4.3. Connections
          The connections between discrete parts of the windings out to the bushings, often referred to as cleat
          bars, are critical to the operation of the HVDC converter transformer and, as with the winding insulation
          structures - because of the presence of DC voltages - require more complex insulation structures than for
          an AC power transformer.
          The HV (line) winding connection, which could be 1550 kV BIL class for example, may have to emerge from an
          inner winding of the assembly of windings. The electrode form presented by the connection is very important
          and it is likely that for this application, a tube of about 100 mm diameter would be selected. This tube has
          to be insulated with respect to the core and the metallic support framework for the core as it leaves the
                                                                                   LineÊwinding
                                                                                   HVÊleadÊexit
                                                                                     PaperÊcovered
                                                                                     copperÊtube
                                                                                             PressboardÊbox
                                                                                             ringsÊwithÊexitÊsnouts
                            RegulatingÊwinding
                                                                   ValveÊwinding
                                                 LineÊwinding
                                                                                          PaperÊcovered
                                                                                          copperÊtube
Fig. 6.4.3a– Winding assembly cross section showing external valve winding lead exit
                                                     Transformer                                                                     ValveÊhallÊwall
                                                     tankÊwall
                                                                                             TransformerÊbushingÊturret
                                                                   DCÊinsulationÊstructure
                                                                   coronaÊshield                                                                           Bushing
                                   Transformer                                                                                                             current
                                   internalÊcleat                                                                                                          transformers
                                   barÊfrom
                                   winding
ValveÊbushing
                                    Pressboard
                                    support
                                    boards
                                                                    DCÊinsulationÊstructure
                                                                    (pressboardÊcylinderÊarrangement)          CurrentÊtransformer
                                                                                                               terminalÊbox
Fig. 6.4.3b– Typical DC structure for DC field transfer between transformer cleat bar and bushing (285 kVdc)
                          electrostatic protection afforded by the winding, and then must pass over or under other windings, including
                          the valve winding, before reaching the open oil volume of the transformer tank. Not only will this lead have
                          to 6.4.3b
                             be insulated for 1550 kV to earth (core, core frames, etc.) but it will inevitably cut through the various end
                          insulation structures that have to be adapted to permit passage of the connection without reduction of the
                          insulation integrity of either winding or the connection. In conjunction with the connection electrode, this is
                          accomplished by using a series of especially shaped insulating sleeves, snouts and elbows that interlace with
                          the angle and box rings that make up the winding end insulation structures.
                          The connection to the outer valve winding could be brought out from the face of the coil and use shaped
                          insulation pieces, as described above, that will interlace with the pressboard cylinders that form the HVDC
                          insulation structure between the windings and the tank. As noted previously, the DC stress is concentrated in
MainÊtankÊoil
                                               PressboardÊFaltenbalg
                                               structure                                                BushingÊstem
                                                                                                        connector
ValveÊbushing
                               PaperÊcovered
                               copperÊtube
                                                           Multilam                                         BushingÊturretÊoil
                                                           connectors
Fig. 6.4.3c– Typical Faltenbalg layout to provide separation of turret oil from main tank oil
                               Tap
                             changer
                                                                 Paper
                                                               insulated
                                                               cleat bar
Core
                                                                                        Line regulating
                                                                                           windings
                                                         Tank base
Fig. 6.4.3d– Valve winding cleat bar for 3-phase, 2-winding transformer, delta connection
                     6.4.3d                                                                     Tapchanger
                                                                                             diverter chamber
                            Regulating
                             windings
                                                                     HV line entry
                                 Regulating winding                                                       Tapchanger
                                    connections                                                             selector
Fig. 6.4.3e– Line side cleat bar for 3-phase, 2-winding transformer, star connection
BACK TO              6.4.3e
                                                                                     DC Transmission Systems: Line Commutated Converters   |   345
CHAPTER
          6| HVDC CONVERTER STATION EQUIPMENT
                          the cellulose insulation material and therefore a sufficient total thickness of paper and pressboard is required
                          to drop the voltage across the structure without exceeding safe stress criteria.
                          A further complication of the insulation design is that the windings are subjected to movements during factory
                          clamping and sizing processes. This means that the insulation structure along with any fixed connection
                          electrodes has to be designed and ‘toleranced’ to provide a degree of relative movement between its
                          components during the clamping procedures, while achieving the design intent position upon completion. It
                          may be necessary to provide some adjustable sections in the lead exit system that can be insulated during
                          the latter processing stages of the transformer after the main drying and clamping processes are complete.
                          Notwithstanding the requirement for adjustable components of the lead exit system, the overall lead exit
                          system design is optimized to minimize the number of joints and to keep these joints distant from areas of
                          higher stress.
                          The internal connection of the lead exit system to the valve bushing generally employs a series of pressboard
                          cylinders to smoothly transfer the DC stress between the field patterns produced by the lead exit and the
                          pattern generated by the bushing. Since it is desirable to minimize the risk of oil leakage through the DC
                          bushing into the valve hall, the economics of introducing a Faltenbalg, a pressboard barrier structure to
                          separate the local oil volume around the end of the bushing from the main transformer tank oil, may be
                          considered. This seal also allows the bushing connection to be made without exposure of the main insulation
                          of the transformer during the site erection works.
                          Currents flowing through the internal busbars produce losses, which require sufficient cooling to maintain
                          acceptable temperatures. Tubular electrode shields, even if they do not actually carry load current, are
                          influenced by the surrounding electromagnetic field, generating losses, enhanced and sometimes highly
                          localized by harmonics. The higher the DC voltage levels employed, the thicker the cellulose insulation is
                          required to be, however the thermal aspects of the cleat bar still have to be maintained. Where possible the
                          cleat bar tubes can be arranged to provide for some internal oil thermosyphonic flow to prevent stagnation,
                          and the current density may be kept low to avoid excessive general and local heating. This is an important
                          consideration with insulated high current conductors under DC voltage conditions because the resistivity
                          of the oil impregnated cellulose reduces significantly with rising temperature, whereby if the outer paper
                          insulation is significantly cooler than the internal paper, higher DC stress will be developed across the outer
                          insulation layers thereby reducing design margins. For converter transformers designed for DC voltages
                          higher than 500 kVdc, the lead exit busbars will more usually be of a hybrid paper and pressboard barrier
                                                                                                            1.586e+007Ê:Ê>1.669e+007
                                           Corona                                                           1.502e+007Ê:Ê1.586e+007
                                           shield                                                           1.419e+007Ê:Ê1.502e+007
                                                                                                            1.335e+007Ê:Ê1.419e+007
                                                                                                            1.252e+007Ê:Ê1.335e+007
                                                                                                            1.168e+007Ê:Ê1.252e+007
                                                                                                            1.085e+007Ê:Ê1.168e+007
                                                                                                            1.001e+007Ê:Ê1.085e+007
                                              Pressboard                                                    9.180e+006Ê:Ê1.001e+007
                                              DC
                                                                                                            8.345e+006Ê:Ê9.180e+006
                                              insulation
                                              structure                                                     7.511e+006Ê:Ê8.345e+006
                                                                                                            6.676e+006Ê:Ê7.511e+006
                                                                                                            5.842e+006Ê:Ê6.676e+006
                                                                                                            5.007e+006Ê:Ê5.842e+006
                                                                               DCÊfieldÊlines               4.173e+006Ê:Ê5.007e+006
                                                                                                            3.338e+006Ê:Ê4.173e+006
                                                                                                            2.504e+006Ê:Ê3.338e+006
                                                                                                            1.669e+006Ê:Ê2.504e+006
                                             paperÊcovered                                                  8.345e+005Ê:Ê1.669e+006
                                             copperÊtube                                                    <0.000e+000Ê:Ê8.345e+005
                                                                                                     DensityÊplotÊ:ÊIÊEÊI,ÊV/m
Fig. 6.4.3f– FEM analysis of DC stress transfer from paper taped cleat bar to DC bushing structure
Fig. 6.4.8a– HVDC converter transformer installed at site, 385 MVA, 222 kVdc
                          previous conventional oil switching tapchanger diverter switches required inspection at intervals ranging
                          from 40,000 to 80,000 operations, (some 2-3 years in converter station terms) the newer vacuum switching
                          diverter technology requires inspection only after some 300,000 operations.
Fig. 6.4.9a– HVDC converter transformer, 3-phase, 385 MVA 400/96 kV unit, arranged for shipping
DC current (p.u.)
                                                                                                                                     Id ripple
                                                        Id (p.u.)
                                                                                  Id total                  Id offset
                                                                    0.5
                                                                     0
                                                                          0   5                     10                 15       20
           Fig. 6.5.3a– d(t), Idtotal , Idripple , Idoffset                                      t (ms)
                                                     3 2 ⋅ E LL max pk
                              Idmin > Idripple =      ⋅                ⋅ (0.023⋅ sin α max ) (rectifier or inverter)             [Eqn. 6.5b]
                                                     π ω ⋅ L T min
                          Where:
                          a ≤ w t ≤ a + 30°             = Interval where the expression is defined
                          Idripple                      = Maximum operating DC current ripple
                          ELL max pk                    = Maximum valve winding voltage, peak, 6-pulse converter
                          LT min = 4 × (Lcr +Lci)       = Minimum value of the total inductance of the DC circuit
                          Lcr and Lci                   = 6-pulse commutating reactances of the rectifier and inverter respectively
                          The expression above is calculated by assuming no overlap. For this particular analysis, where Id is at its
                          minimum level, the overlap is normally very small and the approximation is quite acceptable.
                          Since for back-to-back converters the influence of the second converter cannot be disregarded, Eqn 6.5b
                          can be extended to:
[Eqn. 6.5c]
                          Where:
                          a r = Firing angle of the rectifier
                          a i = Firing angle of the inverter
                          On the inverter side, a i is defined as:
                              a i = p – (µi + gi)                                                                                [Eqn. 6.5d]
                          Where:
                          μ i = Overlap angle of the inverter
                          g i = Gamma angle of the inverter
                          Since the overlap angle is assumed to be zero, sin (a i) = sin (p – g i) = sin (g i), Eqn 6.5c can be rewritten as:
[Eqn. 6.5e]
                          The equations presented until now describe the mean value of the DC current but are not sufficient to
                          explain the nature of the current ripple in HVDC schemes in the time and frequency domains.
                          The time domain contribution due to a single 6-pulse converter is calculated in [19]. For back-
                          to-back 12-pulse converters the ripple can be split into two contributions: one due to the
                          rectifier and one due to the inverter. Each individual contribution can be expressed in the range
                          a ≤ w t ≤ a + 30° using the following expressions for the rectifier and inverter respectively:
                                      π        π              π            π            π  
                      3        1      ⋅ 4 ⋅ cos  ⋅ sin t⋅ ω i −   − 4 ⋅ cos  ⋅ sinγ i −     
          idi(t) = π ⋅ ⋅ ELL,i⋅  ⋅  6      12             12           12           12              [Eqn. 6.5g]
                      π        LT  
                                                                   ωi                                     
          Eqn 6.5f and Eqn 6.5g represent the individual contribution to idripple(t) considering a single pulse from each
          converter side. Switching functions are required to completely describe the idripple(t) for any time period.
          This is presented in Appendix A6.5.
          Fig. 6.5.3b shows an example of the idripple(t) and related DC quantities based on the time domain switching
          functions described in Appendix A6.5. This example is for a back-to-back system connecting a 50 Hz system
               αr+θr     αi+θi
               2. π fr   2. π fi
                                                                                                    DC voltage pole to
                                                                                                    ground, vt(t)
                                                                                                    Ideal 12-pulse DC
                                                                                                    voltage, rectifier (pole to
                                                                                                    ground), vr(t)
                                                                                                    Vphase YY+Vphase YD
                                                                                                    on DC side of the
                                                                                                    converter transformer
                                                                                                   DC ripple (total),
                                                                                                   idr(t) + idi(t)
                                                                                                   Vphase YY+Vphase YD
                                                                                                   on the DC side of the
                                                                                                   converter transformer
                                                                                                    Ideal 12-pulse DC
                                                                                                    voltage, inverter
                                                                                                    (ground to pole), vi(t)
idr(t)Ê+Êidi(t)
                                                                                     RHV                     RHV
                                                      Rectifier                                                                       Inverter
                             VL rÊ∠Êθr                                4Ê.ÊLcr         2                       2           4Ê.ÊLci                             VL iÊ∠Êθi
IdealÊtransformer IdealÊtransformer
                                                                                    InductancesÊofÊtransformer
                                                                                  andÊvalveÊreactorÊ(LcrÊandÊLci),
                                                                                       movedÊintoÊDCÊside
                                          ForÊcalculatingÊidr(t)ÊandÊidi(t)ÊtheÊDCÊtotalÊresistance,ÊRHV,ÊisÊassumedÊzero.
                                          idr(t)ÊandÊidi(t)ÊdefinedÊinÊEqnÊ6.4fÊandÊEqnÊ6.4gÊrespectively.
vt(t)ÊdefinedÊinÊEqnÊ6.4h.
                                6.5.3c
                          to a 60 Hz system. The plots presented are not to scale and are presented for facilitating the understanding
                          of the relationship between different electrical quantities.
                          Fig. 6.5.3c presents a diagram where the electrical quantities of Fig. 6.5.3b are identified in the circuit.
                          The rectifier is at 50 Hz, the inverter at 60 Hz. The complete set of switching functions for simulating the
                          conditions presented in this figure is shown in Appendix A6.5. In the figure, qr and qi are the AC system
                          phase voltage angles of the equivalent independent sources at the rectifier and the inverter. (qr – qi) can
                          be any number and will influence the id(t) wave shape as shown in Fig. 6.5.3e.
                          In Fig. 6.5.3b and Fig. 6.5.3c, the DC voltage pole to ground is calculated by the following expression:
                                                                    Lci                       Lcr
                               vt ( t )p−g = vr ( t )p−g ⋅                  − vi( t )g− p ⋅                                                                                 [Eqn. 6.5h]
                                                                  Lcr + Lci                 Lcr + Lci
                          Where:
                          vr(t)p–g = Ideal 12-pulse DC voltage, rectifier (pole to ground)
                          vi(t)g–p = Ideal 12-pulse DC voltage, inverter (ground to pole)
                          Based on equations presented in Appendix A6.5 and the graphical analysis of Fig. 6.5.3b it is possible to
                          draw the following conclusions:
                             ➙	In Fig.6.5.3b and Fig.6.5.3c, qr and qi are the AC system phase voltage angles of the equivalent
                                 independent sources at the rectifier and the inverter. (qr – qi) can be any number and will influence
                                 the id(t) wave shape as shown later in Fig. 6.5.3e.
                             ➙	The time domain analysis allows an immediate frequency domain evaluation as presented in Fig.
                                 6.5.3d. A typical Fast Fourier Transform (FFT) of the idripple(t) is presented below for the (50/60) Hz case.
                          The contribution from the 50 Hz side has frequencies at 600 Hz, 1200 Hz etc. The contribution from the
                          60 Hz side has frequencies at 720 Hz, 1440 Hz etc.
                                                                                        DCÊcurrentÊrippleÊFFTÊofÊtotalÊcurrent
                          150
                          120
           AmpereÊ(rms)
                          90
                                                       600           720
                          60
30
                           0
                                400              560             720       880              1040             1200           1360            1520   1680           1840   2000
                                                                                                       FrequencyÊinÊHz
6.5.3d
200
200
                   0
                   0.01                             0.015                  0.02                           0.025                         0.03              0.035
                                                                                        TimeÊ(s)
                                      TotalÊDCrippleÊatÊminimumÊld                MaximumÊldrippleÊdueÊtoÊrectifierÊ(orÊinverter),ÊatÊldmin
                                      IdminÊ(meanÊvalue)                          MaximumÊldrippleÊdueÊtoÊtheÊinverterÊ(orÊrectifier),ÊatÊldmin
                                                                           IdealÊVdcÊ12-pulseÊharmonicÊ(p.u.)
                                                                                                                             alphaÊ=Ê43¡
                                                                                                                             alphaÊ=Ê30¡
                                                        10                                                                   alphaÊ=Ê20¡
                                                                                                                             alphaÊ=Ê10¡
                                                                                                                             alphaÊ=ÊÊ4¡
                             VdcÊ(12thÊharmonic)Êp.u.
                                                        0
                                                             0        10   20             30            40      50   60
                                                                                OverlapÊ(¡)
                          Fig. 6.5.3f– 12 harmonic direct voltage, p.u. of 3/p ⋅ ELLpeak = Vdi0 (direct no load voltage)
                                                                 th
BACK TO       358   |
                                   6.5.3f
                        DC Transmission Systems: Line Commutated Converters
CHAPTER
               of the firing angle and overlap as indicated in [19]. As an example, see the Fig. 6.5.3f below, where
               the 12th harmonic of the ideal voltage DC source is calculated as a function of the overlap variation
               considering different alpha values. Notice that the case with maximum harmonic occurs for the case
               with minimum overlap and maximum firing angle.
                                            Idripple      Idripple
                                         contribution contribution
          Operating          Power level                                              Idripple   Idmin    Idoffset
                                             from         from
          conditions            %                                                      (A)        (A)      (A)
                                           rectifier    inverter
                                              (A)          (A)
D 10 21 36 57 257 200
G 10 21 36 57 252 195
                                            Idripple      Idripple
                                         contribution contribution
          Operating          Power level                                              Idripple   Idmin    Idoffset
                                             from         from
          conditions            %                                                      (A)        (A)      (A)
                                           rectifier    inverter
                                              (A)          (A)
D 10 25 36 62 257 195
G 10 25 36 62 252 190
           The operating conditions A to G are calculated for the minimum power level, using extreme combinations of
           measurement and equipment tolerances.
        A PSCAD/EMTDC case is presented below in order to show the consistency of the results for the critical
        case C of Table 6.5b, assuming 50 Hz as a rectifier and the 60 Hz as an inverter.
BACK TO                                                                    DC Transmission Systems: Line Commutated Converters   |   359
CHAPTER
          6| HVDC CONVERTER STATION EQUIPMENT
0.50Ê
0.40Ê
                                 0.30Ê
                           kA
0.20Ê
0.10Ê
                                 0.00Ê
                           Time(s)       2.96Ê                     2.97Ê                 2.98Ê                      2.99Ê                       3.00Ê
CurrentÊorder DCÊcurrent
Fig. 6.5.3g– Id(t) current corresponding to case C in Table 6.5b, for Id = 315 A (50 Hz rectifier, 60 Hz inverter)
                                                                      1.5
                                                                                            1
                                                                            1
                                                         ReductionÊfactor
                                                                                                                                                                0.5
                                                                      0.5
                                                                                                                                                                0.2
                                                                            0
                                                                                0       1                           2                           3                     4
                                                                                    TotalÊsmoothingÊreactorÊreactanceÊ(rectifierÊ+Êinverter)ÊinÊp.u.ÊofÊLTmin
                      AC
                   isolation                                                                                                  Vdn         Idne
                                                                                                       Idnc
                          Vlw                                                                          Idnc
                          CVT
                                                                                                                              Vdn
                                                          FilterÊbanks   T1
                                                                llw1          lvw1
                                                           Vlw
                                                           CVD           T2
                                                                 llw2         lvw2                                                           Neutral
                                                                                                                    Idl                     isolation
Vdl
                                                                                                              ÊÊVlwÊCVT:Ê    LineÊwindingÊvoltageÊCVT
                                                                                     VoltageÊdivider          ÊÊVlwÊCVD:ÊÊ   LineÊwindingÊvoltageÊCVD
                                                                                                              ÊÊIvw1:ÊÊ      StarÊvalveÊwindingÊcurrent
                                                                                                              ÊÊIvw2:ÊÊ      DeltaÊvalveÊwindingÊcurrent
                                                                                     CVD                      ÊÊIIw1:ÊÊ      LineÊwindingÊcurrentÊ(T1)
                                                          FilterÊbanks                                        ÊÊIIw2:ÊÊ      LineÊwindingÊcurrentÊ(T2)
                                                                                                              ÊÊVdl:ÊÊ       LineÊwindingÊDC
                                                                                     CVT
                                                                                                              ÊÊVdn:ÊÊ       NeutralÊvoltageÊDC
                                                                                                              ÊÊIdnc:ÊÊ      HVDCÊneutralÊconverterÊcurrent
                                                                                     ZFCT/OCT                 ÊÊIdne:ÊÊ      HVDCÊneutralÊearthÊcurrent
                                                                                                              ÊÊIdl:ÊÊ       HVDCÊlineÊcurrent
                                                                                     CT
Fig. 6.6a– Measurement points and devices for a typical HVDC scheme
                                  6.6a
          protection functions. In such cases, it is traditional to specify the outputs to have varied accuracies to suit
          the intended application.
                               HV                 PrimaryÊcircuit/
                            terminal               HVDCÊdivider
NominalÊoutput
BufferÊamplifierÊ1
Ramp1 Camp1
                                                                                                                                    BufferÊamplifierÊ2
                                                                     OV
                                                                                  OV
                        EarthÊpotential                                                                                               Ramp2           Camp2
                                 The main resistor is a freestanding unit, which is insulated from earth and would additionally have a spark
              6.6.2a             gap and a non-linear resistor which connects the base of the resistor to earth.
                                 The output is protected by suitable overvoltage limiting devices.
                                 Measurement accuracies of 0.2% or better are normally achievable as standard. Any calibration checks must
                                 include the correct length and type of triaxial cable as will be used in the actual scheme.
CapacitorÊvoltageÊdivider
A HighÊvoltageÊterminal A
ElectromagneticÊunit
                                              HighÊvoltage
                                                capacitor                    C1
                                                                                              SeriesÊ/
               Stray                                                                      compensation
           capacitance,ÊCs                                                                  inductance
                                          IntermediateÊvoltage
                                                terminal
                                                                                          Intermediate                        Secondary
                                                                                          transformers                        windingÊ(s)
                                          IntermediateÊvoltage
                                                capacitor                    C1
                                                                             Stray
                                                                         inductance,ÊLs
                                                                                                                     Earth
                                                                                                                   terminal
                                                    LowÊvoltage
                                                                         N
                                                      terminal
                                                                                                          87,Ê87GÊ&Ê51
                                                                                      50Ê&
                                                                                      51N
                               MainÊandÊbackÊupÊbusbarÊdifferentialÊprotection
                                                                                 S1                  S2                        S2               S1
                                                                                                                                                     ConverterÊcontrolÊandÊprotection
                                                                                 P1                  P2                        P2               P1
                                                                                      E      A   M                                  H   G   B
                                                                                                           P1            S1
                                                                                                                         K
                                                                                                            P2           S2
                                                                                                          87,Ê87GÊ&Ê51
                                                                                      50Ê&
                                                                                      51N
S1 S2 S2 S1
                                                                                 P1                  P2                        P2               P1
                                                                                      F      D   N                                  I   J   C
                                                                                                            P1           S1
                                                                                                                          L
                                                                                                            P2            S2
            Fig. 6.6.4a– AC current measurement transducers on a
            converter transformer
6.6.3b
                     FilterÊdifferentialÊprotection           CT
                                                                                                        CT                                                   CT
                                                                              FilterÊcapacitor
                                                                                 unbalance
                                                                                 protection
                                                         CT                                                  CT                                                   CT
                                                                          FilterÊresistorÊoverload
                                                                                  protection
CT CT CT
                                                                          FilterÊresistorÊoverload                FilterÊreactorÊovercurrent
                                                                                  protection                               protection
CT CT CT
                                                                                                                  CTs                                                       CTs
                                                           CTs
                                                      MainÊcapacitorÊovervoltageÊprotection
                                                                   &ÊfilterÊE/F
                                                          &ÊfilterÊoverloadÊprotection
                                                         &ÊfilterÊovercurrentÊprotection             Fig. 6.6.4b– Typical disposition of measurement transducers
                                                        &ÊcircuitÊbreakerÊfailÊprotection            for a harmonic filter
          Fig. 6.7.1a– Typical surge arrester blocks                                                                          Fig. 6.7.1b– Valve hall surge
                                                                                                                               arrester with the housing
                                                                       1.6
                                                                       1.5
                                                                       1.4
                ResidualÊvoltageÊinÊp.u.ÊofÊvoltageÊatÊ10ÊkAÊ8/20ʵs
                     1.3                                                                                                                              DC
                     1.2
                     1.1                                                                                                                              AC
                       1
                     0.9                                                                                                                              30/60ʵsÊ
                     0.8
                     0.7                                                                                                                              8/20ʵsÊ
                 10kA0.6 8/20µs
                     0.5                                                                                                                              1/2ʵsÊ
                     0.4
                     0.3
                     0.2
               Residual
                     0.1 voltage in p.u. of voltage at
                       0
                       1E-05  0.0001  0.001   0.01   0.1                                   1         10       100    1000   10000   100000
100
50
                                                               0
                                                                    0     50     100      150     200      250    300   350   400
                                                        kV
                                                              -50
                                                             -150
                                  Peak Continuous
                                  Operating Voltage, PCOV -200
Time (°)
Fig. 6.7.1d– Typical voltage waveform imposed on a valve arrester, shown for a rectifier
                          6.8.2. Types
                          Circuit breakers are generally classified according to the medium used to control the arc and provide
                          dielectric strength. Over the years, four main types have been used for HV transmission and distribution:
                              ➙	Air-blast                                           ➙	Sulfur hexafluoride (SF6)
                              ➙	Oil                                                 ➙	Vacuum
                                                                                                           1Ê-ÊFixedÊcontact
                                                                                                           2Ê-ÊNozzle
                                                                                                           3Ê-ÊMovingÊcontact
                                                                                                           4Ê-ÊCompressionÊcylinder
                                                                                                           5Ê-ÊFixedÊpiston
                                              6.8.2c
                                  interrupter is the most commonly used interrupter on transmission SF6 circuit breakers. Fig. 6.8.2c
                                  shows a typical puffer interrupter.
                          The main disadvantage of SF6 is the very high Global Warming Potential (GWP) of the gas: 22,000 times
                          as powerful as CO2. Some countries are starting to restrict the use of SF6 and there are even discussions
                          about phasing it out altogether. For these reasons, GE Vernova and other industrial companies have been
                          investing in R&D activities to identify suitable alternative insulating gases.
                                                                                               FlexibleÊmetallic
                                                                                               bellows
                                                                                                     MovingÊcontactÊstem
                           FixedÊcontactÊstem
                                                                                    InsulatingÊenvelope
          Fig. 6.8.2d– A typical vacuum interrupter construction
          contact is withdrawn from the stationary contact. The arc burns in the metal vapor evaporated from the hot
          spots on the contact surfaces. At6.8.2d
                                           or near current zero, the arc is extinguished, the vapor production ceases and
          very rapid re-combination and de-ionization of the metal vapor occurs. The metal vapor re-condenses on the
          contact surfaces and on the surrounding metal vapor condensation shield. This ensures the clean conditions
          within the interrupter required for withstanding transient recovery voltage across the open contacts.
          current and its shape and value are influenced by the length of the arc, the cooling and de-ionizing methods
          used, and the heat transfer characteristics of the surrounding medium.
ArcÊvoltage
                                                                     ia    ic
                                                                                  ArcÊcurrent
g(t)
i(t)
                                                                                                                                  t
                                                                                                                  TRV
                                                                                         CBF
                                                                                                             PoleÊ1Êconverter
                                                                   ACÊfilters
6.8.5a CBP1
ACÊnetwork
                                                                                                      CBP2
                                                                   ACÊfilters
                                                                                         CBF
                                                                                                             PoleÊ2Êconverter
1.0Êk
0.5Êk
                    0.0
            kV
-0.5Êk
-1.0Êk
                  -1.5Êk
                             EnvelopeÊ+Êve     EnvelopeÊ-Êve         PhaseÊa             PhaseÊb         PhaseÊc
                  1.5Êk
1.0Êk
0.5Êk
                   0.0
            kV
-0.5Êk
-1.0Êk
                  -1.5Êk
                                 0.220             0.230                 0.240               0.250          0.260
TimeÊ(s)
                           6.8.6b
          Fig. 6.8.6b– Typical TRV experienced by converter circuit breaker (500 kV system)
                                                                                                                            TRV
                                             2
                                                                                                                             Vs
                                             1
                                                                      i                                                      Vc
                                            -1
                                            -2
                          Fig. 6.8.7b– TRV on capacitive switching
                                                                                                     L
                                                                               R
                                                            +
                                                                E                                                    ea
                                                            -
            Fig. 6.8.8a– DC switching circuit
                                                                  ArcÊvoltage
                                                                                E
ea1
                                                                                                                            ArcÊinterruption
                                                                                           ea2
                                                                                                                         StableÊarc
            Fig. 6.8.8b– Criterion for DC current interruption
                                                                                                 ArcÊcurrent
                              Even where one of these methods is used, it may not be economic (especially at high voltages) to achieve
                              a true interruption of DC current, and in HVDC applications the usual technique is instead to divert the DC
                              current into another parallel current6.8.8b
                                                                   path. For this reason the DC switches used to perform this operation are
                              known as DC commutating switches, as distinct from true DC circuit breakers that are capable of interrupting
                              fault currents (which are generally not necessary on Line-Commutated Converter HVDC schemes).
                                          di
                                   E=L       + Ri + ea                                                                                         [Eqn. 6.8a]
                                          dt
By rearranging the equation above, the rate of change of current can be obtained as follows:
                                   di 1
                                     = (E − Ri) − ea                                                                                    [Eqn. 6.8b]
                                   dt L 
                              From Eqn 6.8b above, it can be seen that in order to ensure that the system current keeps decreasing to
                              reach zero, the arc voltage ea must be larger than E – Ri all the time. If there is a point where ea becomes equal
                              to E – Ri, di/dt becomes zero and a stable point will be reached. This is illustrated in Fig. 6.8.8b.
                              This method is limited to low voltage applications, as it is not possible to obtain arc voltages above
                              approximately 3 kV at high currents.
5.0
4.0
                           3.0
           ÊcurrentÊ(kA)
2.0
                           1.0
                           0.0
-1.0
-2.0
                           -3.0
             sec              0.5075                     0.5100                        0.5125                      0.5150             0.5175                0.5200
                                       BreakerÊcurrent            LCÊcircuitÊcurrent            ArresterÊcurrent
          interrupted. The DC current is then transferred to the commutation circuit until the voltage across the
          capacitor C reaches the protective level of the parallel surge arrester.
                                  6.8.8d
          At this point, the current is transferred into the surge arrester. Besides                                                                             SA
          limiting the voltage across the DC breaker, the surge arrester also
          absorbs the energy stored in the system. It is the voltage developed                                                                          C             L
          across the commutation circuit capacitor and/or the surge arrester
          that will eventually force the DC current into a parallel circuit.
                                                                                                                                                            CB
          6.8.8.3. Current Injection Method
          The basic circuit used for this arrangement is illustrated in Fig. 6.8.8e.  Fig. 6.8.8c– Passive oscillation circuit arrangement
          This arrangement consists of the following components:
              ➙	A current carrying main switch (CB1)
              ➙	A reactor (L) and a pre-charged capacitor (C) in series to form the commutation circuit
              ➙	An auxiliary switch (CB2)
              ➙	A surge arrester (SA)
                                                                                                                                   6.8.8c
          During normal operation, CB1 is closed while CB2 is open. C is pre-charged and is used to create current
          zero through the main switch CB1. L is used to limit the di/dt prior to current interruption.
                                                                                                HVDCÊlineÊ1
                                            BPS                                                                                                   BPS
                                                                                                  PoleÊ1
                                            BPS                                                                                                   BPS
                                                  NBS      ERTB                                                                             NBS
                                                                       MRTB                 ElectrodeÊlines
                                            BPS                                                                                                   BPS
                                                                                                HVDCÊlineÊ2
                          6.8.9.1. Metallic Return Transfer Breaker and Earth Return Transfer Breaker
                          If one pole of a bipolar scheme is not available, the system is normally designed to continue operating in
                          monopolar configuration. The return current can flow either through the ground (via electrode lines leading
                          to ground electrode sites, normally remote from the converter station), or in “metallic return” mode, using
                          a conductor on the transmission towers. This conductor can be either a dedicated return conductor (the
                          so-called “Dedicated Metallic Return” system) or, in the case where the pole outage is caused by a converter
                          fault, it uses the healthy HV conductor on the out-of-service pole.
                          Ground return mode gives the lowest losses, but in many areas, it is not permitted to operate a HVDC
                          scheme continuously with high direct current through the ground because of the risk of corrosion of
                          underground metallic structures such as pipelines. The most cost-effective alternative is generally to use
                          the pole conductor of the out-of-service pole.
                          The Metallic Return Transfer Breaker (MRTB) and the Earth Return Transfer Breaker (ERTB) are used to
                          respectively allow the reconfiguration of the pole in service from ground return to metallic return, and
                          from metallic return to ground return, without interrupting the power. During monopolar ground return
                          operation, the MRTB is closed and carries the full load current, while the ERTB is open. During metallic return
                          operation, the ERTB is closed and carries the full load current, while the MRTB is open.
                          The transition between one configuration and the other is achieved by first closing the open switch (after
                          the associated disconnectors are already closed), thus putting the HVDC line associated with the out-of-
                          service converter in parallel with the ground return. The other switch is then opened to transfer the direct
                          current from one circuit to the other.
Fig. 6.9a– HVDC valve hall wall bushing rated at 285 kVdc: inside view (i) and outside view (ii)
              6.9a with regard to the electrode line. The NBS associated with the faulty pole converter is then
          impedance
          opened to force the current from the fault path into the electrode line.
DG DG
                                                                                                                OilÊfiltration
                                                                                                                FireÊfighting
                                                                                                              WaterÊtreatment
                                                                                                              ExternalÊlighting
                                                                                                             Non-essentialÊHVAC
                                                                                                         LightingÊ&ÊsmallÊpower
             Essential        Essential           220ÊVdc                48ÊVdc                 48ÊVdc                                48ÊVdc             48ÊVdc             220ÊVdc            Essential      Essential
             ACÊloads         ACÊloads         BatteryÊNo.Ê1          BatteryÊNo.Ê2          BatteryÊNo.Ê1                         BatteryÊNo.Ê3      BatteryÊNo.Ê4      BatteryÊNo.Ê2         ACÊloads       ACÊloads
                                                 chargersÊ              chargersÊ              chargersÊ                             chargersÊ          chargersÊ          chargersÊ
             -Êstation         -ÊpoleÊ1          &Êbusbar               &Êbusbar               &Êbusbar                              &Êbusbar           &Êbusbar           &Êbusbar             -ÊpoleÊ2      -Êstation
          ACÊbusbars
          MA:ÊMediumÊvoltageÊAÊ-Ê(11ÊkV,Ê34.5ÊkVÊorÊsimilar)                            P1LA:ÊPoleÊ1Ê-ÊLowÊvoltageÊAÊ(600ÊV,Ê415ÊVÊorÊsimilar)                 P2LA:ÊPoleÊ2Ê-ÊLowÊvoltageÊAÊ(600ÊV,Ê415ÊVÊorÊsimilar)
          MB:ÊMediumÊvoltageÊBÊ-Ê(11ÊkV,Ê34.5ÊkVÊorÊsimilar)                            P1LB:ÊPoleÊ1Ê-ÊLowÊvoltageÊBÊ(600ÊV,Ê415ÊVÊorÊsimilar)                 P2LB:ÊPoleÊ2Ê-ÊLowÊvoltageÊBÊ(600ÊV,Ê415ÊVÊorÊsimilar)
          MC:ÊMediumÊvoltageÊCÊ(ifÊnecessary)Ê-Ê(11ÊkV,Ê34.5ÊkVÊorÊsimilar)             P1CN:ÊPoleÊ1Ê-ÊLowÊvoltageÊcommonÊ(600ÊV,Ê415ÊVÊorÊsimilar)            P2CN:ÊPoleÊ2Ê-ÊLowÊvoltageÊcommonÊ(600ÊV,Ê415ÊVÊorÊsimilar)
          Fig. 6.10a– Auxiliary supplies - bipole diagram
                                                                                                                  P2LA
                                                                                  P1LB
                                                                                                                                                       P2LB
                                             125ÊV                                125ÊV                           125ÊV                                125ÊV
                                        batteryÊcharger                      batteryÊcharger                 batteryÊcharger                      batteryÊcharger
                                               1                                    2                               3                                    4
                                                            125ÊV                                                                125ÊV
                                                           battery                                                              battery
                                                              1                                                                    2
                                                                                               Interlocked
                                                                                                 transfer
                                                                                                  busbar
125ÊVdcÊdistributionÊ1 125ÊVdcÊdistributionÊ2
                          This configuration of feeders, batteries, chargers and distribution is the same basic system which is
                          commonly used elsewhere. In a more complex bipole system, there may be both 48 V batteries supplying
                          the communications and control systems, and 220 V supplying the switchyard. This configuration is shown
                          in Fig. 6.10c.
                              6.10b
                          There may be situations where there is only one MV source to provide power to a HVDC station, such as in
                          remote locations with few MV distribution lines in the area. In this case, it may be appropriate to use the
                          HV power lines which feed the main converter circuit as a source of auxiliary power, by either:
                             ➙	Using a step-down transformer directly on the HV busbar
                             ➙	Putting an auxiliary winding on a line end reactor turning this into a step-down transformer (but
                                only when the reactor is connected to the AC bus in order to meet the reactive power exchange
                                limits of the converter station)
                             ➙	Adding an auxiliary supply transformer to the tertiary busbar in situations where the AC harmonic
                                filters are connected to a bus on a tertiary winding on the converter transformer
                          Even if all auxiliary AC power is lost, sufficient energy is stored in batteries to ensure that safe shutdown
                          of the converter equipment can be accomplished and that the minimum station services including such
                          things as emergency lighting and operation of switchgear continue to be provided with operating power
                          for several hours after AC infeed has ceased.
                                                                                                                         P2LA
                                                                                             P1LB
                                                                                                                                                 P2LB
                                                                       220ÊV                 220ÊV                       220ÊV                   220ÊV
                                                                  batteryÊcharger       batteryÊcharger             batteryÊcharger         batteryÊcharger
                                                                         1                     2                           3                       4
                                                                               220ÊV                                               220ÊV
                                                                              battery                                             battery
                                                                                 1                                                   2
                                                                                                      Interlocked
                                                                                                        transfer
                                                                                                         busbar
                                                                     220ÊVdcÊdistributionÊ1                             220ÊVdcÊdistributionÊ2
                                                              StationÊequipmentÊsupplyÊ1                        StationÊequipmentÊsupplyÊ2
                     P1LA
P1LA
P2LA
                                                                                                                                                                           P2LA
                                           P1LB
P1LB
P2LB
                                                                                                                                                                                                 P2LB
                     48ÊV                  48ÊV                        48ÊV                  48ÊV                    48ÊV                   48ÊV                           48ÊV                  48ÊV
                batteryÊcharger       batteryÊcharger             batteryÊcharger       batteryÊcharger         batteryÊcharger        batteryÊcharger                batteryÊcharger       batteryÊcharger
                      11                    12                          13                    14                      21                     22                             23                    24
          The need to keep DC power flowing through the link may be so critical on some HVDC schemes that
          special provisions may be needed to maintain power to specific items of plant such as the thyristor valve
          cooling. One example of this is the Chandrapur scheme (described in section 1.3.4.6), which was subject
          to 6.10c
             occasional AC supply interruptions, and the cooling plant was required to continue operation for up to
          30 seconds to ride through such events without interrupting the main HVDC power flow and to provide
          sufficient time for the back-up diesel generator to start. This was achieved by using a compressed air
          storage system, whereby pumps maintained high-pressure air in a storage vessel, and when the main
          AC supply failed the coolant circulation pumps were driven by release of the compressed air. On other
          projects this continuous valve cooling facility has been provided by an auxiliary cooling pump powered off
          a battery backed UPS.
TOC         390 |    DC
      HVDC: Connecting toTransmission
                          the future Systems: Line Commutated Converters
      7                 CONTROL
                        AND PROTECTION
      DC is inherently more efficient, transmitting up to three times more
      power than AC in the same right-of-way, and reducing comparative
      generation requirements.
      One of the main differentiating factors of DC versus AC transmission
      schemes is the controlability.
      This chapter introduces the basic control concepts of a HVDC
      converter scheme in terms of the manipulation of the controllable
      elements in order to achieve the desired power flows.
      As with any electrical system, asset protection in the event of mal-
      operation or external faults is an important consideration and so the
      basic protections applied to a HVDC scheme are introduced, along
      with a description of their functions.
      Finally, a typical control and protection scheme implementation is
      presented, showing the segmentation of functions within the system.
      7.3.          CONVERTER STATION PROTECTION ................................                                         408   7.12.          DUPLICATION OF CONTROL EQUIPMENT.......................                                          427
      7.3.1.        Selectivity......................................................................................     409   7.12.1.        Selection of Duplication Boundaries.................................                             428
      7.3.2.        Reliability.......................................................................................    409   7.12.2.        Auxiliary Power Supplies........................................................                 428
      7.3.3.        Stability..........................................................................................   410   7.12.3.        Communications Systems.....................................................                      429
                                                                                                                                7.12.4.        Control System Inputs and Outputs.................................                               430
      7.4.          PROTECTIVE ZONES................................................................. 410                       7.12.5.        Maintenance of the System .................................................                      431
      7.4.1.        Protective Actions..................................................................... 410
                                                                                                                                7.13. CONTROL FOR SERIES
      7.5.    F AULT CASES AND CORRESPONDING                                                                                   CONNECTED CONVERTERS ..................................................................... 431
               PROTECTIONS.............................................................................                   412
      7.5.1. Flashover across a Valve – Fault 1......................................                                     412   BIBLIOGRAPHY............................................................................................... 433
      7.5.2. Flashover across a Bridge – Fault 2...................................                                       413
      7.5.3. Flashover across a Converter – Fault 3............................                                           413
      7.5.4. Faults across Valve winding Phases – Fault 4...............                                                  413
      7.5.5. Converter Ground Faults – Faults 5 and 6......................                                               413
      7.5.6. Electrode Line Fault – Fault 7...............................................                                413
      7.5.7. AC System Fault – Fault 8......................................................                              413
      7.5.8. Commutation Failure...............................................................                           414
      7.5.9. DC Line Fault – Fault 9.............................................................                         414
      7.5.10. Filter Fault – Fault 10...............................................................                      415
TOC   DC Transmission
             392 |    Systems:
                      DC Transmission
                               Line Commutated
                                      Systems: Line
                                                Converters
                                                    Commutated Converters
     7.1. HVDC SCHEME CONTROL
          There are a number of operating conditions that must be closely monitored and which can be modified in
          order to control the power flowing through a HVDC link. In this section, we will introduce these operating
          conditions and present how to control them.
                                                 Xc                 
              Vd p.u . = k ⋅ VLL p.u.⋅  cos(α ) − p .u . ⋅ Id p.u .                                       [Eqn 2.2.2p]
                                                  2                 
          The adjustment of DC voltage can, therefore, be achieved in two ways: the converter-firing angle (a or g ) can
          be varied or the magnitude of the applied AC voltage can be varied.
                                                                                                              Cathode
                                                                                                              terminal
                     Vemf                    Xsys
                                                                                                                    Vd
Vac
                                                                                                               Anode
                                                                            FIRINGÊANGLE   (α)                terminal
                                                                                            CONVERTER
                                                                                           CONTROLLER
                            V1ac                                                                             V2ac
                                                           Anode          Cathode
                                                          terminal        terminal
Fig. 7.1c– A simplified point-to-point HVDC link (all DC side resistances are expressed as one element Rd)
          affects which power flow direction is associated with positive DC voltage with respect to earth. Power
          flow from Converter 1 to Converter 2 is associated with positive DC voltage (Vd) whilst power flow from
          Converter 2 to Converter 1 is associated with a negative value of DC voltage (Vd’) with respect to earth.
          For simplicity, all of the DC side resistances in Fig. 7.1c are represented as a single lumped resistor Rd.
                7.1c
          As discussed above, each converter can provide either a positive or a negative voltage across its anode-to-
          cathode terminals. Therefore, if Converter 1 produces a positive DC voltage across its anode-to-cathode
          terminals while Converter 2 produces a negative voltage across its anode-to-cathode terminals, then with
          respect to earth, both converters are producing a positive voltage. As the rectifier voltage and the inverter
          voltage are independently controlled, they can have different values and hence there can be a voltage
          difference across the resistor (Rd ) in the DC circuit, which, as long as the rectifier voltage is larger than the
          inverter voltage, will cause a DC current to flow. This can be expressed as:
                       Vd − Vd ′
              I DC =                                                                                                    [Eqn 7.1a]
                         Rd
          Therefore, both DC voltage and DC current can be controlled in a HVDC link by the coordinated action of the
          converters that compose the link.
Vd
                                       Tap      VacÊ+ÊΔVac
                                     position                                                              Id
αmeas+ÊΔα
                                                                                                                                  IdÊ+ÊΔId
             TapÊup                                                                         α
                             +
                                                                                               Phase        Ierror
                                  VIIÊmax                                                      locked                +
                                                                                              oscillator
                                                                                                                         Iorder
            TapÊdown
                             +
                                                           Tap
                                  VIIÊmin               controller
                                                    cos(α min s − s ) 
                              α max s − s = cos −1                                                                             [Eqn 7.2a]
                                                    1 + DB 
                          Where:
                          DB       = the deadband in p.u.
                          amin s-s = the minimum selected rectifier firing angle
                          amax s-s = the maximum rectifier firing angle resulting from the selected deadband
                                                                                                           Id
                                                                               αmeas+ÊΔα
                                                                                                                                  IdÊ+ÊΔId
               TapÊup                                                                        α
                               +
                                                                                               Phase        Ierror
                                   αmaxÊsÊ-s                                                   locked                +
                                                                                              oscillator
                                                                                                                         Iorder
             TapÊdown
                               +
                                   αminÊsÊ-s           Tap
                                                    controller
          Conversely, alpha limit control utilizes lower control angles across the power range and hence absorbs less
          reactive power, generates less harmonics and incurs lower losses at power transfer level of less than 1.0
          p.u. Under most circumstances the reduced reactive power absorption is an advantage, however at very low
          power the reactive power absorbed by the converter may be so low that, with the minimum number of filters
                         7.2b purposes, the net reactive power generation may be in excess of the reactive power
          energized for filtering
          limits for which the scheme is designed.
          Particularly when the converter is connected at the end of a long AC line, the maximum reactive power export
          allowed may be small at low power in order to control the AC line voltage. In such circumstances it is necessary
          to either add additional shunt inductive elements (switched shunt reactors) or increase the converter
          operating angle in order to increase the reactive power being absorbed by the converter. An alternative to
          operating with increased control angle could be the use of constant valve winding control. However, increasing
          the converter control angle will increase the harmonic generation of the converter and may in turn increase
          the amount of filtering required, thus increasing the shunt connected capacitance (in the form of more AC
          harmonic filters) even further.
          Alpha limit control uses the converter transformer tapchanger to compensate for variations in the applied
          AC voltage magnitude and for the regulation of the converter itself. Hence, the number of tap steps required
          for alpha limit control is greater than that required for constant valve winding voltage control. Moreover, a
          change in steady-state power flow may require tapchanger operation when using alpha limit control, therefore
          increasing the time required to move from one steady-state condition to another. For bulk power transmission
          schemes this may be of little relevance, but for schemes where frequent changes to the power transmission
          level are required this can be an important consideration in selecting the most appropriate control method.
                                                                   PoleÊcontrol
                                                       Operator
                                                        power                                  Current
                                                       demand                        Current    order
                                                                                     control
                                                                          Power                                     FiringÊangle
                                                                                                         Limits
                                                                          control
                                                      Measured                                 Voltage
                                                                                     Voltage
                                                       power                                    order
                                                                                     control
                                                                         1.0Êp.u.
                                                                        DCÊvoltage
                                                     7.2c
                          As with the rectifier, both Constant valve winding voltage control and extinction angle limit control (similar
                          to alpha limit control) can be used at an inverter to control the DC voltage. Fig. 7.2d and Fig. 7.2e show
                          the simplified control diagrams for these two control methods. The implementation of each control
                          scheme is as discussed above for the rectifier, but with the current measurement replaced by a DC voltage
                          measurement (typically obtained from a resistive voltage divider). In addition, there is a third method,
                          which is the most common for HVDC transmission schemes and is known as Constant Extinction Angle
                          control (CEA control).
                                                                                                        Tap         VacÊ+ÊΔVac
                                             Id                                                       position
                               VdÊ+ÊΔVd                                                               VIIÊ+ÊΔVIIÊ
                           DCÊline                              γmeas+ÊΔγ
                           voltage
                            drop
                        compensation
                                                          α                                                                              TapÊup
                                                                                                                               +
                                            Vderror Phase                                                            VIIÊmax
                                           +        locked
                                                   oscillator
                                 Vdorder
                                                                                                                                        TapÊdown
                                                                                                                               +
                                                                                            Tap
                                                                                         controller
                                                                                                                     VIIÊmin
                 7.2d 1.0 p.u. power at the rectifier terminals with a DC voltage range of 1.0 p.u to 0.98 p.u, the
          To maintain
          DC current must have a respective range of 1.0 p.u. to 1.02 p.u. and this must also be considered in the
          equipment ratings. If the DC power is defined at the inverter AC or DC terminals, then the losses in the DC
          transmission system must also be taken into account. With a long distance transmission line, increasing
          the DC current by 0.02 p.u. for a reduction in DC voltage of 0.02 p.u. will not maintain the received power
          constant, as the I2R component of the the transmission loss will have increased by:
          Therefore, the current must be increased still further in order to maintain constant power at the receiving end.
          This can lead to both an increase in the rectifier rating and increased transmission losses.
          Many HVDC schemes are required to be bi-directional at rated power, that is, they have to be designed to
          transmit 1.0 p.u. power in either direction. Optimizing the rating of one converter for either rectifier or inverter
          operation is therefore inappropriate: a suitable compromise between the two forms of operation must be found.
          A further effect of CEA control to be considered is the impact of the constant extinction angle characteristic
          during an AC system disturbance.
Vd
                                                 Id
                                VdÊ+ÊΔVd                           γmeas+ÊΔγ
                           DCÊline
                           voltage
                            drop
                        compensation                                                                                           TapÊup
                                                               α
                                                                                                                       +
                                            Vderror Phase                                                   γmaxÊs-s
                                           +        locked
                                                      oscillator
                                 Vdorder
                                                                                                                              TapÊdown
                                                                                                                       +
                                                                                           Tap              γminÊs-s
                                                                                        controller
Id
                                                             γmeas+ÊΔγ
                VdÊ+ÊΔVd
                                                  α                                                                           TapÊup
                                                                                                                     +
                              DCÊline                   Phase γerror                                     VdmaxÊs-s
                              voltage                   locked         +
                               drop                    oscillator
                           compensation                                    γorder
                                                                                                                            TapÊdown
                                                                                                                     +
                                                                                             Tap
                                                                                          controller     VdminÊs-s
          pure CEA control and assuming a constant DC power control loop is in operation. From the figure we can
          see that below an SCR (refer to section 5.1) of around 2.0, pure CEA control combined with constant DC
                   7.2f
          power cannot function without the risk of voltage instability at the inverter AC busbar. In the event of a
          voltage step reduction of 10% in the converter AC busbar voltage, then from Fig. 7.2g we can see that for
          pure CEA control this would typically require an SCR of around 2.5.
          It must be noted that the reactive power switching at the converter busbar is not considered to constitute
          a voltage step event. This is because the converter controller knows when it is going to switch a reactive
          power bank and can therefore pre-condition the converter, that is, temporarily increase the extinction angle
          to avoid inducing an instability in the control of the converter. Such pre-conditioning of the extinction angle
          is known as a gamma kick (refer to section 2.3.3).
10
                                                                            8
                          StepÊreductionÊinÊconverterÊACÊbusÊvoltageÊ(%)
                                                                            7
                                                                                    Unstable
                                                                            6
                                                                            4
                                                                                                                                 Stable
                                                                            3
                                                                            0
                                                                                2      2.1     2.2                   2.3                  2.4   2.5   2.6
ShortÊCircuitÊRatioÊ(SCR)
Fig. 7.2g– Typical voltage stability limit of pure CEA control and constant DC power
                               extinction angle is temporarily allowed to reduce towards the minimum steady-state value of control angle,
                              7.2g
                              gamma (gmin).
                               Allowing the extinction angle to reduce means that the DC voltage can be maintained at a constant value
                               for a given step reduction in inverter AC busbar voltage, thereby not changing the DC power and actually
                               reducing the reactive power absorbed by the converter, thus assisting the AC system in its recovery from the
                               disturbance. This response to maintain the DC voltage constant is given the highest priority in the controller,
                               that is, it is the fastest loop operating within a cycle.
                               A much slower loop keeps the extinction angle at a constant value, typically operating with a time constant of
                               around one second. Hence, in the steady-state the converter will operate with a constant or ordered extinction
                               angle gamma order (gorder) thereby achieving savings in terms of plant rating as discussed above, but to a lesser
                               extent, as the constant extinction angle now includes a disturbance margin.
Id
                                                                  γmeasÊ+Ê∆γ
                VdÊ+Ê∆Vd
                              DCÊline                     α     Phase
                              voltage                           locked
                               drop                            oscillator
                           compensation
VdÊ+Ê∆Vd
                                                                        +
                                                                            Vderror                                                      TapÊup
                                                                                                                                     +
                                                                 +                    γerror                             VdmaxÊs-s
                                          Vdorder
                                                                                  1            +
                                                                                  s
                                                                                                   γorder
                                                                                                                                         TapÊdown
                                                                                                                                     +
                                                                                                               Tap
                                                                                                                         VdminÊs-s
                                                                                                            controller
          exchange of data can take place. The rectifier is able to receive a signal from the inverter with the value of
                7.2h
          the instantaneous extinction angle, gamma. If this extinction angle approaches a threshold then the rectifier
          can automatically modify its operating condition in order to maintain the inverter extinction angle at a target
          value, even at the expense of transmitted power. Consequently, voltage stability at the inverter AC busbar is
          significantly improved. Such a scheme has been successfully deployed on a number of projects [2].
                                         F                                                    Operator PoleÊcontrol
                                                                         pe                    power                           Current
                                                                      slo
                                                                 ncyÊ                         demand                   Current order
                                                             que                                                       control
                                                         Fre                                  Measured       Power                                FiringÊangle
                                                                                               power         control                     Limits
                                                                                                                       Voltage Voltage
                                                                                                                       control order
                                                                                                           1.0Êp.u.
                                                                              P                           DCÊvoltage
                                             Measured
                                             frequency
                                                                                              Fig. 7.2i– Typical frequency controller
                                    Measured
                                    frequency
                        7.2j
                          P                                                            Operator
                                                                                        power
                                                                                                    PoleÊcontrol
                                                                                                                             Current
                                                                                       demand                        Current order
                                                                                                          Power      control
                                                                                       Measured                                          Limits       FiringÊangle
                                                                                        power             control    Voltage Voltage
                                                                                                                     control order
                                                                                                        1,0Êp.u.
                                                                                                       DCÊVoltage
                                                                  time
                                                StationÊcontrol
                    Digital/                                                                  Power
                   protection                                                                 order
                     inputs
                                                                    Runback/PDO
                    Analog                                             control
                    meas.
                    inputs
          Automatic detection within the HVDC controller can detect the reduction in the system frequency in the
          faulted area and 7.2k
                             can be pre-programmed to automatically increase the power being delivered into the
          faulted network to help support the network frequency (see Fig. 7.2l). Importantly however, the HVDC
          link can be programmed to only increase the power it is delivering into the disturbed AC network up to
          a point that meets some threshold within the healthy network. For example, it can increase the power
          delivered until the system frequency in the un-faulted network falls to some pre-programmed value, thus
          the disturbance will not be propagated across HVDC coupled networks.
          The converse is also true if, prior to the disturbance, the HVDC back-to-back was exporting power from the
          area which is now disturbed. In this case the HVDC back-to-back can be pre-programmed to ramp down the
          transferred power or rapidly reverse power to support the failed network.
                                                                                                       DCÊpowerÊorder
                         DCÊpowerÊorder
                        PÊorder
                                                    }                    }     FrequencyÊrangeÊ
                                                                             constraintÊofÊinverterÊ
                                                                                   ACÊsystem           PÊorder                                   }     FrequencyÊrangeÊ
                                                                                                                                                     constraintÊofÊrectifierÊ
                                                                                                                                                           ACÊsystem
                                                                                                                        }
                                                                         Frequency                                                               Frequency
                                                NormalÊfrequencyÊrange                                                  NormalÊfrequencyÊrange
                                                ofÊrectifierÊACÊsystem                                                  ofÊinverterÊACÊsystem
          7.3.1. Selectivity
          Fault conditions or other abnormal conditions that might expose equipment to hazards, as well as
          conditions that will cause unacceptable disturbances to operation have to be detected and the faulty
          equipment has to be taken out of service or relieved of stresses in a controlled manner, so that disturbance
          to the operation of the rest of the system is minimized. The aim of the protection philosophy is to limit the
          amount of equipment removed when isolating a fault. Ideally, only the faulted equipment or the smallest
          possible scope containing the fault is disconnected. Selectivity is achieved by dividing the protection
          function into zones. The advantage of this approach is that the location of a fault can be determined and
          it makes it possible to disconnect the faulted equipment while leaving the rest of the system in operation.
          For example, in a multi-polar scheme the majority of faults are cleared by tripping one pole, leaving the
          other poles in operation.
          7.3.2. Reliability
          Various measures can be deployed to improve reliability, that is, to minimize the impact of faulty protective
          equipment. The primary measure is through redundancy. Redundancy should be applied to the entire
          detection and tripping sequence so that failure of any single element will not prevent tripping. The
          protection should have two independent tripping schemes and, where applicable, it is desirable to have
          each fault scenario detected using different principles. The protections should be arranged into overlapping
          protective zones and for each fault case there should be a fast primary protection with a restricted
          protective zone, supported by a time-graded, less sensitive, backup protection based on a different
          measurement principle and with a more extended protective zone.
          As far as possible, these features are not allowed to depend upon common equipment, nor do they depend
          upon the control system to detect maloperation. For cases where the primary/backup concept cannot be
          practically applied, the protection function should be duplicated. A typical example is the valve short-circuit
          case, where valve overcurrent limits dictate a short fault clearing time, which precludes the use of slow
          backup protection.
          As mentioned before, the provision of primary and backup protection is to avoid single point of failure
          preventing tripping. Possible causes are due to failures in one of the following:
             ➙ Measurement equipment
             ➙ Power supply to the protection
             ➙ Power supply to the protective sequencing
             ➙ Protective sequencing hardware and software
             ➙ Protection hardware and software
             ➙ Circuit breaker tripping circuits or breaker mechanism
BACK TO                                                                         DC Transmission Systems: Line Commutated Converters   |   409
CHAPTER
          7| CONTROL AND PROTECTION
                          To avoid single point failures primary and backup protections should be physically separated with independent
                          auxiliary power supplies and, where applicable, independent measurement transducers. The circuit breakers
                          should be provided with breaker failure protection and the tripping and blocking paths should be duplicated
                          and monitored by the control system.
                          The protection should, as far as possible, be independent of the control system, meaning separate power
                          supplies and separate/buffered measurements to avoid common mode failures. Control and protection
                          functions in practice cannot be totally separated. In AC networks, the protection action is restricted to circuit
                          breaker tripping, usually resulting in taking out the transmission capacity. Under some circumstances, the
                          controllability of HVDC systems makes it possible to use valve-firing sequences to avoid the permanent loss
                          of transmission capability.
                          7.3.3. Stability
                          The protection must be able to discriminate between external power system events and transient and
                          genuine internal faults, so that undue disruption or disturbance to DC transmission can be avoided. A typical
                          example is the requirement to avoid tripping on inverter commutation failure caused by AC network faults.
                          The DC link in this case is designed to recover from commutation failures. On the other hand, repeated
                          commutation failure caused by control maloperation must not be disregarded. Other protections may also
                          have to be coordinated under depressed AC voltage conditions to avoid maloperation. This is usually achieved
                          by setting the trip operating delay longer than the expected duration of an AC disturbance. Often such delays
                          are unacceptable and detection principles that can discriminate external and internal faults must be devised.
                          A protection must only act upon a specific type of fault within a designated zone and be inert to other types of
                          disturbances or faults external to the relevant zone. Stability and selectivity are achieved though time-grading
                          and a unit system. Protection settings and delays should be selected to avoid operation due to AC system
                          transient disturbances and recoverable faults. Time guards and (Inverse time with Definite Minimum Time)
                          IDMT characteristics are generally used for time grading. The unit system does not involve time grading and
                          therefore can be relatively fast in operation. This is achieved by means of a comparison of quantities at the
                          boundaries of the AC/DC or DC/DC system.
                          The AC network must also be protected from the consequences of DC control maloperation. The AC network
                          can, in most cases, tolerate the non-characteristic harmonics that are created during DC system disturbances.
                          In some cases protection operating times may need adjustment to meet AC network requirements.
                                                                                                                                          7
                                                                                                                         ElectrodeÊline
                                                                                              5
                                                                               4                      6
                                         1                                                                  HVDC
                                                                                                            filter
                                                                                                                                       8
                                                 3         3         3                                                 TransmissionÊlink
              9                                  FilterÊ   FilterÊ   FilterÊ
                                                 bankÊ1    bankÊ2    bankÊ3
                                             2
          where the converter is in immediate danger, the rated withstand of the valve should be greater than
          the operating time of the circuit breaker, inclusive of the detection time. This is typically, three to four
          fundamental frequency cycles.
                      7.4a converter fault where the converter is not in immediate danger, it is desirable to wait until
          For a non-urgent
          the control system has reduced the load current to a low level before tripping the feeder circuit breaker.
          In the case of converter feeder circuit breaker tripping, the filters should be opened at the same instant, or
          earlier, to assist the opening of the feeder circuit breaker.
          7.4.1.2. Block
          Protective blocking is used to stop the flow of both AC and DC current in order to limit the effect of the
          fault. This is achieved by simply removing the firing pulses to all the valves in the converter. Normally a
          protective block is followed by a trip of the circuit breaker, as only removing the firing pulses may not
          always stop conduction.
                                                                                                                              TransmissionÊlink
                                                                                              FaultÊ1                                   FaultÊ9
                                                                                             1        5    9
                                                                     T1          FaultÊ4
FaultÊ2
FaultÊ5 7 11 3
                    FaultÊ8                                                                  12      4     8
                                                                     T2
                                                                                                                                     NBGS
                                                                                                                FaultÊ6
                                                                                                                                    ElectrodeÊline
                                                                                                                                        FaultÊ7
                                 Fig. 7.5a– Ground faults and short-circuits
     7.6. OVERVOLTAGE
          Overvoltages can be classified into 2 different types – transient and long term. HVDC equipment is
          protected against transient and temporary overvoltages by surge arresters and converter control. It is also
          designed for continuous operation within the AC system continuous steady-state voltage limits. The AC
          overvoltage protection is used to protect the equipment against persistent AC system voltage excursions
          beyond the steady-state limits resulting from a system disturbance.
          Voltage stress on the valve winding side due to tapchanger control failure is detected by the tap limit
          protection, which inhibits the tapchanger tap up action. For prolonged valve winding voltage stress, usually
          in the order of tens of seconds, the DC link is tripped.
          For the transformer valve winding side overvoltage protection, the characteristic with respect to time needs to
          grade under the valve surge arrester power-frequency voltage/time characteristic in order to avoid excessive
          energy dissipation in the arrester. The arrester characteristic is provided by the arrester manufacturer. The
          valve surge arrester characteristic to be used is usually the MCOV curve (power-frequency voltage versus
          time characteristic). For the transformer line winding side overvoltage protection, the characteristic with
          respect to time needs to grade under the transformer line side surge arrester capability, to avoid excessive
          energy dissipation in the arrester. It also needs to grade under the converter transformer overfluxing curve,
          to protect the converter transformer.
          The overvoltage protection of the transformer valve winding is usually profiled with time, to fall below the
          conduction level of the valve surge arresters. In this way thermal stress to the arresters resulting from
          prolonged dissipation can be avoided.
          In both cases, the surge arrester characteristics to be used are the MCOV curve (power-frequency voltage
          versus time characteristic) obtained from the manufacturer.
          The converter transformer overfluxing characteristic used should ideally be the overfluxing curve corresponding
          to the maximum tap number (minimum primary turns), as this gives rise to the worst fluxing condition for a given
          applied primary voltage. Doing this ensures that the transformer is adequately protected under all operating
          conditions. As the line winding overvoltage protection only responds to voltage and not volts per hertz (or
          voltage-time area), an additional margin is required below the overfluxing characteristic shown to account for
          low frequency conditions. To achieve this, use is made of the expected system frequency variations.
          If possible, the line winding overvoltage protection should also provide some backup protection to the AC
          filter bank capacitor overvoltage. This requires that the line winding overvoltage characteristic be set under
     1 – A heartbeat is a supervised regular exchange of information between two different sub-systems that is used to infer that
         the sub-system is still active and working correctly.
                                                                                       DispatchÊcenterÊ/
                              AC/DC                                                     SystemÊcontrol
                              system
                               level
                                                                                          StationÊcontrol
                                                                                         BipoleÊpowerÊorder
                               Station                                                    FrequencyÊlimiting
                                                                                          FrequencyÊcontrol
                                level                                                     ACÊvoltageÊcontrol
                                                                                        ReactiveÊpowerÊcontrol
                                                                                        BipoleÊ1Êcontrol                               BipoleÊ2Êcontrol
                                Bipole                                                   PoleÊpowerÊorders                              PoleÊpowerÊorders
                                 level                                                      PowerÊlimits                                   PowerÊlimits
                                                                                       PoleÊcurrentÊbalancing                         PoleÊcurrentÊbalancing
                                                             PoleÊ1Êcontrol                                          PoleÊ2Êcontrol
                                                             PoleÊpowerÊcontrol                                      PoleÊpowerÊcontrol
                                                                    Alpha                                                   Alpha
                                 Pole                              Gamma                                                   Gamma
                                                                                                                        PhaseÊlimits
                                 level                          PhaseÊlimits
                                                            StaticÊcharacteristics                                  StaticÊcharacteristics
                                                            TapchangerÊcontrol                                      TapchangerÊcontrol
                                                         SubÊsynchronousÊdamping                                 SubÊsynchronousÊdamping
                                                           PowerÊswingÊdamping                                     PowerÊswingÊdamping
                                                               PoleÊprotection                                         PoleÊprotection
                              Converter
                                group                               VBE                                                    VBE
                                                           ThyristorÊfiringÊcontrol                               ThyristorÊfiringÊcontrol
                                level                     ThyristorÊstatusÊreporting                             ThyristorÊstatusÊreporting
                                                             ThyristorÊprotection                                   ThyristorÊprotection
                7.10a
BACK TO       422   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
               DispatchÊcenterÊ/ÊSystemÊcontrol
                                    StationÊcontrol
                                                      BipoleÊcontrol
                                                       PoleÊcontrol
                                                      ConverterÊgroupÊcontrol
                                                                                Pole     Pole
                                                                                master   slave
Filters Filters
ACÊsystem ACÊsystem
                                                                                Pole     Pole
                                                                                master   slave
Filters Filters
          of communication such as Asynchronous Serial Links and Power Line Carrier systems can also be used to
          exchange information.
          Customer-specific protocols and communications media may have to be accommodated at this level. This
          is more common when the HVDC control system is being supplied as part of a HVDC station refurbishment.
       Station Control comprises the following functions:
           ➙ Station Power Control
    7.11a ➙ Power Demand Override Control
           ➙ Reactive Power Control
           ➙ AC Voltage Control
           ➙ Power Modulation Control
           ➙ Power/Frequency Control
Valve
                   Protection M1
                                                 Voting
Protection M2 Trip
Protection M3
          be used at 50% to 70% of their rated operating power to reduce their temperature rise and improve reliability.
          Isolated current-limiting power supplies fitted with alarmed ground fault detection should be used for all
          plant whetting supplies to allow correct operation to continue in the presence of a single earth fault in the
          plant wiring.
     3 – A sleeping fault is a fault in a currently unused or duplicated path of functionality that does not affect the system
         functionality until it is exposed by a mode change or a failure of its duplicated partner path. E.g. if two fully rated power
         supply units are correctly connected in parallel, one unit can fail without affecting the operation of the system they supply.
         The failed unit is said to be a sleeping fault.
Fig 7.12b– eLumina Converter Control and Protection (CCP) cubicle - One lane
                             system and the protocols and equipment that are used. Each active device used should provide local status
                             information to the control system, to allow both early warning of imminent failures and the identification of
                             sleeping faults.
                             The communications systems and mechanisms used must support the use of redundant communicating
                             devices. The HMI system needs to accept information from the active lane of the control system, but must
                             also be capable of switching to the other lane should the active lane fail. This is often a many-to-many
                             relationship as the HMI system should be fully duplicated and be able to change over independently of
                             the control system.
7.13a
TOC         434 |    DC
      HVDC: Connecting toTransmission
                          the future Systems: Line Commutated Converters
      8                 DC TRANSMISSION
                        CIRCUITS
      For HVDC converter stations to perform their role, they need to
      be connected together. This chapter describes the different types
      of HVDC scheme transmission connections and their particular
      design, configurations and installation features.
      You will learn about overhead lines, with all of their mechanical,
      meteorological and insulation issues, together with how such
      systems are designed to ensure that they are safe, economic and
      have minimum right-of-way requirements. Topics include how
      the lines can be designed to not interfere with radios and other
      telecommunications equipment, or emit unacceptable levels of
      electrical or magnetic fields and audible noise. The economics for
      both capital equipment and losses are also discussed.
      You will learn about the differences between AC and DC cables
      and about different types of underground and submarine DC cable
      technologies available to inter-connected converter stations. You
      will also learn about the methods used for laying long undersea
      cables using specialized high-tech equipment.
      An important feature of DC transmission is its ability to use the earth
      or the sea as a return current path using electrodes. This chapter will
      cover this topic and explain this method’s environmental impacts to
      provide a conduction path between converter stations.
      Chapter contents
      8.             DC TRANSMISSION CIRCUITS...................                                                  434
              Single
                                                                             0                      0                     0
           monopolar line
                Single
                                                                         50 (100)                   0                     0
             bipolar line
               Double
                                                                           100                    100                     0
             bipolar line
              Two
                                                                         50 (100)                   0                 50 (100)
          monopolar lines
               Two lines
              (bipolar or                                                  100                    100                   100
             homopolar)
In this section, unless otherwise stated, we will mainly be considering the bipolar line configuration.
                               S2       w  2  w  2                  ( H − H1 ) 
                                          2  −  1   − ε (T2 − T1 ) −  2            =0                                  [Eqn 8.1.2a]
                               24 
                                          H 2   H 1                 E A 
                          Where:
                          w is the conductor weight per unit length or the equivalent vertical component due to wind and ice
                          H is the horizontal component of the conductor tension
                          T is the temperature
                          e is the length variation coefficient
                          S is the span length
                          E is the elasticity modulus
                          A is the conductor cross section
                          *Subscripts 1, 2 indicate the state.
                          In general, ‘state 1’ refers to the most frequent condition, called EDS- Every Day Stress (EDS temperature, no
                          ice, no wind). The value H1 is chosen as the design criterion (around 20% of UTS/RTS Ultimate/Rated Tensile
                          Strength for the conductor and 11% for Extra High Strength (EHS) steel shield wires to take vibration into
                          consideration).
                          ‘State 2’ generally refers to: maximum and minimum conductor temperature, maximum wind or ice, and
                          the ice/wind combination [2]. As design criteria, tensions must not be above 30% in the case of minimum
                          temperature without wind, and not above 50 to 70% for extreme conditions combining wind and ice. [4]
                          Once the H values have been obtained, the corresponding sag can be calculated
                                           Sl       
                              s = c  cosh       − 1                                                                      [Eqn 8.1.2b]
                                           2 c       
                                    H
                              c=                                                                                              [Eqn 8.1.2c]
                                    w
                                                      1
                              Y = − ln (− ln (1 −       ))                                                                    [Eqn 8.1.2 e]
                                                      T
                          Where:
                          Vt is the wind velocity (m/s) with return period T
                          V is the wind velocity - mean (m/s)
                          S is the standard deviation (m/s)
                          C1, C2 are coefficients dependent on the sample size: C1 = 1.11237 and C2 = 0.53622, for a sample of 30 years [5]
                          T is the return period (years)
                          CIGRÉ [4] uses the following sample values:
                             ➙ Wind intensity: mean of the sample (10 min average wind) = 18.4 m/s
                             ➙ Standard deviation = 3.68 m/s;
                                                                 Return period
                                  Return period T            of the variable having             Return period of remaining
          Reliability level
                                      (years)                 a low probability of                  variables (index H)
                                                              occurrence (index L)
                  1                        50                                50                Average of yearly maximum values
                  2                        150                            150                  Average of yearly maximum values
                  3                        500                            500                  Average of yearly maximum values
     Table 8.1b – Ice data - return period
          For any selected reliability level, three loading conditions are defined as shown in Table 8.1b.
          8.1.3.1. Overvoltages
          Line insulation levels are dependent on voltage stresses that reach the air gaps and thus are chosen to be
          the best compromise between satisfactory electrical performance and reasonable costs.
          The following voltage stresses must be considered to define the tower top geometry of the towers:
             ➙ sustained due to operating voltage
             ➙ transient due to lightning
             ➙ switching surge overvoltages
          The switching surge overvoltages in a HVDC system occur in the DC as well as in the AC part of the system.
          In the context of HVAC systems, overvoltages originate from switching operations: line energization, line
          reclosing, load rejection, fault application, fault clearing and reactive load switching, and all should be
2.1
2.0
                                               1.9
                          OvervoltageÊ(p.u.)
                                               1.8                                                                                         FaultÊat
                                                                                                                                                 Mid
                                               1.7
1.6
1.5
                                               1.4
                                                     0       375                    750                  1,125                  1,500
                                                 Rectifier                          Mid                                         Inverter
                                                                        TransmissionÊlineÊlengthÊ(km)
Fig. 8.1a– Maximum overvoltage in the healthy pole, due to a fault in the middle of the other pole
                                  1.8
                                                                                                                       FaultÊat
                                  1.7
                                                                                                                        Sending
                                  1.6
                                                                                                                        1/8
                                                                                                                        1/4
            OvervoltagesÊ(p.u.)
                                  1.5
                                                                                                                        3/8
                                  1.4                                                                                   Mid
                                                                                                                        5/8
                                  1.3
                                                                                                                        3/4
                                  1.2                                                                                   7/8
                                                                                                                        Receiving
                                  1.1
                                  1.0
                                         0     375                750                  1,125                 1,500
                                                      TransmissionÊlineÊlengthÊ(km)
Fig. 8.1b– Overvoltage profiles: faults in different positions (line with frequency dependent parameter)
                         Specific creepage
                                                       2.0 – 2.5                2.5 – 3.2                3.2 – 4.0                4.0 – 7.0
                         distance (cm/kV)
                        Table 8.1d– Creepage distances [7]
                          For agricultural areas and woodlands 23 mm/kV is recommended [6], and for outskirts of industrial areas 40
                          mm/kV is recommended. Some references recommend even lower creepage distances down to 20 mm/kV for
                          areas classified as ‘with very light pollution’. As a reference, the Itaipu lines (‘light pollution - agricultural area’)
                          were designed for 27 mm/kV and have shown adequate performance over more than 20 years of operation.
                          Considering a specific creepage distance of 30 mm/kV, the numbers of insulators for ± 600 kV and ± 800 kV
                          are respectively 36 and 46 insulators, each with creepage distance 508 mm: the insulator string lengths
                          are 6.2 and 8.2 m (considering also 165 mm for insulator pitch and 250 mm string hardware size).
                          Generally glass or porcelain insulators are used, however if the line crosses highly contaminated areas, then
                          composite insulators may be preferable to avoid large insulator string lengths. Insulators for DC applications
                          need to be specially designed because of electrochemical corrosion problems, especially on cap and pin
                          insulators and with a profile with longer creepage distance (anti fog type).
                          Where:
                          V50 is the insulation critical flashover voltage (50% probability), in kV
                          d is the gap distance (m)
                                   3400
              V50 = k .                                                                                             [Eqn 8.1.4b]
                                  1+ 8 / d
          Normally the clearances are determined based on the fault application overvoltage profiles, aiming at a
          certain ‘flashover risk of failure’ target (design criteria) [4]. For DC lines the overvoltage to be considered is
          the fault case described in section 8.1.3.2.. To fully evaluate the risks, the overvoltage profiles considering
          faults in several positions along the line must be evaluated. The risk of failure is obtained by considering
          the risk of the individual gaps at any position on the line and their parallel associations.
          It should be noted that if the line is designed with I-insulator strings, then it is recommended to consider the
          effect of possible winds simultaneously with the overvoltages in the risk calculation. There are two approaches
          for taking this into account: first, by calculating the clearances for an established risk and admitting that such
          clearances will be maintained with a certain swing due to wind [3]; or considering the simultaneous occurrence
          of wind and overvoltage and calculating the composite risk.
                                                               Conductor-to-tower
                                8.0
7.0
                                6.0
                                5.0                                                                               750Êkm
                ClearanceÊ(m)
                                                                                                                  1,500Êkm
                                4.0
                                                                                                                  2,250Êkm
                                3.0                                                                               3,000Êkm
                                2.0
1.0
                                0.0
                                      300        400          500               600   700          800
                                                                 VoltageÊ(kV)
                                                                        Conductor-to-groundÊ(object;Ê4.5Êm;Êunder)
                                                 8.0
7.0
6.0
                                                 5.0                                                                             750Êkm
                                 ClearanceÊ(m)
                                                                                                                                 1,500Êkm
                                                 4.0
                                                                                                                                 2,250Êkm
                                                 3.0                                                                             3,000Êkm
                                                 2.0
1.0
                                                 0.0
                                                       300        400             500                  600           700   800
                                                                                        VoltageÊ(kV)
Fig. 8.1d– Conductor to object clearance (add 4.5 m to get conductor to ground distance)
                          Using the wind distribution example above, the wind intensity is 13.54 m/s. The swing angles caused by this
                          wind varied from 13 to 19 degrees for ACSR conductors varying from 1,274 mm2 to 403 mm2. [4]
                                                        8.1d
                          It should be noted that considering both the conductor swing due to the wind, with 1% probability of being
                          exceeded in one year and the clearances corresponding to a risk of 1/50 years, that the final flashover risk
                          will be much smaller than 1/50, therefore the stated criteria are conservative. (In the case for a risk of 1/100
                          yr the swing angles varied from 6 to 9 degrees.)
                          An alternative approach would be to find a clearance considering the composite risk resulting from overvoltage
                          distribution and a swing due to the wind distribution.
                          Where:
                          dmin is the operating voltage or switching surge clearance
                                             a
                              R=                               is the bundle radius                                                [Eqn 8.1.5b]
                                        2sin( π / N )
                          a is the sub conductor spacing
                          N is the number of sub conductors in the bundle
                          L is the insulator string length
                          q is the swing angle for the wind speed as above
                          w is the tower width at conductor level and varies from 1.2 to 2.5 for voltages from ±300 to ±800 kV
                          The minimum pole spacing required for switching surges and operating voltage conditions for ±800 kV
                          bipole lines are shown in Fig. 8.1e. [4]
                          It can be seen from Fig. 8.1e that the operating voltage criterion governs the pole spacing for ±800 kV
                          voltages and of course for the other voltages as well.
                          In the case that V strings are used, there will be no swing angles due to wind at the towers and the clearance
                          requirements for switching surges will determine the pole spacing. However, the V strings having length (L)
BACK TO       444   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
                                                             PoleÊspacingÊforÊ800ÊkV
                                     22
                                                                                                             OV:ÊOperatingÊVoltage
                                     21                                                                      SS:ÊSwitchingÊSurge
                                     20                                                                              OV
                                     19                                                                              SSÊ750Êkm
                  PoleÊspacingÊ(m)
18 SSÊ1,500Êkm
                                     17                                                                              SSÊ2,250Êkm
                                     16                                                                              SSÊ3,000Êkm
                                     15                                                                     OV : Operating Voltage
                                                                                                            SS : Switching Surge
                                     14
                                          500     1,000       1,500          2,000        2,500     3,000
ConductorÊcrossÊsectionÊ(MCM)
          will be inserted in the tower, meaning that the minimum pole spacing (PSmin) for installation will be:
                                           8.1e
               PSmin = 2 ⋅ L ⋅ cos (45°) + w                                                                                     [Eqn 8.1.5c]
          It is assumed here that the V string angle is 90 degrees, however this opening can be reduced.
          The pole spacing requirement is otherwise calculated by:
          Where:
          PJis the Joule heating                                 PM is the magnetic heating
          PSis the solar heating                                 Pi is the corona heating
          Pcis the convective cooling                            Pr is the irradiative cooling
          Pwis the evaporative cooling
          The maximum temperature of an aluminum conductor is limited generally to 90 °C (a design criterion
          commonly used in many countries) for steady-state and in emergency or short-term conditions. Temperatures
          even above 100 °C could be accepted for non-special conductors (thermal resistant conductors can withstand
          much more in steady-state conditions). However, the conductor is selected based on economic criteria (cost
          of line plus losses) leading finally to a much lower maximum operating temperature in normal conditions (~55
          to 60 °C). Therefore, in practice, 90 °C will usually only apply to pole conductors under abnormal conditions
          as well as to electrode lines and metallic return conductors.
          Fig. 8.1f shows the current capability for some conductors assuming the following data [4]:
          Wind speed (lowest)                           1 m/s
          Wind angle related to the line                45 degrees
          Ambient temperature                           35 °C
          Height above sea level                        300 to 1,000 m
BACK TO                                                                                           DC Transmission Systems: Line Commutated Converters   |   445
CHAPTER
          8| DC TRANSMISSION CIRCUITS
ConductorÊcurrentÊcarryingÊcapability
2,500
2,000
                                                          1,500                                                                                90¡
                                        ÊCurrentÊ(A)                                                                                           70¡
                                                                                                                                               60¡
                                                          1,000                                                                                50¡
500
                                                                0
                                                                    0      500       1,000        1,500           2,000       2,500   3,000
                                                                                       ConductorÊcrossÊsectionÊ(MCM)
                                                                                             ConductorÊSag
                                                           23
22
                                                           21                                                                                 50¡
                                                                                                                                              60¡
                                                SagÊ(m)
                                                           20
                                                                                                                                              70¡
                                                           19                                                                                 90¡
18
                                                           17
                                                                500        1,000         1,500            2,000            2,500      3,000
                                                                                     ConductorÊcrossÊsectionÊ(kcmil)
                          Fig. 8.1g shows the sags for conductor temperatures in the range of 50 to 90 °C, considering a span of 450
                          m. For ‘state 1’ condition, the EDS equals 20% of RTS with a temperature of 20 °C.
                                                                    8.1g
                          It can be seen that the sags vary from 18 to 22 meters, depending on the conductor temperature and type of
                          conductor. It should be noted that the conductors considered in this graph are selected from manufacturer’s
                          catalogs and that conductors with the same aluminum but different steel contents will have different sags.
          Where:
          hp is the distance from the center of the bundle to ground at tower
          CS is the clearance to ground at mid-span determined by insulation or electric field criteria
          sg is the conductor sag at maximum temperature
          R  is the bundle radius
          Extis the height of any above ground extensions installed at the base of the tower
          The shield wire height (hg) at the tower is:
                          Where:
                          dmin
                             is the operating voltage clearance
                          R  is the bundle’s radius (m)
                          L  is the insulators string length
                          S  is the conductor sag
                          q is the swing angle due to wind
                          PS is the pole spacing
                          As an example, the ROW widths obtained in [4] were 66 to 70 m for ±600 kV, and from 73 to 88 m for ±800 kV.
                          The minimum ROW widths when using V strings are calculated according to the same equation, but
                          disregarding the insulator string length.
                          Note that the results (for I or V strings) are partial, as corona effects have not yet been considered. Also note
                          that only the horizontal design is considered (the vertical design will lead to smaller ROW).
                                                                  V
                                 E m = Ea =
                                                                                
                                                                               
                                                                   2⋅H
                                                  r ⋅ ln                                                                 [Eqn 8.1.10a]
                                                                           2    
                                                           r ⋅  2 ⋅ H  + 1 
                                                                S           
                          Where:
                          V is the voltage applied (actually ± V) to the conductors of the line (kV)
                          r is the conductor radius (cm)
                          H is the conductor height (cm)
                          S is the pole spacing (cm)
                          When bundled conductors are used, the Markt and Mengele’s method is used: the average (Ea) and maximum
                          (Em) bundle gradients of a bipolar HVDC line, with n-conductor bundles on each pole, are given as [9]:
                                                          V
                                 Ea =
                                        nr ⋅ ln             2⋅H
                                                                   2
                                                           2 ⋅ H
                                                  req ⋅         +1                                                       [Eqn.8.1.10b]
                                                              S 
                                                   g          d          n          H . S
                              Pfair = P0 + 50 log   + 30 log   + 20 log   − 10 log  .                                [Eqn 8.1.10h]
                                                   g0         d0         n0         H0 S0 
                                                   g          d          n          H . S
                              Pfoul = P0 + 40 log   + 20 log   + 15 log   − 10 log  .                                 [Eqn 8.1.10i]
                                                   g0         d0         n0         H0 S0 
                          Where:
                          P is the bipole corona loss in dB above 1W/m,
                          d is conductor diameter in centimeters
                          g is the conductor surface gradient
                          n is the number of conductors
                          H is the height
                          S is the pole spacing
                          The reference values assumed are: g0 = 25 kV/cm, d0 = 3.05 cm, n0 = 3, H0 = 15 m and S0 = 15 m.
                          The corresponding reference values of P0 were obtained by regression analysis to minimize the arithmetic
                          average of the differences between the calculated and measured losses. The values obtained are P0 = 2.9 dB
                          for fair weather and P0 = 11 dB for foul weather.
          Where:
          RI	is the radio interference level measured at a distance D from the positive pole with a CISPR instrument,
              dB above 1 μV/m
          g is the maximum bundle gradient, kV/cm
          d is the conductor diameter, cm
          f is the frequency, MHz
          D is the radial distance from positive pole, m
          q is the altitude, m
          The reference values are g0 = 25.6 kV/cm and d0 = 4.62 cm.
          Based on the results of some long-term studies, the maximum fair weather RI may be obtained by adding 6 dB
          [13] and the average foul weather RI may be obtained by subtracting 5 dB from the average fair weather value.
          Design criteria for RI from transmission lines are generally based on signal to noise ratios (SNR) for acceptable
          AM radio reception. Studies carried out on corona-generated RI from AC and DC transmission lines [6] indicate
          that the SNRs for acceptable radio reception are:
          a) Background not detectable SNR >30 dB
          b) Background detectable 20 dB
          c) Background evident 8 dB
          The minimum radio station signal requirement in many countries is 66 dB for cities with a population from
          2,500 to 10,000 inhabitants.
          In many countries the guidelines are for limiting the RI at the edge of the right-of-way to (66-20) = 46 dB or to
          maintain a reception quality (b). The equation for calculating noise above the reception level gives the average
          fair weather noise. For more stringent criteria, the noise should be below 46-4= 42 dB for 90% probability of not
          being exceeded, meaning that 10% of the time the reception will be classified as between criteria b) and c)
          above. The reference frequency is considered to be between 0.5 and 1 MHz.
                                                                                        q
              AN = AN 0 + 86 log( g ) + k log ( n ) + 40 log ( d ) − 11.4 log( D ) +                         [Eqn 8.1.11b]
                                                                                       300
                                            1    Ld       Ln + 10
                                                                      
                              Ldn = 10 log  15⋅10 10 + 9⋅10 10                                                                              [Eqn 8.1.11c]
                                             24                    
                          Where:
                          Ld and Ln are the day and night time sound levels, respectively.
                          However, since the highest level of AN from DC lines occurs in fair weather, it may be prudent to limit the Ldn
                          (10%) of the AN from HVDC transmission lines to 55 dB(A) and this corresponds to 50 dB(A) for Ldn (50%). The
                          variation in AN between day and night is limited to approximately 1.5 dB(A) [13].
                          Therefore assuming Ld = Ln = 42 dB(A), then Ldn~50 dB(A).
                                                           AudibleÊandÊradioÊnoiseÊAACÊ2282;ÊdÊ=Ê44.253Êmm;ÊPSÊ=Ê15Êm;ÊHÊ=Ê14,5Êm;ÊVÊ=Ê600ÊkV
                                               50
45
                                               40
                               ANÊorÊRIÊ(dB)
                                                                                                                                                      AN
                                               35                                                                                                     RI
30
25
                                               20
                                                    0       10                 20                  30                40                 50       60
                                                                                     DistanceÊtoÊtowerÊcenterÊ(m)
Fig. 8.1h– RI and AN noise as function of the distance to tower center on positive polarity side
                          As a conclusion, the AN calculated by the equation above (average value) should be limited to ~42 dB(A) at
                          the edge of the right-of-way.
                                                    8.1h
                          8.1.11.3. RI and AN Calculations
                          Fig. 8.1h shows the RI and AN noise profiles for the Madeira River Power Plant HVDC lines.
                          As can be seen in the above figure, an ROW width of 20 m is enough to meet the AN criteria, however it should
                          be 55 m for RI criteria (the conductor diameter is relatively large).
          For a given electrical parameter (electric field, ion current, and ion density), Q the actual value is determined by:
              Q = Qe + s(Qs – Qe)                                                                              [Eqn 8.1.12b]
          where Qe and Qs are the electrostatic and the saturated values of the parameter.
          Values for k and G0 were determined by using measurements on test lines to get the values (L) with 50% and
          95% probability, positive and negative polarity and for several weather conditions: summer foul with high
          humidity/fog, summer fair, spring fair, fall fair, rain and snow.
          In the absence of corona on the conductors, no space charges are created and the electric field under a DC
          line may be calculated using the principles of electrostatics. The space-charge-free electric field Ee(x) at any
          point P on the ground plane is obtained as:
                          Where:
                          V = voltage applied to the bipolar line, kV
                          H = conductor height, m
                          S = pole spacing, m
                          req = equivalent radius of the conductor bundle, m
                          x = lateral distance of P from the center of the line, m
                          The presence of corona-generated space charge maintains the conductor surface electric field at the corona
                          onset value, but enhances the electric field at points away from the conductors, with maximum enhancement
                          occurring at ground level [9].
                                         I 
                                H j = ∑ i i Φi j                                                                           [Eqn 8.1.12d]
                                         2π ri j
                                            
                                B = 4 ⋅ π ⋅ H ⋅ 10–7                                                                       [Eqn 8.1.12e]
                          Where:
                          ➝
                          B    is the magnetic field at point (x,y)
                          Ii   are the pole currents (A)
                          rij  is the distance from pole to the point (x,y) (m)
                          ➝
                          F ij is the unit vector in the direction of the product of the vector current Ij and the vector segment rij
                          Note that vector B is in the direction of rij and that the current is a complex number (with modulus and phase).
                          The worst case is when there is current in only one pole.
                          8.1.13.1. Ions
                          Corona effects produce air ions of positive and negative polarity. Some of them are neutralized in the
                          opposite pole and some migrate to the soil. A HVDC line is a source of ions, but there are others that
                          generate much higher levels of ions.
BACK TO       454   |   DC Transmission Systems: Line Commutated Converters
CHAPTER
          The interaction of air-borne ions with the body is through the skin and respiratory tract. The conductive tissues
          at the surface of the body shield tissues below the body’s surface and organs. Most inhaled ions deposit in
          the nose and bronchi, with none reaching the deep alveoli of the lung.
          Research in animals has had a focus on behavior, metabolism of neuro-hormones, serotonin (one of the
          chemicals that the brain and nerves release to affect adjacent cells), and the respiratory tract. Also, the
          effects on reproduction, longevity and on farming (dairy cattle) have been studied. In the investigations the
          ion concentration varied from 104 to 106 ions/cm3 (inside the ROW the maximum is 105).
          Human studies examined mood and performance, serotonin, respiratory function and surveys on people living
          near the lines as related to illness days, depression, drowsiness, and respiratory congestion.
          The animal and the human studies provided no evidence of any harmful effects.
          The human body is always subject to the static magnetic field of the earth (which varies from 30 to 70 µT).
          HVDC lines create a magnetic field that is below 70 µT, and therefore should not be a concern.
          Research in animals has focused on genetic effects, cell growth, reproduction and development, directional
          orientation and behavior (circadian rhythms and pineal gland). No major influence was found except as related
          to navigation/orientation of certain bacteria, homing pigeons, honeybees and elasmobranches fish [22].
          Human studies focused on inquiries with people working in industries with strong magnetic fields (aluminum
          plants for instance).
25
                                                      µT
                                                           20
                                                           15
                                                           10
                                                           5
                                                           0
                                                                0      10         20             30             40   50
                                                                            Distance from tower center (m)
                          Studies on humans and animals do not indicate that exposures to DC magnetic fields up to 2 mT (20 Gauss)
                                                         8.1i
                          would result in an adverse outcome. Avian or animal migration can be influenced however.
                          It should be noted that the magnetic field produced by HVDC lines adds to the earth’s magnetic field and
                          interferes with compasses. In this case, other navigation equipment may be used, like GPS.
                          Fig. 8.1i shows the magnetic field profile at ground level for a ±500 kV line.
                          The magnetic field is lower than 50 µTeslas (0.5 Gauss). The earth’s magnetic field is also approximately 0.5
                          Gauss, and this value is acceptable according to ICNIRP.
                                                           50
                                                           40
                                                           30
                                                           20
                                                           10
                                                            0
                                                                0            10                   20                  30                                     40                50
                                                                                               DistanceÊtoÊtowerÊcenterÊ(m)                                                                     Electric field
                                                                                                                                                            40
30
                                                                                                                                                            10
          equivalent, leading to similar conductor height at midspan.
                                                                8.1j                                                                                         0
          There are different methods of calculation and no full agreement about what to use. AlsoDistance
                                                                                                   theretoare
                                                                                                           Center (m)
                                                                                                               relatively
          few consistent sets of field measurements to support a decision. The best set of measurements was obtained
          with the Pacific Intertie project, including about two years of continuous measurements that allow a good
          statistical evaluation of the phenomena to be made.
                                     20                                                                                                                     40
                                                                                                                                 ion current (nA/m^2)
                                     10                                                                                                                     20
                                      0                                                                                                                      0
                                     -10                                                                                                                    -20
                                     -20                                                                                                                    -40
                                     -30                                                                                                                    -60
                                     -40                                                                                                                    -80
                                                -60             -40    -20           0            20          40            60
                                                                                                                                                            -100
                                                                         Distance to Center (m)                                                                    -60       -40          -20          0            20   40   60
                                                                                                                                                                                           Distance to Center (m)
          Another calculation method isIonthe  one in the BPA software named Anypole developed from the measurements.
                                            current
          Using
             80 this software with the default parameters leads to the electric field and ionic current values with a 90%
          probability
             60       of not being exceeded (according to BPA engineers).
          The40results obtained with Anypole for the Pacific Intertie project are shown in the Fig. 8.1k below.
          ion current (nA/m^2)
             20
          As the behavior of this line is considered fair, the results can be used for comparison with other lines (mainly
          new0lines).
                                     -20
                                     -40
                                     -60
BACK TO                                                                                                                                                          DC Transmission Systems: Line Commutated Converters               |   457
CHAPTER                              -80
                                     -100
                                                -60             -40                  0                                      60
          8| DC TRANSMISSION CIRCUITS
LineÊcostÊasÊfunctionÊofÊvoltage
                                              450,000
                                              400,000
                                              350,000                                                                           2;Ê300
                              CostÊ(US$/km)                                                                                     3;Ê500
                                              300,000
                                              250,000                                                                           4;Ê600
                                              200,000                                                                           5;Ê800
                                              150,000
                                              100,000
                                                        0   2,500    5,000            7,500          10,000   12,500   15,000
TotalÊcrossÊsectionÊ(MCM)
Fig. 8.1l – Adjusted line costs (Note: 2; 300: means 2 conductors and ±300 kV)
                          8.1.15. Economics
                                     8.1k
                          The estimated transmission line costs, as well as the economic analysis considering staging, losses,
                          operation and maintenance costs and the financial parameters are presented in this section.
                          Where:
                          a, b, c, d are parameters obtained by curve fitting with a set of line cost estimates
                          V is the pole to ground voltage (kV)
                          N is the number of conductors per pole
                          S = N S1 total aluminum conductor cross section (MCM): S1 is one aluminum conductor cross section (not
                          including steel area).
          Where:
          P is the rated bipole power MW
          V is the voltage to ground kV
          r is the bundle resistance ohms/km (r = ro L / S)
          ro is the conductor resistivity 58 ohms MCM/ km (or 58/0.5067 mm2/km)
          L is the line length in km
          S is the aluminum cross section in MCM
          The economic basis for determining the cost of losses is that a thermal power plant is built at the load center
          to supply the losses.
          The cost of Joule losses (CLj) in one year will be:
          Where:
          Cp is the yearly cost of the power plant
          Ce is the fuel cost
          lf is the loss factor
          Where:
          S is the aluminum cross-section per pole,
          k 	is the factor to convert Present Worth into yearly cost: k = j/[1 – (1 + j) – n], j being the interest rate and n
            the period of amortization.
          A, B, A1 and B1 are coefficients relating the cost of the line to the cross-section S (based on [Eqn 8.1.15a]).
          0.02 is the factor to consider operation and maintenance costs and 1.1 is the factor related to the interest
          during construction, assuming the construction period is 2 years.
          Considering that CLj = C/S is the yearly cost of the Joule losses and (for the moment) neglecting the corona
          losses, then the total yearly cost (Cty) is:
              Cty = Cline + CLj = A + B . S + C/S                                                              [Eqn 8.1.15e]
          Where:
          C is a coefficient relating the cost of the losses to the cross-section S (based on [Eqn 8.1.15c])
8.2.1. Introduction
                                                                                         GradientÊ(kV/mm)
                          dependence that is exponential, the resistivity
                                                                                            26
                          decreasing by approximately a decade for each
                          20 K increase in temperature. At no load, the
                          temperature is constant through the insulation,                   24
                          consequently the voltage distribution is similar
                          to the AC case. However, when there is load                       22
                          on the cable, there are losses, because of the
                          resistance in the conductor that generate heat.
                                                                                               0      4       8        12        16    20    24
                          This heat is conducted radially away from the
                          conductor. During stationary load conditions                                       InsulationÊthicknessÊ(mm)
                          there will be a permanent temperature fall
                          across the insulation, the insulation being                 Fig. 8.2bExample – The electrical stresses at
                                                                                      no-load, (red) and at full-load, (blue)
                          warmest near the conductor and coolest at the
                          insulation shield. Therefore, the coolest outer
                          layers have the highest resistance and the highest electrical 8.2a    stresses, see fig 8.2b.
                          Where:
                          W = losses in the conductor, W/m
                          rc = specific resistivity of conductor at 20 °C, W.m
                          A = conductor cross-section, m2
                          I = current, A
                          ac = conductor temperature co-efficient of electrical resistivity, 1/K
                          qc = conductor temperature, °C
                          Temperature fall across the insulation:
                           dU ( r )                              r ( β −1) ⋅ exp ( −γ ⋅ E ( r ))
              E (r ) = −            = U0 ⋅                                                                                      [Eqn 8.2.4f]
                            dr                             ris
                                                                 r ( β −1) ⋅ exp ( −γ ⋅ E ( r )) ⋅ dr
                                                       ∫rcsc r
          The above equation is an implicit equation that can only be solved by numerical methods.
          Since the value of the exponent, b, is proportional to Dqis the electrical stresses in the insulation are highly
          dependent on temperature drop across the insulation, i.e. to the losses in the conductor. So if the current in
          the conductor is increased above the rated current, the electrical stresses will increase very rapidly above
          the design stresses in the insulation. See fig 8.2b.
          For Mass Impregnated paper insulation and SCFF-low viscosity fluid impregnated paper insulation the
          measured DC electrical properties are:
              ➙ resistivity co-efficient, a = 0.1 – 0.13 1/K
              ➙ electrical field co-efficient, g = 0.028 -0.035 mm/kV
          The resistivity co-efficient implies that an increase of the temperature of approximately 20 K decreases
          the electrical resistivity of the insulation by a factor of 10.
          The electrical field co-efficient helps to distribute the voltage more evenly in the insulation. It partially
          compensates for the adverse voltage distribution arising from the changes in resistivity generated by the
          losses in the conductor, which would otherwise grow very rapidly.
          In comparison to Eqn 8.2.4f, in AC cables the electrical stress is calculated from:
                             U0
              E (r ) =
                                   ris                                                                                          [Eqn 8.2.4g]
                         r ⋅ ln
                                  rcsc r
                         U0                      exp ( −γ ⋅ E ( r ))
              E (r ) =      ⋅                                                                                                   [Eqn 8.2.4h]
                          r           ris
                                               r ⋅ exp ( −γ ⋅ E ( r )) ⋅ dr
                                                −1
                                  ∫   rcsc r
          The influence of the smoothing effect of the electrical field itself will cause the electrical stresses in the
          insulation to be similar to the AC case, except that they are slightly lower at the conductor screen and
          slightly higher at the insulation screen.
                                                     r β −1                       U0 ⋅ β
                             E (r ) =                                  ⋅U0 =                 ⋅ r β −1
                                            ris
                                                     r   β −1
                                                                ⋅ dr           risβ − rcsc
                                                                                        β                                             [Eqn 8.2.4i]
                                        ∫   rcsc r
                                                                                           r
                          Sometimes this equation is used to make a first assessment of the maximum electrical stress, as this
                          equation can be solved analytically. However, even at moderate electrical stress, the maximum electrical
                          stress at ris calculated at full load is too high.
                          However, this equation can be used as a comparative evaluation tool between designs, if a numerical
                          calculation tool is unavailable.
                          8.2.3.1. General
                          High Voltage DC Power Cables have some common features:
                          • T hey are built of concentric layers with a central conductor at high voltage. The conductor has to have
                             good conductivity to reduce the ohmic losses, good mechanical properties and flexibility. The materials
                             used are either Copper, Cu or Aluminum, Al.
                          • In all HV cables the insulation system consist of three layers:
                             –   The Conductor Screen, CS
                             –   The Insulation
                             –   The Insulation Screen, IS
                             –   The screens act as buffers and to separate the metallic materials from direct contact with the insulation.
                                 The layers are neither a good conductors nor a good insulators, so in cable language it is often called a ”semi-
                                 conductor” with specific resistivity, 0.01 – 1000 Ω.m. It also increases the withstand voltage level of the
                                 insulation system against transients, such as lightning voltages.
                          • For DC long length high capacity energy transmission the mass-impregnated-paper-insulated system,
                            MI, has shown both longevity and reliability. It is now available commercially at 525kV with transmission
                            capacity of 840MW/cable. This insulation system tolerates polarity changes.
                          • The extruded XLPE system for DC was introduced 20 years ago at the 70kV level. It is a single layer
                            of insulation and as such it is a “weakest link” system. So to produce a reliable insulation the whole
                            length has to be tested. The test level has to be set to detect faults in the insulation, but not to induce
                            new faults.
                                                                                                         Cu                  AI
                                                                                                        1.7241             2.8264
                             Specific resistivity, Ω.m*108
                             Temperature coefficient of                                                  3.93                4.03
                                 resistivity, K-1*103
                               Specific gravity, kg/m3
                                                                                                        8900                2700
                                                                                           •Ê     ConductorÊ
                                                                                           •Ê     ConductorÊscreenÊ
                                                                                           •Ê     InsulationÊ
                                                                                           •Ê     InsulationÊscreenÊ
                                                                                           •Ê     LeadÊalloyÊsheathÊ
                                                                                           •Ê     PolyethyleneÊsheathÊ
                                                                                           •Ê     TransversalÊreinforcementÊ
                                                                                           •Ê     OuterÊsheathÊ
                                     8.2b
                                                                                     Ê
                                                                                     Ê
                                                                                     Ê
                                                                                     Ê
                                                                                                Ê• ConductorÊ
                                                                                     Ê
                                                                                     Ê          Ê• ConductorÊscreenÊ
                                                                                     Ê          Ê• InsulationÊ
                                                                                     Ê
                                                                                                Ê• InsulationÊscreenÊ
                                                                                     Ê
                                                                                     Ê          Ê• LeadÊalloyÊsheathÊ
                                                                                     Ê
                                                                                                Ê• PolyethyleneÊsheathÊ
                                                                                     Ê
                                                                                     Ê          Ê• TransversalÊreinforcementÊ
                                                                                     Ê          Ê• ArmorÊ
                                                                                     Ê
                                                                                     Ê          Ê• OuterÊservingÊ
                                                                                     Ê
                                                                                     Ê
                                                                                     Ê
                                                                                     Ê
Fig. 8.2e– The Integrated Return Conductor. Cable with IRC, forming the complete circuit with no outside magnetic field
          There is only one solution to reduce/eliminate DC magnetic field from the cable, which is to create an
          opposite magnetic field by sending the return current through an insulated conductor laid near the main
          cable or through a concentric metallic layer on the cable itself. Laying cables close together reduces the
                          8.2d
          magnetic field, but also reduces the transmission capacity of the cable because of mutual heating. In
          mono-polar circuits the return conductor can be designed as a concentric layer into the HV cable, a design
          known as the Integrated Return Conductor (IRC) design. This design eliminates the magnetic field almost
          completely, see fig. 8.2e. There is no evidence that time invariant, DC magnetic fields represent any type
          of environmental or safety hazard.
                          The XLPE cable with its light weight and small dimensions may be the most suitable cable system for
                          underground installation. However, the system has been in operation only for a relatively short time so the
                          life expectancy of the system is not yet fully known.
                          The number of factory joints on XLPE is far higher than for other types.
                          The MI and XLPE systems are non-pressurized systems, so there are no length limitations other than the
                          maximum acceptable transmission losses.
                          The SCFF system is a pressurized system and the length is limited by the fluid pressurization system to
                          about 100 km.
Fig. 8.2i– Power cable transport, laying and repair vessel, (Nexans Skagerrak)
                          With open trenching the safety of workers and the requirements according to local regulations must be
                          engineered into the laying method.
                          At least the last 5 cm of the trench should be covered by native soil and reinstated to its former appearance.
                            No fishing activity and no maritime activity, the route      No protection is needed, the cable may be laid on the
                            section is deeper than 400 m                                 bottom
                            Fishing activity with trawls, small commercial vessels       The burial depth should be 0.5 – 1 m even in very soft
                                                                                         sediments
                            Heavy shipping traffic of tankers, large bulk carriers and   It is almost impossible/too costly to bury the cables
                            large cruise ships                                           deep enough, but the probability of anchor damage is
                                                                                         very low. So the burial depth is kept at 1 m so as not
                                                                                         to derate the cable, and in the unlikely event of anchor
                                                                                         damage, it is easier to recover the cable for repair.
                          There are many instances where the cable has to be buried deeper because of regulations or local
                          conditions.
                          Burial systems can be roughly
                          characterized:
                          Completely water jet based
                          systems, usually employed in
                          loose soil with < 200 kPa shear
                          strength. The system may be
                          employed on 95% of almost all
                          routes. Maximum commercial
                          burial depth is approximately
                          2.5 m. Such system as the
                          Nexans’ Capjet has an
                          excellent track record from
                          burying >5,000 km of pipes
                          and cables without damage.
                          See 8.2l.                                       Fig. 8.2l– Water jetting based burial system
                          • Plows towed by high power
                            surface vessels, may bury
                            cables deeper and in harder soils than the jetting system. However, because of the high tow force (20
                            – 60 tons) it can damage the cable and has done so on many occasions.
                          • Various protection systems applied for short lengths. Rock installation, grout bags and gabion
                            mattresses are some of the systems used, for example in crossing pipelines, rocky areas, fishing gear
                            on the bottom and so on. Such systems require the mobilisation of special vessels and are very costly,
                            therefore should be employed only on short stretches.
                          8.2.6. Testing
                          A cable system must be tested in numerous ways before it can be offered commercially or installed. There
                          are a number of IEC international standards that form the basis of most testing regimes. However, for
                          HVDC cables and submarine cables there are the CIGRE recommendations that are the de-facto standards.
                          The recommendations are published in the bi-monthly publication, Electra and in the CIGRE Technical
                          Brochures, TB. The present recommendations for testing HVDC MI and SCFF cables may be found in Electra
                          No 189, with an addendum in Electra No 218. For extruded HVDC insulation the present recommendations
                          may be found in TB 496. The mechanical testing of submarine cables is covered in TB 623.
                          Some of the routine and sample tests for HVDC cables are based on IEC 60055-1 for MI cable and
                          IEC 60141-1 for SCFF cable. For extruded cables the tests depends on the voltage level: medium voltage
                          Fig 8.3a– A lagoon electrode (rated for 800 Adc, located on the mainland of South Korea as part of the
                          Haenam-Cheju 300 MW HVDC interconnection)
                                                                       Anode
                                                                     electrode
                                     Buried
                                      pipe                                        _
                                                                      Cathode
                                                                      electrode
                                                 AreaÊwhere
                                              corrosionÊwillÊoccur                              LinesÊof
                                                                                              equipotential
                                                                             SomeÊofÊtheÊearth
                                                                               returnÊcurrent
                                                                                 flowsÊasÊaÊ
                                                                               zero-sequence
                                                                              componentÊinÊthe
                                                                                transmission
                                                                                   circuit
                                                                                                       DCÊearth
                                                                                                        current
Fig. 8.3d– Zero sequence component of current flowing through the AC transmission circuit
                          strata down to depths of 100 km and more in the Southern African region, including detailed mapping of
                                         8.3d
                          electrical resistivity (The Southern African Magneto telluric Experiment (SAMTEX)). However, in order to
                          get the benefits from the significantly lower resistivity of the deeper layers of the earth, in practical terms
                          this may mean reaching depths of 1 km or more (with a borehole of about 1 m diameter), which is obviously
                          more complex and costly than normal surface electrode installations.
                          Most HVDC electrode installations in service today are composed of either a single electrode which is
                          vertically mounted in the earth, or of multiple individual electrodes arranged in a ring or array of rods. These
                          arrays or rings are considered as horizontal electrodes, and it is also possible to install a complete loop of
                          copper (or another suitable anode/cathode conductive material) in the horizontal plane as an electrode.
                          Horizontal arrangements of individual electrodes are common, especially (a) in onshore installations where
                          a sufficiently large area of land is available with homogeneous ground characteristics close to the surface, or
                          (b) installations offshore where alternative materials and construction methods are used, such as titanium
                          mesh mats laid on the seabed secured in place by concrete or rocks.
DCÊcomponent
t i
                            MagneticÊfluxÊ
                             withoutÊDCÊ
                             component
                                                           MagnetizationÊ
                                                           currentÊwithoutÊ
                                                            DCÊcomponent
                                                                              t
                                                                                             MagnetizationÊ
                                                                                            currentÊwithÊDCÊ
                                                                                              component
          Where:
          m = mass of element removed (kg)                                        t1, t2 = time (s)
          n = number of electrons transferred in half reaction [34]               M = average atomic mass of material [34]
          F = Faraday’s constant = 96.485 C mol-1                                 i      = current (A)
          Considering iron as an electrode material: it has an average atomic mass of 55.847 and typically, a valence
          of 2, hence operation at 1,000 Adc for 1 year (31,536,000s) would result in the loss of 9,125 kg. However,
          in the case where the electrode is associated with a bipole HVDC converter, normal operation will be
          in balanced operation, so the current flowing into the electrode will only be that resulting from the spill
          current, that is, the current that cannot be measured because of the measuring inaccuracy of the DC
          current transducers. If this spill current is approximately 5 Adc, then the loss of material per year falls to
          45.625 kg.
                                                                                                      5
                                                                                                    4.5
                                                                                                      4                                                          25ÊmÊdepth
               MagneticÊcompassÊdeviationÊ(Deg)
                                                                                                    3.5                                                          30ÊmÊdepth
                                                                                                      3                                                          35ÊmÊdepth
                                                                                                    2.5                                                          40ÊmÊdepth
                                                                                                      2                                                          45ÊmÊdepth
                                                                                                    1.5                                                          50ÊmÊdepth
                                                                                                      1
                                                                                                    0.5
                                                             Fig. 8.3f– Magnetic deviation due to a single HVDC cable conducting 800 Adc and lying on a south/north axis for
                                                             depths of 25 m to 50 m.
                                                               In both cases, the loss of material through erosion is too high. It is therefore normal to surround the iron
                                                               electrodes with coke. If good surface contact between the iron and the coke is achieved, then most of
                                                      8.3f     the current flow from the iron to the coke will be by electron flow, and not ionic, hence the iron will not
                                                               erode. The amount of coke eroded away each year will be much less than that of pure iron and coke is
                                                               a much cheaper material.
          As the water surrounding the electrodes is changed on a regular basis due to tidal action, the resulting
          build-up of chlorine in the water is very low, and most of the chlorine will remain in solution. The very small
          build-up of chlorine around the electrode in fact has the positive benefit of inhibiting marine organisms
          from living on the electrodes, whilst being low enough not to endanger larger animals who are only exposed
          to the electrode environment for a short amount of time.
          The potential danger from hydrogen is that of a build-up of gas and the consequent risk of explosion. However,
          as the quantity of hydrogen liberated is very small, this does not pose a problem in an open sea electrode.
          Oxygen is also released through the electro-chemical reaction of injecting current into seawater. Whilst
          this in itself does not produce a danger, it can combine with carbon in the surrounding water or from the
          electrodes themselves, resulting in the production of carbon dioxide (CO2) which may give rise to some
          environmental concerns.
                                           Id               1
                             Tan D =               ⋅              ⋅ cos λ
                                       500 ⋅ S ⋅ He   X  2                                                            [Eqn 8.3.5a]
                                                     1 +   
                                                            S 
                          Where:
                          TanD =   the variation from true magnetic north (degrees)
                          X    =   horizontal distance from the center of a single HVDC cable (meters)
                          S    =   depth of the cable below the compass (meters)
                          He   =   horizontal component of the earth’s magnetic field (Gauss)
                          He   =   0.19 Gauss in the English Channel
                          l    =   angle between the cable and the earth’s polar axis (degrees)
                          Id   =   the DC current through the cable (Adc)
                        BIBLIOGRAPHY
                          [1] “Economic Assessment of HVDC Links”, CIGRÉ Brochure 186, June 2001.
                          [2] “Design Criteria of Overhead Transmission Lines”, CIGRÉ IEC 60826, 2003-10, 3rd edition.
                          [3] “Tower Top Geometry”, CIGRÉ Brochure 048, June 1995.
                          [4] “Impacts of HVDC Lines on the Economics of HVDC Projects”, CIGRÉ Brochure 388.
                          [5] “Probabilistic Design of Overhead Transmission Lines”, CIGRÉ Brochure 178, February 2001.
                          [6] “Transmission Line Reference Book HVDC to 600 kV”, EPRI, EPRI Report 1977.
                          [7] Hill Mc Graw, “Standard Handbook for Electrical Engineers”, 14th Edition.
                          [8] “Thermal Behavior of Overhead Conductors”, CIGRÉ Brochure 207, August 2002.
                          [9] P. S. Maruvada, “Corona Performance of High Voltage Transmission Lines”, Research Studies Press
                          Ltd., Baldock, Hertfordshire, U.K., 2000.
                          [10] J. B. Whitehead, “High Voltage Corona” in International Critical Tables, McGraw-Hill, 1929.
                          [11] U. Corbellini, P. Pelacchi, “Corona Losses on HVDC Bipolar Lines”, IEEE Trans., Vol. PWRD-11, No. 3,
                          July 1996, p. 1475-1480.
                          [12] “Interferencess Produced by Corona Effect of Electric Systems”, CIGRÉ Brochure 061, December 1996.
                          [13] V. L. Chartier, R. D. Sterns, A. L. Burns, “Electrical Environment of the Up rated Pacific NW/SW HVDC
                          Intertie”, IEEE PWRD, Vol. 4, No. 2, April 1989, p. 1305-1317.
                          [14] “Information on Levels of Environmental Noise Requisite to Protect Public Health and Welfare with
                          an Adequate Margin of Safety”, U. S. EPA., 550/9-74-004, 1974.
                          [15] G. B. Johnson, “Degree of Corona Saturation For HVDC Transmission Lines”, IEEE Transactions on
                          Power Delivery, Vol. PWRD-5, No. 2, April 1990, p. 695-707.
TOC         484 |    DC
      HVDC: Connecting toTransmission
                          the future Systems: Line Commutated Converters
      9                 HVDC SCHEME
                        PERFORMANCE
      The measure of any HVDC scheme is its ‘performance’, that is, its
      ability to meet the requirements of the project. ‘Performance’ can be
      measured in many ways from: can the power transmission required
      be achieved under the appropriate AC system conditions, to what
      energy is lost in the AC/DC conversion process and how reliable is
      the equipment.
      All of these issues need to be analyzed as part of the HVDC design.
      Reliability analysis, for example, can affect the scheme design
      from the point of built-in duplication and redundancy, as well as
      establishing the spares holding.
      Energy loss equates to lost revenue from the HVDC link and therefore
      is important when considering the overall investment cost of the
      project and the payback period.
      Dynamic modeling of the HVDC link allows the main circuit and the
      control system to be optimized in order to achieve the best overall
      performance from the HVDC link. Modeling techniques have been
      developed to simulate the behavior of the HVDC converter in terms
      of both fundamental frequency and transient response.
      Chapter contents
      9.             HVDC SCHEME PERFORMANCE.............                                                          484
TOC   DC Transmission
             486 |    Systems:
                      DC Transmission
                               Line Commutated
                                      Systems: Line
                                                Converters
                                                    Commutated Converters
     9.1. CONVERTER STATION ELECTRICAL LOSSES
          In this section the concept of electrical loss, the sources of electrical loss in a HVDC scheme and the
          significance of scheme losses for the owner/utility will be elaborated.
                                        r yrs
              NPV = C1× hrs × (1 +         )                                                                                  [Eqn. 9.1a]
                                       100
          Where:
          NPV = the ‘Net Present Value’ of the cost of losses (US$/kW)
          C1 = the cost of 1 kWh of electricity at the present value (US$)
          hrs = the number of hours (in a year) the equipment will be in operation (hours)*
          r    = the interest rate applicable to the investment (%)
          yrs = the life expectancy of the equipment (years)
          * There are 8760 hours in a year but an allowance must be made for the outage time applicable to the maintenance of the equipment
            in each year.
          Such an analysis is important when the cost of operating the equipment will have a financial impact on the
          owner. This can be illustrated by considering the tendering for a simple step-down power transformer. Assume
          two quotes are received against the tender enquiry, one transformer quote is for US$3,000,000 and the second
BACK TO                                                                                    DC Transmission Systems: Line Commutated Converters   |   487
CHAPTER
          9| HVDC SCHEME PERFORMANCE
                          is for a transformer costing US$3,600,000. If only the initial or capital cost was to be considered, then clearly
                          the transformer costing US$3,000,000 would be selected.
                          However, let us assume that the bidders for these transformers have quoted guaranteed load losses and
                          that these losses are 2300 kW from the first transformer quotation and only 2000 kW from the second. If the
                          following data is assumed:
                          C1 = 0.10 US$/kWh
                          hrs = 8720 hours (assuming 40 hours scheduled maintenance outage per year)
                          r = 6.0%
                          yrs = 20 years
                          Then based on the above equation, the NPV of losses can be calculated as 2,797 US$/kW.
                          This operating cost of the transformers can then be added to the transformer’s capital cost in order to find the
                          capitalized cost of the transformers. Therefore, the capitalized cost for the two transformers is:
                              ➙ First transformer          US$ 3,000,000 + US$ 6,433,100 = US$ 9,433,100
                              ➙ Second transformer         US$ 3,600,000 + US$ 5,594,000 = US$ 9,194,000
                          When considering the capitalized cost of the two transformers, the second transformer proposal presents
                          much better value. It is therefore important for the purchaser to declare the cost of losses, known as the
                          loss capitalization figure, in the enquiry for any electrical plant item so that the manufacturer is able to offer
                          what it believes is the most economic proposal.
                          The loss capitalization figure can be further adapted to the particular application by developing weighting
                          factors depending on the expected utilization of the scheme and its cost to the owner, for example, the average
                          time for which the scheme will be:
                          a. Energized and in standby at no-load
                          b. Transmitting on average 1 p.u. power or another power level
                          This information enables the manufacturer to optimize the proposed solutions.
                                                 8%   1%
                                                           3%                                ConverterÊtransformer
                                      5%
                                 2%                                                          ConverterÊvalves
ValveÊcoolingÊplant
                                                                                             DCÊsmoothingÊreactorÊ
                           25%
                                                                         56%
                                                                                             ACÊharmonicÊfilters
HFÊfilter
Auxiliaries
Fig. 9.1a– Typical split of losses for converter station of a point-to-point scheme at 1 p.u. load [1]
                                                0% 5% 1% 5%                                  ConverterÊtransformer
                                           4%
9.1a ConverterÊvalves
ValveÊcoolingÊplant
                                                                                             DCÊsmoothingÊreactorÊ
                           35%
                                                                         50%                 ACÊharmonicÊfilters
HFÊfilter
Auxiliaries
Fig. 9.1b– Typical split of losses for converter station of a back-to-back scheme at 1 p.u. load [1]
          Fig. 9.1a and Fig. 9.1b show typical loss distributions for point-to-point and back-to-back schemes.
          Additionally, Fig. 9.1c through Fig. 9.1f show the typical variation of electrical losses in the key components
          of a point-to-point scheme.
                           9.1b
          9.1.4.1. Converter Valves
          As explained in section 6.2, the converter thyristor valve load losses consist of the following main
          components:
0.3
                                                                        0.25
                           (p.u.ÊofÊtotalÊschemeÊlossesÊatÊfullÊload)
                                                                         0.2
                                           ValveÊlosses
0.15
0.1
0.05
                                                                          0
                                                                               0   20          40                  60              80               100
                                                                                                    DCÊpowerÊ(%)
Fig. 9.1c– Typical variation of the valve losses with load for a point-to-point scheme
                          Once the converter is de-blocked (transmitting power), the valve winding voltage will be set to an appropriate
                          level for the power transmission level. At full power, the converter losses are split between current dependent
                                           9.1c losses and the split can vary significantly depending on the particular scheme
                          and voltage dependent
                          parameters. The valve losses are influenced slightly by the thyristor junction temperature. The guaranteed
                          losses are typically calculated for a junction temperature corresponding to an ambient temperature of 20°C
                          and the corresponding valve coolant inlet temperature. This is an iterative calculation.
0.6
                                                        0.5
           (p.u.ÊofÊtotalÊschemeÊlossesÊatÊfullÊload)
                 ConverterÊtransformerÊlosses
0.4
0.3
0.2
0.1
                                                         0
                                                              0   20   40                  60        80           100
                                                                            DCÊpowerÊ(%)
Fig. 9.1d– Typical variation of the converter transformer losses with load for a point-to-point HVDC scheme
          Losses in the transformer are dissipated as heat, resulting in increased temperature of the winding, core and
          the insulating medium. The resistive losses (copper losses of the windings) are dependent on the winding
                      9.1d
          conductor temperature.   Typically for a converter transformer, the winding resistance for loss evaluation is
          corrected to a winding temperature of 75°C ( where 75°C is based on a temperature rise of 55°C above an
          ambient temperature of 20°C).
0.08
0.07
                           (p.u.ÊofÊtotalÊschemeÊlossesÊatÊfullÊload)
                                                                        0.06
                                                                        0.05
                                        ACÊfiltersÊlosses
0.04
0.03
0.02
0.01
                                                                           0
                                                                               0      20   40                  60            80              100
                                                                                                DCÊpowerÊ(%)
Fig. 9.1e– Typical variation of the AC filters losses with load for a point-to-point HVDC scheme
                                                                               9.1e
                                                                        0.06
                                                                        0.05
                           (p.u.ÊofÊtotalÊschemeÊlossesÊatÊfullÊload)
                                                                        0.04
                                   SmoothingÊreactorÊlosses
0.03
0.02
0.01
                                                                           0
                                                                               0      20   40                  60            80              100
                                                                                                DCÊpowerÊ(%)
Fig. 9.1f– Typical variation of the smoothing reactor losses with load for a point-to-point HVDC scheme
                                                ➙	HVDC filter – point-to-point overhead transmission schemes may incorporate DC-side shunt filters.
                                                   The losses in these filters are voltage dependent and occur only when the scheme is on-load. Since
                                                            9.1f for a transmission scheme is fixed, the DC filter loss does not vary with load.
                                                   the DC voltage
Vdr,Êldr Vdi,Êldi
                                                                         ConverterÊsteadyÊstate
                                                                              equations
                                                                       ∆ÊVd,               ∆ÊVd,
                                     α,ÊP,ÊQ,ÊId,ÊVd,ʵ                ∆Êld,               ∆Êld,                    γ,ÊP,ÊQ,ÊId,ÊVd,ʵ
                  Converter                                            ∆ÊVac,              ∆ÊVac,                                                    Converter
                   dynamic                                             ∆γ,                 ∆γ,                                                        dynamic
                  equations                                          CommÊfail           CommÊfail                                                   equations
                                                        DCÊcontrol                                     DCÊcontrol
                               ∆α,ÊPdo,ÊIdo                                                                                 ∆α ,ÊPdo
                                                        algorithms                                     algorithms
          The dynamic models take their initial operating conditions from a load flow containing the steady-state condition
          of the HVDC link. A key consideration when writing models for this form of analysis is ensuring that models
          calculate their internal initial conditions reasonably accurately, with special care where integrators are used.
          The output of each (explicit and implicit [5]) integrator is its state, and its input is therefore {d(state)/dt}. This
                      9.2a
          has to be a very small value at initialization (nearly zero).
                              DispatchÊcenterÊ/ÊSystemÊcontrol
                                         StationÊcontrol
                                                     BipoleÊcontrol
                                                      PoleÊcontrol
                                                        ConverterÊgroupÊcontrol
Filters Filters
ACÊSystem ACÊSystem
Filters Filters
α<2¡ α>182¡
                                                                                                    Logic
                                           Vdc          A(s)
                                                                                                    Limits
                               Control
                               variables
                                                                       Selector
LoopÊcontrol Selector
Fig. 9.2c– Simplified diagram of the control loop within phase controls
              ➙	Phase control is the core of the control system. It implements the fast control loops that act in
                 response to control orders and limits in order to determine the firing instants of each valve of a
                 12-pulse converter in sequence. Collectively, these control loops implement the converter transient
                 and static characteristics which also depend on the state of the AC systems. Phase controls employ
                               9.2c oscillator control method (section 1.2.1.3), whose overall principle is shown in
                 the phase locked
                 Fig. 9.2c. In practice, there are a number of dynamic control loops which contribute to the selector,
                 whose decision logic selects the error that ramps at the fastest rate, thus ensuring the quickest
                 response by the PLO to create the optimum firing delay.
              ➙	The tapchanger control will send tap up/tap down commands to the tapchanger interface to implement
                 the tapping. Depending on scheme design, converter firing angles, DC voltage or valve winding voltages
                 may be controlled within limited steady-state ranges.
              ➙	The block/deblock control responds to high-level control orders and issues block and deblock
                 sequences to start or stop the converters. It observes a large variety of protection and safety
                 sequential schemes as well as logical state conditions.
          For modeling purposes, Valve Base Electronics (VBE) simply contains the firing pulses to the valves. It receives
          the firing information from phase control.
          An overview of a HVDC model in the cycle-by-cycle domain is presented in the load flow (see chapter 5,
          Fig. 5.12a) for a single pole HVDC scheme. The block labeled master control in this figure contains settings
          for DC power order, rate of DC power ramping and the switching in of filters depending on DC power. The
          block labeled control in the same figure contains pole control and converter group control.
          The model in the form outlined in this section is used to perform various studies focusing on the HVDC scheme
          and its controls. These studies may include dynamic performance, transient overvoltage and surge arrester
          rating investigations. Through such studies, the controls can be subjected to various scenarios in which
          harmonic and unbalance effects are present, and thus build confidence in the robustness of the controls and
          settings for ultimate verification in the RTDS.
                                                                                            1                                               1
                                                              Tm                                 (C 12)                                          (C 13)
                                                                                            K 12                                            K 13
                                                                    Kω                                                                                                         [Eqn. 9.2a]
                                    T = Msω + Dω +
                                                                     s
                                This is equivalent to the time domain LCR circuit voltage equation:
                                                           9.2e
BACK TO          498   |    DC Transmission Systems: Line Commutated Converters
CHAPTER
                    di          1                                                                                  [Eqn. 9.2b]
              V=L      + R ⋅ i + ∫ i dt
                    dt          c
          The torsional movements occur in the shafts between the different rotor masses. In the case of n rotor
          masses, there are (n-1) shafts which results in (n-1) mechanical natural frequencies. Every torsional mode
          has a certain natural frequency (eigenvalue) and a certain mode shape (eigenvector shape of torsional
          vibration). The greater the mass of the generator compared to the mass of the turbine, the smaller the
          influence of the electrical torque on the relative rotational displacement.
          A transfer function block diagram can be constructed for the general arrangement of a Turbine Generator
          (TG) connected to the rectifier end of a HVDC scheme. Fig. 9.2f represents such a block diagram where
          the electrical torque experienced by the TG set is the variable of interest and for compactness the Laplace
          operator ‘s’ has been dropped from the transfer functions.
                      Tm    + -                FTG                   FωT
                                                                                                           +               Te
                                                                                                           +
                                                                                                     FΙT
Io
                                                                     FωΙ
                                                                               +        Idc   - +          -FREG
                                                                                                                           α
                                                                               +
                                                                                              -FαI
Fig. 9.2f– Transfer function block diagram for turbine generator/HVDC SSO
          There are essentially two paths which affect the electrical torque Te. The first is determined by the coupling
          of the TG with the AC network. Here the TG and shaft dynamics are in series, with a term FwT (s) which
                                 9.2fbetween changes in machine speed and the electrical torque experienced by
          defines the relationship
          the generator. This function FwT (s) is dependent on the AC network to which the generator is coupled:
          the stronger the AC network, the greater the gain of this term will be. Hence, for AC networks with high
          short-circuit levels, this path will have the major influence on the behavior of the TG. Conversely, if the TG
          is connected radially to the HVDC scheme, then this term will be very small and may be negligible.
          The second path is the influence of the machine speed variations on the electrical torque via the rectifier
          and its DC current controller. Changes in w are manifested as changes in Idc through FwI (s) as the AC voltage
          varies. Subsequently, Idc impacts on Te through FIT. However, the rectifier current regulator FREG modifies the
          firing angle a in a closed loop attempting to maintain Idc at the current order Io. Thus, the rectifier current
          control dynamics are embedded in this path of influence.
     Legend:
     Tm = Mechanical torque applied by steam turbine
     Te = Generator electrical torque
     w = Generator angular speed
     a = Converter firing angle
     Io  = Rectifier current order
     Idc = DC current
     FTG = Turbine generator and shaft mechanical dynamics
                                                                Fundamental frequency
                                                                                                                     Cycle-by-cycle model
                                                                     RMS model
                         Network representation              Positive sequence full network              3-phase representation; reduced equivalent
                                                                                                         Some adjacent machines as real machines
                                                                                                         including their functional controllers; but includes
                                                             Functional controllers for AVRs,
                         Machine controllers                                                             equivalent generators tuned to give overall
                                                             governors and stabilizers
                                                                                                         similar electro-mechanical response to full
                                                                                                         network
                                                             No harmonics considered; sub-               Includes harmonic effects; also sub-synchronous
                         Harmonics
                                                             synchronous oscillations only               oscillations
                                                             DC equations; detailed
                                                                                                         Full DC controls, transducers, necessary
                         DC controller                       control algorithms; functional
                                                                                                         protection
                                                             representation of PLO
                         Fault application and line
                                                             Performed at designated time                Current zero observed before breakers clear
                         switching
                        Table 9.2a– Comparison of fundamental frequency and cycle by cycle models
                           As an illustration, Fig. 9.7a and Fig. 9.7b provide plots from both types of software for a rectifier converter
                           bus fault and an inverter converter bus fault. In general, the correlation is good. The potential for harmonics
                           in the cycle-by-cycle model is obvious with more noisy traces.
                                                                     Vr/Es
                                                                                  1.20
          9.3.1. Transient Stability
          In order to put the description of transient stability                  1.00
                                                                                                                                                                 STABLE
          and dynamic performance studies into proper
          context, it is helpful to have a brief recap of the
                                                                                  0.80                                                          cosΦÊ=Ê1.0
          conventional concepts of AC system transient and
          dynamic stability. Then one can relate the beneficial                                                                      cosΦÊ=Ê0.95
                                                                                                              cosΦÊ=Ê0.90
          impact of a typical conventional HVDC scheme to                         0.60
          the overall system’s transient and dynamic stability.
                                                                                                                                                              UNSTABLE
                                                                                  0.40
          9.3.1.1. Traditional PV, QV and Rotor
                    Angle Stability in AC Systems
                                                                                  0.20
          HVDC control systems are effectively a sub-set of
          FACTS device controllers. The main requirements
          of FACTS control in achieving transient stability are                   0.00
          as follows: [6]                                                                0.00       0.20    0.40         0.60            0.80           1.00           1.20
                                                                                                                                                                 Pr/Prmax
              ➙	The system should maintain stability after a
                  major disturbance                                       Fig. 9.3a– Typical per unit PV curves across an AC transmission circuit
              ➙	The system should not remain near the                    for varying load power factor
                  maximum of the first swing
              ➙ The rotor backswing should be small
              ➙	Subsequent oscillations should be effectively
                                                                   Qinj/Prmax
                                            E ′ ⋅ Vt ⋅ sin δ  Vt 2   1 1 
                                   Pg =                     +  ⋅ −           ⋅ sin 2δ                                                         [Eqn. 9.3a]
                                                  Xd ′        2   Xq Xd ′ 
                            Where:
                            Pg = Generator real power delivered
                            E′ = Transient internal EMF of generator (air gap EMF)
                            X′ = Transient reactance on the stated axis (‘d’ or ‘q’)
                            Vt = Terminal voltage
                                                                                                                         aÊ(pre-fault)
                                              XÊL               XÊL                         Pmax
                                                            m                                                                  cÊ(post-fault)
                                                                                                                                  Amargin
                                        1                   2                                                  A2
                                                    Fault                              Vr    P1
A1
               Vs                                                                                                                      bÊ(during-fault)
                             XÊT              XÊL               XÊL       XÊT
                                        3                   4
                                                                                               0      δ1 δ2   π/2   δ3 δcrit       π              δ
                                   Pg 
                                            E  Vt  sin                                         9.3cÊ(partÊII)                                [Eqn. 9.3b]
                                                 Xd 
                            This is also valid for round rotor generators and there is no loss of accuracy for transient stability
                            considerations.
                            Immediately after a disturbance, the above equation indicates a generator operating point on the power angle
                            diagram, which shows the behavior of generator real power versus rotor angle. The relationship is defined by
                            the machine inertial equation:
                                   ••
                                   δ = k ′(Tm − Tg )                                                                                             [Eqn. 9.3c]
                            Where:
                            Tm = Mechanical Torque
                            Tg = Electrical Torque
                            k′ = Proportionality Constant
                                                                                    AtÊconverter
                                                                                         bus
                                                                        Tap
                                                                      changer
                                 TgÊchange            Qg/Qsystem
                                                        change
                                 ∆ÊTÊ(T+)
                                 δÊchange
                                                                                                          ∆α,Ê∆γ,Ê∆ldÊinÊDCÊscheme
                                                     PloadÊchange Q loadÊchange
                                                                                                    PdcÊchange                QdcÊchange
                                                                       Σ
                                      ChangeÊinÊnetworkÊflows               (ForÊconverterÊbuses)
                    Where:
                    α =ÊDCÊrectifierÊcontrolÊangle
                    δ =ÊÊMachineÊangle
                    γ =ÊÊDCÊinverterÊcontrolÊangle
                    ω =ÊMachineÊspeedÊdeviation
                    9.3d
BACK TO                                                                                                      DC Transmission Systems: Line Commutated Converters   |   503
CHAPTER
          9| HVDC SCHEME PERFORMANCE
                          The generator’s dynamic interaction with the rest of the system producing system power oscillations and
                          other parameter changes can be calculated in a step-by-step digital computation, as depicted sequentially
                          in Fig. 9.3d, where the items in green relate to the AC system and those in red to the DC system. This
                          incorporates the DC system with the traditional AC system transient stability interactions and the impact
                          of the latter is described in the next section.
                          It should be noted that the machine torque Tm is itself determined by its governor responding to shaft
                          speed. Variations in the generator excitation system which responds to AC terminal voltage changes
                          (and control field voltage) lead to generator flux (and hence sub-transient voltage behind reactance E′′)
                          variations.
                          Post fault system and machine transient stability is governed by the generator first swing capability and by its
                          (transient) stability margin measured from the instant of fault clearance to that corresponding to the critical
                          angle (see Fig.9.3c). Beyond this, electrical power absorption area is less than mechanical power input area
                          and the generator accelerates into instability and has to be tripped by overspeed (overfrequency) protection.
                          Mathematically, this instability is explained with reference to the swing equation as follows:
                                     ••
                              Since δ = k ′(Tm − Tg )
                              T herefore, dd/dt = k′(Tm – Tg)Dt – and this gives a positive result beyond the critical angle, as d increases
                               with time and hence Tm > Tg.
                              Also dP/dd = k′′cosd and from the P–d diagram, this is clearly negative beyond the critical angle.
                              Hence dP/dt = dd/dt × dP/dd, is negative.
                              And since dP/dt = k′′cosd × {k′(Tm – Tg)Dt}.
                              Then Tm > Tg, since cosd is negative.
                          Thus, the mechanical input torque exceeds the generator electrical (or braking) torque, and the difference
                          continuously accelerates the machine into instability.
                          Fig. 9.3c demonstrates in general the concept of the prime mover accelerating area A1 and the load power
                          decelerating area A2. From a rotor angle starting point d1 on curve ‘a’, a fault reduces electrical power to
                          curve ‘b’, where the rotor angle moves from d2 (point of fault clearance) to d3 before settling. For stability,
                          angle dcrit cannot be exceeded, otherwise A1 > A2 which will cause acceleration instability. The area
                          available permitting safe recovery, Amargin is called the stability margin.
                          While first swing rotor angle transient stability defines the ability of a system to recover from a major
                          disturbance within the first few post transient cycles - dynamic stability recovery from a relatively minor
                          disturbance over a longer duration indicates the damping characteristics of the system: i.e. its ability to
                          damp oscillatory behavior over the longer term and hence the eventual maintenance of synchronism.
                          In order for such stability to be maintained, the power system should be operated with a reasonable margin
                          to its steady-state voltage stability limit, thus providing adequate margin to accommodate subsequent
                          dynamic power (rotor angle) swings. This level is shown as P1 in Fig. 9.3c above and its impact upon the
                          stability margin area (Amargin) can be readily appreciated.
                          The above explanations indicate the importance of bus voltage oscillations in the post transient period. These
                          are heavily influenced by the type of load models.
                          The total load power (MVA) takes the form:
SL = A + B ⋅ V + C ⋅ V 2 [Eqn. 9.3d]
                          The variables in Eqn 9.3d indicate constant power, constant current and constant admittance constituents,
                          with A + B + C = 1.0 per unit. If the trend is for A > B > C, then large post transient voltage oscillations may
                          result in decreasing voltage, causing increasing line currents and larger voltage drops. Conversely, if C > B
                          > A then decreasing voltage causes decreasing line currents and smaller voltage drops.
              Iac =
                      (P + jQ)conj
                        Vac conj                                                                                 [Eqn. 9.3e]
                                                                                                                               ÊACÊtie
                                               350                                                                             ÊDCÊtie
                                              Ê300
                                               250
                                              Ê200
                                              Ê150
                           LineÊpowerÊ(MW)
                                              Ê100
                                                Ê50
                                                  0
                                               Ê-50           Ê1   Ê2   Ê3   Ê4          Ê5      Ê6    Ê7      Ê8        Ê9              Ê10
                                             Ê-100
                                             Ê-150
                                             Ê-200
                                             Ê-250
                                             Ê-300
                                             Ê-350
TimeÊ(s)
                                             Ê1.1                                                                             ÊACÊtie
                                                                                                                              ÊDCÊtie
                                             Ê1.0
                                             Ê0.9
                                             Ê0.8
                           VoltageÊ(p.u.)
                                             Ê0.7
                                             Ê0.6
                                             Ê0.5
                                             Ê0.4
                                             Ê0.3
                                                      Ê0      1    2    3    4           5       6      7      8          9              10
                                                                                  TimeÊ(s)
Fig. 9.3e– Transient recovery improvement with HVDC link spanning unstable AC tie
                                             290                                                                    LineÊMWÊnoÊPOD
                                             280
                                                      Ê9.3e                                                         LineÊMWÊwithÊPOD
                                             270
                                             260
                                             250
                           LineÊpowerÊ(MW)
                                             240
                                             230
                                             220
                                             210
                                             200
                                             190
                                             180
                                             170
                                             160
                                                      0       1    2    3    4           5       6      7      8         9               10
                                                                                      TimeÊ(s)
Fig. 9.3f– Adjacent line power oscillation damping using HVDC POD
                                                                                                    Minimum
                 VacÊmaxÊsetÊpoint        +-        VacÊloop                                         value      a
                                                               R4
                   VacÊmeasured
                  αmaxÊsetÊpoint          +-      αmaxÊloop
                                                               R5
                   αÊmeasured                                                                                                                     179¡
                                                                                                                        Minimum               k
                 γrecÊminÊsetÊpoint       -        γrecÊloop                                                             value                s
                                              +                                                                                          f
                                                               R3
                  γrecÊmeasured
                                                                                                                                             1¡
                                                                               Minimum
                                                                                value           b
                 γinvÊminÊsetÊpoint       +-       γinvÊloop                                                    e
                                                               R6
                  γinvÊmeasured
                                                                     Minimum                        Minimum
                                                                      value         c                value
                 VdcÊmaxÊsetÊpoint        -         VdcÊloop
                                              +
                                                               R7
                   VdcÊmeasured
                                                                                                d
                  αminÊsetÊpoint          +-      αminÊloop
                                                               R8
                   αÊmeasured
          Fig.9.3g– Input-output block diagram for DC phase loop controls in fundamental frequency RMS (FFRMS) dynamics
          application (rectifier end)
                    9.3g
θRef
PmodÊhigh
                                                                                                                                  Pmod
                                                                    Low pass     Differential            Gain
                                                                      filter         pole
                                                                                                                    PmodÊlow
          Fig. 9.3h– Simplified block diagram of power oscillation damping (POD) control
frÊ23ÊHz
                                                                                 f0Ê=                  Rotor
                                                             23ÊHzÊioscln        50ÊHz
                                                                                                                  Stator
                                                                                                                  3-phase
                                                                                                                  winding
          T ∝ Istator ⋅ y rotor
          Components are (50-23) & (50+23) Hz (for
          example)
          27 Hz superimposed torque on shaft                                fo
          Undamped due to effective negative slip
                                                 ∆ω                  ∆δ                      ∆α      ∆VdÊ,ÊId                IfÊtotalÊphaseÊlag
                                                                                                                             betweenÊ∆αÊ&Ê∆Te
                                                                                                                             dueÊtoÊcontrolsÊis
                                                                                                                             suchÊthatÊreaction
                                                                                                                             torqueÊisÊinÊphase
                                                                                                                             withÊ∆ω,Êthen
                               ∆Tm                   ∆Te             ∆Pe                     ∆Pd                             instabilityÊisÊcaused
                          It is well known that Sub-Synchronous Oscillations (SSO) can occur in series capacitance schemes.
                          [6],[7],[12],[13] These can also result from the current controllers at the rectifier end (only) in DC schemes
                          that can, under certain frequency response conditions, inject fairly large currents typically at around 20
                          Hz to 25 Hz, which is within the control loop’s operating bandwidth. In such an instance a nearby radially
                          connected and relatively small synchronous generator supplying nearly all the DC load and very little else,
                          will see the DC scheme working at a fairly large firing angle. The generator current may then be comparable
                          to the sub-synchronous injection. Sum and difference frequency air gap torques (due to the product of
                                  9.3j
                          induced sub-synchronous currents and synchronous stator flux) will be incident on the rotor (Fig. 9.3i).
                          Adverse DC/SSO interaction may also be physically explained by Fig. 9.3j.
                          Here the interaction of the electrical torque and machine speed, influenced by the DC link, is shown graphically.
                          Thus large pulsating shaft torques of a damaging nature can result due to the difference component, which
                          may have a frequency near to the natural (mechanical) resonance of the shaft. Generally, steam turbine
                          generators are more susceptible to torsional interaction than hydro machines. [14]
                          The possibility of SSO occurring can be initially assessed by calculating the Unit Interaction Factor (UIF)
                          which, though only an indication, is nevertheless a strong pointer towards the likelihood of its occurrence
                          and dictates whether further time domain investigations through a spring-mass model are needed or not:
                                                                2
                                      MVAdc  SCLg 
                              UIF =          1−                                                                                                [Eqn. 9.3i]
                                      MVAg  SCLt 
                          Where:
                          MVAdc = MVA rating of the DC system
                          MVAg = MVA rating of the generator
                          SCLt = short-circuit capacity at the DC commutating bus (excluding AC filters) with the generator
                          SCLg = short-circuit capacity at the DC commutating bus (excluding AC filters) without the generator
                          If the UIF is less than 0.1, there is little interaction between the torsional oscillation and the DC controls
                          and no further study is necessary for this generator. Parallel AC lines tend to minimize the possibility of
ZÊAC1 ZÊAC2
                                                TE         ωG
                                                                                                                                                Infinite
                                                                                                                                                  bus
                                                                                ZÊFilters1                      ZÊFilters2
                                             Thermal
                                            generator
                                                                     Shaft                                                                                                Shaft
                                                                    torque                                                                                               torque
                                      4                                                                                                  4
             p.u.Ê(onÊmachineÊMVA)
                                                                                                                p.u.Ê(onÊmachineÊMVA)
                                      3                                                                                                  3
                                      2                                                                                                  2
                                      1                                                                50ÊMW                             1
                                      0                                                                                                  0
                                     -1                                                                                                 -1
                                     -2                                                                                                 -2
                                      4                                                                                                  4
             p.u.Ê(onÊmachineÊMVA)
                                      3
                                                                                                                p.u.Ê(onÊmachineÊMVA)
                                                                                                                                         3
                                      2
                                                                                                                                         2
                                      1
                                                                                                       300ÊMW                            1
                                      0
                                                                                                                                         0
                                     -1
                                                                                                                                        -1
                                     -2
                                                                                                                                        -2
                                      4
                                                                                                                                         4
             p.u.Ê(onÊmachineÊMVA)
                                      3
                                                                                                                p.u.Ê(onÊmachineÊMVA)
                                      2                                                                                                  3
                                      1                                                                                                  2
                                                                                                       500ÊMW                            1
                                      0
                                     -1                                                                                                  0
                                     -2                                                                                                 -1
                                          0   0.5   1   1.5   2      2.5       3   3.5   4   4.5   5                                    -2
                                                                                                                                             0   1   2   3   4   5    6 7 8       9 10 11 12 13 14 15
                                                                  TimeÊ(sec)                                                                                         TimeÊ(sec)
                                                    Fig. 9.3l– Illustration of the effect of SSDC
                                                                                                                      ConverterÊbusÊACÊvoltageÊ(p.u.)
                                                1                                                                                                         1
                                              0.8                                                    Rectifier                                           0.8                                          Rectifier
                                                                                                     Inverter                                                                                         Inverter
                                              0.6                                                                                                        0.6
                                              0.4                                                                                                        0.4
                                              0.2                                                                                                        0.2
                                               0                                                                                                          0
                                                    25   26           27              28        29               30                                            1       2     3              4     5               6
                                                                           TimeÊ(s)                                                                                              TimeÊ(s)
                                                                                                                                                         1.2
                                              1.2
                                                1                                                                                                         1
                                              0.8                                                                                                        0.8
                                                                                                                      DCÊvoltageÊ(p.u.)
             DCÊvoltageÊ(p.u.)
                                              0.6                                                                                                        0.6
                                              0.4                                                                                                        0.4
                                              0.2                                                         VDC                                            0.2
                                               0                                                                                                          0
                                              -0.2 25    26           27              28        29               30
                                                                                                                                                        -0.2
                                                                                                                                                                   1   2     3              4     5               6
                                                                           TimeÊ(s)                                                                                              TimeÊ(s)
                                              1.2                                                                                                        1.2
                                                1                                                                                                         1
                                                                                                                      DCÊcurrentÊ(p.u.)
            DCÊcurrentÊ(p.u.)
                                              0.8                                                                                                        0.8
                                              0.6                                                                                                        0.6
                                              0.4                                                                                                        0.4
                                              0.2                                                                                                        0.2                                               IDC
                                                                                                          IDC
                                               0                                                                                                          0
                                                    25   26           27              28        29               30                                            1       2     3              4     5               6
                                                                           TimeÊ(s)                                                                                              TimeÊ(s)
                                              90                                                                                                         90
                                              80                                                                                                         80
             ControlÊangleÊ(degrees)
                                              70                                                                                                         70
                                                                                                                      ControlÊangleÊ(degrees)
                                              60                                                                                                         60
                                              50                                                                                                         50
                                              40                                                                                                         40
                                              30                                                                                                         30
                                              20                                                RecÊalpha                                                20                                       RecÊalpha
                                              10                                                InvÊgamma                                                10                                       InvÊgamma
                                               0                                                                                                          0
                                                    25   26           27              28        29               30                                            1       2     3              4     5               6
                                                                           TimeÊ(s)                                                                                              TimeÊ(s)
             9.7a
BACK TO                                                                                                                                                 DC Transmission Systems: Line Commutated Converters           |   521
CHAPTER
          9| HVDC SCHEME PERFORMANCE
                                                                     FundamentalÊfrequencyÊRMSÊmodel                                                                              Cycle-by-cycleÊmodel
                                               1.2                                                                                                             1.2
                                                                                                                             ConverterÊbusÊACÊvoltageÊ(p.u.)
             ConverterÊbusÊACÊvoltageÊ(p.u.)
                                                 1                                                                                                               1
                                               0.8                                                          Rectifier                                          0.8                                             Rectifier
                                                                                                            Inverter                                                                                           Inverter
                                               0.6                                                                                                             0.6
                                               0.4                                                                                                             0.4
                                               0.2                                                                                                             0.2
                                                0                                                                                                                0
                                                     25         26           27              28        29               30                                            1       2           3              4                 5
                                                                                  TimeÊ(s)                                                                                             TimeÊ(s)
                                                                                                                                                               1.2
                                               1.2
                                                 1                                                                                                               1
                                               0.8
                                                                                                                             DCÊvoltageÊ(p.u.)                 0.8
              DCÊvoltageÊ(p.u.)
                                               0.6                                                                                                             0.6
                                               0.4                                                                                                             0.4
                                               0.2                                                               VDC                                           0.2                                                  VDC
                                                0                                                                                                                0
                                               -0.2 25          26           27              28        29               30
                                                                                                                                                               -0.2
                                                                                                                                                                          1   2           3              4                 5
                                                                                  TimeÊ(s)                                                                                             TimeÊ(s)
                                                 4                                                                                                               4
                                               3.5                                                                                                             3.5
                                                                                                                             DCÊcurrentÊ(p.u.)
                                                 3                                                                                                               3
             DCÊcurrentÊ(p.u.)
                                               2.5                                                                                                             2.5
                                                 2                                                                                                               2
                                               1.5                                                                                                             1.5
                                                 1                                                                                                               1
                                               0.5                                                               IDC                                           0.5                                                  IDC
                                                 0                                                                                                               0
                                                     25         26           27              28        29               30                                            1       2           3              4                 5
                                                                                  TimeÊ(s)                                                                                             TimeÊ(s)
                                               90                                                                                                               90
                                               80                                                                                                               80
              ControlÊangleÊ(degrees)
                                               70                                                                                                               70
                                                                                                                             ControlÊangleÊ(degrees)
                                               60                                                                                                               60
                                               50                                                                                                               50
                                               40                                                                                                               40
                                               30                                                                                                               30
                                               20                                                      RecÊalpha                                                20                                           RecÊalpha
                                               10                                                      InvÊgamma                                                10                                           InvÊgamma
                                                0                                                                                                                0
                                                     25         26           27              28        29               30                                            1       2           3              4                 5
                                                                                  TimeÊ(s)                                                                                             TimeÊ(s)
BACK TO        9.7b
                522 |                                     DC Transmission Systems: Line Commutated Converters
CHAPTER
          strength significantly at the inverter busbar, and this is reflected in the slightly reduced AC system recovery
          voltage at the inverter.
          For both the above fault scenarios, the HVDC scheme has recovered as fast as the response of the AC system
          voltage at the converter bus allows.
                                                             System phase
                              System phase                 influencing RAM                                               Examples
                                                                                             ClientÊrequirements
                                                    ClientÊrequirements
                                                                                             -ÊReliabilityÊandÊavailabilityÊguaranteesÊÊÊÊÊpowerÊtransferÊblocks
                                                                                                                                       vs
                                                    -ÊOperational
                                                    -ÊEnvironmental                                             ∝
                                                                                             -ÊSparesÊstrategyÊÊÊÊÊÊÊavailability
                              DesignÊphase                                                   ClientÊconstraints
                                                    ClientÊconstraints
                                                    -ÊOperational                                                                             ∝
                                                                                             -ÊResourceÊskillÊlevelÊ&ÊfamiliarityÊwithÊsystemÊÊÊÊÊÊÊavailability
                                                    -ÊResources                              -ÊTimeÊrequiredÊtoÊassembleÊequipment
                                                                                                                                             ∝
                                                                                             &ÊskilledÊresourceÊforÊcorrectiveÊmaintenanceÊÊÊÊÊÊÊavailability
                                 Manufacturing         Component
                                 phase                 manufacturingÊquality
                                                                                                                            ∝
                                                                                                     ComponentÊfailureÊrateÊÊÊÊÊÊÊsystemÊforcedÊoutageÊrate
                                                                                                                                   1
                                                                                                                         ∝ Reliability
                                                           Transportation
                                    Logistics
                                                           Storage                                    AppropriateÊtransportÊandÊstorageÊmeasures
                                                                                                                              1
                                                               OperatorÊtrainingÊand                     Skill   ∝     MaintenanceÊtime
                                                                                                                                                ∝ availability
                                        Operation              skillÊlevelÊforÊmaintenance
                                        phaseÊ                 AvailabilityÊofÊtoolsÊand                                                      1
                                                               sparesÊforÊmaintenance                    AppropriateÊspares    ∝       MaintenanceÊtime
                                                                                                                                                               ∝ availability
                                                               RAMÊorientedÊprogramÊfor
                                                               designÊandÊmanufactureÊof
                                                                    componentsÊand
                                                                       subsystems
                                                                  DevelopÊconceptual                   ComponentÊlevelÊRAMÊdataÊfrom
                                                                  systemÊmodelÊwith                    -ÊKnownÊdata
                                                               appropriateÊlevelÊofÊdetails            Ê       DataÊfromÊmanufacturers
                                                                    (componentÊand                     Ê       DataÊfromÊpastÊexperience
                                                               subsystemÊrepresentation)               Ê       PublishedÊdata
                            TargetÊRAMÊrequirements
                                                                   forÊRAMÊanalysis
                                                      Review
                                                               IdentifyÊcriticalÊfailureÊmode          -ÊAssumedÊdata
                                                                 andÊmodesÊofÊdegraded                 Ê       DataÊfromÊmanufacturers
                                                                  operationÊÐÊredressÊin               Ê       ofÊsimilarÊcomponents
                                                                           design
                                                                       DesignÊfeatures
                                                                         -ÊModularity
                                                                        -ÊRedundancy
                                                                 -ÊFaultÊdetectionÊsystems
                                                                     -ÊFaultÊdiagnostics
100% 100%
50%
                                                     100%                                                            50%
                                                                                          50%
SwitchedÊredundantÊplant On-lineÊredundantÊplant
                          system power capacity and the redundancy available within the network. The dependency network does
                          not necessarily relate directly to any electrical or physical representation of the system being analyzed. A
                          simple dependency network is shown in Fig. 9.8c.
                          The blocks within the network may be considered to represent either specific items of equipment (basic
                          elements) or sub-systems (network of basic elements).
                                                  9.8c
                          A basic element is defined as the item of equipment that is either working or not working: for example, a
                          battery charger may be considered as a basic element in a scheme, even though it is a complex system in its
                          own right. This implies that in the event of a battery charger failure, for whatever reason, the complete charger
                          is considered as failed until repairs have been made within a defined time.
                          The parameters that define basic elements differ from the ones that describe systems or sub-systems by
                          including aspects such as spares, replacement times, resource limitations and maintenance requirements.
                          A sub-system made up of identical basic elements is defined in terms of whether the elements have series
                          or parallel dependency within the sub-system.
                                                        Monopole arrangement
                                       Forced outage rate                            3 to 4 per year
                                       Forced energy unavailability                  up to 0.5%
                                       Scheduled energy unavailability               up to 1%
                                       Energy availability                           up to 98.5%
                                                           Bipole arrangement
                                       Forced outage rate
                                       100% power*                                   6 to 8 per year
                                       50% power**                                   0.05 per year
                                       Forced energy unavailability
                                       100% power*                                   up to 1%
                                       50% power*                                    up to 0.02%
                                       Scheduled energy unavailability
                                       100% power*                                   less than 2%
                                       50% power**                                   less than 0.1%
                                       Energy availability
                                       100% power*                                   up to 97%
                                       50% power**                                   up to 99.9%
                                      Table 9.8a– Typical RAM performance requirements
                                      Note:
                                      * 100% power - both poles are available for power transfer
                                      ** 50% power - at least one pole is available for power transfer
TOC         532 |    DC
      HVDC: Connecting toTransmission
                          the future Systems: Line Commutated Converters
      10                     PLANNING A
                             HVDC CONVERTER
                             SCHEME
      Installing a HVDC scheme is an expensive capital equipment project
      and must therefore be well planned.
      You may be surprised as to how much work is involved and how many
      alternatives must be considered over a long period of time before
      even a request for quotation is issued to build the desired project. In
      this chapter, you will learn about all of the techno-economic studies
      that are usually performed to ensure that the scheme, once it is
      installed, is the optimum solution for the requirements and achieves
      its desired objectives.
      You will be introduced to the vast array of formal studies that are
      carried out to assess the proposed scheme against environmental,
      economic, operational performance and functional requirements.
      Topics such as rights-of-way, visual impacts and land acquisition
      are discussed, along with commercial, legal and operational lifetime
      considerations.
      You may also be interested to read about the different options for asset
      ownership, operation and maintenance of the equipment once it is built.
      At the end of the chapter is a detailed questionnaire used to define a
      HVDC project.
Years
                               Project development
                               Specification writing
                               Tendering
                               Evaluation
                               Negociation
                               Contract award
                               Construction phase
                               System design
                               Detailed design
                               Studies / Analysis
                               Manufacturing
                               Simulation / Testing
                               Shipping and installation
                               Commissioning
Fig. 10.1a – Indicative timeline for the complete cycle of an HVDC project
                         Like all complex studies, the planning and proper identification of a good road map is essential to ensuring
                         that10.1a
                              the key issues have been addressed to the full satisfaction of the stakeholders. Good quality and detailed
                         planning is vital to a HVDC project.
DC AC DC
Fig. 10.1b – Comparison between the power ratings of AC and DC overhead line towers
                                                     Lake Winnipeg
                                 AN
                               EW
                             CH
                           AT
                         SK
                                                                                ONTARIO
                                                        Winnipeg
                        SA
                                         Dorsey
                                         Converter
                                         Station
          10.2.1.110.2a1
                  . Nelson River HVDC History
          The HVDC system is supplied today from three generating stations that total 3580 MW (in-service dates:
          Kettle-1974, Long Spruce-1979, Limestone-1992) on the Nelson River AC collector system, which is
          operated isolated from the remaining MB Hydro AC system.
          The Nelson River HVDC transmission system consists of two bipoles (Fig. 10.2a). Bipole I is rated at +/-
          463.5 kV, 1854 MW. Bipole I originally used mercury arc valves and Pole 1 was put in service in June 1972.
          This has been recognized on the list of IEEE milestones in electrical engineering because at the time this
          was the highest operating voltage in the world and transmitted the largest amount of power from a remote
          site to a city. At 150 kVdc, the Nelson River mercury-arc valves were the highest voltage mercury-arc valves
          ever developed. Stage 3 of Pole 2 of Bipole I was commissioned in 1977. Between 1954 and 1976, there
          were eleven mercury-arc, HVDC systems that went in service and Nelson River was the last one to be
          commissioned. Each pole had three 6-pulse converter valve groups in series, each rated at 154.5 kV and
          2000 A. In 1992 and 1993, the Pole 1 mercury-arc valve groups were replaced with electrically triggered
          thyristor valves and new valve group control and protection [11]. Pole 2 mercury-arc valve groups were
          replaced in 2004 with light triggered thyristors.
          In 1975, Manitoba Hydro awarded the Bipole II order to the German-Swiss HVDC transmission
          working group formed by AEG-Telefunken, Brown Boveri and Siemens. Bipole II is rated at
          +/- 500 kV, 2000 MW and each pole has two 12-pulse thyristor valve groups in series. Stage 1 (900 MW, +/- 250
          kV) was put in service in October 1978 [4]. The final stage was put in service in June 1985 [16]. The scheme
          was limited to 1800 MW at ambient temperatures above 26°C. A cooling upgrade was completed in 2001 to
          allow operation at 2000 MW at any ambient temperature up to 36°C [16]. Increased power sales to the US
          resulted in the need to operate the Bipole at its rated capacity of 2000 MW during summer peak conditions.
7 3 3 5
                                          BipoleÊI
                                                                                                                    BipoleÊII
                                     +/-ÊÊÊ463ÊkV
                                                                                                                   +/-ÊÊÊ500ÊkV
                                          1854ÊMV
                                                                                                                    2000ÊMV
                                                                            Dorsey
                                                                                                                                              230ÊkV
                                                                                                                           11ÊLinesÊto
                                                                                                                           ManitobaÊnetwork
500ÊkV
ToÊUSA
                         The Manitoba Hydro southern AC system is interconnected with Saskatchewan to the west via four 230 kVac
                         lines and with Ontario to the east via two 230 kVac lines via phase shifting transformers. There are three 230
                         kV and10.2a2
                                 one 500 kVac interconnections between Manitoba Hydro and the U.S. power system to the south.
          10.2.1.3. DC Controls
          The Nelson River Bipole modulation controls and AC system interaction are complex and require proper
          coordination [1], [6], [13]. A frequency-based capability controller of the collector system reduces DC
          power when the frequency drops below 59 Hz at the rectifier AC busbar to prevent further frequency
          decay. The rectifier frequency modulation control modulates DC power in relationship to the swing of the
          AC frequency at any level in an attempt to damp oscillations. The rectifier is seen as a constant power load
          by the northern AC generators, which results in negative damping. The DC power order can be modulated
          according to the frequency deviation to damp AC system frequency swings.
          At the receiving end (inverter), the frequency modulation controls can modulate the DC power in relationship
          to the swing of the AC frequency at any level. In normal operation this controller provides little damping and
          is intended for frequency control when the Manitoba Hydro system is isolated. In addition, the receiving end
          of the system also has phase angle damping controls that modulate the DC power in relationship to swings
          of the phase angle of the receiving bus. Since both the rectifier (sending) controls and the inverter (receiving)
          controls are using the same DC power for modulation, coordination is critical. In general, the rectifier AC
          system end frequency range is allowed to vary many orders of magnitude more than the receiving end since
          the rectifier AC system is an isolated system with no customer load.
          A Ud-hold control function was added to Bipole I and II in 1985 [9], which freezes the DC voltage to a preset
          level in the current reference calculation. The Ud-hold sets the DC link to operate in a pseudo-constant current
          control mode where power modulations are still allowed but otherwise the DC power current reference
          remains constant. The modified control has proven to be very effective in stabilizing operation when operation
          is close to the critical ESCR and there is risk of voltage collapse.
          Other controls are provided for tripping of valve groups between 60.8 and 63.5 Hz for VAr relief and
          frequency stabilization at the inverter.
          Given the control complexity, it is important to have a detailed fully validated digital model for determining
          control settings and for the analysis of disturbances: detailed models were developed for Bipole I and II and
          have proven to be invaluable [14].
                         10.2.1.5. Paralleling
                         MB Hydro has the ability to reconnect the DC poles of the same polarity from each bipole at high speed
                         and in parallel configuration on the same DC line. This critical operational mode proved itself during a
                         catastrophic failure of both Bipole I and Bipole II HVDC line towers in 1996. An extreme wind downburst
                         toppled both bipoles and restoration was greatly improved with the ability to send most of the power
                         of both Bipole I and II down just one of the normal two DC lines with the converter poles in parallel. The
                         original designers had the foresight to design the DC lines to be able to carry twice the normal rating of
                         current in order that in the future parallel operation could be part of one of the DC system operating modes
                         [1], [5]. The first low voltage paralleling and deparalleling tests reported by MB Hydro demonstrated the
                         practicality of future multi-terminal HVDC operation [5].
                         Since the storm of 1996, MB Hydro has been testing the parallel operation and associated controls on a regular
                         basis. One goal is to familiarize operators with the parallel operation mode so that during an emergency, where
                         parallel operation is needed, it will be performed smoothly. Another goal is to confirm guidelines for parallel
                         operation, which are for the most part more stringent in testing than in an actual emergency since the high risk
                         of losing normal export conditions arises in normal operation, whereas, in an emergency, any extra power is of
                         value even if it were to be subsequently lost. Parallel studies confirmed expectations of VAr consumption, voltage
                         excursions, frequency excursions, and were useful in defining permanent guides for emergency parallel operation.
                         Testing confirmed the models, and has given valuable operator experience, as well as confirmation of existing
                         programs presently implemented in relay logic. Tests have so far only been conducted at reduced load levels
                         (<1927 MW) and are low risk since there is the ability to recover any lost parallel poles with the remaining normal
                         poles in operation. It is hoped that at some time in the future MB Hydro will also be able to test at higher loads,
                         similar to emergency situations. MB Hydro also plans to test other programs in the future such as continuation
                         modes of deparallel operation, which allow more power to remain transmitted subsequent to a fault occurring
                         while in parallel operation. The continual evolution of the NERC transmission planning standards may result in
                         additional limitations being placed on paralleling operation.
          10.2.1.7. Bushings
          When Bipole I began operating at full voltage in 1975, periodic flashovers of porcelain-clad, oil-filled
          wall bushings and apparatus bushings occurred. Beginning in 1984, booster sheds were installed on
          selected bushings in Bipole I. Other porcelains received a coating of RTV. These measures are described
          in [20]. Similar measures had not been implemented in Bipole II when in 1987 a 500 kV wall bushing at
          Dorsey punctured under conditions of non-uniform wetting, caught fire and burned. These bushings were
          redesigned to reduce the radial electric stress and booster sheds were installed [8].
          While performance had been greatly improved by the above-mentioned measures, there was concern about
          the continuing risk of a fire in a valve hall. As the wall bushings in Bipole I had been in service for over 25 years
          a decision was made to replace them with composite wall bushings with silicone rubber sheds. At 300 kV
          and at 450 kV these consist of two resin-impregnated cores joined by a duct filled with a SF6/N2 mixture. The
          air-end portions of the cores are installed within fibreglass cylinders equipped with silicone rubber sheds
          [12]. Because of problems associated with transporting fully assembled wall bushings of this type, they were
          assembled, processed and electrically tested at site.
          10.2.1.8. Ferroresonance
          The Dorsey HVDC converter station 230 kVac bus was composed of four bus sections on which the
          converter valves and transmission lines are terminated. On May 20, 1995, bus A2 was removed from service
          to commission replacement breakers. A potential transformer failed catastrophically causing damage to
          nearby equipment. The switching procedure resulted in the de-energized bus and the associated VTs being
          connected to the energized bus B2 through the grading capacitors (5061 pF) of nine open 230 kV circuit
          breakers. A ferroresonance condition caused the failure of the VT [17].
          All wound potential transformers concerned were replaced with capacitor voltage transformers. A third
          bus has been added to enhance the reliability and reduce the amount of grading capacitance potentially
          connected to a transformer bank. Permanently connected 200 Ω loading resistors were installed on the 4.16
          kV secondary bus of two of the station service transformers.
          The future Bipole III converter station will minimize the amount of circuit breaker grading capacitance and
          include short bus lengths to maximize reliability and ensure ferroresonance does not occur. Only capacitor
          voltage transformers will be used.
      Equipment affected Thyristor valves, converter transformers and reactive power banks (AC harmonic filters).
                                  The steady-state operating parameters of the HVDC scheme across its operating power range
                                  are calculated for coherent operating conditions.
            Methodology           The various operating parameters, equipment tolerances and measurement errors that are
                                  applicable to the scheme are varied between studies in order to explore the boundaries of
                                  the HVDC scheme’s operation.
                                                  .../...
                                                  • Demonstration of the DC system response in accordance with the specified response criteria,
                                                     including control system step responses and recovery from AC system faults
                                                  • Demonstration of the DC system transient response for reactive component switching
                           Methodology
                                                  • Demonstration of normal start-up and shutdown
                                                  • Study the interaction with local machines during disturbances
                                                  • Evaluation of the performance of the DC system during severe AC faults and subsequent to
                                                     fault clearing. This will include the evaluation of DC power run-backs, if necessary.
                                                                         Ground region
                                                                         Housing region
                                                                         Industrial site
                                                                         Foliage region
                                                                         Point source
                                                                         Grid
                                                                         Grid point
                                                                         Surface contour
                                                                         Line source
                                                                         GPS calibration point
                                                                         Receiver
Base case
0m 70 m
                                                                     scale = 1 : 2500
                                                                         origin = 270, 0
200
            0
                                             400         600
                                                 Transient studies (for a short period of a few cycles) are carried out for specified base cases of
                                                 the system equivalent network. The studies include specific cases of load configuration, and for
                                                 both partial and full load rejections.
                                                 AC system outage condition situations are studied similarly. The appropriate study cases will be
                                                 repeated with and without the reactive power absorption mode (TCR mode) of control for voltage
                                                 limiting actions in order to determine its effects, characteristics and ratings.
                                                 The study requires all the usual load flow and transient stability type data/models of the network
                                                 impedances, loads, generators/controls and operating levels/features. The study does not
                                                 necessitate a very large, full AC network to be modeled in order to achieve its objectives of
                                                 converter station design/assessment.
                           Methodology
                                                 The maximum fundamental frequency TOVs occur when there is loss of power transmission in
                                                 the HVDC link, which can occur due to:
                                                 a) Blocking of the link: this causes the converter transformer circuit breakers to open, thereby
                                                     isolating the converter station. Any delay in tripping the filters will cause high overvoltages
                                                     due to the prior rejection of the HVDC link reactive power demand which affects both ends
                                                     of the link.
                                                 b) 3 -phase ‘close in’ solid faults to the HV busbars, which can also cause loss of DC
                                                     transmission, although the converter transformers remain connected for this scenario.
                                                     Following clearance of the fault, TOVs can be high in the period before full power transfer
                                                     is re-established
                         10.3.1.11. Losses
                             Objective           Calculate the ‘as manufactured’ losses of the converter station.
                       Design data expected
                                            Total operational loss from plant.
                            from study
                       Equipment affected All
                                                 The converter station losses for operation under nominal AC system voltage and frequency
                                                 conditions and with nominal equipment parameters at an outdoor ambient temperature of
                           Methodology           20°C will be presented. The study will compile results from equipment factory tests along with
                                                 the proposed nominal operating conditions and present the total converter station losses in
                                                 accordance with the formulae defined in IEC 61803.
      Contents
      APPENDIX RELATED TO CHAPTER 2 ...................                                                                                                                       564
                       56⋅π
                                                 2
                                    
                      1            
              I RMS =  ⋅ ∫ Id ⋅ dθ 
                              2
                                                                                                                     [Eqn A2.2.1b]
                         π π
                         6
                                    
Giving:
                          2
              I RMS =       ⋅ Id                                                                                     [Eqn A2.2.1c]
                          3
          By a similar process, the harmonic content (including fundamental) of the valve winding current can be
          found from Fourier analysis as follows:
                     2
              I1 =      ⋅ (an2 + bn2 ) 2
                                      1
                                                                                                                     [Eqn A2.2.1d]
                      2
where, an is:
                     1
                         π
              an =     ⋅ f (ω ⋅ t ) ⋅ cos(n ⋅ ω ⋅ t ) ⋅ d (ω ⋅ t )
                     π ∫0
                                                                                                                     [Eqn A2.2.1e]
and bn is:
                        1
                             π
              bn = −      ⋅ f (ω ⋅ t ) ⋅ sin(n ⋅ ω ⋅ t ) ⋅ d (ω ⋅ t )
                        π ∫0
                                                                                                                     [Eqn A2.2.1f]
                          bn
              Φ = tan(       )                                                                                       [Eqn A2.2.1g]
                          an
          Hence, the ideal fundamental component of valve winding current can be found by setting n = 1, to be:
                      6
              I1 =      ⋅ Id
                     π                                                                                               [Eqn A2.2.1h]
                                                                                       Fourier analysis
                                                                                       requires this reference for correct
                                                                                       calculation of phase shift
-60° 60°
0°
120°
30°
                                                                    360°                                Equivalent
                                                                                                        fundamental
                                                                                                        frequency current
                          Now, consider the inclusion of firing delay angle and overlap angle, as shown above in Fig. A2.2.1b.
                          The equation for the rising edge of the valve current has already been derived in Eqn 2.2.2f and can be
                          written as:
As the valve currents are assumed to be symmetrical, the falling edge of the valve current can be written as:
                                           2 ⋅ E LL ⋅ (cos(α ) − cos(ω ⋅ t ))
                              i = Id −                                                                                       [Eqn A2.2.1j]
                                                       2 ⋅ ω ⋅ Lc
                          Hence, the RMS equivalent current of the practical valve winding waveform is given by:
                                                                                                    1
                                                                                                        2
                                        α + µ 2 ⋅ E ⋅ (cos(α ) − cos(θ ))                 
                                        ∫ (        LL
                                                                             )2 ⋅ dθ        
                                        α              2 ⋅ ω ⋅ Lc                         
                                        120°+α                                            
                                        1
                              I RMS =  ⋅  + ∫ Id 2 ⋅ dθ                                                                  [Eqn A2.2.1k]
                                      π                                                   
                                        α +µ                                              
                                                     2 ⋅ ELL ⋅ (cos(α ) − cos(θ )) 2      
                                             α +µ
                                        + ∫ ( Id −                                 ) ⋅ dθ  
                                        α                     2 ⋅ ω ⋅ Lc                  
                    1
                            α + 60°
             a2 =                 Id ⋅ cos(ω t ) ⋅ d (ω t )
                    π α + µ∫− 60°
                      ⋅                                                                                                     [A2.2.1o]
                          α + µ + 60°
                    1                          2 ⋅ Ell ⋅ (cos(α ) − cos(ω t − 60°)
             a3 =     ⋅        ∫        Id −                                       ⋅ cos(ω t ) ⋅ d (ω t )                   [A2.2.1p]
                    π       α + 60°
                                                            2 ⋅ ω ⋅ Lc
                          α + µ − 60°
                    1                    2 ⋅ Ell ⋅ (cos(α ) − cos(ω t + 60°)
             b1 =     ⋅       ∫                                              ⋅ sin(ω t ) ⋅ d (ω t )                         [A2.2.1q]
                    π      α − 60°
                                                      2 ⋅ ω ⋅ Lc
                    1
                            α + 60°
             b2 =                 Id ⋅ sin(ω t ) ⋅ d (ω t )
                    π α + µ∫− 60°
                      ⋅                                                                                                      [A2.2.1r]
                          α + µ + 60°
                    1                          2 ⋅ Ell ⋅ (cos(α ) − cos(ω t − 60°)
             b3 =     ⋅       ∫         Id −                                       ⋅ sin(ω t ) ⋅ d (ω t )                   [A2.2.1s]
                    π       α + 60°
                                                            2 ⋅ ω ⋅ Lc
          The resultant of this is typically only marginally lower than the resultant of Eqn A2.2.1h.
          Also, from Eqn 2.2.4a the power factor angle of the converter can be calculated by substitution into
          Eqn A2.2.1g.
          For practical cases, the power factor found from these equations results in a converter reactive power
          loading very close to that given by the Uhlmann approximation, Eqn 2.2.4d.
                                       3
                             Vdi0 =      ⋅ 2 ⋅ VLL                  [Eqn A2.2.2a]
                                       π
                                                                                       Fig. A2.2.2a– A simplified electrical equivalent
                                  3                                                    model of a six-pulse converter bridge
                             Vd1 = ⋅ 2 ⋅ VLL ⋅ cos(α )              [Eqn A2.2.2b]
                                  π
                                 3                     3
                             Vd = ⋅ 2 ⋅ VLL ⋅ cos(α ) − ⋅ ω ⋅ Lc ⋅ Id
                             		[Eqn                                   A2.2.2c]
                                 π                     π
                                                     VLL2 − 0
                              ω ⋅ Lc = Xc p.u . ⋅
                              		[Eqn              A2.2.2d]
                                                    MVA0
                                                      VLL − 0
                              ω ⋅ Lc = Xc p.u . ⋅                                                                              [Eqn A2.2.2f]
                                                      3 ⋅ Iac0
                                    3                      3             V
                             Vd =     ⋅ 2 ⋅ VLL ⋅ cos(α ) − ⋅ Xc p.u . ⋅ LL − 0 ⋅ Id                                           [Eqn A2.2.2g]
                                    π                      π             3 ⋅ Iac0
                                        2
                              Iac0 =      ⋅ Id0                                                                                [Eqn A2.2.2h]
                                        3
                                    3                      3             V
                             Vd =     ⋅ 2 ⋅ VLL ⋅ cos(α ) − ⋅ Xc p.u . ⋅ LL − 0 ⋅ Id                                            [Eqn A2.2.2i]
                                    π                      π             2 ⋅ Id0
Rearranging, gives:
                                    3                                  1 VLL-0 Id 
                             Vd =     ⋅ VLL  2 ⋅ cos(α ) − Xc p .u . ⋅   ⋅    ⋅                                                [Eqn A2.2.2j]
                                    π                                  2 VLL Id0 
                          Assuming that the AC voltage applied to the converter is the rated AC voltage, that is, VLL equals VLL-0 and
                          then substituting (A2.2.2a) into (A2.2.2i), gives:
                             Vd             Xc        Id
                                 = cos(α ) − p.u . ⋅                                                                           [Eqn A2.2.2k]
                             Vd0             2       Id0
                                                     Xc                 
              Vd p .u . = k ⋅ VL L p. u. ⋅  cos(α ) − p .u . ⋅ Id p.u . 
                                                      2                                                                   [Eqn A2.2.2l]
          Where: Vd p. u.                       1
              k=                   ⋅
                      VLL p.u.                  Xc
                                       cos(α ) − p.u . ⋅ Id p.u.
                                                  2                                                                        [Eqn A2.2.2m]
                                       Vd p.u.
                                                                                                            Xc p.u. . Id
                                                                                 Regulation volage drop =
                                 Vdi0 = 1.0                                                                    2
                                        Vd
                                                                                                 } cos (α)
1.0 Id p.u.
Fig. A2.2.2b– The per-unit relationship between no-load DC voltage, DC voltage and DC current as expressed by Eqn A2.2.2k
                          Harmonic frequency
                          Frequency which is an integer multiple of the fundamental frequency. The ratio of the harmonic frequency
                          to the fundamental frequency is the harmonic order (recommended notation: “n”)
                          Interharmonic frequency
                          Any frequency which is not an integer multiple of the fundamental frequency.
                          where:
                          Q represents either current or voltage
                          Q1 = RMS value of the fundamental component
                          n = harmonic order
                          Qn = RMS value of the harmonic component of order n
                          N = generally 40 or 50 depending on the application
10
                                                                                                                 C-message
                                                                                                                 Psophometric
0.1
           0.01
                  100                                   1000                                 10000
                                                     FrequencyÊ(Hz)
A4.2a
                                                                                                         
                                               1             1                     1            1        
                              Z F = jω L1 − j      −j                 = j  ω L1 −      −                                           [Eqn A4.3.1c]
                                              ω C1             1                ω C1            1 
                                                      ω  C2 − 2                        ω  C2 − 2  
                                                              ω L2                             ω L2  
                          We define new values:
                              x1 = ω S21 = (2 ⋅ π ⋅ f0 ⋅ nS1 )2                                                                      [Eqn A4.3.1d]
                                                                      
                                                 1              1                     1              ω2 
                              Z F = j ⋅  ω L1 −      + ω L2        2
                                                                        = j ⋅  ω L1 −        + ω L2 2 p 1 2 
                                                ω C1             ω                   ω C1         ω p1 − ω 
                                                            1− 2 
                                                                  ω p1 
                                       −ω 4 L1C1 + ω 2 L1C1ω 2p1 + ω 2 L2C1ω 2p1 + ω 2 − ω 2p1
                                  = j
                                                             (          )
                                                         ω 2p1 − ω 2 ω C1                                                            [Eqn A4.3.1h]
          The impedance of the ideal lossless filter is equal to zero at both series resonance frequencies ns1 and ns2,
          which can be expressed as:
              (z – x1) ⋅ (z – x2) = 0                                                                                       [Eqn A4.3.1l]
              z2 – z(x1 + x2) + x1 ⋅ x2 = 0                                                                                [Eqn A4.3.1m]
          Comparing equations [Eqn A4.3.1k] and [Eqn A4.3.1m], we get two equations:
                           ω 2p1
              x1 ⋅ x2 =                                                                                                    [Eqn A4.3.1o]
                           L1C1
                        1
              k1 =                                                                                                         [Eqn A4.3.1p]
                       L1C1
                         1
              L1 =                                                                                                         [Eqn A4.3.1q]
                       k1C1
From [Eqn A4.3.1n], [Eqn A4.3.1d], [Eqn A4.3.1e] and [Eqn A4.3.1g]:
                                                             1
              L1C1ω 2p1 + L2C1ω 2p1 + 1 = ( x1 + x2 ) ⋅                                                                    [Eqn A4.3.1r]
                                                             k1
               xp                       x1 + x2
                                                                                                              C1
                    + L2C1 x p + 1 =                                       [Eqn A4.3.1s]
               k1                          k1
                                                                                                                   L1
                  x + x − x p − k1
              L2 = 1 2                                                      [Eqn A4.3.1t]
                      C1 x p k1
          From [Eqn A4.3.1f]:
                                                                                                                   L2
                         1
              C2 =                                                         [Eqn A4.3.1u]
                       x p L2
          To calculate C 1 , we have to know the filter impedance at
          fundamental frequency.
          The filter circuit can be simplified as in Fig. A4.3b:
          The reactance of this circuit is:                                                       Fig. A4.3b– Simplified circuit
                                                                                                  for calculation of impedance at
                             1     1              x1 + x2 − x p − k1                              fundamental frequency
              X Fω 0 = −        +    ω +                               ⋅ ω 0 [Eqn A4.3.1v]
                           ω 0C1 k1C1 0                 x p k1C1
                                                                                                                   A4.3b
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CHAPTER
          APPENDIX
                                                                                                                                   xx  
                                                                                                               ω 02  x1 + x2 − x p − 1 2  
                              X Fω 0 =
                                           1    
                                              ⋅  −1 +
                                                       ω
                                                          +
                                                            ω2
                                                             0
                                                                   2
                                                                   0   (                   )
                                                                           x1 + x2 − x p − k1 
                                                                                              =
                                                                                                  1
                                                                                                       
                                                                                                          ω x
                                                                                                           2
                                                                                                      ⋅ 0 p +
                                                                                                                                     xp  
                                                                                                                                           −1
                                         ω 0C1        k1                       x p k1                                                      
                                                                                               ω 0C1  x1 x2               x1 x2
                                                                                                                                             
                                                                                                                                           
                                                                                                                                              [Eqn A4.3.1w]
                                                2                          n2 n2                      2             ns21ns22    
                                                 n p + ns21 + ns22 − n 2p − s1 2 s 2                  ns 1 + ns 2 − n 2
                                                                                                                 2
                                                                                                                                   
                                           1                                  np               1
                              X Fω 0   =      ⋅                                      − 1 =          ⋅                   p
                                                                                                                                − 1          [Eqn A4.3.1x]
                                         ω 0C1                ns1ns 2
                                                                  2 2
                                                                                            ω 0 C1            ns1ns 2
                                                                                                                  2 2
                                                                                                                                   
                                                                                                                             
                                           1     1     1   1     
                              X Fω 0 =        ⋅       +    − −1                                                                               [Eqn A4.3.1y]
                                         ω 0C1  ns21 ns22 n 2p 
                                              1       1     1   1 
                             Z Fω 0 = − j         ⋅ 1−  2 + 2 − 2                                                                         [Eqn A4.3.1z]
                                            ω 0C1   ns1 ns 2 n p  
Fundamental frequency reactive power generated by the filter will be calculated according to:
                                       U2                              1
                             Q0 =             = U 2C1ω 0 ⋅
                                       Z Fω 0                    1      1  1                                                               [Eqn A4.3.1aa]
                                                             1−  2 + 2 − 2 
                                                                 ns 1 ns 2 n p 
                          and the capacitance C1 will be:
                                        Q0   1          1   1 
                             C1 =            ⋅ 1 −  2 + 2 − 2                                                                            [Eqn A4.3.1bb]
                                       U ω 0   ns 1 ns 2 n p  
                                        2
                          The equation [Eqn A4.3.1bb], together with equations [Eqn A4.3.1q], [Eqn A4.3.1t] and [Eqn A4.3.1u]
                          constitute the solution of the filter.
                               
                       Z F = j  ω L1 −
                                         1            ω2              ω2    
                                             + ω L2 2 p 1 2 + ω L 3 2 p 2 2  = j
                                                                                                              (                )(        )               (        )
                                                                                  ω 2 L1C1 ω 2p1 − ω 2 ω 2p 2 − ω 2 + ω 2 L2C1ω 2p1 ω 2p 2 − ω 2 + ω 2 L3C1ω 2p 2 ω 2p1 − ω          (
                                       ω C1       ω p1 − ω        ω p2 − ω                                                                        (
                                                                                                                              ω 2p1 − ω 2 ω 2p 2 − ω 2 ω C1  )(           )
 ω 2p1
         + ω L3 2 p 2 2  = j
                                          (      2
                                                   )(2      2
                                                                ) 2     2   2
                                                                                 ( 2     2
                                                                                          )    2
                                                                                                  ( 2     2  2
                                                                                                                   ) (
                  ω 2  ω L1C1 ω p1 − ω ω p 2 − ω + ω L2C1ω p1 ω p 2 − ω + ω L3C1ω p 2 ω p1 − ω − ω p1 − ω ω p 2 − ω [Eqn A4.3.2k]
                              2  2     2  2                                                                         2
                                                                                                                                    )(   )
 2
ω −ω
 p1
       2
               ω p2 − ω                                    2       2   2   2
                                                                             (
                                                          ω p1 − ω ω p 2 − ω ω C1    )(       )
                  ZF = 0 if:
                                                                                                          (                                                               )
                       ω 6 L1C1 − ω 4 ( L1C1ω 2p1 + L1C1ω 2p 2 + L2C1ω 2p1 + L3C1ω 2p 2 + 1) + ω 2 L1C1ω 2p1ω 2p 2 + L2C1ω 2p1ω 2p 2 + L3C1ω 2p1ω 2p 2 + ω 2p1 + ω 2p 2 − ω 2p1ω 2p 2 = 0
                                      (                                                               )
 C1ω 2p1 + L3C1ω 2p 2 + 1) + ω 2 L1C1ω 2p1ω 2p 2 + L2C1ω 2p1ω 2p 2 + L3C1ω 2p1ω 2p 2 + ω 2p1 + ω 2p 2 − ω 2p1ω 2p 2 = 0                      [Eqn A4.3.2l]
                  We introduce parameter z:
                  z = w2
                                                                                                     (                                                                )
                       z 3 L1C1 − z 2 ( L1C1ω 2p1 + L1C1ω 2p 2 + L2C1ω 2p1 + L3C1ω 2p 2 + 1) + z L1C1ω 2p1ω 2p 2 + L2C1ω 2p1ω 2p 2 + L3C1ω 2p1ω 2p 2 + ω 2p1 + ω 2p 2 − ω 2p1ω 2p 2 = 0
                                 (
C1ω 2p1 + L3C1ω 2p 2 + 1) + z L1C1ω 2p1ω 2p 2 + L2C1ω 2p1ω 2p 2 + L3C1ω 2p1ω 2p 2 + ω 2p1 + ω 2p 2   )−ω      2
                                                                                                              p1  ω 2p 2 = 0             [Eqn A4.3.2m]
                                                z3 − z2
                                                           ( L1C1ω 2p1 + L1C1ω 2p 2 + L2C1ω 2p1 + L3C1ω 2p 2 + 1)
                                                                                                                        +z
                                                                                                                             (L C ω
                                                                                                                                1   1
                                                                                                                                        2
                                                                                                                                         ω 2p 2 + L2C1ω 2p1ω 2p 2 + L3C1ω 2p1ω 2p 2 + ω 2p1 + ω 2p 2
                                                                                                                                        p1                                                             )−
                                                                                        L1C1                                                                  L1C1
                                                x1 x2 + x3 x2 + x1 x3 =
                                                                             (L C ω
                                                                                1   1
                                                                                        2
                                                                                         ω 2p 2 + L2C1ω 2p1ω 2p 2 + L3C1ω 2p1ω 2p 2 + ω 2p1 + ω 2p 2
                                                                                        p1                                                             )               [Eqn A4.3.2r]
                                                                                                              L1C1
                                                               ω 2p1ω 2p 2
                                                x1 x2 x3 =                                                                                                             [Eqn A4.3.2s]
                                                                L1C1
                                           From equations [Eqn A4.3.2w] and [Eqn A4.3.2x] we can find the relationship between L2 and L1 and also
                                           between L3 and L1. After introducing equation [Eqn A4.3.2t], L2 and L3 can be expressed as:
                                           The capacitances C2 and C3 can now be calculated from [Eqn A4.3.2h] and [Eqn A4.3.2i]:
                                                          1
                                                C2 =                                                                                                                 [Eqn A4.3.2aa]
                                                       k 2 L2
                                                         1
                                                C3 =                                                                                                                 [Eqn A4.3.2bb]
                                                       k 3 L3
   BACK TO                  578   |     DC Transmission Systems: Line Commutated Converters
   CHAPTER
          To calculate C1, we have to know the filter impedance at fundamental
          frequency.
                                                                                                                C1
          The filter circuit can be simplified as in Fig. A4.3d:
          In the same way as for the double-tuned filter, the impedance of the                                   L1
          filter for the fundamental frequency w0 will be:
                               1   1          1   1   1   1 
              Z Fω 0 = − j        ⋅  1 −  2 + 2 + 2 − 2 − 2   [Eqn A4.3.2cc]
                             ω 0C1   ns1 ns 2 ns 3 n p1 n p 2                                                L2
          The equation [Eqn A4.3.2ee] together with equation [Eqn A4.3.2t], and equations [Eqn A4.3.2y] to [Eqn
          A4.3.2bb], constitute the solution of the triple tuned filter.
                                         1            1                    1
              Z (C2 / / L1 ) =                  =              = −j
                                    1
                                         + jω C2 jω C2 − 1
                                                                           1 
                                                                    ω  C2 − 2 
                                                                                                                        [Eqn A4.3.3c]
                                  jω L 1                   
                                                        ω L1 
                                                         2
                                                                            ω L1 
                                                                             
                                                                                                               A4.3e
                        1             1               1            1         
              ZF = − j      −j                 = − j      +                                                           [Eqn A4.3.3d]
                       ω C1             1          ω C1           1 
                               ω  C2 − 2                  ω    C −
                                                                2 ω 2 L  
                                       ω L1                           1
                                                                      1
                              x p = ω 2p = (2 ⋅ π ⋅ f0 ⋅ n p )2 =                                                        [Eqn A4.3.3g]
                                                                    L1C2
                          ZF is = 0 if:
                              w2(L1C2 + L1C1) – 1 = 0                                                                    [Eqn A4.3.3h]
                                              1
                               ω s2 =                                                                                    [Eqn A4.3.3i]
                                        L1 ( C1 + C2 )
                          The equation [Eqn A4.3.3l], together with the equations [Eqn A4.3.3g] and [Eqn A4.3.3i] constitute the
                          solution of the filter.
                                                                                                                A4.3f
                               UN            400 2
              Qgen = Qinst ⋅      = 120 ⋅             = 120 ⋅ 0.73 = 88 MVAr
                               UR         (270 ⋅ 3 )2
          The result of this example shows that for the assumptions as specified, the minimum optimal 3-phase filter
          bank should not be smaller than 88 MVAr.
          With other assumptions e.g. different system voltage, different unit bushing, different optimal unit size etc.,
          the calculation should be performed in similar way to achieve new optimal bank size.
                                                                                    Filter        Network
                                                                                  admittance     admittance
IN
Ic IF
L1
                                                                                            YF          YN
                          Fig. A4.5a– Circuit for the choice of worst network impedance
                              IF    YF
                                 =                                                                                     [Eqn A4.5a]
                              I C YF + YN           A4.5a
                          Fig. A4.5b below shows the vectors of the filter and network impedances.
                                          IM Ê(Υ)                 ΥF
                                                                             ΨN
ΥN
                                                                       ΥN
                                                                  Υ +FÊ Ê
ΨF
ReÊ(Υ)
Ripple current, due to a single side, 12-pulse, single pulse window, p.u.
iripple12 pW ( j, ta, x, f , α ,θ ) =
                                                                                     6                                                                                           6  
                                              π                            π x + θ ⋅ π  π                π               π                                          π x +θ ⋅ π   
                              π ⋅ 4 ⋅ cos   ⋅ sin 2 ⋅ π ⋅ f   ⋅  ta j − ⋅            −     − 4 ⋅ cos     ⋅ sin
                                                                                                                            
                                                                                                                             α −      − 12 ⋅ cos (α ) ⋅ 2 ⋅ π ⋅ f   ⋅  ta j − ⋅               −α
                                         12                           6 2 ⋅ π ⋅ f  12             12            12                                        6 2 ⋅ π ⋅ f ⋅  
                                                                                                                                        
                                                                                                             6⋅2⋅π⋅ f
DC ripple current
DC voltage, no overlap
          Principal symbols:
          j        vector varying from 0 to N
          N        maximum number of point to plot
          ta       simulation time in s
          x        number of pulses of DC current ripple
          F        Heaviside step function
          Lcr      transformer inductance, rectifier
          Lci      transformer inductance, inverter
          Ldr      smoothing reactor inductance, rectifier
          Ldi      smoothing reactor inductance, inverter
          ar       firing angle, rectifier
          ai       firing angle, inverter, p–g, assuming overlap angle, μ = 0
          g        inverter extinction angle
          ELLr, pk converter transformer peak secondary voltage, rectifier
          ELLi, pk converter transformer peak secondary voltage, inverter
          fr       fundamental frequency of the AC system, rectifier
          fi       fundamental frequency of the AC system, inverter
          qr	phase angle of the fundamental frequency voltage at the PCC (Point of Common Coupling), rectifier
          qi	phase angle of the fundamental frequency voltage at the PCC (Point of Common Coupling), inverter
                                        2 I dc X cc
                                 K1 =                                                                                          [Eqn. A9.1a]
                                         Eacc
                          LIST OF SYMBOLS
                          ac     Converter firing angle (degrees)
                          gc     Converter extinction angle (degrees)
                          gmin   Converter minimum extinction angle (degrees)
                          mc     Converter overlap angle (degrees)
                          Eacc   Converter transformer open circuit secondary AC voltage (Volts)
                          Idc    Direct current (Amps)
                          Xcc    Converter transformer reactance (Ohm)
               Value                                                                           Interpretation
             Large +ve                               Potentially harmful increase of oscillatory instability & poor damping
             Large -ve                                            Good reduction of oscillations and positive damping
             Small +ve                       Potentially harmless small oscillatory instability due to lack of adequate damping
             Small -ve                                          Small reduction of oscillations with inadequate damping
     Table A9.2a– Eigenvalues
          A9.2.2 
                 Frequency Domain Eigenanalysis
                        (Modal Participation Factor)
          State space representation of a dynamic system is:
               •
               x = Ax + Bu
                                                                                                                                     [Eqn. A9.2a]
               y = Cx + Du
                          The principal influence of state ‘i’ on mode ‘k’ is given by the term whose coefficient contains only (right
                          and left) eigenvector elements ‘ik’ and ‘ki’ (respectively).
                          Thus from the above, the principal influence of state 1 on mode 1 is indicated directly by the product (U11
                          ⋅ V11), on mode 2 by (U12 ⋅ V21), of state 2 on mode 1 by (U21 ⋅ V12) and so on.
                          In general, the principal contribution of state ‘i’ on mode ‘k’ is given by the modal participation factor:
                              MPF(i,k) = Uik ⋅ Vki                                                                          [Eqn. A9.2c]
                          The above per unit participation factors are normalized to the largest value. So if the natural participation
                          factors are p1, p2…pk, then:
                          p1 + p2 + … + pk = 1
                          Assuming p1 is the largest natural per unit participation factor, the normalized factors that appear above
                          are:
                          p1n = p1/p1 =1, p2n = p2/p1, … pkn = pk/p1
                          Hence p1 + p1(p2n + p3n + … pkn) = 1
                          giving p1 = 1/{1 + (p2n + p3n + … pkn)}
                          and therefore: p2 = p2n ⋅ p1, p3 = p3n ⋅ p1, … pk = pkn ⋅ p1.                                     [Eqn. A9.2d]
                              A=          ∑                Pi                                                                                              [Eqn. A9.3a]
                                   i ∈{ working states }                                                A9.3.1a
                          The failure rate l of the system is given by:
                                   f
                              λ=                                                                                                                           [Eqn. A9.3b]
                                   A
                          where: f =              ∑               Pi × ∑ Rate of departure from state i across the failure booundary
                                         i ∈{ boundary states }
                                                                 1               A 1 A 2Ê
                                                            µ1   BothÊelementsÊworking              µ2
                                                            λ2   4         (1Ê-ÊA 1)(1Ê-ÊA 2)       λ1
                                                                     BothÊelementsÊfailed
CaseÊ1Ê CaseÊ2Ê
1 1
                                         FailureÊboundary
                      2                                          3                              2                                                3
                                                                                                            FailureÊboundary
4 4
Fig. A9.3.3b– Possible positions of the failure boundary for a two-element system
                          The results obtained for the two different cases are as follows:
                                                                             Case 1                                              Case 2
                          Number of states in which the
                                                                                  1                                                      3
                              system is working
                            Probability of being in the
                                                                                P1                                            P1 + P2 + P3
                            working state (availability)
                            Number of states in which
                                                                                  3                                                      1
                              the system is failed
                              Probability of being in
                                                                           P2 + P3 + P4                                                  P4
                                 the failed state
                            Failure rate of the system                 (l1 + l2) P1                          l2P2 + l1P3                   l1l2 (m1 + m2)
                                                                                    = l1 + l2                            =
                                        l=                                  As                                   As                      m1m2 + l1m2 + l2m1
                            Repair rate of the system          (l1 + l2) P1       m1m2 (l1 + l2)                       l2P2 + l1P3
                                                                            =                                                      = m1 + m2
                                       m=                         1 – As        l1l2 + l1m2 + l2m1                       1 – As
                                                                             Case 1                                              Case 2
                            Probability of being in the
                                                                                P1
                                                                                                          A9.3.3c                    P1 + P2
                            working state (availability)
                    λ+µ
                                                                                                         2ÊoutÊofÊ3Êfailed
                                                                                                             3µ
      State number           Probability Pi of being in state i
                                                                                                                    λ
                1                                       A3                                        4                         3
                                                                                                                  (1Ê-ÊA) Ê
                                                   2
                2                               3A (1 – A)                                               3ÊoutÊofÊ3Êfailed
                3                               3A(1 – A)2
                                                                            Fig. A9.3.4a– Possible states of a system
                4                                 (1 – A)3                  consisting of three-identical element
     Table A9.3.4a– State probabilities of the system
                             1                                                1                                                       1
                                     FailureÊboundary
                             2                                                2                                                       2
                                                                                      FailureÊboundary
                             3                                                3                                                       3
                                                                                                                                              FailureÊboundary
4 4 4
Fig. A9.3.4b– Possible positions of the failure boundary for a three-element system
                                      The results obtained for the three different cases are as follows:
                                                                                        Case 1                              Case 2                           Case 3
                                        Number of states in which
                                                                                           1                                   2                                   3
                                         the system is working
                                       Probability of being in the
                                                                                          P1                                 P1 + P2                       P1 + P2 + P3
                                       working state (availability)
                                        Number of states in which
                                                                                           3                                   2                                   1
                                          the system is failed
                                               Probability of being in
                                                                                    P2 + P3 + P4                             P3 + P4                              P4
                                                  the failed state
                                                                               1                  A1A2A3Ê
                                                                         µ1   Working     Working           Working   µ3
µ2
λ2
λ1 λ3 λ1 λ2
λ3
Fig. A9.3.4c– Possible states of a three-element system consisting of three different elements
  The authors also wish to acknowlege that the following acronyms are registered trademarks and in many cases utilized as
  accepted industry standard names.
  ATP®
  PSCAD®
  PSCAD/EMTDC®
  RTDS®
  PSS/E®
  EMTP®
  EuroStag®
  ACKNOWLEDGEMENTS
  The writers wish to express grateful thanks to:
  Infineon Bipolar GmbH & Co Kg
  Nexans
  for authorizing us to use certain photographs in this book.
      All information and technical data herein are believed to be valid at the
      moment of the publication and its use is under the sole responsibility of
      the reader and he should independently evaluate the accuracy and the
      completeness of information and the usefulness to their particular needs of
      any product or services. Technical data are often only approximate values.
      GE Vernova reserves the right to modify, change and update the technical
      data and information contained in this book without notice.
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