MP1657 16V 2A Step-Down Converter Guide
MP1657 16V 2A Step-Down Converter Guide
MP1657
16V, 2A, 800kHz, High-Efficiency,
Synchronous, Step-Down Converter
In a SOT563 Package
DESCRIPTION FEATURES
The MP1657 is a fully integrated, high- Wide 4.5V to 16V Operating Input Range
frequency, synchronous, rectified, step-down, 130mΩ/75mΩ Low RDS(ON) Internal Power
switch-mode converter with internal power MOSFETs
MOSFETs. The MP1657 offers a very compact 190μA Low IQ
solution that achieves 2A of continuous output High-Efficiency Synchronous Mode
current with excellent load and line regulation Operation
over a wide input range. The MP1657 uses Power-Save Mode (PSM) at Light Load
synchronous-mode operation for higher Fast Load Transient Response
efficiency over the output current-load range. 800kHz Switching Frequency
Constant-on-time (COT) control operation Internal Soft Start (SS)
provides very fast transient response, easy loop Over-Current Protection (OCP) and Hiccup
design, and very tight output regulation. Thermal Shutdown
Full protection features include short-circuit Output Adjustable from 0.8V
protection (SCP), over-current protection (OCP), Available in a SOT563 Package
under-voltage protection (UVP), and thermal
APPLICATIONS
shutdown.
Security Cameras
The MP1657 requires a minimal number of Digital Set-Top Boxes
readily available, standard, external Flat-Panel Television and Monitors
components and is available in a space-saving
General Purposes
SOT563 package.
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance. “MPS”
and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
R4
10Ω
C3
1μF
12V L1 3.3V/2A
VIN BST
4.7μH
VOUT
VIN SW
C1 R1
22μF R3 40.2kΩ C2
47kΩ 22μF
MP1657 FB
R2
13kΩ
EN
EN GND
ORDERING INFORMATION
Part Number* Package Top Marking
MP1657GTF SOT563 See Below
* For Tape & Reel, add suffix –Z (e.g. MP1657GTF–Z)
TOP MARKING
PACKAGE REFERENCE
TOP VIEW
VIN 1 6 FB
SW 2 MP1657 5 EN
GND 3 4 BST
SOT563
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C (7), typical value is tested at TJ = +25°C, unless otherwise noted.
Parameter Symbol Condition Min Typ Max Units
Supply current (shutdown) IIN VEN = 0V 10 μA
TJ = -40°C to +125°C, VEN = 2V,
0.15 0.19 0.3 mA
VFB = 0.85V
Supply current (quiescent) IQ
TJ = +25°C, VEN = 2V,
0.16 0.19 0.23 mA
VFB = 0.85V
HS switch on resistance HSRDS(ON) VBST-SW = 3.3V 130 mΩ
LS switch on resistance LSRDS(ON) 75 mΩ
Switch leakage SW LKG VEN = 0V, VSW = 12V 10 μA
Valley current limit ILIMIT VOUT = 0A 1.8 2.4 3.8 A
VOUT = 3.3V, Lo = 4.7μH,
ZCD IZCD -150 -20 150 mA
IOUT = 0A
Oscillator frequency fSW VFB = 0.75V 600 800 1000 kHz
Minimum on time (8) τON_MIN 45 ns
Minimum off time (8) τOFF_MIN 180 ns
TJ = +25°C 795 807 819
Feedback voltage VREF mV
TJ = -40°C to 125°C 791 807 823
Feedback current IFB 10 100 nA
FB UV threshold (H to L) VUV_th Hiccup entry 75% VREF
Hiccup duty cycle (8) DHiccup 25 %
EN rising threshold VEN_RISING 1.14 1.2 1.26 V
EN hysteresis VEN_HYS 100 mV
EN input current IEN VEN = 2V 2 µA
VIN under-voltage lockout
INUVVth 3.7 4.1 4.18 V
threshold rising
VIN under-voltage lockout
INUVHYS 330 mV
threshold hysteresis
Soft-start period τSS 1 1.4 2 ms
Thermal shutdown (8) TSD 150 °C
Thermal hysteresis (8) TSDHYS 20 °C
TJ = +25°C 795 807 819
Feedback voltage VREF mV
TJ = -40°C to 85°C 791 807 823
NOTES:
7) Not tested in production. Guaranteed by over-temperature correlation.
8) Guaranteed by design and engineering sample characterization.
PIN FUNCTIONS
Package
Name Description
Pin #
Supply voltage. The MP1657 operates from a 4.5V to 16V input rail. A capacitor (C1) is
1 VIN
required to decouple the input rail. Connect VIN using a wide PCB trace.
2 SW Switch output. Connect SW using a wide PCB trace.
System ground. GND is the reference ground of the regulated output voltage. GND
3 GND
requires extra care during the PCB layout. Connect GND with copper traces and vias.
Bootstrap. Connect a 1µF BST capacitor and a resistor between SW and BST to form a
4 BST
floating supply across the high-side switch driver.
Enable. Drive EN high to enable the MP1657. For automatic start-up, connect EN to VIN
5 EN
through a 100kΩ pull-up resistor.
Feedback. Connect FB to the tap of an external resistor divider from the output to GND to
set the output voltage. The frequency foldback comparator lowers the oscillator frequency
6 FB
when the FB voltage drops below 600mV to prevent current-limit runaway during a short-
circuit fault.
BLOCK DIAGRAM
VIN
VCC
Regulator
Main
On HS Switch(NCH)
Timer Driver
Iss
SW
Logic
Control
PWM VCC
FB LS
Driver
Current Synchronous
Modulator Switch (NCH)
Current Sense
Amplifier
GND
When the MP1657 works in pulse-frequency Figure 2: Zener Diode between EN and GND
modulation (PFM) mode during light-load
operation, the MP1657 reduces the switching Under-Voltage Lockout (UVLO)
frequency automatically to maintain high Under-voltage lockout (UVLO) protects the chip
efficiency, and the inductor current drops from operating at an insufficient supply voltage.
almost to zero. When the inductor current The MP1657 UVLO comparator monitors the
reaches zero, the low-side driver goes into tri- output voltage of the internal regulator (VCC).
state (Hi-Z). The output capacitors discharge The UVLO rising threshold is about 4.1V, while
slowly to GND through R1 and R2. When VFB its falling threshold is consistently 3.77V.
drops below VREF, the HS-FET is turned on.
Internal Soft Start (SS)
This operation improves device efficiency
greatly when the output current is low. Soft start prevents the converter output voltage
from overshooting during start-up. When the
Light-load operation is also called skip mode chip starts up, the internal circuitry generates a
because the HS-FET does not turn on as soft-start voltage (SS) that ramps up from 0V to
frequently as it does during heavy-load 1.2V. When SS is lower than REF, SS
conditions. The frequency at which the HS-FET overrides REF so the error amplifier uses SS as
turns on is a function of the output current. As the reference. When SS exceeds REF, the
the output current increases, the current error amplifier uses REF as the reference. The
modulator regulation time period becomes SS time is set to 1.4ms internally.
Over-Current Protection (OCP) and Short- Floating Driver and Bootstrap Charging
Circuit Protection (SCP) An external bootstrap capacitor powers the
The MP1657 has a valley current-limit control. floating power MOSFET driver. This floating
During the LS-FET on state, the inductor driver has its own UVLO protection with a rising
current is monitored. When the sensed inductor threshold of 2.2V and a hysteresis of 150mV.
current reaches the valley current limit, the low- VIN regulates the bootstrap capacitor voltage
side limit comparator turns over. The device internally through D1, M1, C3, L1, and C2 (see
enters over-current protection (OCP) mode, and Figure 3). If VIN - VSW exceeds 3.3V, U2
the HS-FET waits until the valley current limit regulates M1 to maintain a 3.3V BST voltage
disappears before turning on again. Meanwhile, across C3.
the output voltage drops until VFB is below the
under-voltage (UV) threshold (typically 75%
below the reference). Once UV is triggered, the
MP1657 enters hiccup mode to restart the part
periodically.
During OCP, the device attempts to recover
from over-current fault with hiccup mode. The
chip disables the output power stage,
discharges the soft start, and attempts to soft
start again automatically. If the over-current
condition still remains after the soft start ends,
the device repeats this operation cycle until Figure 3: Internal Bootstrap Charger
over-current condition is removed, and the Start-Up and Shutdown Circuit
output rises back to regulation level. OCP is a If both VIN and EN exceed their respective
non-latch protection. thresholds, the chip starts up. The reference
Pre-Bias Start-Up block starts first, generating a stable reference
The MP1657 is designed for monotonic start-up voltage and currents, and then the internal
into pre-biased loads. If the output is pre-biased regulator is enabled. The regulator provides a
to a certain voltage during start-up, the BST stable supply for the remaining circuits.
voltage is refreshed and charged, and the Three events can shut down the chip: EN low,
voltage on the soft start is charged as well. If VIN low, and thermal shutdown. The shutdown
the BST voltage exceeds its rising threshold procedure starts by blocking the signaling path
voltage and the soft-start voltage exceeds the initially to avoid any fault triggering. The internal
sensed output voltage at FB, the MP1657 starts supply rail is then pulled down.
working normally.
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the silicon die temperature exceeds
150°C, the entire chip shuts down. When the
temperature falls below its lower threshold
(typically 130°C), the chip is enabled again.
Table 2: Parameters Selection for Common The capacitors must also have a ripple current
Output Voltages, COUT = 22µF*2 rating greater than the maximum input ripple
current of the converter. The input ripple current
VOUT (V) R1 (kΩ) R2 (kΩ) RT (kΩ) L (μH)
can be estimated with Equation (5):
5 40.2 7.68 0 4.7
3.3 40.2 13 0 4.7 VOUT V
2.5 40.2 19.1 10 3.3 ICIN IOUT (1 OUT ) (5)
VIN VIN
1.8 40.2 32.4 10 2.2
1.5 40.2 45.3 20 2.2
1.2 40.2 82 25 1.5
1 20.5 84.5 51 1.5
The worst-case condition occurs at VIN = 2VOUT, For simplification, the output ripple can be
shown in Equation (6): approximated with Equation (11):
IOUT VOUT V
ICIN (6) VOUT (1 OUT ) RESR (11)
2 FSW L VIN
For simplification, choose an input capacitor A larger output capacitor also can achieve a
with an RMS current rating greater than half of better load transient response, but be sure to
the maximum load current. consider the maximum output capacitor
The input capacitance value determines the limitation in the design application. If the output
input voltage ripple of the converter. If there is capacitor value is too high, the output voltage
an input voltage ripple requirement in the cannot reach the design value during the soft-
system, choose the input capacitor that meets start time and fails to regulate. The maximum
the specification. output capacitor value (Co_max) can be limited
approximately with Equation (12):
The input voltage ripple can be estimated with
Equation (7): CO _ MAX (ILIM _ AVG IOUT ) Tss / VOUT (12)
IOUT V V Where ILIM_AVG is the average start-up current
VIN OUT (1 OUT ) (7)
FSW CIN VIN VIN during the soft-start period, and Tss is the soft-
start time.
The worst-case condition occurs at VIN = 2VOUT,
PCB Layout Guidelines
shown in Equation (8):
Efficient PCB layout of the switching power
1 I supplies is critical for stable operation. A poor
VIN OUT (8)
4 FSW CIN layout design can result in poor line or load
regulation and stability issues. For best results,
Selecting the Output Capacitor refer to Figure 5 and follow the guidelines below.
An output capacitor is required to maintain the 1) Place the high-current paths (GND, VIN,
DC output voltage. Ceramic or POSCAP and SW) very close to the device with short,
capacitors are recommended. The output direct, and wide traces.
voltage ripple can be estimated with Equation
(9): 2) Place the input capacitor as close to VIN
and GND as possible (within 1mm).
VOUT V 1
VOUT (1 OUT ) (RESR ) (9) 3) Place the external feedback resistors next
FSW L VIN 8 FSW COUT
to FB.
In the case of ceramic capacitors, the 4) Keep the switching node (SW) short and
impedance at the switching frequency is away from the feedback network.
dominated by the capacitance. The output
voltage ripple is caused mainly by the
capacitance. For simplification, the output
voltage ripple can be estimated with Equation
(10):
VOUT V (10)
VOUT (1 OUT )
8 FSW 2 L COUT VIN
Design Example
GND Table 3 shows a design example when ceramic
capacitors are applied.
Table 3: Design Example
VIN 12V
VOUT 3.3V
IOUT 2A
VIN OUT The detailed application schematics are shown
GND in Figure 6 through Figure 12. The typical
performance and waveforms are shown in the
Typical Performance Characteristics section.
Top Layer
For more devices applications, please refer to
the related evaluation board datasheet.
VIN
VOUT
GND
Bottom Layer
Figure 5: Recommended Layout
22µF 0.1µF
1µF
MP1657 4.7µH
5V/2A
22µF
100kΩ 10pF
47kΩ 40.2kΩ
7.68kΩ
10Ω
22µF 0.1µF
1µF
MP1657 4.7µH
22µF
100kΩ 10pF
47kΩ 40.2kΩ
13kΩ
10Ω
22µF 0.1µF
1µF
MP1657 3.3µH 2.5V/2A
22µF
100kΩ 10pF
62kΩ 40.2kΩ
19.1kΩ
22µF 0.1µF
1µF
MP1657 2.2µH 1.8V/2A
22µF
100kΩ 10pF
75kΩ 40.2kΩ
32.4kΩ
10
100K 10pF
86.6K
45.3K
10Ω
22µF 0.1µF
1µF
MP1657 1.5µH 1.2V/2A
22µF
100kΩ 10pF
105kΩ 40.2kΩ
82kΩ
22µF 0.1µF
1µF
MP1657 1.5µH 1V/2A
22µF
100kΩ 10pF
160kΩ 20.5kΩ
84.5kΩ
PACKAGE INFORMATION
SOT563
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.