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Assembler Directives

Assembler directives control the generation of machine codes and organization of a program without generating machine codes themselves. Common assembler directives include DB, DW, SEGMENT, ENDS, ASSUME, ORG, END, EVEN, EQU, PROC, ENDP, FAR, NEAR, SHORT, MACRO and ENDM which are used to define variables, allocate memory, specify program sections and structure, and define macros.

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0% found this document useful (0 votes)
17 views36 pages

Assembler Directives

Assembler directives control the generation of machine codes and organization of a program without generating machine codes themselves. Common assembler directives include DB, DW, SEGMENT, ENDS, ASSUME, ORG, END, EVEN, EQU, PROC, ENDP, FAR, NEAR, SHORT, MACRO and ENDM which are used to define variables, allocate memory, specify program sections and structure, and define macros.

Uploaded by

aehab9812
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Assembler directives

8086 Microprocessor
Assemble Directives

Instructions to the Assembler regarding the program being


executed.

Control the generation of machine codes and organization of


the program; but no machine codes are generated for
assembler directives.

Also called ‘pseudo instructions’

Used to :
› specify the start and end of a program
› attach value to variables
› allocate storage locations to input/ output data
› define start and end of segments, procedures, macros etc..

8:22 PM 93
8086 Microprocessor
Assemble Directives

DB Define Byte

DW Define a byte type (8-bit) variable

SEGMENT Reserves specific amount of memory


ENDS locations to each variable

ASSUME Range : 00H – FFH for unsigned value;


00H – 7FH for positive value and
ORG 80H – FFH for negative value
END
EVEN General form : variable DB value/ values
EQU

PROC
FAR Example:
NEAR LIST DB 7FH, 42H, 35H
ENDP
Three consecutive memory locations are reserved for
SHORT the variable LIST and each data specified in the
instruction are stored as initial value in the reserved
MACRO memory location
ENDM
8:22 PM 94
8086 Microprocessor
Assemble Directives

DB Define Word

DW Define a word type (16-bit) variable

SEGMENT Reserves two consecutive memory locations


ENDS to each variable

ASSUME Range : 0000H – FFFFH for unsigned value;


0000H – 7FFFH for positive value and
ORG 8000H – FFFFH for negative value
END
EVEN General form : variable DW value/ values
EQU

PROC
FAR Example:
NEAR ALIST DW 6512H, 0F251H, 0CDE2H
ENDP
Six consecutive memory locations are reserved for
SHORT the variable ALIST and each 16-bit data specified in
the instruction is stored in two consecutive memory
MACRO location.
ENDM
8:22 PM 95
8086 Microprocessor
Assemble Directives

DB SEGMENT : Used to indicate the beginning of


a code/ data/ stack segment
DW
ENDS : Used to indicate the end of a code/
SEGMENT data/ stack segment
ENDS
General form:
ASSUME

ORG
END Segnam SEGMENT
EVEN

EQU … Program code
… or
PROC … Data Defining Statements

FAR …
NEAR
ENDP Segnam ENDS

SHORT

MACRO User defined name of


the segment
ENDM
8:22 PM 96
8086 Microprocessor
Assemble Directives

DB Informs the assembler the name of the


program/ data segment that should be used
DW for a specific segment.

SEGMENT General form:


ENDS
ASSUME segreg : segnam, .. , segreg : segnam
ASSUME

ORG
User defined name of
END Segment Register
the segment
EVEN
EQU

PROC Example:
FAR
NEAR ASSUME CS: ACODE, DS:ADATA Tells the compiler that the
ENDP instructions of the program are
stored in the segment ACODE and
data are stored in the segment
SHORT ADATA

MACRO
ENDM
8:22 PM 97
8086 Microprocessor
Assemble Directives

ORG (Origin) is used to assign the starting address


DB
(Effective address) for a program/ data segment

DW END is used to terminate a program; statements


after END will be ignored
SEGMENT
ENDS EVEN : Informs the assembler to store program/
data segment starting from an even address
ASSUME
EQU (Equate) is used to attach a value to a variable

ORG
Examples:
END
EVEN ORG 1000H Informs the assembler that the statements
EQU following ORG 1000H should be stored in
memory starting with effective address
1000H
PROC
FAR
LOOP EQU 10FEH Value of variable LOOP is 10FEH
NEAR
ENDP
_SDATA SEGMENT In this data segment, effective address of
SHORT ORG 1200H memory location assigned to A will be 1200H
A DB 4CH and that of B will be 1202H and 1203H.
EVEN
MACRO B DW 1052H
ENDM
8:22 PM _SDATA ENDS 98
8086 Microprocessor
Assemble Directives

PROC Indicates the beginning of a procedure


DB
ENDP End of procedure
DW
FAR Intersegment call
SEGMENT
ENDS NEAR Intrasegment call

General form
ASSUME

ORG
procname PROC[NEAR/ FAR]
END
EVEN …
… Program statements of the
EQU procedure

PROC RET Last statement of the


procedure
ENDP
FAR procname ENDP
NEAR

SHORT User defined name of


the procedure
MACRO
ENDM
8:22 PM 99
8086 Microprocessor
Assemble Directives

DB
Examples:
DW

SEGMENT ADD64 PROC NEAR The subroutine/ procedure named ADD64 is


ENDS declared as NEAR and so the assembler will
… code the CALL and RET instructions involved
… in this procedure as near call and return
ASSUME …

RET
ORG
ADD64 ENDP
END
EVEN
EQU CONVERT PROC FAR The subroutine/ procedure named CONVERT
is declared as FAR and so the assembler will
… code the CALL and RET instructions involved
PROC … in this procedure as far call and return
ENDP …
FAR
RET
NEAR CONVERT ENDP

SHORT

MACRO
ENDM
8:22 PM 100
8086 Microprocessor
Assemble Directives

DB Reserves one memory location for 8-bit


signed displacement in jump instructions
DW
Example:
SEGMENT
ENDS

ASSUME JMP SHORT The directive will reserve one


AHEAD memory location for 8-bit
ORG displacement named AHEAD
END
EVEN
EQU

PROC
ENDP
FAR
NEAR

SHORT

MACRO
ENDM
8:22 PM 101
8086 Microprocessor
Assemble Directives

DB MACRO Indicate the beginning of a macro

DW ENDM End of a macro

SEGMENT General form:


ENDS

ASSUME macroname MACRO[Arg1, Arg2 ...]


Program
… statements in
ORG … the macro
END …
EVEN
EQU macroname ENDM

PROC
ENDP
FAR User defined name of
NEAR the macro

SHORT

MACRO
ENDM
8:22 PM 102
8:22 PM 103
Interfacing memory and i/o ports
8086 Microprocessor
Memory

Processor Memory
 Registers inside a microcomputer
 Store data and results temporarily
 No speed disparity
 Cost 

Primary or Main Memory


 Storage area which can be directly
Memory accessed by microprocessor
 Store programs and data prior to
Store
execution
Programs
 Should not have speed disparity with
and Data
processor  Semi Conductor
memories using CMOS technology
 ROM, EPROM, Static RAM, DRAM

Secondary Memory
 Storage media comprising of slow
devices such as magnetic tapes and
disks
 Hold large data files and programs:
Operating system, compilers,
8:22 PM databases, permanent programs etc. 105
8086 Microprocessor
Memory organization in 8086

8:22 PM 106
8086 Microprocessor
Memory organization in 8086

Operation A0 Data Lines Used

1 Read/ Write byte at an even address 1 0 D7 – D 0

2 Read/ Write byte at an odd address 0 1 D15 – D8

3 Read/ Write word at an even address 0 0 D15 – D0

4 Read/ Write word at an odd address 0 1 D15 – D0 in first operation


byte from odd bank is
transferred
1 0 D7 – D0 in first operation
byte from odd bank is
8:22 PM transferred 107
8086 Microprocessor
Memory organization in 8086

Available memory space = EPROM + RAM

Allot equal address space in odd and even


bank for both EPROM and RAM

Can be implemented in two IC’s (one for


even and other for odd) or in multiple IC’s

8:22 PM 108
8086 Microprocessor
Interfacing SRAM and EPROM

Memory interface  Read from and write in


to a set of semiconductor memory IC chip

EPROM  Read operations

RAM  Read and Write

In order to perform read/ write operations,

Memory access time  read / write time of


the processor

Chip Select (CS) signal has to be generated

Control signals for read / write operations

Allot address for each memory location

8:22 PM 109
8086 Microprocessor
Interfacing SRAM and EPROM

Typical Semiconductor IC Chip

No of Memory capacity Range of


Address address in
pins hexa
In Decimal In kilo In hexa

20 220= 10,48,576 1024 k = 1M 100000 00000


to
FFFFF

8:22 PM 110
8086 Microprocessor
Interfacing SRAM and EPROM

Memory map of 8086

EPROM’s are mapped at FFFFFH


 Facilitate automatic execution of monitor programs
and creation of interrupt vector table

RAM are mapped at the beginning; 00000H is allotted to RAM

8:22 PM 111
8086 Microprocessor
Interfacing SRAM and EPROM

Monitor Programs
 Programing 8279 for keyboard scanning and display
refreshing

 Programming peripheral IC’s 8259, 8257, 8255,


8251, 8254 etc

 Initialization of stack

 Display a message on display (output)

 Initializing interrupt vector table

Note : 8279 Programmable keyboard/ display controller

8257 DMA controller

8259 Programmable interrupt controller

8255 Programmable peripheral interface

8:22 PM 112
8086 Microprocessor
Interfacing I/O and peripheral devices

I/O devices
 For communication between microprocessor and
outside world

 Keyboards, CRT displays, Printers, Compact Discs


etc.


Ports / Buffer IC’s
Microprocessor I/ O devices
(interface circuitry)

 Data transfer types


Memory mapped
Programmed I/ O
Data transfer is accomplished I/O mapped
through an I/O port
controlled by software

Interrupt driven I/ O
I/O device interrupts the
processor and initiate data
transfer
Direct memory access
8:22 PM
Data transfer is achieved by 113
bypassing the microprocessor
8086 Microprocessor
8086 and 8088 comparison

Memory mapping I/O mapping


20 bit address are provided for I/O 8-bit or 16-bit addresses are
devices provided for I/O devices

The I/O ports or peripherals can be Only IN and OUT instructions can be
treated like memory locations and used for data transfer between I/O
so all instructions related to device and processor
memory can be used for data
transmission between I/O device
and processor

Data can be moved from any Data transfer takes place only
register to ports and vice versa between accumulator and ports
When memory mapping is used for Full memory space can be used for
I/O devices, full memory address addressing memory.
space cannot be used for
addressing memory.  Suitable for systems which
require large memory capacity
 Useful only for small systems
where memory requirement is less

8:22 PM 114
8086 and 8088 comparison
8086 Microprocessor
8086 and 8088 comparison

8086 8088

Similar EU and Instruction set ; dissimilar BIU

16-bit Data bus lines obtained by 8-bit Data bus lines obtained by
demultiplexing AD0 – AD15 demultiplexing AD0 – AD7

20-bit address bus 8-bit address bus

Two banks of memory each of 512 Single memory bank


kb

6-bit instruction queue 4-bit instruction queue

Clock speeds: 5 / 8 / 10 MHz 5 / 8 MHz

No such signal required, since the


data width is only 1-byte
8:22 PM 116
8087 Coprocessor
8086 Microprocessor
Co-processor – Intel 8087

Multiprocessor A microprocessor system comprising of two or more


processors
system
Distributed processing: Entire task is divided in to
subtasks

Advantages Better system throughput by having more than one


processor

Each processor have a local bus to access local


memory or I/O devices so that a greater degree of
parallel processing can be achieved

System structure is more flexible.


One can easily add or remove modules to change the
system configuration without affecting the other
modules in the system

8:22 PM 118
8086 Microprocessor
Co-processor – Intel 8087

8087 Specially designed to take care of mathematical


calculations involving integer and floating point data
coprocessor
“Math coprocessor” or “Numeric Data Processor (NDP)”

Works in parallel with a 8086 in the maximum mode

Features 1) Can operate on data of the integer, decimal and real


types with lengths ranging from 2 to 10 bytes

2) Instruction set involves square root, exponential,


tangent etc. in addition to addition, subtraction,
multiplication and division.

3) High performance numeric data processor  it can


multiply two 64-bit real numbers in about 27s and
calculate square root in about 36 s

4) Follows IEEE floating point standard

5) It is multi bus compatible

8:22 PM 119
8086 Microprocessor
Co-processor – Intel 8087

16 multiplexed address / data pins


and 4 multiplexed address / status
pins

Hence it can have 16-bit external


data bus and 20-bit external address
bus like 8086

Processor clock, ready and reset


signals are applied as clock, ready
and reset signals for coprocessor

8:22 PM 120
8086 Microprocessor
Co-processor – Intel 8087

BUSY

8:22 PM 121
8086 Microprocessor
Co-processor – Intel 8087

The request / grant signal from the


8087 is usually connected to the
request / grant pin of the
independent processor such as 8089

8:22 PM 122
8086 Microprocessor
Co-processor – Intel 8087

INT

The interrupt pin is connected to the


interrupt management logic.

The 8087 can interrupt the 8086


through this interrupt management
logic at the time error condition
exists

8:22 PM 123
8086 Microprocessor
Co-processor – Intel 8087

Status

1 0 0 Unused
1 0 1 Read memory
1 1 0 Write memory
1 1 1 Passive

QS0 – QS1

QS0 QS1 Status


0 0 No operation
0 1 First byte of opcode
from queue
1 0 Queue empty
1 1 Subsequent byte of
opcode from queue

8:22 PM 124
8086 Microprocessor
Co-processor – Intel 8087

8086 and 8087 reads


instruction bytes and
8087 puts them in the
instructions respective queues
are inserted
in the 8086 NOP
program
8087 instructions have
11011 as the MSB of
their first code byte

8:22 PM 125
Ref: Microprocessor, Atul P. Godse, Deepali A. Gode, Technical publications, Chap 11
8086 Microprocessor
Co-processor – Intel 8087

8086/ 8088 Coprocessor

Wake up the
coprocessor
Monitor
ESC 8086/
8088

Deactivate the
Execute the host’s TEST pin
8086 and execute the
instructions specific
operation

Activate
WAIT the TEST
pin
Wake up the
8086/ 8088
8:22 PM 126
8:22 PM 127

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