Unit-3 Coa
Unit-3 Coa
Tanya Shrivastava
UNIT – 3
Control unit use to control the signals. A Central Processing Unit is the most important
component of a computer system. A control unit is a part of the CPU which directs the
operation of the processor. A control unit controls the operations of all parts of the
computer.
It is the responsibility of the control unit to tell the computer‟s memory, arithmetic/logic
unit, and input and output devices how to respond to the instructions that have been sent to
the processor.
Control memory is use to control the memory in the control unit. Control Memory is the
storage in the micro programmed control unit to store the micro program.
Writeable Control Memory: Control Storage whose contents can be modified, allow the
change in micro program and Instruction set can be changed or modified is referred as
Writeable Control Memory.
The control memory consists of micro programs that are fixed and cannot be modified
frequently. They contain microinstructions that specify the internal control signals required to
execute register micro-operations. The machine instructions generate a chain of
microinstructions in the control memory.
CPUs and GPUs are examples of devices that use control units.
INSTRUCTION TYPES
Instruction
An instruction is something that someone tells you to do. Instruction is a command which is given by
the user to computer to perform some task.
These instructions are used to transfer the data from one place to another.
Data transfer instructions transfer the data between memory and processor registers, processor registers,
and I/O devices, and from one processor register to another.
There are eight commonly used data transfer instructions. Each instruction is represented by a
mnemonic symbol.
Load LD
Store ST
Move MOV
Exchange XCH
Input In
Output OUT
Push PUSH
Pop POP
2. Data Manipulation Instruction
Data manipulation instructions are those instructions that manipulate or change the content of the
data/registers/memory.
The data manipulation instructions are usually divided into three types:
1. Arithmetic instructions
2. Logical instructions and bit manipulation instructions
3. Shift instructions
Arithmetic instructions: The four basic operations of arithmetic instructions are addition,
subtraction, multiplication, and division. Arithmetic instructions include increment, decrement, add,
subtract, multiply, divide, add with Carry, subtract with Borrow, negate that is (2‟s) two's complement.
If there‟s a negative number, it is considered as negate (so two's complement).
Name Mnemonic
Increment INC
Decrement DEC
Add ADD
Subtract SUB
Multiply MUL
Divide DIV
Logical instructions and bit manipulation instructions: logical and bit manipulation instructions
starting with clear (that means clear the content of accumulator), complement the accumulator, AND,
OR, Exclusive-OR, Clear carry, Set carry, Complement carry, Enable interrupts, Disable interrupts, all
these are logical and bit manipulation instructions.
Name Mnemonic
Clear CLR
Complement COM
AND AND
OR OR
Exclusive-OR XOR
Enable Interrupt EI
Disable Interrupt DI
Shift instructions: Shift instructions allow the bits of a memory byte or register to be shifted one-bit
place to the right or the Left.
Name Mnemonic
Name Mnemonics
Branch BR
Jump JMP
Skip SKP
Call Call
Return RET
INSTRUCTION FORMAT
Instruction is an order given by user to computer that tells CPU what to do.
CPU fetches the instructions from main memory and one by one stored in the Instruction Register (IR)
in particular format after that executes instruction and result displayed to user.
Instruction format: Instruction format describe the layout or internal structure of instruction and how
instruction is represented in Instruction Register by CPU.
1st field: Opcode is also known as operation code. It tells the CPU which operation is to be performed in
the instruction. For example add (addition), sub (subtraction), mul (multiplication), mov etc.
2nd field: Address of operand also known as data. Data stored in main memory and its address stored in
address field of instruction.
3rd field: Mode defines way of calculating address of operand. Mode tells whatever the address of the
data is given, how CPU reach to that address. Weather it is Memory address or Register address.
ADD 2 5
Result = 7
In two address
instruction we
mainly use MOV
operation.
Instruction specifies
data itself. Basically we
use stack operation for
example PUSH and
POP.
Answer:
Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location
PUSH A TOP = A
PUSH B TOP = B
PUSH A TOP = A
PUSH C TOP = C
PUSH D TOP = D
LOAD A AC = M[A]
ADD B AC = AC + M[B]
STORE T M[T] = AC
LOAD C AC = M[C]
ADD D AC = AC + M[D]
MUL T AC = AC * M[T]
MUL R1, R2 R1 = R1 * R2
MOV X, R1 M[X] = R1
Q. Discuss Instruction format and classify according to the basic computer systems. The
Instruction format has 16 bits, 12 bits are used to represent address part and one bit for mode
part then Calculate how many bits are required for opcode?
Solution:
Q. The Memory unit of a Computer has 512K words of 32 bits each. The Computer has an
Instruction format with four fields: an operation code field, a mode field to specify one of the
seven addressing modes, a register address field to specify one of the 90 processor register, and a
memory address. Analyse the instruction format and number of bits in each field if the instruction
is in one word memory.
Solution:
Q. A computer uses a memory unit of 512 K words of 32 bits each. A binary instruction code is
stored in one word of the memory. The instruction has four parts: an addressing mode field to
specify one of the two-addressing mode (direct and indirect), an operation code, a register code
part to specify one of the 256 registers and an address part. How many bits are there in
addressing mode part, opcode part, register code part and the address part?
Solution:
Q. A computer has 256 K word memory. The instruction format has 4 fields i.e., Opcode, register
field to represent one of the 60 processor registers, mode field represent one of 7 addressing
modes and memory address field. How many instructions the system supports when a 32- bit
instruction is placed in the one memory cell.
Or
Q. The memory unit of a computer has 256K words of 32 bits each. The computer has an
instruction format with four fields: an operation code field, a mode field to specify one of seven
addressing modes, a register address field to specify one of 60 processor registers, and a memory
address. Specify the instruction format and the number of bits in each field if the in instruction is
in one memory word.
Solution:
A bus is a collection of small wires and a communication system that transfers data between the
internal components of the computer or between the computers.
A bus is a collection of wires used for the communication of different parts of a computer. Further, it uses
electric signals to pass the data and information.
TYPES OF BUSES
Data Bus: The data bus is bidirectional. The data bus is used to communicate or send the data from
one part to another.
Address Bus: The address bus is unidirectional. The address bus is used to communicate the address of
the given data and instructions.
Control Bus: The control bus is unidirectional. The control bus is used to control the signals between
different devices.
1 0 1 1 0 1 0 0
Types of Registers are:
The main purpose of MDR is: if a CPU contains a 4-bit register and we have data of 100 bits, so
MDR converts the 100 bits data into 4-4 bits, and then it will be executed. (Split large data into
small pieces).
The memory content store in the MDR is copied into the Instruction Register (IR).
It is used to store the instructions like LOAD, ADD, SUB, DIV, MUL, STORE, MOV, EXE etc.
Instruction Register (IR) is also known as Current Instruction Register (CIR).
MICRO OPERATIONS
In computer central processing units, micro-operations (also known as micro-ops) are the
functional or atomic, operations of a processor.
These are low level instructions used in some designs to implement complex machine instructions.
They generally perform operations on data stored in one or more registers.
They transfer data between registers or between external buses of the CPU, also performs
arithmetic and logical operations on registers.
Each instruction cycle is made up of a number of smaller units – Fetch, Indirect, Execute and
Interrupt cycles. Each of these cycles involves series of steps, each of which involves the
processor registers. These steps are referred as micro-operations.
Types of Micro-operations
1. Arithmetic Micro-operations
2. Logic Micro-Operations
3. Shift Micro-operations
Arithmetic Micro-operations
The basic Arithmetic Micro-operations are classified in the following categories:
1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift
Some additional Arithmetic Micro-operations are classified as:
1. Add with carry
2. Subtract with borrow
3. Transfer/Load, etc.
Logic Micro-operations
1. Clear
2. AND
3. Exclusive OR
4. OR
5. NOR
6. NAND
Shift Micro-operations
1. Shift Left Register (shl)
2. Shift Right Register (shr)
3. Circular Shift Left Register (shlc)
4. Circular Shift Right Register (shrc)
5. Arithmetic Shift Left (shla)
6. Arithmetic Shift Right (shra)
In a computer program we have seen that execution of every instruction consists of two parts – fetch
phase and execution phase of the instruction.
In step 1, the instruction fetch operation is initiated by loading the contents of the PC into the MAR
and sending a Read request to the memory. The Select signal is set to Select4, which causes the
multiplexer MUX to select the constant 4. This value is added to the operand at input B, which is
the contents of the PC, and the result is stored in register Z.
The updated value is moved from register Z back into the PC during step 2, while waiting for the
memory to respond.
In step 3, the word fetched from the memory is loaded into the IR.
Steps 1 through 3 constitute the instruction fetch phase, which is the same for all instructions. The
instruction decoding circuit interprets the contents of the IR at the beginning of step 4.
This enables the control circuitry to activate the control signals for steps 4 through 7, which
constitute the execution phase.
The contents of register R3 are transferred to the MAR in step 4, and a memory read operation is
initiated.
Then the contents of R1 are transferred to register Y in step 5, to prepare for the addition operation.
When the Read operation is completed, the memory operand is available in register MDR, and the
addition operation is performed in step 6.
The contents of MDR are gated to the bus, and thus also to the B input of the ALU, and register Y
is selected as the second input to the ALU by choosing Select Y The sum is stored in register Z,
then transferred to R1 in step 7.
The End signal causes a new instruction fetch cycle to begin by returning to step 1.
PROGRAM CONTROL
Jump JMP The jump instruction transfers the program sequence to the
memory address.
Test (by ANDing) TST Test instruction use to test the instructions.
PIPELINING
Pipelining is a process of arrangement of hardware elements of the CPU such that its overall
performance is increased.
Simultaneous execution of more than one instruction takes place in a pipelined processor.
Let us see a real-life example that works on the concept of pipelined operation. Consider a water
bottle packaging plant. Let there be 3 stages that a bottle should pass through, Inserting the bottle
(I), Filling water in the bottle(F), and Sealing the bottle(S).
Let us consider these stages as stage 1, stage 2, and stage 3 respectively. Let each stage take 1
minute to complete its operation. Now, in a non-pipelined operation, a bottle is first inserted in the
plant, after 1 minute it is moved to stage 2 where water is filled. Now, in stage 1 nothing is
happening. Similarly, when the bottle moves to stage 3, both stage 1 and stage 2 are idle. But in
pipelined operation, when the bottle is in stage 2, another bottle can be loaded at stage 1.
Similarly, when the bottle is in stage 3, there can be one bottle each in stage 1 and stage 2. So,
after each minute, we get a new bottle at the end of stage 3. Hence, the average time taken to
manufacture 1 bottle is:
Hardwired Control Unit: The control hardware can be viewed as a state machine that changes from
one state to another in every clock cycle, depending on the contents of the instruction register, the
condition codes, and the external inputs. The outputs of the state machine are the control signals. The
sequence of the operation carried out by this machine is determined by the wiring of the logic
elements and hence named “hardwired”.
Fixed logic circuits that correspond directly to the Boolean expressions are used to generate the
control signals.
Hardwired control is faster than micro-programmed control.
A controller that uses this approach can operate at high speed.
RISC architecture is based on the hardwired control unit
Types of Micro-programmed Control Unit – Based on the type of Control Word stored in the
Control Memory (CM), it is classified into two types:
In the Horizontal micro-programmed control unit, the control signals are represented in the decoded
binary format, i.e., 1 bit/CS. Here „n‟ control signals require n bit encoding. On the other hand
In a Vertical micro-programmed control unit, the control signals are represented in the encoded
binary format. Here „n‟ control signals require log2n bit encoding.
S.
No Horizontal µ-programmed CU Vertical µ-programmed CU
S.
No Horizontal µ-programmed CU Vertical µ-programmed CU
It is more flexible than a vertical micro- It is less flexible than horizontal but more flexible
5. programmed control unit. than that of a hardwired control unit.
Example: Consider a hypothetical Control Unit that supports 4 k words. The Hardware contains 64
control signals and 16 Flags. What is the size of control word used in bits and control memory in a
byte using:
a) Horizontal Programming
b) Vertical programming
Solution:
a) For Horizontal
64 bits for 64 signals % 16 bits for flags
Control Word Size = 64 + 16 = 80 bits
Control Memory = 4 kW = ( (4* 80) / 8 ) = 40 kByte
b) For Vertical
6 bits for 64 signals i.e log264
4 bits for 16 flags i.e log216
12 bits for 4K words i.e log2(4*1024)
Control Word Size = 4 + 6 + 12 = 22 bits
Control Memory = 4 kW = ( (4* 22) / 8 ) = 11 kByte
Control Address Register (CAR): Control address register receives the address from four
different paths. For receiving the addresses from four different paths, Multiplexer is used.
Multiplexer: Multiplexer is a combinational circuit which contains many data inputs and single
data output depending on control or select inputs.
Branching: Branching is achieved by specifying the branch address in one of the fields of the
micro instruction. Conditional branching is obtained by using part of the micro-instruction to
select a specific status bit in order to determine its condition.
Mapping Logic: An external address is transferred into control memory via a mapping logic
circuit.
Incrementer: Incrementer increments the content of the control address register by one, to select
the next micro-instruction in sequence.
Subroutine Register (SBR): The return address for a subroutine is stored in a special register
called Subroutine Register whose value is then used when the micro-program wishes to return
from the subroutine.
Control Memory: Control memory is a type of memory which contains addressable storage
registers. Data is temporarily stored in control memory. Control memory can be accessed quicker
than main memory.