Notes By Prof.

Tanya Shrivastava

UNIT – 3

COMPUTER ORGANIZATION AND ARCHITECTURE

 GENERAL MODEL OF THE CONTROL UNIT WITH A DIAGRAM

 Control unit use to control the signals. A Central Processing Unit is the most important
component of a computer system. A control unit is a part of the CPU which directs the
operation of the processor. A control unit controls the operations of all parts of the
computer.
 It is the responsibility of the control unit to tell the computer‟s memory, arithmetic/logic
unit, and input and output devices how to respond to the instructions that have been sent to
the processor.
 Control memory is use to control the memory in the control unit. Control Memory is the
storage in the micro programmed control unit to store the micro program.
 Writeable Control Memory: Control Storage whose contents can be modified, allow the
change in micro program and Instruction set can be changed or modified is referred as
Writeable Control Memory.
 The control memory consists of micro programs that are fixed and cannot be modified
frequently. They contain microinstructions that specify the internal control signals required to
execute register micro-operations. The machine instructions generate a chain of
microinstructions in the control memory.
 CPUs and GPUs are examples of devices that use control units.

Examples of devices that require a CU are:

 Control Processing Units(CPUs)
 Graphics Processing Units(GPUs)

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Notes By Prof. Tanya Shrivastava

Functions of the Control Unit

 It manages the sequence of data movements into, out of, and between a processor‟s many sub-units.
 It interprets instructions.
 It controls data flow inside the processor.
 It receives external instructions or commands to which it converts to sequence of control signals.
 It controls many execution units (i.e. ALU, data buffers and registers) contained within a CPU.
 It also handles multiple tasks, such as fetching, decoding, execution handling and storing results.

Types of Control Unit

There are two types of control units:
 Hardwired
 Micro programmable control unit.

 INSTRUCTION TYPES

Instruction
An instruction is something that someone tells you to do. Instruction is a command which is given by
the user to computer to perform some task.

There are 3 types of instructions:

1. Data Transfer Instruction

2. Data Manipulation Instruction
3. Program Control Instruction

1. Data Transfer Instruction

These instructions are used to transfer the data from one place to another.

Data transfer instructions transfer the data between memory and processor registers, processor registers,
and I/O devices, and from one processor register to another.

Data Transfer Methods

Data transfer from:
Memory to Register ex. MOV R, M[X]
Register to Memory ex. MOV M[X], R
Register to Register ex. MOV R1, R2

There are eight commonly used data transfer instructions. Each instruction is represented by a
mnemonic symbol.

Name Mnemonic Symbols

Load LD

Store ST

Move MOV

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Notes By Prof. Tanya Shrivastava

Name Mnemonic Symbols

Exchange XCH

Input In

Output OUT

Push PUSH

Pop POP
2. Data Manipulation Instruction
Data manipulation instructions are those instructions that manipulate or change the content of the
data/registers/memory.

The data manipulation instructions are usually divided into three types:
1. Arithmetic instructions
2. Logical instructions and bit manipulation instructions
3. Shift instructions

Arithmetic instructions: The four basic operations of arithmetic instructions are addition,
subtraction, multiplication, and division. Arithmetic instructions include increment, decrement, add,
subtract, multiply, divide, add with Carry, subtract with Borrow, negate that is (2‟s) two's complement.
If there‟s a negative number, it is considered as negate (so two's complement).

Name Mnemonic

Increment INC

Decrement DEC

Add ADD

Subtract SUB

Multiply MUL

Divide DIV

Add with carry ADDC

Subtract with borrow SUBB

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Notes By Prof. Tanya Shrivastava

Logical instructions and bit manipulation instructions: logical and bit manipulation instructions
starting with clear (that means clear the content of accumulator), complement the accumulator, AND,
OR, Exclusive-OR, Clear carry, Set carry, Complement carry, Enable interrupts, Disable interrupts, all
these are logical and bit manipulation instructions.

 Clear instruction means making all the bits of a register „0‟.

 AND instruction performs multiplication of two binary numbers.
 OR instruction performs addition of two binary numbers.
 Set instruction means making all the bits of a register „1‟.
 XOR instruction is referred to as bit complement instruction.

Name Mnemonic

Clear CLR

Complement COM

AND AND

OR OR

Exclusive-OR XOR

Clear carry CLRC

Set Carry SETC

Complement Carry COMC

Enable Interrupt EI

Disable Interrupt DI

Shift instructions: Shift instructions allow the bits of a memory byte or register to be shifted one-bit
place to the right or the Left.

Name Mnemonic

Logical Shift Right SHR

Logical Shift Left SHL

Arithmetic Shift Right SHRA

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Arithmetic Shift Left SHLA

Rotate Right ROR

Rotate Left ROL

Rotate Right through carry RORC

Rotate Left through carry ROLC

3. Program Control Instruction

 The program control instructions control the flow of program execution.

 Program control instructions modify or change the flow of a program. It is the instruction that
changes the sequence of the program's execution, which means it changes the value of the program
counter, due to which the execution of the program changes.

Name Mnemonics

Branch BR

Jump JMP

Skip SKP

Call Call

Return RET

Compare (by Subtraction) CMP

Test (by ANDing) TST

 INSTRUCTION FORMAT

Instruction is an order given by user to computer that tells CPU what to do.

Instructions are written in machine language.

Instructions stored in memory.

CPU fetches the instructions from main memory and one by one stored in the Instruction Register (IR)
in particular format after that executes instruction and result displayed to user.

Instruction format: Instruction format describe the layout or internal structure of instruction and how
instruction is represented in Instruction Register by CPU.

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1st field: Opcode is also known as operation code. It tells the CPU which operation is to be performed in
the instruction. For example add (addition), sub (subtraction), mul (multiplication), mov etc.

 ADD A (in this operation addition is performed)

 MOV R1, R2, (in this mov operation is performed)

2nd field: Address of operand also known as data. Data stored in main memory and its address stored in
address field of instruction.

3rd field: Mode defines way of calculating address of operand. Mode tells whatever the address of the
data is given, how CPU reach to that address. Weather it is Memory address or Register address.

Types of Instruction Format:

Three address instruction: contains 1 opcode field and 3 address field.

Two address instruction: contains 1 opcode field and 2 address field.
One address instruction: contains 1 opcode field and 1 address field.
Zero address instruction: contains 1 opcode but no address field.

Example add two numbers 2+5=7

ADD 2 5
Result = 7

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Notes By Prof. Tanya Shrivastava

In two address
instruction we
mainly use MOV
operation.

In one address instruction result

stored in Accumulator (AC), but
not in main memory. In one
address instruction we mainly use
LOAD and STORE operation.

Instruction specifies
data itself. Basically we
use stack operation for
example PUSH and
POP.

Numerical based on Instruction Format

Q. Describe the Assembly Language Code for the expression X= (A+B) *(C+D)

a) Using Zero-Address Instruction

b) Using One-Address Instruction
c) Using Two-Address Instruction
d) Using Three Address Instruction

Answer:

Zero Address Instructions

In case of Zero Address Instructions the expression is first converted in to Reverse Polish Notation
i.e. Postfix Notation.

Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location

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Notes By Prof. Tanya Shrivastava

PUSH A TOP = A

PUSH B TOP = B

ADD TOP = A+B

PUSH C TOP = C

PUSH D TOP = D

ADD TOP = C+D

MUL TOP = (C+D)*(A+B)

POP X M[X] = TOP

One Address Instructions

Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location

LOAD A AC = M[A]

ADD B AC = AC + M[B]

STORE T M[T] = AC

LOAD C AC = M[C]

ADD D AC = AC + M[D]

MUL T AC = AC * M[T]

Two Address Instructions

Here destination address can also contain an operand.
Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

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Notes By Prof. Tanya Shrivastava

MOV R1, A R1 = M[A]

ADD R1, B R1 = R1 + M[B]

MOV R2, C R2 = M[C]

ADD R2, D R2 = R2 + M[D]

MUL R1, R2 R1 = R1 * R2

MOV X, R1 M[X] = R1

Three Address Instructions

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location

ADD R1, A, B R1 = M[A] + M[B]

ADD R2, C, D R2 = M[C] + M[D]

MUL X, R1, R2 M[X] = R1 * R2

Q. Describe the Assembly Language Code for the expression X= (A-B) *(((C-D)/F)/G)

a) Using Zero-Address Instruction

b) Using One-Address Instruction
c) Using Two-Address Instruction
d) Using Three Address Instruction

Answer:

Zero Address Instructions

In case of Zero Address Instructions the expression is first converted in to Reverse Polish
Notation i.e. Postfix Notation.

Expression: X= (A-B) *(((C-D)/F)/G)

Postfixed : X = AB-CD-F/G/*
TOP means top of stack
M[X] is any memory location

Notes By Prof. Tanya Shrivastava

Notes By Prof. Tanya Shrivastava

PUSH A TOS <- A

PUSH B TOS <- B

SUB TOS <- A-B

PUSH C TOS <- C

PUSH D TOS <- D

SUB TOS <- C-D

PUSH F TOS <- F

DIV TOS <- (C-D)/F

PUSH G TOS <- G

DIV TOS <- (((C-D)/F)/G)

MUL TOS <- (A-B) *(((C-D)/F)/G)

POP X M[X] <- TOS

One Address Instructions

Expression: X= (A-B) *(((C-D)/F)/G)
AC is accumulator
M[] is any memory location
M[T] is temporary location

LOAD A AC <- M[A]

SUB B AC <- AC - M[B]

STORE T M[T] <- AC

LOAD C AC <- M[C]

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Notes By Prof. Tanya Shrivastava

LOAD A AC <- M[A]

SUB D AC <- AC - M[D]

DIV F AC <- AC / M[F]

DIV G AC <- AC / M[G]

STORE T1 M[T1] <- AC

LOAD T AC <- M[T]

MUL T1 AC <- AC * M[T1]

STORE X M[X] <- AC

Two Address Instructions

Here destination address can also contain an operand.
Expression: X= (A-B) *(((C-D)/F)/G)
R1, R2 are registers
M[] is any memory location

MOV R1, A R1 <- M[A]

SUB R1, B R1 <- R1 - M[B]

MOV R2, C R2 <- M[C]

SUB R2, D R2 <- R2 - M[D]

DIV R2, F R2 <- R2 / M[F]

DIV R2, G R2 <- R2 / M[G]

MUL R1, R2 R1 <- R1 * R2

MOV X, R1 M[X] <- R1

Notes By Prof. Tanya Shrivastava

Notes By Prof. Tanya Shrivastava

Three Address Instructions

Expression: X= (A-B) *(((C-D)/F)/G)
R1, R2 are registers
M[] is any memory location

SUB R1, A, B R1 <- M[A] - M[B]

SUB R2, C, D R2 <- M[C] + M[D]

DIV R2, R2, F R2 <- R2/ M[F]

DIV R2, R2, G R2 <- R2/ M[G]

MUL X, R1, R2 M[X] <- R1*R2

Q. Discuss Instruction format and classify according to the basic computer systems. The
Instruction format has 16 bits, 12 bits are used to represent address part and one bit for mode
part then Calculate how many bits are required for opcode?

Solution:

Instruction format = 16 bits,

Address part is 12 bits= 0 to 11 (given)
and address mode= 1 bit i.e. 15, (given)
Hence total no. of bits are required for opcode field = 3 i.e. 12, 13, 14

 INSTRUCTION CYCLES AND SUBCYCLES (fetch and execute etc.)

 Instruction cycle is also known as Fetch, Decode and Execute Cycle.
 Instruction cycle is divided into 4 sub phases or 4 sub cycles. Fetchdecode, decoderead,
readexecute, executefetch.
 The instruction cycle consists of four phases: fetching an instruction from memory, decoding the
fetched instruction, reading the address from memory, and finally, instruction execution.

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Notes By Prof. Tanya Shrivastava

Buses Used in Instruction cycle:

A bus is a collection of small wires and a communication system that transfers data between the
internal components of the computer or between the computers.
A bus is a collection of wires used for the communication of different parts of a computer. Further, it uses
electric signals to pass the data and information.

TYPES OF BUSES

Data Bus: The data bus is bidirectional. The data bus is used to communicate or send the data from
one part to another.
Address Bus: The address bus is unidirectional. The address bus is used to communicate the address of
the given data and instructions.
Control Bus: The control bus is unidirectional. The control bus is used to control the signals between
different devices.

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Notes By Prof. Tanya Shrivastava

Registers used in Instruction cycle:

 Register is an electronic component that is used to hold the information as bits.

 Register are used by processor (CPU) to store small amount of data.
 A register can be 2 bit register, 4 bit register, 8 bit register, 16 bit register,
32 bit register, 64 bit register etc.
 Register provides fast execution, fast accessing, fast fetching.
 CPU is a fast processor because it contains registers that provides fast speed.
 Register is a collection of various flip-flops.
 Flip flop means a single cell that is capable to store a single bit.
 1 cell stores 1 bit.
 1 cell = 1 flip-flop
Example: this 8 bit register contains 8 cells or we can say 8 flip-flops.

1 0 1 1 0 1 0 0
Types of Registers are:

 Program Counter (PC)

 Memory Address Register (MAR)
 Memory Data Register (MDR)/Memory Buffer Register (MBR)
 Instruction Register (IR)

Program Counter (PC)

 Program counter is a register in the CPU.
 Program counter is also known as digital counter.
 Controls sequence of instructions.
 A program counter is a register in the CPU containing the address of the next instruction to be
executed from memory.
 It holds the address of the memory/RAM. Address of RAM like – 0,1,2,3 etc.

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Notes By Prof. Tanya Shrivastava

Memory Address Register (MAR)

 MAR is a register in the CPU it contains address of the memory or RAM.

 Stores memory address/RAM address.
 The memory/RAM address store in the program counter (0, 1, 2, 3 etc.) is copied into the MAR
(0, 1, 2, 3 etc.).

Memory Data Register (MDR)/Memory Buffer Register (MBR)

 MDR/MBR is a register in the CPU. Stores and process the memory.

 Memory Data Register also known as Memory Buffer Register.
 It is used to hold the contents of the memory/RAM. Contents like – Load 4, ADD 5, Store 6
these are the contents of the RAM.
 The main purpose of MDR is: if a CPU contains a 4-bit register and we have data of 100 bits, so
MDR converts the 100 bits data into 4-4 bits, and then it will be executed. (Split large data into
small pieces).

Instruction Register (IR)

 The memory content store in the MDR is copied into the Instruction Register (IR).
 It is used to store the instructions like LOAD, ADD, SUB, DIV, MUL, STORE, MOV, EXE etc.
 Instruction Register (IR) is also known as Current Instruction Register (CIR).

 MICRO OPERATIONS
 In computer central processing units, micro-operations (also known as micro-ops) are the
functional or atomic, operations of a processor.
 These are low level instructions used in some designs to implement complex machine instructions.
They generally perform operations on data stored in one or more registers.
 They transfer data between registers or between external buses of the CPU, also performs
arithmetic and logical operations on registers.
 Each instruction cycle is made up of a number of smaller units – Fetch, Indirect, Execute and
Interrupt cycles. Each of these cycles involves series of steps, each of which involves the
processor registers. These steps are referred as micro-operations.

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Notes By Prof. Tanya Shrivastava

Types of Micro-operations

1. Arithmetic Micro-operations
2. Logic Micro-Operations
3. Shift Micro-operations

Arithmetic Micro-operations
The basic Arithmetic Micro-operations are classified in the following categories:
1. Addition
2. Subtraction
3. Increment
4. Decrement
5. Shift
Some additional Arithmetic Micro-operations are classified as:
1. Add with carry
2. Subtract with borrow
3. Transfer/Load, etc.
Logic Micro-operations
1. Clear
2. AND
3. Exclusive OR
4. OR
5. NOR
6. NAND
Shift Micro-operations
1. Shift Left Register (shl)
2. Shift Right Register (shr)
3. Circular Shift Left Register (shlc)
4. Circular Shift Right Register (shrc)
5. Arithmetic Shift Left (ASHL)
6. Arithmetic Shift Right (ASHR)

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Notes By Prof. Tanya Shrivastava

 EXECUTION OF A COMPLETE INSTRUCTION

An Instruction Cycle Consists of an instruction fetch, followed by zero or more operand fetches,
followed by zero or more operand stores, followed by an interrupt Check (if interrupts are enabled) The
major Computer System Components (processor, main memory, I/O modules) need to be
interconnected in order to Exchange data and control signals.

The most popular means on interconnection is the use of a shared System bus Consisting on multiple
lines.

Steps for Execution of Complete Instructions:

There are Six Steps to the Execution of Complete Instruction ⇒

Fetch Instruction: The Fetching instructions from the main memory begin the Execution Cycle. The
Current program counter will acquire the instruction placed in the instruction register (IR).

Decode Instruction: During this Cycle, the decoder interprets the encoded instruction Stored in the IR
(Instructions register).

Perform ALU operation: Two operands in the Instruction will be operated on a specified operator in
the instructions in an ALU (Arithmetic Logic Unit). for Example, if the instruction were to add two
numbers, the addition would occur here. The outcome of the process is output by the ALU, which takes
two values and Outputs one.

Access Memory: There are only two memory access instructions: LOAD and STORE. A value from
memory is copied to a register by LOAD, and a register value is copied to memory by STORE.

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Note: This Step is skipped if you follow any other instructions.

Update Register File: The ALU's output/result is written back to the register file in this phase to update
the register file. It‟s also possible that the result is due to a LOAD from memory. Some instructions do
not provide results that can save The BRANCH and JUMP are Example.

Update Program Counter (PC): At the Completion of the Current instructions Execution, we must
update the program Counter (PC) to the address of the next instructions so that we may return to step 1
and have the CPU acquire the next instruction. if the instruction was BRANCH or JUMP, the program
Counter might need to be set to a Different memory address that the following one.

 PROGRAM CONTROL
 The program control instructions control the flow of program execution.
 Program control instructions modify or change the flow of a program. It is the instruction that
changes the sequence of the program's execution, which means it changes the value of the program
counter, due to which the execution of the program changes.

Name Mnemonics Description

Branch BR Specify the address we need to branch. Three types of branch

instruction are jump, call and return.

Jump JMP The jump instruction transfers the program sequence to the
memory address.

Call Call The CALL instruction is used to call the value.

Return RET RETURN instruction is used to RETURN the value.

Skip SKP Skip instruction is used to skip one or next instruction.

Compare (by CMP Compare instructions used to perform comparisons.

Subtraction)

Test (by ANDing) TST Test instruction use to test the instructions.

 REDUCED INSTRUCTION SET COMPUTER/COMPLEX INSTRUCTION SET COMPUTER

RISC CISC
It focuses on software. It focuses on hardware
It uses only hardwired control unit It uses both hardwired and Microprogrammed
control unit
Code size is large Code size is small
The use of pipeline are simple in risc The use of pipeline are difficult in cisc

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Notes By Prof. Tanya Shrivastava

An instruction is executed in a single clock Instruction may take more than one clock cycle.
cycle.
The execution time of risc is very short The execution time of cisc is very long
Takes more space in memory Takes less space in memory
Less registers Use more registers
Fixed length instruction Variable length instruction
110011 1010101010110
001100 10110101010
101000 1100111000111100
Instructions are reduced Instructions are complex
Power consumption is less Power consumption is more
Load and Store independent instructions Load and Store independent instructions
(Register to Register) (Memory to Memory)

 PIPELINING
 Pipelining is a process of arrangement of hardware elements of the CPU such that its overall
performance is increased.
 Simultaneous execution of more than one instruction takes place in a pipelined processor.

Let us see a real-life example that works on the concept of pipelined operation. Consider a water
bottle packaging plant. Let there be 3 stages that a bottle should pass through, Inserting the bottle
(I), Filling water in the bottle (F), and Sealing the bottle (S).

Let us consider these stages as stage 1, stage 2, and stage 3 respectively. Let each stage take 1
minute to complete its operation. Now, in a non-pipelined operation, a bottle is first inserted in the
plant, after 1 minute it is moved to stage 2 where water is filled. Now, in stage 1 nothing is
happening. Similarly, when the bottle moves to stage 3, both stage 1 and stage 2 are idle. But in
pipelined operation, when the bottle is in stage 2, another bottle can be loaded at stage 1.
Similarly, when the bottle is in stage 3, there can be one bottle each in stage 1 and stage 2. So,
after each minute, we get a new bottle at the end of stage 3. Hence, the average time taken to
manufacture 1 bottle is:

 Without pipelining = 9/3 minutes = 3m

IFS||||||
|||IFS|||
| | | | | | I F S (9 minutes)

 With pipelining = 5/3 minutes = 1.67m

IFS||
|IFS|
| | I F S (5 minutes)

Thus, pipelined operation increases the efficiency of the CPU.

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Notes By Prof. Tanya Shrivastava

Hence 8 tasks are completed in 11 clock cycles.

 HARDWIRE AND MICRO PROGRAMMED CONTROL

Hardwired Control Unit: The control hardware can be viewed as a state machine that changes from
one state to another in every clock cycle, depending on the contents of the instruction register, the
condition codes, and the external inputs. The outputs of the state machine are the control signals. The
sequence of the operation carried out by this machine is determined by the wiring of the logic
elements and hence named “hardwired”.
 Fixed logic circuits that correspond directly to the Boolean expressions are used to generate the
control signals.
 Hardwired control is faster than micro-programmed control.
 A controller that uses this approach can operate at high speed.
 RISC architecture is based on the hardwired control unit

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Notes By Prof. Tanya Shrivastava

Micro-programmed Control Unit –

 The control signals associated with operations are stored in special memory units inaccessible by
the programmer as Control Words.
 Control signals are generated by a program that is similar to machine language programs.
 The micro-programmed control unit is slower in speed because of the time it takes to fetch
microinstructions from the control memory.

Some Important Terms

1. Control Word: A control word is a word whose individual bits represent various control signals.
2. Micro-routine: A sequence of control words corresponding to the control sequence of a machine
instruction constitutes the micro-routine for that instruction.
3. Micro-instruction: Individual control words in this micro-routine are referred to as
microinstructions.
4. Micro-program: A sequence of micro-instructions is called a micro-program, which is stored in a
ROM or RAM called a Control Memory (CM).
5. Control Store: the micro-routines for all instructions in the instruction set of a computer are
stored in a special memory called the Control Store.

The differences between hardwired and micro-programmed control units:

Micro-programmed Control Unit
Features Hardwired Control Unit

Fixed set of logic gates and Microcode stored in memory

Implementation
circuits

Less flexible, difficult to More flexible, easier to modify

Flexibility
modify

Supports limited instruction Supports complex instruction sets

Instruction Set
sets

Complex design, more difficult to

Simple design, easy to
Complexity of Design implement
implement

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 Notes By Prof. Tanya Shrivastava

Slower operation due to microcode

Speed Fast operation decoding

Easier to debug and test

Debugging and Testing Difficult to debug and test

Larger size, higher cost

Size and Cost Smaller size, lower cost

Maintenance and Difficult to upgrade and Easier to upgrade and maintain

Upgradability maintain

 MICRO PROGRAMME SEQUENCING

A microprogram sequencer generates the address of the next microinstruction to be executed. The
address is used by a microprogram sequencer to decide which microinstruction has to be performed
next.

Microprogram sequencing is the name of the total procedure. The addresses needed to step through a
control store‟s microprogram are created by a sequencer, also known as a micro sequencer.

Microprogram Sequencing:
This refers to the process of determining the sequence in which microinstructions are executed to
complete a main instruction.

There are two main approaches:

 Sequential: Microinstructions are executed one after another in the order they are stored in the control
store. This is efficient for simple instructions.

 Branching: Based on certain conditions (like the result of an operation), the microprogram can jump to
a different sequence of microinstructions within the control store. This allows for handling complex
instructions and conditional logic.

Micro Instructions Sequencer

Micro Instructions Sequencer is a combination of all hardware for selecting the next micro-instruction
address. The micro-instruction in control memory contains a set of bits to initiate micro-operations in
computer registers and other bits to specify the method by which the address is obtained.

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Notes By Prof. Tanya Shrivastava

Implementation of Micro Instructions Sequencer

 Control Address Register (CAR): Control address register receives the address from four
different paths. For receiving the addresses from four different paths, Multiplexer is used.

 Multiplexer: Multiplexer is a combinational circuit which contains many data inputs and single
data output depending on control or select inputs.

 Branching: Branching is achieved by specifying the branch address in one of the fields of the
micro instruction. Conditional branching is obtained by using part of the micro-instruction to
select a specific status bit in order to determine its condition.

 Mapping Logic: An external address is transferred into control memory via a mapping logic
circuit.

 Incrementer: Incrementer increments the content of the control address register by one, to select
the next micro-instruction in sequence.

 Subroutine Register (SBR): The return address for a subroutine is stored in a special register
called Subroutine Register whose value is then used when the micro-program wishes to return
from the subroutine.

 Control Memory: Control memory is a type of memory which contains addressable storage
registers. Data is temporarily stored in control memory. Control memory can be accessed quicker
than main memory.

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Notes By Prof. Tanya Shrivastava

 CONCEPT OF HORIZONTAL AND VERTICAL MICROPROGRAMMING.

Types of Micro-programmed Control Unit – Based on the type of Control Word stored in the
Control Memory (CM), it is classified into two types:

1. Horizontal Micro-programmed Control Unit:

The control signals are represented in the decoded binary format that is 1 bit/CS. Example: If 53
Control signals are present in the processor then 53 bits are required. More than 1 control signal can
be enabled at a time.

 It supports longer control words.

 It is used in parallel processing applications.
 It allows a higher degree of parallelism. If degree is n, n CS is enabled at a time.
 It requires no additional hardware (decoders). It means it is faster than Vertical
Microprogrammed.
 It is more flexible than vertical Micro programmed

2. Vertical Micro-programmed Control Unit:

The control signals are represented in the encoded binary format. For N control signals- Log2(N) bits
are required.

 It supports shorter control words.

 It supports easy implementation of new control signals therefore it is more flexible.
 It allows a low degree of parallelism i.e., the degree of parallelism is either 0 or 1.
 Requires additional hardware (decoders) to generate control signals, it implies it is slower than
horizontal micro programmed.
 It is less flexible than horizontal but more flexible than that of a hardwired control unit.

In the Horizontal micro-programmed control unit, the control signals are represented in the
decoded binary format, i.e., 1 bit/CS. Here ‘n’ control signals require n bit encoding. On the
other hand

In a Vertical micro-programmed control unit, the control signals are represented in the encoded
binary format. Here ‘n’ control signals require log2n bit encoding.

Notes By Prof. Tanya Shrivastava

Notes By Prof. Tanya Shrivastava

Difference between Horizontal and Vertical micro-programmed Control Unit:

S.
No Horizontal µ-programmed CU Vertical µ-programmed CU

1. It supports longer control word. It supports shorter control word.

It allows a higher degree of parallelism.

It allows a low degree of parallelism i.e., the degree
If degree is n, then n Control Signals are
of parallelism is either 0 or 1.
2. enabled at a time.

Additional hardware in the form of decoders is

No additional hardware is required.
3. required to generate control signals.

It is faster than a Vertical micro- it is slower than a Horizontal micro-programmed

4. programmed control unit. control unit.

It is more flexible than a vertical micro- It is less flexible than horizontal but more flexible
5. programmed control unit. than that of a hardwired control unit.

A horizontal micro-programmed control A vertical micro-programmed control unit uses

unit uses horizontal micro-instruction, vertical micro-instruction, where a code is used for
where every bit in the control field each action to be performed and the decoder
6. attaches to a control line. translates this code into individual control signals.

The horizontal micro-programmed

The vertical micro-programmed control unit makes
control unit makes less use of ROM
more use of ROM encoding to reduce the length of
encoding than the vertical micro-
the control word.
7. programmed control unit.

Notes By Prof. Tanya Shrivastava

Notes By Prof. Tanya Shrivastava

Q. The Memory unit of a Computer has 512K words of 32 bits each. The Computer has an
Instruction format with four fields: an operation code field, a mode field to specify one of the
seven addressing modes, a register address field to specify one of the 90 processor register, and a
memory address. Analyse the instruction format and number of bits in each field if the instruction
is in one word memory.

Solution:

Q. A computer uses a memory unit of 512 K words of 32 bits each. A binary instruction code is
stored in one word of the memory. The instruction has four parts: an addressing mode field to
specify one of the two-addressing mode (direct and indirect), an operation code, a register code
part to specify one of the 256 registers and an address part. How many bits are there in
addressing mode part, opcode part, register code part and the address part?

Solution:

Notes By Prof. Tanya Shrivastava

Notes By Prof. Tanya Shrivastava

Q. A computer has 256 K word memory. The instruction format has 4 fields i.e., Opcode, register
field to represent one of the 60 processor registers, mode field represent one of 7 addressing
modes and memory address field. How many instructions the system supports when a 32- bit
instruction is placed in the one memory cell.
Or

Q. The memory unit of a computer has 256K words of 32 bits each. The computer has an
instruction format with four fields: an operation code field, a mode field to specify one of seven
addressing modes, a register address field to specify one of 60 processor registers, and a memory
address. Specify the instruction format and the number of bits in each field if the in instruction is
in one memory word.

Solution:

Notes By Prof. Tanya Shrivastava