DLD - QB
DLD - QB
(Autonomous)
Dundigal, Hyderabad - 500043
Year 2016– 17
OBJECTIVES
To meet the challenge of ensuring excellence in engineering education, the issue of quality needs to be addressed,
debated and taken forward in a systematic manner. Accreditation is the principal means of quality assurance in
higher education. The major emphasis of accreditation process is to measure the outcomes of the program that is
being accredited.
In line with this, Faculty of Institute of Aeronautical Engineering, Hyderabad has taken a lead in incorporating
philosophy of outcome based education in the process of problem solving and career development. So, all students of
the institute should understand the depth and approach of course to be taught through this question bank, which will
enhance learner’s learning process.
Blooms
S. Course
QUESTION Taxonomy
No Level Outcome
UNIT-I
DIGITAL SYSTEMS
Part - A (Short Answer Questions)
10 Discuss what a logic design is and what do u mean by positive logic Understand 2
system?
14 Explain the addition of two signed binary number along with Understand 2
examples?
landing. Red LED display turns on if any of the gears fail to extend
properly prior to landing. When a landing gear is extended, its sensor
produces a LOW voltage. When a landing gear is retracted, its sensor
produces a HIGH voltage. Design a circuit to meet this requirement?
6. Solve (a) What is the gray code equivalent of the Hex Number 3A7 Apply
(b) Find the biquinary number code for the decimal numbers from
1
0 to 9
(c) Find 9's complement (25.639)10
12 Apply the representation of +65 and -65 in sign magnitude, Sign 1’s Apply
1
complement and sign 2’s complement representation?
13 State different ways for representing the signed binary numbers? Knowledge 2
15 Define weighted codes and non weighted codes with examples? Knowledge 1
16 Explain what do you mean by error detecting and correcting codes? Understand 3
17 Illustrate the rules for XS3 addition and subtraction? Apply 2
18 Explain error occurred in the data transmission can be detected using Understand
3
parity bit?
19 Illustrate IEEE standard floating formats for 32-bit and 64 bit with Apply
1
following examples?
20 Explain the truth tables of X-OR, NAND and NOR gates? Understand 2
3. Convert the decimal numbers into binary, BCD and Hexadecimal Understand
1
numbers (3600)d, (1200)d, (0200)d, (0777)d.
4. Suppose you have a cheque for RS.10000/-.what is the number system Knowledge
used? Define base system used and what are the weights of the digits 1
1,0,0,0,0 and 0 now?
Apply 4
gates? Apply 5
Y(A,B,C,D)= ∑m(0,1,2,3,4,7,8,9,10,11,12,14)
19 Summarize the rules and limitations of K-map simplification? Understand 5
20 Analyze the steps for simplification of POS expression? Apply 4
Design a combinational logic circuit with 3 input variables that will Understand
5 7
produce logic 1 output when more than one input variables are logic 1?
6 Compose and explain the block diagram of 4-bit parallel adder? Understand 7
10 Compose the circuit for 3 to 8 decoder and explain it with logic gate? Understand 7
11 Construct the logic circuit for full subtractor using decoder? Understand 7
12 Define binary decoder? Explain the working of 2:4 binary decoder? Knowledge 7
16 Design the block diagram of a 4:1 multiplexer using 2:1 multiplexer? Understand 7
4. Design circuit to detect invalid BCD number and implement using Understand
7
NAND gate only?
5. Explain the design procedure for code converter with the help of Understand 7
example?
10. Explain the circuit diagram of full subtractor and full adder? Understand 7
12 Design 2-digit BCD adder with the help of binary adders? Understand 7
15 State the procedure to implement Boolean function using decoder and Knowledge
7
also mention the uses of decoders?
16 Design and implement a full adder circuit using a 3:8 decoder? Understand 7
8. Solve the following Boolean functions using decoder and OR gates: Apply
F1(A,B,C,D)=∑(2,4,7,9) 7
F2(A,B,C,D)=∑(10,13,14,15)
UNIT-IV
SYNCHRONOUS SEQUENTIAL CIRCUITS
1. Explain the design of Sequential circuit with an example. Show the Understand
6
state reduction, state assignment?
2. Write short notes on shift register? Mention its application along with Understand
the Serial Transfer in 4-bit shift Registers? 6
3. Design a 4-bit BCD Ripple Counter by using T-FF? Understand 6
4. Define BCD Down Counter and Draw its State table for BCD Counter? Knowledge 6
6. Design a sequential circuit with two D flip-ops A and B. and one input x. Understand
when x=0,the state of the circuit remains the same. When x=1,the
circuit goes through the state transition from 00 to 11 to 11 to 10 back 6
to 00.and repeats?
8. Explain the Ripple counter design. Also the decade counter design? Understand 10
9. Design a 3 bit ring counter? Discuss how ring counters differ from Understand
6
twisted ring counter?
10 Design a left shift and right shift for the following data 10110101? Understand 6
11 Design Johnson counter and state its advantages and disadvantages? Understand 6
12 Explain with the help of a block diagram, the basic components of a Understand
6
Sequential Circuit?
14 Define T–Flip-flop with the help of a logic diagram and characteristic Knowledge 6
table?
17 List the characteristic Tables and Equations for all Flip-Flops? Knowledge 6
18 Construct the transition table for the following flip-flops i) SR FF ii) Apply 6
D FF
3. Design and implement 4-bit binary counter(using D flip flops) which Understand
6
counts all possible odd numbers only?
5. Understand
State Table 10
Present State Next State Out Put
X=0 X=1 X=0 X=1
a c b 0 1
b d a 0 1
c a d 1 0
d b d 1 0
Reduce state and Flow table by using Implication Table.
6. Design a MOD-5 synchronous counter using flip flops and implement Understand
6
it? Also draw the timing diagram?
7. An Asynchronous Sequential Circuit that has two internal states and one Analyze 7
output. The Excitation and output functions describing the circuits are
Y1= x1x2 + x1y21 + x21y1 Y2 = x2 + x1y11y2 + x11y1 Z = x2 + y1
a) Draw the logic diagram b)Derive the transition table and output map
c) Reduce the state table and Draw reduced State diagram
9. Design a counter with the following repeated binary sequence : 0,1,2,4,6. Use Understand
D-FF 6
UNIT-V
MEMORY
2 Understand 9
Draw the Two-Dimensional Decoding Structure for a 1K Word Memory
Tabulate the truth table for an 8*4 ROM that implements the Boolean functions Analyze 7
A(x,y,z) = Σm(1,2,4) B(x,y,z) = Σm(0,1,6,7) C(x,y,z) = Σm(2,6)
3 D(x,y,z) = Σm(1,2,3,5,7) Considering now the ROM as a memory, Specify the
memory contents at Addresses 1 and 4.
Derive the Programmable Logic Array Programming Table for the Analyze 7
4 combinational circuit that squares a 3-bit number. Minimize the number of
Product Terms.
5 List the differences between Read Only Memories? Understand 9
Tabulate the truth table for an ROM that implements the Boolean functions Analyze 7
6 A(x,y,z) = Σm(1,2,4,7) B(x,y,z) = Σm(0,1,3,5,6) C(x,y,z) =
Σm(0,2,4,5,7) D(x,y,z) = Σm(3,5,6,7)
Design and Implement the following boolean functions using PAL with four Understand 9
inputs and 3-wide AND-OR structure .F1(A,B,C,D)= Σm(2,12,13) ,
7 F2(A,B,C,D)= Σm(7,8,9,10,11,12,13,14,15), F3(A,B,C,D)=
Σm(0,2,3,4,5,6,7,8,10,11,15), F4(A,B,C,D)= Σm(1,2,8,12,13).
8 List How many address bits are needed to operate a 2 K *8 ROM? Knowledge 9
9 Design a BCD to Excess-3 code converter and implement using Suitable PLA? Understand
9
10 Distinguish between SRAM and DRAM and draw static RAM cell? Understand 9
11 Explain the read and write operation a RAM can perform? Understand 9
Sketch the PLA program table for the four Boolean functions Minimize Apply 9
12 the number of product terms? A(x,y,z)=∑(0,1,3,5), B(x,y,z)=∑(2,6),
C(x,y,z)=∑(1,2,3,5,7), D(x,y,z)=∑(0,1,6)
Sketch a PLA circuit to implement the logic functions f1=AIBC+AB IC+ACI Apply
and f2=AI BI CI +BC. 9
13
Solve the following two Boolean functions using a PLA having 3- Apply
1 inputs,4 product terms and 2 outputs? F1(A,B,C)=∑(0,1,2,4),
F2(A,B,C)=∑(0,5,6,7) 9
Solve the following multi boolean function using 3- inputs 4 Product Apply
2 terms 2 outputs PLA PLD? 9
F1(a2, a1, a0)=∑m(0,1,3,5), F2(a2, a1, a0)=∑m(3,5,7)
3 Design and implement 3-bit binary to gray code converter using PLA? Understand 9
Design a combinational circuit using PAL. The circuit accepts 3-bit Understand
4 number and generates an output binary number equal to square of input 9
number?and implement Full Adder using PAL?
Design Understand 9
5
Tabulate the truth table for an 8*4 ROM that implements the Boolean functions Understand 9
A(x,y,z) = Σm(1,2,3,4,5,7) B(x,y,z) = Σm(0,1,4,6,7) C(x,y,z) = Σm(2,6,7)
6 Considering now the ROM as a memory, Specify the memory contents at
Addresses 1 and 4.