‘sng ebelerce SCAN Insertion Lab Manual 1 Labla Learning Objectives In this Lab, you will learn about netlist, libraries, invoking the tool, apply the scan constraints. This Lab is more of command based & executing the command based labs helps for better understanding. At the end of the Lab, you should be able to, ¢ Understand Scan insertion inputs and libraries © Define Clock and reset constraints © Convert normal flop into sean flop © Define Scan constraint and configuration Tasks: Understand the sean flow Create sean_abs directory in your home directory linux > cp ChipEdge Technologies Pvt Ltd‘iting tr ebtlence é a a H 2, Go through the directory structure & files inputs/counter.v Counter RTL code inputs/counter.vs -> Counter Synthesized netlist Seript files > Scripts for executing laboratory tasks reports => Directory to save all reports outputs -> To write out sean inserted netlist and SPF. logs -> Tosavelog files Open the RTL code of counter design and try to understand clocks, reset, inputs, outputs ete n inputs/counte®. ¥ What language is used in coding this design? Is it behavioral / structural éoding? How many clocks are present in the design? List the name of the clocks and mention if it is port level or internally generated clock? ChipEdge Technologies Pot Ltd‘iting tr ebtlence How many resets are present in the design? List the name of the reset signals and mention if it is port level or internally generated? Keep the RTL code open and open the netlist file and try to understand how the RTL code is transformed into netlist, using the synthesis process done already. What language is used in representing this netlist? Is it behavioral / structural coding? List 6 types of cells used in the netlist? What is the name of the cell used for flipflop ? What is the name of the clock pin of the cell used for flipflop ? Number of input ports in the design ? Number of output ports in the design? _ Number of inout ports in the design ? Close both, RTL code and netlist files, Open the Script file counter_scan. tcl, to understand the contents related to different libraries in detail. linux > gvim scripts/counter_scan.tcl List 2 library names used for target library ChipEdge Technologies Pot Ltd“4 “ + ~ ChiplEdgé eae List 2 library names used for link library? Open one of the library file in .lib format and try to understand how data for each gate is modeled. linux > gvim /tools/libraries/28nm/SAED33_EDK/1ib \ /stdcell Ivt/db_nldm/saed32Z1vt_ss0p95v125c. lib Open one of the library file in .db format and try to understand how data for each gate is modeled. linux > gvim /tools/libraries/28nm/SAED33_EDK/1ib\\ /stde! bn saed321vt) s80p95v125c. db Now that you have understood about the netlist, libraries, let's start the tool in the next lab and run the sean flow step by step. seeneeeetanteneeees¢END of labiatt**teeetenennes