EEE 432

Embedded Systems
Memory and Other Embedded System
Components
Lecture 06
1 Types of Memory
 Many types of memory devices are available for use in modern computer systems.
 Memory devices that are commonly found in embedded systems can be classified
into RAM, ROM and hybrid as shown in Figure 1.
 In a RAM device, the data stored at each memory location can be read or written,
as desired.
 In a ROM device, the data stored at each memory location can be read at will, but
never written.
 The hybrid devices offer ROM-like permanence, but under some conditions it is
possible to overwrite their data.

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1 Types of Memory (Cont.)

Figure 1. Common memory types in embedded systems.

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1.1 Random Access Memory
 There are two important memory devices in the random access memory (RAM)
family: static RAM (SRAM) and dynamic RAM (DRAM).
 The main difference between them is the duration of the data stored.
 SRAM retains its contents as long as electrical power is applied to the chip.
However, if the power is turned off or lost temporarily, its contents will be lost
forever.
 DRAM, on the other hand, has an extremely short data lifetime—usually less than
a quarter of a second. This is true even when power is applied continuously. As a
result, DRAM controllers are used to periodically refresh its data. By refreshing
the data several times a second, the DRAM controller keeps the contents of
memory alive for as long as they are needed.
 When deciding which type of RAM to use, a system designer must consider
access time and cost.

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1.1 Random Access Memory (Cont.)
 SRAM devices offer extremely fast access times (approximately four times faster
than DRAM) but are much more expensive to produce.
 Generally, SRAM is used only where access speed is crucial. However, if a
system requires only a small amount of memory, SRAM may make more sense
because you could avoid the cost of a DRAM controller.
 A much lower cost-per-byte makes DRAM attractive whenever large amounts of
RAM are required. DRAM is also available in much larger capacities than
SRAM.
 Many embedded systems include both types: a small block of SRAM (a few
hundred kilobytes) along a critical data path and a much larger block of DRAM
(in the megabytes) for everything else.
 Some small embedded systems get by without any added memory: they use only
the microcontroller’s on-chip memory.

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1.2 Read Only Memory
 Memories in the Read Only Memory (ROM) family are distinguished by the
methods used to write new data to them (usually called programming or burning)
and the number of times they can be rewritten.
 This classification reflects the evolution of ROM devices from hardwired to one-
time programmable to erasable-and-programmable.
 A common feature across all these devices is their ability to retain data and
programs forever, even when power is removed.
 Types of ROM include:
 Masked ROM (MROM)
 Programmable ROM (PROM)
 Erasable-and-programmable ROM (EPROM)

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1.2.1 Masked ROM
 The very first ROMs were hardwired devices that contained a pre-programmed
set of data or instructions.
 The contents of the ROM had to be specified before chip production, so the actual
data could be used to arrange the transistors inside the chip.
 Hardwired memories are still used, though they are now called masked ROMs to
distinguish them from other types of ROM.
 The main advantage of a masked ROM is a low production cost.
 Unfortunately, the cost is low only when hundreds of thousands of copies of the
same ROM are required, and no changes are ever needed.

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1.2.2 Programmable ROM
 Another type of ROM is PROM, which is purchased in an unprogrammed state.
If you were to look at the contents of an unprogrammed PROM, you would see
that all the bits are 1s.
 The process of writing data to the PROM involves a special piece of equipment
called a device programmer, which writes data to the device by applying a
higher-than-normal voltage to special input pins of the chip.
 Once a PROM has been programmed in this way, its contents can never be
changed. If the code or data stored in the PROM must be changed, the chip must
be discarded and replaced with a new one. As a result, PROMs are also known as
one-time programmable (OTP) devices.
 Many small embedded microcontrollers are also considered one-time
programmable, because they contain built-in PROM.

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1.2.3 Erasable-and-programmable ROM
 EPROM is programmed in exactly the same manner as a PROM.
 However, EPROMs can be erased and reprogrammed repeatedly. To erase an
EPROM, simply expose the device to a strong source of ultraviolet light. (There
is a “window” in the top of the device to let the ultraviolet light reach the silicon.
You can buy an EPROM eraser containing this light.) By doing this, you
essentially reset the entire chip to its initial—unprogrammed—state.
 The erasure time of an EPROM can be anything from 10 to 45 minutes, which
can make software debugging a slow process.
 Though more expensive than PROMs, their ability to be reprogrammed made
EPROMs a common feature of the embedded software development and testing
process for many years. It is now relatively rare to see EPROMs used in
embedded systems, as they have been supplanted by newer technologies.

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1.3 Hybrid Memory
 As memory technology has matured in recent years, the line between RAM and
ROM devices has blurred.
 There are now several types of memory that combine the best features of both.
These devices do not belong to either group and can be collectively referred to as
hybrid memory devices.
 Hybrid memories can be read and written as desired, like RAM, but maintain
their contents without electrical power, just like ROM.
 Two of the hybrid devices, electrically-erasable-and-programmable ROM
(EEPROM) and flash, are descendants of ROM devices; the third, non-volatile
RAM (NVRAM), is a modified version of SRAM.

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1.3.1 Electrically-erasable-and-programmable ROM
 EEPROM is internally similar to an EPROM, but with the erase operation
accomplished electrically.
 Additionally, a single byte within an EEPROM can be erased and rewritten. Once
written, the new data will remain in the device forever—or at least until it is
electrically erased.
 One trade-off for this improved functionality is higher cost; another is that
typically EEPROM is good for 10,000 to 100,000 write cycles.
 EEPROMs are available in a standard parallel interface as well as a serial
interface.
 In many designs, the Inter-IC (I2C) or Serial Peripheral Interface (SPI) buses are
used to communicate with serial EEPROM devices.

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1.3.2 Flash Memory
 Flash is the most important recent advancement in memory technology. It
combines all the best features of the memory devices described thus far.
 Flash memory devices are high-density, low-cost, non-volatile, fast (to read, but
not to write), and electrically reprogrammable. These advantages are
overwhelming, and the use of flash memory has increased dramatically in
embedded systems as a direct result.
 Erasing and writing data to a flash memory requires a specific sequence of writes
using certain data values.
 From a software viewpoint, flash and EEPROM technologies are very similar.
The major difference is that flash devices can be erased only one sector at a time,
not byte by byte. Typical sector sizes range from 8 kB to 64 kB.
 Despite this disadvantage, flash is much more popular than EEPROM and is
rapidly displacing many of the ROM devices as well.

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1.3.3 Non-Volatile RAM
 The third member of the hybrid memory class is NVRAM.
 Non-volatility is also a characteristic of the ROM and hybrid memories discussed
earlier. However, an NVRAM is physically very different from those devices.
 An NVRAM is usually just an SRAM with a battery backup. When the power is
on, the NVRAM operates just like any other SRAM. But when the power is off,
the NVRAM draws just enough electrical power from the battery to retain its
current contents.
 NVRAM is sometimes found in embedded systems to store system-critical
information.

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1.4 Summary of Memory Devices
 Table 1 summarises the characteristics of different memory types.
Table 1. Memory device characteristics.

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1.4 Summary of Memory Devices (Cont.)
Table 1 (Cont.)

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2 Direct Memory Access
 Direct memory access (DMA) is a technique for transferring blocks of data
directly between two hardware devices with minimal CPU involvement.
 In the absence of DMA, the processor must read the data from one device and
write it to the other, one byte or word at a time.
 For each byte or word transferred, the processor must fetch and execute a
sequence of instructions. If the amount of data to be transferred is large, or the
frequency of transfers is high, the rest of the software might never get a chance to
run.
 However, if a DMA controller is present, it can perform the entire transfer, with
little assistance from the processor.

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2 Direct Memory Access (Cont.)
 DMA works as follows:
 When a block of data needs to be transferred, the processor provides the
DMA controller with the source and destination addresses and the total
number of bytes.
 The DMA controller then transfers the data from the source to the destination
automatically. When the number of bytes remaining reaches zero, the block
transfer ends.

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3 Device Drivers
 Device drivers are embedded software modules that contain the functionality to
operate the individual hardware devices.
 The reason for the device driver software is to remove the need for the
application to know how to control each piece of hardware.
 Each individual device driver would typically need to know only how to control
its hardware device. For instance, for a microwave oven, separate device drivers
control the keypad, display, temperature probe, and radiation control.
 Most embedded systems have more than one device driver.
 Figure 2 shows how device drivers interact with application software and
hardware.

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3 Device Drivers

Figure 2. Device drivers in embedded systems.

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4 Watchdog Timers
 A watchdog timer is a special hardware fail-safe mechanism that intervenes if the
software stops functioning properly.
 The watchdog timer is periodically reset by software. If the software crashes or
hangs, the watchdog timer soon expires, causing the entire system to be reset
automatically.
 The inclusion and use of a watchdog timer is a common way to deal with
unexpected software hangs or crashes that may occur after the system is
deployed.

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