2022 IEEE 3rd Global Conference for Advancement in Technology (GCAT)

Bangalore, India. Oct 7-9, 2022

Design of 1-7 GHz High Gain Wideband Filter

LNA for Wireless Applications
Rohit Goel Anil Kumar Mahesh Kumar
ECE, ASET ECE, ASET ECE, ASET
Amity University Haryana Amity University Haryana Amity University Haryana
Gurugram, India Gurugram, India Gurugram, India
rohit_160@rediffmail.com akumar2@ggn.amity.edu singhrmkumar@gmail.com

Sandeep Kumar
ECE
CRSSIET
Jhajjar, India
Abstract—The paper proposes a 3-stage wideband LNA
based on 3rd order Chebyshev band pass filter with cascode
MOS configuration and an output matching stage. MOS1
2022 IEEE 3rd Global Conference for Advancement in Technology (GCAT) | 978-1-6654-6855-8/22/$31.00 ©2022 IEEE | DOI: 10.1109/GCAT55367.2022.9971914

along with source degeneration inductor provides narrowband

impedance matching and MOS2 in cascode provides isolation
of gate-to-drain capacitance with the input section in the
feedback path. The input impedance of the cascode amplifier is
incorporated as part of the filter. Band pass filter provides
wide bandwidth operation with flat gain over the frequency of
interest. The proposed LNA circuit is implemented in 90 nm
MOS PTM node. The circuit furnishes a gain of 17.95 dB with
a minimum noise figure of 1.115 dB and a good reverse
isolation of -22.8 dB over a frequency range of 1-7 GHz.

Keywords—Cascode Amplifier, Low Noise Amplifier (LNA),

Noise Figure (NF), Band Pass Filter (BPF).

I. INTRODUCTION
The microwave and Radio Frequency (RF) technology
have a huge effect and is an important striking research area. Fig. 1.Block diagram of basic LNA [14].
Interest in Ultra-Wideband (UWB) (i.e. 3.1-10.6 GHz, which
is divided into 3.1-5 GHz and 6-10.6 GHz) system has LNAs are discussed in literature which resonate at
increased as it is used in imaging systems, wireless personal frequencies by varying the components. But it requires
area networks and ground penetration radars. In reactive components, each resonating at a particular
communication system, at the receiver side, the first stage is frequency. So, instead of using multi-band operation,
Low Noise Amplifier (LNA) and the critical one. LNA wideband LNAs are mainly designed. Various techniques are
amplifies the small signals received from the antenna and is discussed in literature for designing wideband LNAs. These
responsible for good Signal-to-Noise ratio (SNR). Low are [2]: a) Common Source (CS) stage with resistive
Noise Amplifier (LNA) consists of an input matching termination, b) using feedback techniques, c) Common Gate
network, a transistor amplifier (mainly CMOS), an output (CG) stage [13], d) distributed LNA, and e) filter LNA. Due
matching network, and load (as in Fig. 1). For maximum to resistive termination in (a), the design has high NF. Using
transfer of power from the antenna to LNA, the LNA’s input feedback requires several reactive components which leads
impedance should be matched with the resistance of antenna to large chip area. CG LNAs provides wideband matching,
[1]. The main characteristics required from LNA are high but it has low linearity and parasitic components degrade the
power gain, low Noise Figure (NF), good input and output overall performance. Distributed LNA requires more active
impedance matching and low power dissipation over the devices, so, it has high power consumption and occupies
entire range of frequency of interest. CMOS is mainly used large chip area. Moreover, it has low gain and poor NF.
for designing LNA, as CMOS serves the range well due to Filter LNAs seeks the input impedance of the circuit in the
low cost, ease of bulk fabrication, high level of integration reactive network. The band pass filter at the input section,
and low power consumption. resonates over the range of frequencies, providing flat gain
over a large bandwidth. This paper proposes a high gain, low
An LNA can be narrowband or wideband. A narrowband NF wideband filter LNA with an input band pass filter. The
LNA results in high cost, high power consumption, if it is active device (CMOS) is used in CS stage with source
used for each standard separately. So, instead of designing degeneration inductor for providing high gain and an input
narrowband LNAs for individual applications, focus has band pass filter for wideband operation.
shifted from narrowband to wideband. Wideband LNAs uses
less area with low cost for accommodating multi-band The rest of the paper is as follows: Section II shows the
operation. In wideband LNA design, CMOS have parasitic ways of attaining wide bandwidth using filters along with
and at high frequencies capacitive loading of output stage Common Source (CS), Common Gate (CG), or cascode
impacts the overall gain of the system. Multi-band topology by various researchers. Based on literature review,

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Section III elaborates the design factors and provides the dB and input return loss of –17.5 dB is designed. The NF of
specifications targeted for the design. Section IV explains the the designed LNA is 4.56 dB.
proposed filter LNA for wide bandwidth. Section V gives the
simulation results and compares the parameters. Section VI In [7], a CG stage is used for wideband matching with a
concludes the design. cascode stage for providing power gain and a shunt peaking
inductor for high 3-dB cut-off frequency. An active notch
II. LITERATURE REVIEW filter of 3rd order between the cascode is used to remove the
interferers. The maximum power gain is 14.7 dB with a NF
Wideband Low Noise Amplifiers provide a wide of 5.3 dB consuming a power of 16 mW with a TSMC 180
bandwidth with a flat gain over the frequencies of interest. nm PTM node.
There are many ways cited in literature which are used to
provide wideband matching. These include Common gate In [8], a CG, CS single to dual converter wideband LNA
LNA having wide input matching, or Common source LNA is designed. Common gate first stage is used for wide input
with resistive termination or filter LNA consisting of matching and dual converter output is used by 2nd order bi-
Common Source amplifier topology with an input filter quad Butterworth filters followed by mixer stage.
section. Distributed amplifiers are also sometimes used, but Butterworth filter provides maximally flat gain over the
they occupy large chip area and more power dissipation. So, frequency of interest. CS stage gives noise cancellation
they are rarely used in LNA design. This paper focuses on coming from the CG stage. In [9], a two-stage narrowband
filter LNA and thus a detailed review of various techniques LNA in the frequency range of 1.8-2.3 GHz consisting of CS
to achieve wideband matching using such LNA as first stage followed by a buffer stage is designed. By using a
considered by various researchers is evaluated. capacitor in parallel with source degeneration inductor, a
notch filter is formed which helps in reducing the third
In [3], a wideband LNA in 180 nm TSMC CMOS harmonic components. Harmonics are filtered out before
technology is designed using a cascode CMOS amplifier and reaching the mixer and hence strong blockers are
a high pass filter (HPF) at the input section. A T-type high desensitized. Due to the passive nature of the notch filter,
pass filter is designed which uses less inductor and hence current consumption is also not increased. Buffer stage
reduces the chip area. A Chebyshev 3rd section is used for provides the output matching. A NF of 3.1 dB and gain of 11
high attenuation. HPF provides the lower 3-dB cut-off dB is attained by using a PTM node of 40 nm. [10] Designed
frequency while the resonance of RL and CL at drain of a receiver front end at 0.47-0.86 GHz for interoperability
MOSFET M2 gives the high 3-dB cut-off frequency. This in- between TV tuner receiver and GSM. An LNA with notch
turn provides wideband matching. Output impedance filter is designed where parallel resonance is bypassed for
matching is done using a buffer stage. Input return loss is – DVB and series notch is used. For GSM, parallel resonance
27 dB, while NF is 3.3 dB with a maximum power gain of 10 circuit is used. A high gain of 28 dB along with NF of 3 dB
dB and a power consumption of 7 mW from a 2 V supply. is obtained using a PTM node of 130 nm.
In [4], a wideband amplifier in the low frequency range In [11], an inductor-less wideband LNA at 3.1-4.8 GHz
of 3-5 GHz is designed using 180 nm CMOS technology range is proposed which reduces noise and distortions. Three
node. A narrowband cascode amplifier with a feedback notch filters are used at the last stage of LNA in series
resistance Rf is employed from the output of cascode stage to resonance and three sub-bands are associated with each
the input of Common source first stage to obtain a flat gain tunable notch filter to remove out-of-band interferers. A
over the desired bandwidth. The feedback Rf lowers the Q- voltage gain of 13.4-14 dB with a NF of 3.9 dB is achieved.
factor which in turn increases the bandwidth. In this design Due to the addition of additional parasitic capacitances, the
also, input impedance matching is done using LS, to achieve gain of the overall system decreases. In [12], a notch filter is
maximum power gain. The main drawback of this design is employed at the input of a cascode amplifier to work in dual
the use of Rf which is a source of noise and hence NF is band. A mutual induction matching circuit at the output is
increased. The design provides a NF of 2.3 dB, maximum used to reduce NF. Current mirror circuit is used as a biasing
gain of 9.8 dB and input return loss greater than 9 dB. [5] circuit and to reduce power consumption. At the first band of
Describes a 3-8 GHz wideband LNA using a CS Cascode 1.66 GHz, the LNA provides a gain of 12.5 dB and NF 1.91
stage with an input mutually coupled symmetric center tap dB. At the second band (3.26 GHz), gain of 9.02 dB and NF
inductor. The symmetric center tap inductor acts as a 5th of 3.25 dB is attained. 180 nm PTM node is used to design
order band pass filter and is used to remove out of band the concurrent LNA.
interferers. For wideband matching, a feedback resistor is
used which affects the input impedance. Rf diminishes the Q- III. DESIGN FACTORS AND SPECIFICATIONS
factor and hence increases the bandwidth. But at the same
time, it increases the NF. To overcome it, a MOS with high The designing of a wide bandwidth LNA is a complex
unity gain bandwidth can be used. By using triple resonance task. It is very difficult to attain high gain over a wide range
at the load of cascode stage, the high frequency bandwidth is of frequencies. A CG topology with its easy input impedance
increased significantly. matching over a wide range provides moderate gain.
According to maximum power transfer theorem, maximum
In [6], a CS stage followed by a series shunt peaking gain is obtained if input and output section of the LNA is
second MOS stage and a feedback resistor is used to design a matched in impedance. The lower frequency pole is provided
wideband LNA. A source degeneration inductor is used in by input matching circuit and higher frequency pole is
first CS stage for narrowband matching and maximum power provided by output matching circuit. Lumped components
gain followed by increase in bandwidth using series shunt cannot be scaled down to the same extent, as the length of
peaking and Rf. By using 180 nm PTM node, a wideband MOS device decreases. If a lumped component like inductor
3.1-10.6 GHz LNA having maximum power gain of 17.92 or capacitor is also scaled down as per PTM node, the
amount of energy dissipation will be more, and this leads to

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more power dissipation. As the PTM node decreases, the optimum impedance (ܼ௢௣௧ ) and return loss is minimized. The
available voltage level also decreases. The limited speed of topology provides amplifier stability and linearity. The MOS
operation of the MOS device and the resistance of the is configured with PTM node of 90 nm. The cascode stage is
channel considerations also poses challenges while designing used to isolate the gate to drain capacitance of the output
an LNA. with the input section of the amplifier. This improves NF
For hand-held mobile devices or portable gadgets, the performance of the proposed design. For output matching, a
power consumed should be as minimum as possible. MOS combination of inductor (L3) and a capacitance (C3) along
geometry (Width of channel) affects a large number of with the gate to drain capacitance is used to match with the
parameters. The channel resistance of MOS decreases with output termination impedance of 50 Ω.
increase in fingers for the width. It also results in high
capacitance between gate and source which degrades the ͳ
ܸ௜௡ ൌ ‫ܫ‬௜௡ ൅ ሺ‫ܫ‬௜௡ ൅ ݃௠ ܸ௚௦ ሻܵ‫ܮ‬ଶ (1)
input matching of the circuit. MOS is used in LNA which ܵ‫ܥ‬௚௦
acts as a non-linear device, so techniques should be used to
provide a linear output [14]. Stability of the designed LNA is ͳ ‫ܫ‬௜௡
another important design factor. As discussed above, ൌ ‫ܫ‬௜௡ ൅ ቆ‫ܫ‬௜௡ ൅ ݃௠ ቇ ܵ‫ܮ‬ଶ ൌ  ‫ܫ‬௜௡ ܼ௜௡ (2)
ܵ‫ܥ‬௚௦ ܵ‫ܥ‬௚௦
different ways are present for wideband operation such as
feedback, CS, CG or distributed amplifiers. Also, CG
topology LNA provides moderate gain and in applications ͳ ݃௠ ‫ܮ‬ଶ
ܼ௜௡ ൌ ܵሺ‫ܮ‬ଶ ሻ ൅ ൅ (3)
that need high gain CS topology must be used. ܵ‫ܥ‬௚௦ ‫ܥ‬௚௦
Based on the parameters discussed, an LNA is proposed ‫ܼݎ݋ܨ‬௜௡ ൌ ܴ௦ ǡ ‫݃݉ܫ‬ሺܼ௜௡ ሻ ൌ Ͳܴܽ݊݀݁ሺܼ௜௡ ሻ ൌ ܴ௦ (4)
for wide bandwidth having high gain, good reverse isolation,
low NF, low power consumption, and stable design. The
specifications are as in Table I. ͳ ݃௠ ‫ܮ‬ଶ
‫ݓ‬଴ଶ ൌ  ܴܽ݊݀௦ ൌ (5)
TABLE I. SPECIFICATIONS
ሺ‫ܮ‬ଶ ሻ‫ܥ‬௚௦ ‫ܥ‬௚௦
Frequency 1-7 GHz
In the proposed circuit, one CS cascode stage is taken
Gain (S21) > 13 dB
and width of MOSFET2 is changed to obtain high power
NF < 3.5 dB
gain.
Input return loss (S11) < -12 dB
Stability Factor (K) >1

IV. PROPOSED DESIGN

The designed LNA block diagram (Fig. 2) has three
stages. The first stage is a Band Pass Filter (BPF) stage
which is used for wideband operation. A third order
Chebyshev BPF is used to provide flat-flat gain in both the
pass band as well as stop band. It consists of a combination
of one inductor (L4) and three capacitors (C4, C5, C6) (as in
Fig.3). Once narrow bandwidth is obtained using CS stage,
wide bandwidth is obtained by this filter. The second stage is
a Common Source (CS) cascode topology along with source
degeneration inductor.

Fig. 3. Proposed Circuit.

V. SIMULATION RESULTS AND COMPARISON

A. Noise Figure Analysis
Fig. 2. Block diagram of proposed circuit.
The prime sources of noise in an LNA are the MOSFETs
The second stage gives narrowband matching, with input and the resistors used. According to proposed circuit, it
impedance of CS stage matched with antenna (50 Ω) includes the mean square drain noise current due to
resistance. The input stage of CS topology consists of gate to MOSFET1 and MOSFET2, and the mean square noise
source capacitance (Cgs1) and to provide a resistive voltage of the source resistance. Reactive components such
component which should be matched with antenna as capacitor and inductor do not affect noise figure, so for
resistance, a degeneration inductor is used. This inductor noise calculations, they are not considered. Another source
matches with the capacitance and provides a resistive of noise in LNA design is flicker noise. For frequency range
component (50 Ω) (2). At resonance, reactive terms cancel 1-7 GHz, flicker noise can be ignored. Transconductance is
out each other and input impedance (ܼ௜௡ ) is purely resistive varied by tuning the MOS widths of MOSFET1 and
(4). This series resonant circuit provides higher effective MOSFET2, to give low NF and simultaneously seeking high
transconductance and is matched at center frequency. The gain. In proposed design, band pass filter component L4
system has narrow bandwidth and only reactive components mainly improves the NF of LNA. The inductance (L4)
are added. Use of degenerated inductance takes ܼ௜௡ closer to impacts wideband input matching and quality factor and

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hence minimizes the NF. Increasing the supply voltage off between the device capacitances and the bias current,
increases the NF slightly. Increasing the bias voltage which leads to changes in NF and gain. So, instead of
decreases the NF. As shown in Fig. 4, the NF decreases at transconductance, the increased output impedance causes the
low frequencies and minimum NF of 1.115 dB is achieved at overall gain to increase. As shown in Fig. 5, maximum gain
a frequency of 3.3 GHz. This occurs with the degeneration of of 17.951 dB is achieved at 2.7 GHz and a good reverse
noise source of MOSFET2 by the output impedance of isolation of -22.8 dB is achieved 3.1 GHz.
MOSFET1. At higher frequencies, NF degrades due to
parasitic admittance at source (MOSFET2)-drain C. Stability Factor
(MOSFET1) common node. Also, the source degeneration An effective low noise amplifier should have a low
inductor (L2) makes optimum noise and power points closer output reflection coefficient (S22), input reflection coefficient
together. The overall NF in the range of 1.7-6.1 GHz is less (S11), reverse transmission coefficient (S12), and high gain
than 2.2 dB which shows good NF. (S21) [14]. The stability of the proposed circuit is analyzed
using S-parameters. The necessary condition for stability is:
૚ െ ȁࡿ૚૚ ȁ૛ െ ȁࡿ૛૛ ȁ૛ ൅ ȁࢤȁ૛
ࡷ ൌ ൐ͳ (8)
૛ ‫ כ‬ȁࡿ૚૛ ࡿ૛૚ ȁ
߂ ൌ ܵଵଵ ܵଶଶ െ ܵଵଶ ܵଶଵ (9)

Fig. 4.Noise Figure.

Fig. 6. Stability Factor

B. Gain and Reverse Isolation Analysis Stability factor for the proposed circuit is given in Fig. 6
The magnitude of voltage gain (Av) of a cascode LNA and the value is greater than 1 over the complete frequency
neglecting the impact of body bias is given by: range. Hence the circuit is stable.
ȁ‫ܣ‬௩ ȁ ൌ  ݃௠ଵ ‫ݎ כ‬௢ଵ ሺͳ ൅ ݃௠ଶ ‫ݎ כ‬௢ଶሻ (6)
D. Comparison
Here gm1, ro1, gm2, and ro2 gives the transconductance of A comparison of the proposed filter LNA circuit is
MOSFET1, output resistance of channel of MOSFET1, compared with some latest research on filter LNA. The Table
transconductance of MOSFET2 and output resistance of 2 shows that the circuit is providing a comparable gain over
channel of MOSFET2 respectively. The cascode structure the frequency range with very good NF. The reflection
has high output impedance and CS stage as a degeneration coefficient is in accordance with the technical specifications
resistance (ro1) by MOSFET2 of CG stage. Thus, the output mentioned in Table 1 and is also better in comparison to [9],
impedance of cascode stage is given by: [10], and [12]. The power consumption of the proposed
ܴ௢௨௧ ൌ  ‫ݎ‬௢ଶ ൅ ሺͳ ൅  ݃௠ଶ ‫ݎ כ‬௢ଶ ሻ‫ݎ‬௢ଵ (7) circuit is 18 mW with power supply of 0.8 V.

MOSFET2 improves the output impedance of MOSFET1 TABLE II. COMPARISON WITH EXISTING FILTER LNAS
by a factor of gm2 ro2. As the overall gain of the cascode stage
PTM Power
depends on the transconductance and the output resistance of Frequency Gain NF S11
node Consumption
both stages, the increase in output resistance due to cascode (GHz) (dB) (dB) (dB)
(nm) (mW)
CG stage, increases the gain. Transconductance has a trade-
This
1-7 17.9 1.11 -22.8 90 18
work

[8] 0.1-2 19 1.8 ----- 180 16.5

[11] 3.1-4.8 23.2 5.5 -30 65 16.4

< -
[10] 0.47-0.86 28 3 130 14
10
< -
[9] 1.8-2.3 11 3.1 40 19
10
[12] 1.66-3.26 12.5 3.25 -7.11 180 20.5

Fig. 5.Gain (S21) and Reverse Isolation (S11)

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 VI. CONCLUSION Transactions on Microwave Theory and Techniques, vol. 58, no. 2,
pp. 287-296, February 2010.
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gain over wide bandwidth. The proposed circuit with good [8] Baktash Behmanesh, Seyed Mojtaba Atarodi, “Active Eight-Path
Filter and LNA with Wide Channel Bandwidth and Center Frequency
output matching stage provides a gain of 17.95 dB, 1.115 dB Tunability”, IEEE Transactions on Microwave theory and
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of Harmonic Rejection Low Noise Amplifier with an Embedded
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