SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

D Meet or Exceed the Requirements of ANSI SN55188 . . . J OR W PACKAGE

TIA / EIA-232-E and ITU Recommendation SN75188 . . . D, N, OR NS PACKAGE
MC1488 . . . N PACKAGE
V.28 (TOP VIEW)
D Current-Limited Output: 10 mA Typical
D Power-Off Output Impedance: 300 Ω VCC − 1 14 VCC +
Minimum 1A 2 13 4B
D Slew Rate Control by Load Capacitor 1Y 3 12 4A
2A 4 11 4Y
D Flexible Supply-Voltage Range
2B 5 10 3B
D Input Compatible With Most TTL Circuits 2Y 6 9 3A
GND 7 8 3Y
description/ordering information
The MC1488, SN55188, and SN75188 are
SN55188 . . . FK PACKAGE
monolithic quadruple line drivers designed to (TOP VIEW)
interface data terminal equipment with data

VCC −

V CC+
communications equipment in conformance with

NC
1A

4B
ANSI TIA/EIA-232-E, using a diode in series with
each supply-voltage terminal as shown under
3 2 1 20 19
typical applications. 1Y 4 18 4A
The SN55188 is characterized for operation over NC 5 17 NC
the full military temperature range of − 55°C to 2A 6 16 4Y
125°C. The MC1488 and SN75188 are NC 7 15 NC
characterized for operation from 0°C to 70°C. 2B 8 14 3B
9 10 11 12 13

2Y

3Y
3A
GND
NC
NC − No internal connection

ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
Tube of 25 MC1488N MC1488N
PDIP (N)
Tube of 25 SN75188N SN75188N
0°C
0 C to 70
70°C
C Tube of 50 SN75188D
SOIC (D) SN75188
Reel of 2500 SN75188DR
SOP (NS) Reel of 2000 SN75188NSR SN75188
SN55188J SN55188J
CDIP (J) Tube of 25
SNJ55188J SNJ55188J
−55°C to 125°C
CFP (W) Tube of 150 SNJ55188W SNJ55188W
LCCC (FK) Tube of 55 SNJ55188FK SNJ55188FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

      !"#   $"%&! '#( Copyright  2004, Texas Instruments Incorporated
'"! !  $#!! $# )# #  #* "#  $'"! !$& 
./.0 0  && $## # ##'
'' +,( '"! $!#- '#  #!#&, !&"'# "&# )#+# #'(  && )# $'"! $'"!
#-  && $##( $!#- '#  #!#&, !&"'# #-  && $##(

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


    
   
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

FUNCTION TABLE
(drivers 2−4)
A B Y
H H L
L X H
X L H
H = high level, L = low level,
X = irrelevant

logic diagram (positive logic)

2 3
1A 1Y

4
2A 6
5 2Y
2B

9
3A 8
10 3Y
3B

12
4A 11
13 4Y
4B

Positive logic
Y = A (driver 1)
Y = AB or A + B (drivers 2 thru 4)

schematic (each driver)

To Other
Drivers
VCC +

8.2 kΩ 6.2 kΩ
A
Input(s)
B

70 Ω
300 Ω
Output
3.6 kΩ

GND

To
Other
Drivers
10 kΩ
3.7 kΩ 70 Ω
VCC −

To Other Drivers

Resistor values shown are nominal.

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


    
   
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VCC + at (or below) 25°C free-air temperature (see Notes 1 and 2) . . . . . . . . . . . . . . . . . 15 V
Supply voltage, VCC − at (or below) 25°C free-air temperature (see Notes 1 and 2) . . . . . . . . . . . . . . . . −15 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 7 V
Output voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 15 V
Continuous total power dissipation (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Package thermal impedance, θJA (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Case temperature for 60 seconds, FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package . . . . . . . . . . . . . . . . 300°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. For operation above 25°C free-air temperature, refer to the maximum supply voltage curve, Figure 6. In the J package, SN55188
chips are alloy mounted.
3. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Selecting the maximum of 150°C can affect reliability.
4. The package thermal impedance is calculated in accordance with JESD 51-7.

DISSIPATION RATING TABLE

TA ≤ 25
25°C
C DERATING FACTOR TA = 70
70°C
C TA = 125
125°C
C
PACKAGE POWER RATING ABOVE TA = 25
25°C
C POWER RATING POWER RATING
FK 1375 mW 11.0 mW/°C 880 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 275 mW
W 1000 mW 8.0 mW/°C 640 mW 200 mW

recommended operating conditions

SN55188 MC1488, SN75188
UNIT
MIN NOM MAX MIN NOM MAX
VCC + Supply voltage 7.5 9 15 7.5 9 15 V
VCC − Supply voltage −7.5 −9 −15 −7.5 −9 −15 V
VIH High-level input voltage 1.9 1.9 V
VIL Low-level input voltage 0.8 0.8 V
TA Operating free-air temperature −55 125 0 70 °C

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3


    
   
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

electrical characteristics over operating free-air temperature range, VCC ± = ±9 V (unless otherwise
noted)
SN55188 MC1488, SN75188
PARAMETER TEST CONDITIONS UNIT
MIN TYP† MAX MIN TYP† MAX
VCC + = 9 V,
6 7 6 7
VIL = 0.8 V, VCC − = − 9 V
VOH High-level output voltage V
RL = 3 kΩ VCC + = 13.2 V,
9 10.5 9 10.5
VCC − = − 13.2 V
VCC + = 9 V,
−7‡ −6 −7 −6
VIH = 1.9 V, VCC − = − 9 V
VOL Low-level output voltage V
RL = 3 kΩ VCC + = 13.2 V,
−10.5‡ −9 −10.5 −9
VCC − = − 13.2 V
IIH High-level input current VI = 5 V 10 10 µA
IIL Low-level input current VI = 0 −1 −1.6 −1 −1.6 mA
Short-circuit output
IOS(H) VI = 0.8 V, VO = 0 −4.6 −9 −13.5 −6 −9 −12 mA
current at high level§
Short-circuit output
IOS(L) VI = 1.9 V, VO = 0 4.6 9 13.5 6 9 12 mA
current at low level§
Output resistance, VCC + = 0, VCC − = 0,
ro 300 300 Ω
power off VO = − 2 V to 2 V
VCC + = 9 V, All inputs at 1.9 V 15 20 15 20
No load All inputs at 0.8 V 4.5 6 4.5 6
Supply current from VCC + = 12 V, All inputs at 1.9 V 19 25 19 25
ICC + mA
VCC + No load All inputs at 0.8 V 5.5 7 5.5 7
VCC + = 15 V, All inputs at 1.9 V 34 34
No load, TA = 25°C All inputs at 0.8 V 12 12
VCC − = − 9 V, All inputs at 1.9 V −13 −17 −13 −17
No load All inputs at 0.8 V −0.5 −0.015
VCC − = − 12 V, All inputs at 1.9 V −18 −23 −18 −23
ICC − Supply current from ICC − mA
No load All inputs at 0.8 V −0.5 −0.015
VCC − = − 15 V, All inputs at 1.9 V −34 −34
No load, TA = 25°C All inputs at 0.8 V −2.5 −2.5
VCC + = 9 V, VCC − = − 9 V,
333 333
No load
PD Total power dissipation mW
VCC + = 12 V, VCC − = − 12 V,
576 576
No load
† All typical values are at TA = 25°C.
‡ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for logic voltage
levels only, e.g., if − 6 V is a maximum, the typical value is a more negative voltage.
§ Not more than one output should be shorted at a time.

4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


    
   
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

switching characteristics, VCC± = ±9 V, TA = 25°C

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output 220 350 ns
tPHL Propagation delay time, high- to low-level output RL = 3 kΩ, CL = 15 pF, 100 175 ns
tTLH Transition time, low- to high-level output† See Figure 1 55 100 ns
tTHL Transition time, high- to low-level output† 45 75 ns
tTLH Transition time, low- to high-level output‡ RL = 3 kΩ to 7 kΩ, CL = 2500 pF, 2.5 µs
tTHL Transition time, high- to low-level output‡ See Figure 1 3.0 µs
† Measured between 10% and 90% points of output waveform
‡ Measured between 3 V and − 3 V points on the output waveform (TIA / EIA-232-E conditions)

PARAMETER MEASUREMENT INFORMATION

Input 3V
Input 1.5 V 1.5 V
0V
Pulse tPHL tPLH
Generator Output VOH
(see Note A) 90% 90%
50% 50%
Output
RL CL 10% 10%
(see Note B) VOL

tTHL tTLH
TEST CIRCUIT VOLTAGE WAVEFORMS

NOTES: A. The pulse generator has the following characteristics: tw = 0.5 µs, PRR ≤ 1 MHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.

Figure 1. Test Circuit and Voltage Waveforms

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SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

TYPICAL CHARACTERISTICS†

OUPUT CURRENT
vs

ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ
VOLTAGE TRANSFER CHARACTERISTICS OUTPUT VOLTAGE
12 20

ÎÎÎÎÎÎÎÎ ÎÎÎÎÎ
ÎÎÎÎ
VCC + = 12 V, VCC − = − 12 V VCC + = 9 V

ÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ

16 VCC − = − 9 V
9 VCC + = 9 V, VCC − = − 9 V TA = 25°C
VOL(VI = 1.9 V)
12

ÎÎÎÎÎÎÎÎ
6

O Output Current − mA
VO − Output Voltage − V

ÎÎÎÎÎÎÎÎ
VCC + = 6 V, VCC − = − 6 V
3
4

0 0

ÎÎÎÎ
−3 −4

ÎÎÎÎ
VO

IOI −
−8 3-kΩ

ÎÎÎ
−6 Load Line
−12
−9

−12
ÎÎÎ
RL = 3 kΩ
TA = 25°C −16

−20
VOH(VI = 0.8 V)

0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 −16 −12 −8 −4 0 4 8 12 16
VI − Input Voltage − V VO − Output Voltage − V

Figure 2 Figure 3

SHORT-CIRCUT OUTPUT CURRENT SLEW RATE

vs vs

ÁÁÁÁ
FREE-AIR TEMPERATURE LOAD CAPACITANCE
12 1000

ÁÁÁÁ
VCC + = 9 V

ÁÁÁÁ
ÎÎÎÎÎ
VCC − = − 9 V
OS − Short-Circuit Output Current − mA

9
IOS(L) (VI = 1.9 V) RL = ∞

6
ÁÁÁÁ
ÎÎÎÎÎTA = 25°C
SR − Slew Rate − V/ µs

100
3

ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎ
0
VCC + = 9 V

ÎÎÎÎ
ÎÎÎÎÎ −3 VCC − = − 9 V

ÎÎÎÎÎÎ
VO = 0 10

ÁÁ ÎÎÎÎÎÎ
−6
IOS(H) (VI = 0.8 V)

ÁÁ
IIOS

−9

−12 1
−100 −75 −50 −25 0 25 50 75 100 125 150 10 100 1000 10000
TA − Free-Air Temperature − °C CL − Load Capacitance − pF

Figure 4 Figure 5
† Data for temperatures below 0°C and above 70°C are applicable to SN55188 circuit only.

6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


    
   
SLLS094C − SEPTEMBER 1983 − REVISED MAY 2004

THERMAL INFORMATION†
MAXIMUM SUPPLY VOLTAGE
vs
FREE-AIR TEMPERATURE
16

14

VCC − Maximum Supply Voltage − V 12

10

2
RL ≥ 3 kΩ (from each output to GND)
0
−75 −50 −25 0 25 50 75 100 125
TA − Free-Air Temperature − °C

Figure 6
† Data for temperatures below 0°C and above 70°C are applicable to the SN55188 circuit only.

APPLICATION INFORMATION
VCC + = 12 V
VCC − = − 12 V

Output to RTL VCC +

−0.7 V to 3.7 V
1/4 SN55188
or SN75188 VCC +
3V Output
Output to DTL ’188 ’188
−0.7 V to 5.7 V
± 15 V
1/4 SN55188
Input From
TTL or DTL

VCC −
or SN75188
5V
Output to HNIL VCC −
−0.7 V to 10 V
1/4 SN55188
or SN75188
Diodes placed in series with the VCC+ and VCC − leads protect
Output to MOS the SN55188/SN75188 in the fault condition in which the device
1 kΩ −10 V to 0 V outputs are shorted to ± 15 V, and the power supplies are at low
1/4 SN55188 10 kΩ voltage and provide low-impedance paths to ground.
or SN75188
−12 V
Figure 8. Power-Supply Protection to Meet
Power-Off Fault Conditions of
Figure 7. Logic Translator Applications ANSI TIA / EIA-232-E

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7

 PACKAGE OPTION ADDENDUM
www.ti.com 4-Mar-2005

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Type Drawing Qty
5962-86889012A ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
5962-8688901CA ACTIVE CDIP J 14 1 None A42 SNPB Level-NC-NC-NC
5962-8688901DA ACTIVE CFP W 14 1 None A42 SNPB Level-NC-NC-NC
MC1488N ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
SN55188J ACTIVE CDIP J 14 1 None A42 SNPB Level-NC-NC-NC
SN75188D ACTIVE SOIC D 14 50 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
SN75188DR ACTIVE SOIC D 14 2500 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
SN75188N ACTIVE PDIP N 14 25 Pb-Free CU NIPDAU Level-NC-NC-NC
(RoHS)
SN75188NSR ACTIVE SO NS 14 2000 Pb-Free CU NIPDAU Level-2-260C-1 YEAR/
(RoHS) Level-1-235C-UNLIM
SNJ55188FK ACTIVE LCCC FK 20 1 None POST-PLATE Level-NC-NC-NC
SNJ55188J ACTIVE CDIP J 14 1 None A42 SNPB Level-NC-NC-NC
SNJ55188W ACTIVE CFP W 14 1 None A42 SNPB Level-NC-NC-NC
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.

(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.

Addendum-Page 1
 MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

NO. OF A B
18 17 16 15 14 13 12
TERMINALS
** MIN MAX MIN MAX

0.342 0.358 0.307 0.358

19 11 20
(8,69) (9,09) (7,80) (9,09)
20 10 0.442 0.458 0.406 0.458
28
(11,23) (11,63) (10,31) (11,63)
21 9
B SQ 0.640 0.660 0.495 0.560
22 8 44
(16,26) (16,76) (12,58) (14,22)
A SQ
23 7 0.739 0.761 0.495 0.560
52
(18,78) (19,32) (12,58) (14,22)
24 6
0.938 0.962 0.850 0.858
68
(23,83) (24,43) (21,6) (21,8)
25 5
1.141 1.165 1.047 1.063
84
(28,99) (29,59) (26,6) (27,0)
26 27 28 1 2 3 4

0.020 (0,51) 0.080 (2,03)

0.010 (0,25) 0.064 (1,63)

0.020 (0,51)
0.010 (0,25)

0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)

0.028 (0,71) 0.045 (1,14)

0.022 (0,54) 0.035 (0,89)
0.050 (1,27)

4040140 / D 10/96

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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