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Uc1637 SP

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0% found this document useful (0 votes)
16 views13 pages

Uc1637 SP

Uploaded by

Murad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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UC1637-SP

www.ti.com SLUS950 – FEBRUARY 2010

RAD-TOLERANT CLASS-V, SWITCHED MODE CONTROLLER


FOR DC MOTOR DRIVE
Check for Samples: UC1637-SP

1FEATURES Flexibility
• QML-V Qualified, SMD 5962-89957 • Dual 100-mA Source/Sink Output Drivers
• Rad Tolerant: 30 kRad(Si) TID (1)
W PACKAGE
– TID Dose Rate = 10 mRad/sec (TOP VIEW)
• Single or Dual Supply Operation
• ±2.5-V to ±20-V Input Supply Range
• ±5% Initial Oscillator Accuracy; ±10% Over
Temperature
• Pulse-by-Pulse Current Limiting
• Under-Voltage Lockout
• Shutdown Input with Temperature
Compensated 2.5-V Threshold
• Uncommitted PWM Comparators for Design
(1) Radiation tolerance is a typical value based upon initial device
qualification. Radiation Lot Acceptance Testing is available -
contact factory for details.

DESCRIPTION
The UC1637 is a pulse width modulator circuit intended to be used for a variety of PWM motor drive and
amplifier applications requiring either uni-directional or bi-directional drive circuits. When used to replace
conventional drivers, this circuit can increase efficiency and reduce component costs for many applications. All
necessary circuitry is included to generate an analog error signal and modulate two bi-directional pulse train
outputs in proportion to the error signal magnitude and polarity.
This monolithic device contains a sawtooth oscillator, error amplifier, and two PWM comparators with ±100-mA
output stages as standard features. Protection circuitry includes under-voltage lockout, pulse-by-pulse current
limiting, and a shutdown port with a 2.5-V temperature compensated threshold.
The UC1637 is characterized for operation over the full space temperature range of –55°C to 125°C.

ORDERING INFORMATION
TA PACKAGE ORDERABLE PART NUMBER TOP-SIDE MARKING
–55°C to 125°C CFP-20 5962-8995701VSA UC1637W-SP

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Copyright © 2010, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
UC1637-SP
SLUS950 – FEBRUARY 2010 www.ti.com

FUNCTIONAL BLOCK DIAGRAM


-AIN
13 12

20

16

18
15
17
14

19

ABSOLUTE MAXIMUM RATINGS (1) (2)

over operating free-air temperature range (unless otherwise noted)


VALUE UNIT
VS Supply voltage ±20 V
Peak 500
IO Output current, source/sink (AOUT, BOUT) mA
Steady-state 100
Analog inputs
±VS V
(+VTH, CT, -VTH, +BIN, -BIN, -AIN, +AIN, +C/L, -C/L, SHUTDOWN, +E/A, -E/A )
Error amplifier output current (E/AOUTPUT) ±20 mA
Oscillator charging current (ISET) –2 mA
TJ Junction temperature 150 °C
Tstg Storage temperature range –65 to 150 °C
Lead temperature (soldering, 10 seconds) 300 °C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Currents are positive into, negative out of the specified terminal.

2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated

Product Folder Link(s): UC1637-SP


UC1637-SP
www.ti.com SLUS950 – FEBRUARY 2010

ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, VS = 15 V, –VS = –15 V, +VTH = 5 V, –VTH = –5 V, RT = 16.7 kΩ, CT = 1500 pF,
TA = –55°C to 125°C = TJ (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OSCILLATOR
TJ = 25°C 9.4 10 10.6
Initial accuracy (1) kHz
TJ = –55°C to 125°C 9.2 10.8
VS = ±5 V to ±20 V, +VTH = 3 V,
Voltage stability 5 7 %
-VTH = –3 V
Temperature stability Over operating range 0.5 %
+VTH CT = 6 V –10 0.1 10
Input bias current mA
–VTH CT = 0 V –10 –0.5
Input range (+VTH, –VTH) –VS+2 +VS-2 V
ERROR AMPLIFIER
Input offset voltage VCM = 0 V 1.5 ±5 mV
Input bias current VCM = 0 V 0.5 5 mA
Input offset current VCM = 0 V 0.1 ±1 mA
Common mode range VS = ±2.5 V to ±20 V –VS+2 +VS V
Open loop volage gain RL = 10k 75 100 dB
Slew rate 15 V/ms
Unity gain bandwidth 1 MHz
CMRR Over common mode range 75 100 dB
PSRR VS = ±2.5 V to ±20 V 75 110 dB
Output sink current E/AOUTPUT = 0 V 20 50 mA
Output source current E/AOUTPUT = 0 V –11 –5 mA
High level output voltage 13 13.6 V
Low level output voltage –14.8 –13 V
PWM COMPARATORS
Input offset voltage VCM = 0 V –10 20 50 mV
Input bias current VCM = 0 V 2 10 mA
Input Hysteresis VCM = 0 V 10 30 mV
Common mode range VS = ±5 V to ±20 V –VS+1 +VS-2 V
CURRENT LIMIT
VCM = 0 V, TJ = 25°C 190 200 210
Input offset voltage mV
VCM = 0 V, TJ = –55°C to 125°C 160 370
Input offset voltage T.C. –0.2 mV/°C
Input bias current –10 –1.5 mA
Common mode range VS = ±2.5 V to ±20 V –VS +VS-3 V
SHUTDOWN
Shutdown threshold (2) –2.7 –2.5 –2.3 V
Hysteresis 40 mV
Input bias current SHUTDOWN = +VS to –VS –10 –0.5 mA
UNDER-VOLTAGE LOCKOUT
Start threshold (3) 4.15 5 V
Hysteresis 75 250 500 mV
TOTAL STANDBY CURRENT
Supply current 8.5 15 mA

(1) RT and CT referenced to ground.


(2) Parameter measured with respect to +VS (Pin 6).
(3) Parameter measured at +VS (Pin 6) with respect to -VS (Pin 5).

Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 3


Product Folder Link(s): UC1637-SP
UC1637-SP
SLUS950 – FEBRUARY 2010 www.ti.com

ELECTRICAL CHARACTERISTICS (continued)


over operating free-air temperature range, VS = 15 V, –VS = –15 V, +VTH = 5 V, –VTH = –5 V, RT = 16.7 kΩ, CT = 1500 pF,
TA = –55°C to 125°C = TJ (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OUTPUT SECTION
ISINK = 20 mA –14.9 –13
Output low level V
ISINK = 100 mA –14.5 –13
ISOURCE = 20 mA 13 13.5
Output high level V
ISOURCE = 100 mA 12 13.5
Rise time CL = 1 nF, TJ = 25°C (4) 100 600 ns
Fall time CL = 1 nF, TJ = 25°C (4) 100 300 ns

(4) Parameters ensured by design and/or characterization, if not production tested.

FUNCTIONAL DESCRIPTION
The following is a description of each of the functional blocks shown in the Functional Block Diagram.

Oscillator
The oscillator consists of two comparators, a charging and discharging current source, a current source set
terminal, ISET, and a flip-flop. The upper and lower threshold of the oscillator waveform is set externally by
applying a voltage at pins +VTH and -VTH respectively. The +VTH terminal voltage is buffered internally and also
applied to the ISET terminal to develop the capacitor charging current through RT. If RT is referenced to -VS as
shown in Figure 1, both the threshold voltage and charging current will vary proportionally to the supply
differential, and the oscillator frequency will remain constant. The triangle waveform oscillator's frequency and
voltage amplitude are determined by the exernal components using the formulas given in Figure 1.

20

Figure 1. Oscillator Setup

4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated

Product Folder Link(s): UC1637-SP


UC1637-SP
www.ti.com SLUS950 – FEBRUARY 2010

PWM Comparators
Two comparators are provided to perform pulse width modulation for each of the output drivers. Inputs are
uncommitted to allow maximum flexibility. The pulse width of the outputs A and B is a function of the sign and
amplitude of the error signal. A negative signal at -AIN and +BIN will lengthen the high state of output A and
shorten the high state of output B. Likewise, a positive error signal reverses the procedure. Typically, the
oscillator waveform is compared against the summation of the error signal and the level set on -BIN and +AIN.

9 13

12

Figure 2. Comparator Biasing

MODULATION SCHEMES

Case A Zero Deadtime (Equal voltage on -BIN and +AIN)


In this configuration, maximum holding torque or stiffness and position accuracy is achieved. However, the power
input into the motor is increased. Figure 3 (A) shows this configuration.

Case B Small Deadtime (Voltage on -BIN > +AIN)


A small differential voltage between -BIN and +AIN provides the necessary time delay to reduce the chances of
momentary short circuit in the output stage during transitions, especially where power-amplifiers are used. Refer
to Figure 3 (B).

Case C Increased Deadtime and Deadband Mode (Voltage on -BIN > +AIN)
With the reduction of stiffness and position accuracy, the power input into the motor around the null point of the
servo loop can be reduced or eliminated by widening the window of the comparator circuit to a degree of
acceptance. Where position accuracy and mechanical siffness is unimportant, deadband operation can be used.
This is shown in Figure 3 (C).

Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 5


Product Folder Link(s): UC1637-SP
UC1637-SP
SLUS950 – FEBRUARY 2010 www.ti.com

(+BIN, -AIN)
(-BIN, +AIN) (-BIN)

(+AIN)

(-BIN)
(-BIN) (-BIN)
(+AIN)
(+AIN) (+AIN)

Figure 3. Modulation Schemes Showing (A) Zero Deadtime, (B) Deadtime and
(C) Deadband Configurations

Ouput Drivers
Each output driver is capable of both sourcing and sinking 100 mA steady state and up to 500 mA on a pulsed
basis for rapid switching of either POWERFET or bipolar transistors. Output levels are typically -VS+0.2 V at 50
mA low level and +VS-2 V at 50 mA high level.

Error Amplifier
The error amplifier consists of a high slew rate (15 V/ms) op-amp with a typical 1-MHz bandwidth and low output
impedance. Depending on the ±VS supply voltage, the common mode range and the voltage output swing is
within 2 V of the VS supply.

Under-Voltage Lockout
An under-voltage lockout circuit holds the outputs in the low state until a minimum of 4 V is reached. At this point,
all internal circuitry is functional and the output drivers are enabled. If external circuitry requires a higher starting
voltage, an over-riding voltage can be programmed through the shutdown terminal as shown in Figure 4.

Shutdown Comparator
The shutdown terminal may be used for implementing various shutdown and protection schemes. By pulling the
terminal more than 2.5 V below VIN, the output drivers will be enabled. This can be realized using an open
collector gate or NPN transistor biased to either ground or the negative supply. Since the threshold is
temperature stabilized, the comparator can be used as an accurate low voltage lockout (Figure 4) and/or delayed
start as in Figure 5. In the shutdown mode the outputs are held in the low state.

6 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated

Product Folder Link(s): UC1637-SP


UC1637-SP
www.ti.com SLUS950 – FEBRUARY 2010

16

Figure 4. External Under-Voltage Lockout

16

Figure 5. Delayed Start-up

Current Limit
A latched current limit amplifier with an internal 200-mV offset is provided to allow pulse-by-pulse current limiting.
Differential inputs will accept common mode signals from -VS to within 3 V of the +VS supply while providing
excelent noise rejection. Figure 6 shows a typical current sense circuit.

14

15

Figure 6. Current Limit Sensing

Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 7


Product Folder Link(s): UC1637-SP
UC1637-SP
SLUS950 – FEBRUARY 2010 www.ti.com

16
20 ISET

18 15
17 14

19 12 13

Figure 7. Bi-Directional Motor Drive With Speed Control Power-Amplifier

16
20 ISET

18 15
17 14

19 12 13

Figure 8. Single Supply Position Servo Motor Drive

8 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated

Product Folder Link(s): UC1637-SP


PACKAGE OPTION ADDENDUM

www.ti.com 2-Dec-2023

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

5962-8995701VSA ACTIVE CFP W 20 25 Non-RoHS SNPB N / A for Pkg Type -55 to 125 5962-8995701VS Samples
& Green A
UC1637W-SP

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 2-Dec-2023

OTHER QUALIFIED VERSIONS OF UC1637-SP :

• Catalog : UC1637

NOTE: Qualified Version Definitions:

• Catalog - TI's standard catalog product

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 5-Dec-2023

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal


Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
5962-8995701VSA W CFP 20 25 506.98 26.16 6220 NA

Pack Materials-Page 1
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