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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TPEL.2017.2698002, IEEE
Transactions on Power Electronics

An LC/S Compensation Topology and

Coil Design Technique for Wireless Power
Transfer
Abstract—Wireless power transfer (WPT) has attracted a lot of attention these years due to its
convenience, safety, reliability and weather proof features. First and foremost, the consistency of mutual
model and T model of Loosely Coupled Transformer (LCT) was deduced. The application scenarios of these
two models were then concluded so as to choose suitable model in circuit analysis. Then a new WPT
compensation topology, which is referred to as LC/S compensation topology and consists of one inductor and
two capacitors, is proposed. The constant-current-output (CCOut) characteristic of the newly proposed
topology is analyzed in detail on the basis of the discussion about LC and CL resonant tank. The equivalent
resistance of the rectifier, filter and resistor circuit are also analyzed to simplify circuit analysis. Then the
current and voltage stress on each component and the system performance under imperfect resonant
condition are studied with the help of MATLAB. The LCT is deliberately designed by the finite element
analysis software ANSYS Maxwell as well because the coupling coefficient, primary and secondary self-
inductance have a significant impact on system efficiency, power level and density. The LCT design approach
employed in this paper can be extended to magnetic design of almost all WPT systems. Theoretical analyses
are verified by both Pspice simulation and practical experiments. Practical output currents with an transient
loads show an excellent CCOut characteristic of LC/S compensation topology.

Index Terms—WPT, constant-current-output, LC/CL resonant tank, loosely coupled transformer,

magnetic design

I INTRODUCTION

Compared to conventional plug-in or brush and bar contact based power transfer method, wireless
power transfer (WPT) has some inherent advantages, such as convenience, safety, reliability and weather
proof [1]. All these abovementioned advantages make various applications of WPT, including contactless
power supplies for professional tools, contactless battery charging across large airgaps for electric
vehicles, compact electronic devices, mobile phones and medical implants [2].
WPT has been widely studied in recent 30 years. There are many research fields in WPT, such as
compensation topology and circuit analyses, coil design techniques for large gap and misalignment
tolerance, optimization for high efficiency, control methods, foreign object detection and safety issues.
Among these fields, compensation network and circuit analyses are of fundamental role since its
determination of resonant frequency, power factor, output characteristics. According to the literature
published, four basic compensation topologies, SS, SP, PS and PP, where the first S or P stands for series
or parallel compensation of the primary coil and the second S or P stands for series or parallel
compensation of the secondary coil, are mostly researched for various applications [3]-[10]. Taking SS
compensation topology as an example, there are two ways to design the resonant capacitor. The first way
is design the capacitor to resonant with the leakage inductance [3], [6], [7], which could achieve a higher
ratio between the active power and reactive power. The specific define of the ratio can refer to [11]. The
other way is to resonate with the coil self-inductance [8]-[10], which could maximum the transferred

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power at a certain coil current. Generally, the original input of the WPT system is a DC voltage source.
If the operation frequency is required to be some specific value, and the Loosely Coupled Transformer
(LCT) has been manufactured, which means the LCT parameters can’t be changed, the maximum output
power is determined, no matter which one of the four basic compensation topologies is chosen and no
matter which way to design the resonant capacitor is adopted. That’s to say, the maximum output power
can’t be altered unless another LCT with different parameters is employed once the original input voltage
and operation frequency of the system are determined. However, it’s quite difficult to manufacture an
LCT, which highly satisfy our requirements, making the system design hard.
Besides these basic compensation topologies, several novel compensation topologies with some quite
good characteristics are proposed, such as SP/S [12], S/SP [13]-[16], LCL [2], [17]-[21] and LCC [1],
[11], [22]-[26]. Reference [12] proposes a new compensation topology called SP/S, which can transfer
rated power even with high misalignment (up to 25% of the secondary coil width). This paper focuses
on misalignment tolerance because the application scenario is dynamic electric vehicle charge, where
high misalignment is inevitable. Reference [13] presents another novel compensation topology called
S/PS, which overcomes some drawbacks of SS and SP. The experiment results have validated its
advantage of zero phase angle (ZPA) and insensitivity. However, similar to four basic compensation
topologies, the maximum output power of S/SP compensation topology can’t be changed unless another
LCT with different parameters is taken.
Reference [17] described the design of a new unity-power-factor inductive-power-transfer pickup
using an LCL tuned network for application in high-power system. Reference [18] proposed an improved
LCL compensation topology utilizing a coupling structure between the resonant inductors in the T-type
network to mitigate the problems of LCL compensation topology. In fact, the LCL compensation is an
ideal symmetrical T-type compensation network which has been analyzed in detail in reference [25]. It’s
the essence of LCL compensation network. Both the double-sided LCL compensation network employed
in reference [19] and the secondary LCL inductively coupled power transfer pickup adopted in reference
[20] are compliant with the essence. The LCL network discussed in reference [2] and [21] is totally
different from that in reference [17]-[20]. In reference [2] and [21], the LCL/P (primary LCL and
secondary parallel) compensation topology can be divided into a primary series inductance, which is
going to be optimized, and a PP compensation topology. The key point of these two literatures is the
optimization of the primary series inductance under the premise of determined PP compensation
parameters. They are not typical LCL compensation topologies.
The LCC compensation topology is widely researched and applied in last several years because it can
easily achieve ZPA and ZVS, which means low VA rating and high system efficiency. Besides, with the
tuning method presented in [22], the resonant frequency is irrelevant with the coupling coefficient
between the primary and secondary coils and is also independent of the load condition, indicating the
system can work at a constant switching frequency. Moreover, the system is of the characteristic of load-
independent output current, which will simplify control circuit design. To reduce system size and
improve its power density, reference [23] integrates the additional inductors with the main coils.
Reference [24] elaborates a new compensation circuit design procedure with the consideration of high-
order current harmonics. The inverter zero-current switching is achieved. Reference [25] analyzes LCC
compensation topology from the perspective of ideal symmetrical T-type compensation network. It’s
very helpful to understand the essence of LCC compensation topology. All in all, LCC compensation

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topology is of a lot of desirable characteristics. The only drawback is that it needs six compensation
elements, which will increase the system size, cost and power loss.
Except compensation network and circuit analyses, coil design is also very important because it’s
directly related to the coupling coefficient which has a great impact on the power transferred by the WPT
systems. In [27], the design and optimization methodology of a circular magnetic core is presented. In
[28], two kinds of coil which are called unipolar coil and DD coil respectively are designed, optimized
and compared. However, it’s still hard to design a DD-type LCT under specified size constraint since
several coupling-related variables are still not discussed.
This paper proposes a new compensation topology, the diagram of which is shown in Fig. 1. The
primary part of the compensation topology is a series inductor L1 and a parallel capacitor C1 while the
secondary part is just a series capacitor C2. We named the newly proposed compensation topology LC/S
in terms of the nomenclature of LCC and SS compensation topology. LC/S compensation topology can
easily achieve ZPA and ZVS simultaneously. Additionally, the resonant frequency is irrelevant with the
coupling coefficient and the load condition. What’s more, the output current is load-independent, which
is referred to as constant-current-output (CCOut) characteristic in this paper. In other words, all the main
advantages of doubled-sided LCC compensation topology can be obtained by LC/S compensation
topology whereas the latter only needs three compensation elements, resulting in smaller system size,
higher power density and lower cost. Compared to conventional SS compensation topology, it can free
the design from the constraints imposed by the LCT parameters. The maximum output power of LC/S
compensated system can be easily changed by altering the value of L1 and C1. In theory, the output power
can reach infinite though the original input voltage and operation frequency is set to some specific value.
All these characteristics will be further analyzed in section III.

k
L1
C2
U1 C1 LP LS U2

Fig. 1 LC/S compensation topology with CCOut characteristic.

In section II, the consistency of mutual inductance model and T model of LCT are deduced. The
corresponding application scenarios of these two models are concluded as well. It’s very helpful to
choose a suitable LCT model in circuit analysis. In section IV, the relationship between three coupling-
related variables against coupling coefficient is discussed with the help of finite element analysis (FEA)
software ANSYS Maxwell. Then an LCT is designed with the size constraint of 340×210×100mm3 under
the guideline of former discussion. To verify the correctness of the theoretical analyses before, Pspice
simulations are carried out in section V while corresponding practical experiments are conducted in
section VI. Both the simulation and experiment results have shown high consistency with theoretical
analyses. Finally, the main points of the study is concluded in section VII.

II APPLICATION SCENARIOS OF MUTUAL INDUCTANCE MODEL AND T MODEL OF LCT

There are two well-known models of the LCT, which are called mutual inductance model and T model
respectively. They are shown in Fig. 2. In Fig. 2(a), UP and US are port voltage phasors of primary and
secondary coil respectively. IP and IS are corresponding coil current phasors. LP and LS are self-
inductances of primary and secondary coil respectively while M is mutual inductance between the two

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coils. ω is operation frequency. In Fig. 2(b), UP and IP are identical to that in Fig. 2(a). US-P and IS-P are
primary-converted port voltage and coil current of secondary winding respectively. LPl and LSl-P are
primary leakage inductance and primary-converted secondary leakage inductance respectively while LM-
P is primary-converted mutual inductance.

IP LP LS IS IP LPl LSl-P IS-P

+
+

+
+

+
UP -jωMIS jωMIP US UP LM-P US-P
- -

- - - -
(a) (b)

Fig. 2 Two well-known models of the LCT. (a) Mutual inductance model. (b) T model.

According to basic circuit theory, the consistency of mutual inductance model and T model of LCT
can be simply verified. An important note is that the application scenarios of these two models of LCT
are different. In mutual inductance model, the inductance is shown in self-inductance format whereas in
T model, the inductance is displayed in leakage and mutual inductance format. As a result, mutual
inductance model is more suitable for the condition that the self-inductance needs to be compensated and
T model is more applicable for the situation that the leakage inductance needs to be compensated. In
LC/S compensation topology, to ensure resonant frequency is irrelevant with coupling coefficient, the
self-inductance needs to be compensated. As a result, mutual inductance model is more suitable.

III TOPOLOGY DESIGN

The proposed LC/S compensation topology and corresponding power electronics circuit components
are shown in Fig. 3. Q1~Q4 are four power MOSFETs in the primary side. D1~D4 are the secondary-side
rectifier diodes. LP and LS are the self-inductances of the transmitting and receiving coils, respectively.
L1 and C1 are series compensation inductor and parallel compensation capacitor in primary, respectively.
C2 is secondary series compensation capacitor. k is the coupling coefficient between the primary and
secondary coils. uAB is the output voltage of the inverter, and uab is the input voltage of the rectifier. iP
and iS are coil current of primary and secondary respectively. CF works as a filter and RL is the practical
load. Before analyzing the CCOut characteristic of the LC/S topology in detail, it needs to be noted that
the circuit of rectifier, filter capacitor and resistive load, which is circled by red dashed line in Fig. 3, is
called RFRC for short in this paper. To simplify circuit analysis, RFRC is replaced by its equivalent
resistance RE. According to reference [29], RE can be calculated by
8
RE  RL (1)
2

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Q1 Q2
D1 D2
iP k iS
A + L1
C2
a +
+
- Uin uAB C1 LP LS uab CF RL

- B - b
Q3 Q4 D3 D4

Fig. 3 LC/S compensation topology for WPT.

A. CCOut Characteristics of LC/S compensation topology

Fig. 4 shows an LC resonant tank, where the resonant angular frequency of LLC and CLC equals the
angular frequency of the sinusoidal voltage source (ωS-LC), i.e.,
1
S -LC 2  (2)
LLC CLC
LLC IZ-LC

ULC CLC ZLC

Fig. 4 LC resonant tank.

On the basis of Kirchhoff’s voltage and current law, the current through ZLC (IZ-LC) under resonant
condition can be yielded

CLC U LC
I Z  LC   jU LC  j (3)
LLC S  LC LLC

In accordance with formula (3), if ULC is magnitude-constant, the output current of LC resonant tank
IZ-LC will be magnitude-constant as well, having nothing to do with the load. The LC resonant tank shows
a CCOut characteristic.
Fig. 5 shows a CL resonant tank, where the resonant angular frequency of CCL and LCL equals the
angular frequency of the sinusoidal voltage source (ωS-CL), i.e.,
1
S -CL 2  (4)
LCL CCL
LCL

ICL CCL UZ-CL ZCL

Fig. 5 CL resonant tank.

Similar to the analysis about LC resonant tank, the output voltage of CL resonant tank under resonant
condition (UZ-CL) can be obtained

LCL
U Z CL   j I CL   j I CLS CL LCL (5)
CCL

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On the basis of (5), if ICL is magnitude-constant, the output voltage of CL resonant tank UZ-CL will be
also magnitude-constant, having nothing to do with the load. The CL resonant tank shows a constant-
voltage-output (CVO) characteristic.
The CCOut characteristic of LC/S compensation topology is going to be analyzed with the first-order
harmonic of the square voltage waveform at switching frequency. The parasitic resistances of all
components are neglected for simplicity of analysis. The accuracy of the approximations will be verified
by circuit simulation and experiments in later sections. The analytical circuit of Fig. 3 is shown in Fig. 6.
LC Series
LC Resonant CL Resonant
Resonant
Tank Tank IP IS
L1 LP LS +
C2

+
+
UAB C1' C1'' -jω0MIS jω0MIP Uab RE
- -
-

Fig. 6 The analytical circuit of LC/S compensation topology.

UAB is the first-order harmonic of the square voltage inverted from the DC voltage Uin. The angular
frequency of UAB ω0 is referred to as operation angular frequency hereafter. C1' and C1" are split by C1.
The relationship between them can be expressed by the following equation.

C1'  C1''  C1 (6)

C1' resonates with L1 at operation angular frequency, making the output current of the first LC resonant
tank sinusoidal and amplitude-constant, whose value can be calculated by (3). It’s rewritten as

C1' U
I LC   jU AB   j AB (7)
L1 0 L1

C1" resonates with LP, likewise at operation angular frequency. Since the output current of the LC
resonant tank, which is also the input current of the CL resonant tank, is sinusoidal and amplitude-
constant, according to CVO characteristic of CL resonant tank, the output voltage of the CL resonant
tank is still sinusoidal and amplitude-constant. The output voltage –jω0MIS, which is represented by a
current-controlled voltage source in Fig. 6, can be calculated according to (5) and (7).

C1' LP L
- j0 MI S  U AB  U AB P (8)
L1C1'' L1

Then the secondary coil current IS can be obtained.

U AB C1' LP U L
IS   j   j AB P (9)
0 M L1C1'' 0 ML1

According to (1) and (9), the average power consumed by the equivalent resistance can be deduced.
8 U AB -RMS2 C1' LP 8 U AB -RMS2 LP 2
PRE  R  RL (10)
 2 0 2 M 2 L1C1''  2 02 M 2 L12
L

where UAB-RMS is the RMS value of UAB. In fact, the power described by (10) is consumed by RL. Then
the direct current through RL (IRL) can be deduced.

2 2 U AB -RMS C1' LP 2 2 U AB -RMS LP

I RL   (11)
 0 M L1C1''  0 ML1

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To achieve ZPA and reduce system VA rating, C2 should be chosen deliberately. According to reference
[5], the load impedance of the secondary can be calculated as a lumped impedance (ZS), whose value is
given by
Z S  jX  RE (12)

where X  0 LS  1/ 0C2  . The loading effect of the secondary on the primary circuit is shown in

Fig. 7 as a reflected impedance (Zr). This impedance is dependent on the transformer coupling and
operation frequency, which is given by
0 2 M 2
Zr  (13)
ZS
LC Resonant CL Resonant
Tank Tank IP
L1 LP

+
UAB C1' C1'' -jω0MIS Zr

Fig. 7 Primary circuit with reflected impedance.

Substitute (12) into (13), the reflected impedance is

0 2 M 2
Zr  (14)
jX  RE
Then the input impedance Zin can be yielded.

 1  1
Zin   Z r  j0 LP  / / '' 
//  j0 L1 (15)
 j0 1 
C j0 C1
'

where the operator “//” represents the parallel calculation of impedance. Considering that L1 and LP
resonate with C1' and C1" respectively, both at operation angular frequency, Zin can be simplified as
0 2 L1 Z r C1''
Zin  (16)
0 LP C1'  j0 Z r C1
2

Substitute (14) into (16), the system input impedance can be rewritten as

0 4 L1M 2C1''
Zin  (17)
0 2 LP C1' RE  j0 2  XLP C1'  0 M 2C1 

Then the input impedance angle can be obtained.

 0 M 2C1  XLP C1' 

 in    arctan  (18)
 LP C1' RE 

To achieve ZPA, the following equation should be satisfied.

0 M 2C1  XLPC1' (19)
Then the capacitance C2 that leads to ZPA can be deduced.

LP C1'
C2  ZPA  (20)
0 2  LS LP C1'  M 2C1 

In fact, what we really want to achieve is ZVS. Therefore, the input impedance angle αin should be
positive. Assuming the desirable input impedance angle is β, according to equation (18), the

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corresponding C2 leads to ZVS with an input impedance of β can be obtained.

LP C1'
C2 ZVS  (21)
0 2 LP LS C1'  0 2 M 2C1  0 LP RE C1' tan 

In terms of equation (21), it’s found that the larger β, the smaller C2-ZVS, and the easier achievement
of ZVS. It’s also found that C2-ZVS is related to both M and RE. Smaller M and larger RE result in smaller
C2-ZVS. To ensure ZVS can be achieved under all conditions, C2-ZVS should be chosen when M are smallest
and RE are largest.

B. Normalized stress of the inductor and capacitor

The normalized stresses of an inductor (σL) and a capacitor (σC) are respectively defined as follows.

S L 2 I L 2 L
L   (22)
PRL PRL

SC 2U C 2C
C   (23)
PRL PRL

where SL and SC are apparent powers of the inductor and capacitor. PRL is the power consumed by the
system resistive load RL. IL and UC are the current through the inductor and the voltage over the capacitor,
both are RMS values. ω is system operation angular frequency. L and C correspond to the inductance
and capacitance.
The stress analytical circuit of LC/S compensation topology is shown in Fig. 8, where ZS represents
the load impedance of the secondary, and Zr stands for the reflected impedance of ZS. ZC1 represents the
equivalent impedance of C1, LP and Zr. Zin is the system input impedance. Then ZS, Zr , ZC1 and Zin can
be deduced.

IP IS
L1 LP LS
C2
+
+

UAB Zin ZC1 C1 Zr -jωMIS jωMIP ZS RE

- -

Fig. 8 The stress analytical circuit of LC/S compensation topology.

 1
 Z S  RE  jC  j LS
 2

 2M 2
Zr 
 ZS (24)
 1
 Z C1   Z r  j LP  / /
 jC1

 Z in  Z C1  j L1
Therefore, the currents through L1, LP, LS and the voltages over C1, C2 can be yielded.

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 U AB
 I L1 
 Z in
 U C1
IP 
 Z r  j LP
 j MI P
IS  (25)
 ZS
 I
U C 2  S
 j C2
 Z C1
U C1  U AB
 Z C1  j L1
The power consumed by RE equals that consumed by RL, which means

PRL  PRE  I S 2 RE (26)

where IS is the RMS value of IS. In accordance to previous equations, the normalized stresses of the
employed inductors and capacitors can be obtained.

 2 I L12 L1

 L1 
 I S 2 RE
 2 I 2 L
 LP  P 2 P
 I S RE

 2 I LS 2 LS
 LS  (27)
 I S 2 RE
 2U C12 C1
 C1 
 I S 2 RE

  2U C 2  C2
2

 C 2 I S 2 RE

C1 is chosen to make C1' and C1" resonate with L1 and LP respectively, both at operation angular
frequency, and C2 is chosen in terms of (21) to achieve an input impedance of 25°. The normalized
stresses on L1, LP, LS, C1 and C2 against LP, LS, L1, k, ω0 and RL are going to be studied. UAB is not
considered because generally, it’s given and amplitude-constant. In the following simulations of this sub-
section, UAB is set to be (100*4/π)V.
The normalized stresses versus LP and LS are studied first of all when L1, k, ω0 and RL are 310μH, 0.45,
(2π85k)rad/s and 60Ω respectively. The results are shown in Fig. 9. Fig. 9(a) indicates that the
normalized stress on L1 increases with LP but decreases with LS. The normalized stress keeps relatively
small as long as a relatively large LP and a relatively small LS are not employed concurrently. Fig. 9(b) is
similar to Fig. 9(d). In light of these two figures, both LP and LS should be relatively large to avoid big
stress on LP or C1. Fig. 9(c) implies a proportional relation between the normalized stress and LS whereas
the stress on LS keeps invariable when LP varies. Compared with the stress on L1, C1 and LP, the stress on
LS is quite small. Fig. 9(e) suggests that the stress on C2 is also quite small. Considering all above aspects,
together with power transfer capability, coupling between coils and system cost, as well as VA rating
balance between LP and LS, they are chosen to be around 230μH.

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25
20
15

σL1
10
5
0
6
4 6
4
2 2
LS /H (10-4) 0 0 LP /H (10-4)

(a)

50
40
30
σLP

20
10
0
6
4 6
4
2 2
LS /H (10-4) 0 0 LP /H (10-4)

(b)

12
10
8
σLS

6
4
2
0
6
4 6
4
2 2
LS /H (10-4) 0 0 LP /H (10-4)

(c)

40
30
σC1

20
10
0
6
4 6
4
2 2
LS /H (10-4) 0 0 LP /H (10-4)

(d)

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10
8
6

σC2
4
2
0
6
4 6
4
2 2
LS /H (10-4) 0 0 LP /H (10-4)

(e)
Fig. 9 Normalized stresses on (a) L1, (b) LP, (c) LS, (d) C1 and (e) C2 against LP and LS.

Under the condition that LP and LS both equal 230μH, the correlations between L1, k and σL1, σLP, σC1
and σC2 are displayed in Fig. 10.ω0 and RL are identical to those corresponding to Fig. 9. The normalized
stress on LS is not covered because in terms of Fig. 8 and equation (27), it keeps constant when L1 and k
vary. The stress on LS can be calculated as 4.832 based on the given parameters.
The profile of Fig. 10(a) is highly similar to Fig. 10(c), suggesting that the normalized stresses on L1
and C1 decrease with both L1 and k. If a relatively small L1 and k are adopted simultaneously, the stress
will surge to a very high value, which should be avoided. On the basis of Fig. 10(b), the stress on LP is
negatively correlated with k and it has no relation to L1. The stress on C2 is negatively associated with k
and it is unrelated to L1 as well. However, the decline rate of the stress on LP against k decreases with k
whereas the decline rate of the stress on C2 against k increases with k. Moreover, the stress on C2 is very
small regardless of the values of L1 and k. In light of the discussion above, the bigger L1, the higher k,
the smaller stress. Nevertheless, in accordance to equation (11), L1 is mainly determined by the output
current of the WPT system. In other words, L1 cannot be altered in terms of the stress on it. To reduce
the stress on L1, increasing the coupling coefficient will be a feasible approach as the stress decreases
with the coupling coefficient. Therefore, the LCT optimization design will be done in Section IV to
maximize the coupling coefficient between two coils.

200
150
σL1

100
50
0
4
3 0.6
2 0.5
0.4
1 0.3
L1 /H (10-4) 0.2 k
0 0.1

(a)

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50
40
30

σLP
20
10
0
4
3 0.6
2
0.3 0.4 0.5
L1 /H (10-4) 1 0 0.1 0.2 k

(b)

250
200
150
σC1

100
50
0
4
3 0.6
2 0.5
0.4
0.3
L1 /H (10-4) 1 0 0.1
0.2 k

(c)

6
5
4
σC2

3
2
1
4
3 0.6
2 0.5
0.4
1 0.3
L1 /H (10-4) 0.2 k
0 0.1
(d)
Fig. 10 Normalized stresses on (a) L1, (b) LP, (c) C1 and (d) C2 against L1 and k.

With the same method, the normalized stress on each element against operation angular frequency ω0
and resistive load RL is obtained and shown in Fig. 11. All the calculations are conducted under the
condition that LP, LS, L1 and k equal 230μH, 230μH, 310μH and 0.45 respectively.
According to Fig. 11(a), (b) and (d), a bigger ω0 will be better because it leads to smaller normalized
stresses on L1, LP and C1. However, in terms of Fig. 11(c) and (e), the conclusion is completely opposite
because the normalized stress on LS and C2 both increase with ω0. Therefore, a tradeoff must be done to
make none of the normalized stresses too big. The operation frequency of our practical WPT system is
set to be 85kHz, the recommended system operation frequency in J2954TM, a standard frequency
proposed by SAE (Society of Automotive Engineers) for wireless charging. The normalized stresses on
L1, LP and C1 increase with RL whereas the normalized stresses on LS and C2 decrease with RL. This is
just a conclusion, which cannot be utilized because the resistive load is uncontrolled.

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30
25
20

σL1
15
10
5
0
8
6 100
4 80
2 60
ω0/rad·s-1(×105) 40 RL
0 20
(a)

35
30
25
σLP

20
15
10
5
8
6 100
4 80
60
2 40
ω0/rad·s-1(×105) 0 20 RL

(b)

20

15
σLS

10

0
8
6 100
4 80
2 60
ω0/rad·s-1(×105) 40 RL
0 20

(c)

60
50
40
σC1

30
20
10
0
8
6 100
4 80
60
2 40
ω0/rad·s-1(×105) 0 20 RL

(d)

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10
8
6

σC2
4
2
0
8
6 100
4 80
2 60
40
ω0/rad·s-1(×105) 0 20 RL
(e)
Fig. 11 Normalized stresses on (a) L1, (b) LP, (c) LS, (d) C1 and (e) C2 against ω0 and RL.

According to the requirements of the project and the discussion before, the parameters of LC/S
compensated system are chosen and listed in TABLE 1. With these parameters, the normalized stresses
on employed inductors and capacitors can be obtained and given by TABLE 2. The unit of normalized
stress is V·A/W.

TABLE 1 EMPLOYED PARAMETERS OF LC/S COMPENSATED WPT SYSTEM

Parameter UAB/V RL/Ω PRL/W f/kHz LP/μH LS/μH k L1/μH C1/nF C2/nF

Value 127.32 60 71.02 85 230 230 0.45 310 26.6 21.5

TABLE 2 THE NORMALIZED STRESSES ON EMPLOYED INDUCTORS AND CAPACITORS OF LC/S

COMPENSATION TOPOLOGY

Component L1 LP LS C1 C2

Normalized Stress 3.53 6.02 5.05 7.15 3.58

The optimization effect is limited because system efficiency depends on many factors, such as input
voltage, coupling coefficient, dimension of employed litz wire, output current, rated load, system size
limitation and so on. To obtain highest system efficiency, a comprehensive optimization, taking all
efficiency-related factors into consideration, should be done under the premise of diverse limitations.
This optimization is quite complicated, and it will be done in the future.

C. Stress comparison between LC/S and double-sided LCC compensated system

To compare the component stress between WPT systems with different compensation topologies, the
following two rules must be obeyed. Firstly, the input voltage, operation frequency, resistive load and
output power should be identical. Next, both systems should be optimized.
Fig. 12 is the analytical circuit of double-sided LCC compensation topology. The parameter tuning
method can refer to [22]. On the basis of the first rule given before, UAB, ω0, RE and IRE (the peak value
of the current through RE) in Fig. 12 should be 127.32V, (2π×85k)rad/s, 48.63Ω and 1.71A. What follows
is the optimization of the double-sided LCC compensation topology.
Primary LCC Network Secondary LCC Network
IP IS
Lf1 LP LS Lf2 +
C1 C2
+
+

UAB Cf1 -jωMIS jωMIP Cf2 Uab RE

- -
-

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Fig. 12 The analytical circuit of double-sided LCC compensation topology.

The optimization of a double-sided LCC compensated system can be divided into two decoupled steps.
Firstly, design the LCT for higher coupling coefficient and figure of merit under various constraints.
Secondary, design the compensation circuit parameters to make VA rating of LP and LS close. The LCT
optimization will be detailedly interpreted in section IV while the optimization results are employed here
in advance. Based on the optimization results and system dimension limitations, LP, LS and k can be
derived by Maxwell simulation, which are 230μH, 230μH and 0.45 respectively.
The following equation should be fulfilled to make the VA rating of LP identical to that of LS.

M 2 RE 2 LS
Lf 2  4 (28)
0 2 LP

Substitute the specific values of corresponding variables into (28), Lf2 can be derived as 97.1μH. In
terms of circuit fundamentals, the following equations can be yielded.

U AB -RMS k LP LS
L f 1-o  (29)
0 L f 2 I RE 1   tan  
2

0 L f 1-o 2 L f 2 2
L f 1  L f 1-o  tan  (30)
RE k 2 LP LS

Wherein, Lf1-o stands for the primary compensation inductance when the input impedance angle is zero.
Lf1 represents the primary compensation inductance when the input impedance angle is β. For fair
comparison and realization of ZVS, the input impedance angle of double-sided LCC compensated system
is set as 25°. Therefore, Lf1-o and Lf1 can be calculated as 134.8μH and 216.7μH respectively. The
employed parameters of double-sided LCC compensated system are summarized in TABLE 3. Wherein,
UAB is peak value. With the parameters given in TABLE 3, the normalized stresses on employed inductors
and capacitors can be obtained, tabulated in TABLE 4. The unit of normalized stress is V·A/W.

TABLE 3 EMPLOYED PARAMETERS OF DOUBLE-SIDED LCC COMPENSATED WPT SYSTEM

Parameter UAB (V) f (kHz) LP (μH) LS (μH) k Lf1 (μH)

Value 127.32 85 230 230 0.45 216.7

Parameter Cf1 (nF) C1 (nF) Lf2 (μH) Cf2 (nF) C2 (nF) RL (Ω)

Value 26.0 36.8 97.1 36.1 26.4 60

TABLE 4 THE NORMALIZED STRESSES ON EMPLOYED INDUCTORS AND CAPACITORS OF DOUBLE-SIDED LCC
COMPENSATION TOPOLOGY

Component Lf1 LP LS Lf2 Cf1 C1 C2 Cf2

Normalized Stress 2.47 4.45 4.44 2.13 4.14 1.84 2.57 4.01

According to TABLE 2 and TABLE 4, the stresses on L1, LP and LS of LC/S are larger than the stresses
on Lf1, LP and LS of double-sided LCC. However, double-sided LCC has another inductor, causing
additional power loss. Therefore, in terms of the stresses on employed inductors, LC/S and double-sided
LCC have their own advantages. The stress on C1 of LC/S is the biggest one among all component
stresses in TABLE 2 and TABLE 4, which should be especially paid attention to. Nevertheless, the
stresses on Cf1 and Cf2 of double-sided LCC are also considerable. On the whole, the total stress on the

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capacitors of double-sided LCC are larger than that of LC/S.

D. System performance under imperfect resonant condition

According to the analysis in section III-A, the system shows an excellent CCOut characteristic under
perfect resonant condition. However, in practical system, it’s hard to achieve perfect resonant condition
due to various reasons. It’s necessary to analysis the system performance under imperfect resonant
condition.
Generally speaking, imperfect resonant condition mainly results from two aspects: inaccurate
component parameters and variation of coils’ relative position. In accordance with the discussion before,
minor changes on L1, C1, k and C2, named ΔL1, ΔC1, Δk and ΔC2 respectively, are introduced to analyze
system performance under imperfect resonant condition. It’s important to note that L1, C1, k and C2,
together with UAB, LP, LS and RE, comprise a perfect resonant system, and their values are listed in TABLE
5. For simplicity, we supposed that ΔL1, ΔC1, Δk and ΔC2 don’t appear simultaneously.

TABLE 5 ALL COMPONENT VALUES OF A PERFECT RESONAT SYSTEM

Parameters Values

LP 200uH
LS 200uH
Coupling coefficient k 0.4
L1 200uH
Operation angular frequency ω0 (2π85k)rad/s
C1 35.059nF
C2 25.779nF
UAB 127.32V

Fig. 13 shows the load current profiles versus RE and ΔL1, ΔC1, Δk, ΔC2. In Fig. 13(a), when L1 equals
the resonant value, the current through RE is 2.98A, which doesn’t vary with RE. When L1 is 5 percent
larger or smaller than the resonant value, the current changes with RE, both from 2.97A (20Ω) to 2.86A
(100Ω). In fact, if L1 increases or decreases by a same percentage, the corresponding currents through RE
are conjugate symmetric, and the absolute values are identical. Strictly speaking, if L1 deviates from its
resonant value, the CCOut characteristic doesn’t exist anymore. However, if the deviation is within 5
percent, the variation of current versus RE is so small that can be neglected. It can still be regarded as a
CCOut system. What’s more, when L1 changes by 5 percent, the current decreases by 4.0 percent when
RE is 100Ω and 0.3 percent when RE equals 20Ω, displaying an quite good CCOut characteristic against
variation of L1.
The profile of load current against RE and ΔC1 is displayed in Fig. 13(b). When C1 equals the resonant
value, the current through RE (2.98A) is invariant as RE changes. When C1 is 5% larger than the resonant
value, the current become 3.28A (20Ω) and 2.78A (100Ω). When C1 is 5% smaller than the resonant
value, the current falls into 2.69A (20Ω) and 2.39A (100Ω). No matter C1 is 5% larger or smaller than
the resonant value, the current will change with RE. However, compared to the variation of RE, the
variation of the current is small enough that can be neglected.
On the basis of Fig. 13(c), when the coupling coefficient increases by 20 percent, the load current
decreases by 16.8 percent. When the coupling coefficient decreases by 20 percent, the current increases
by 25.2 percent. It’s obvious that the system output current changes with the coupling coefficient. This
is a common problem of almost all kinds of compensation topologies. As far as I’m concerned, this

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problem can be solved by closed-loop control (altering the dead time of inverted square-wave voltage)
or LCT design. According to Fig. 13(c), it can also be found that the system output current doesn’t change
with RE when the coupling coefficient is fixed to a certain value, no matter it’s larger or smaller than the
perfect resonant value. Though the system output current changes with the coupling coefficient. Once
the coupling coefficient is determined, the system output current keeps constant regardless of the load.
This characteristic is of great importance since it decouples the system output current and the load, which
will significantly simplify the design of system control circuit.
Fig. 13(d) describes the relationship between the load current, ΔC2 (represented by percentage of C2)
and RE. No matter C2 rises or drops, no matter what’s the value of RE, the current through RE doesn’t
change (the little variation shown in Fig. 13(d) is caused by calculation error). It means that C2 has no
impact on system output current.

3 3.5

2.95 IR-E/A 3
IR-E/A

2.9 2.5

2.85 2
100 100
80 5 80 5
60 0 60 0
40 40
RE/Ω 20 -5 ΔL1/percent RE/Ω 20 -5 ΔC1/percent
(a) (b)

4.0 4
3.5 3
IR-E/A
IR-E/A

3.0 2
2.5 1
2.0 0
100 100
80 20 80 5
60 10 60
0 0
RE/Ω 40 20 -20 -10 Δk/percent RE/Ω 40 ΔC2/percent
20 -5
(c) (d)

Fig. 13 The load current profiles versus (a)ΔL1/L1 and RE. (b)ΔC1/C1 and RE. (c)Δk/k and RE. (d)ΔC2/C2 and RE.

Precisely speaking, any change of L1 or C1 will impair the CCOut characteristic of LC/S compensation
topology. However, even though the change makes up a percentage of 5 percent, the variation of the
current through RE is still so small, especially compared to the variation of RE, that can be neglected.
Therefore, in practical application, the imperfect resonant system can still be considered as a CCOut
system, as long as the change is within a certain range. Additionally, the change of k or C2 won’t change
the CCOut characteristic of the system. It’s very appealing since it makes it much easier to design a WPT
system with CCOut characteristics.
Fig. 14 shows the input impedance angle profiles versus RE and ΔL1, ΔC1, Δk, ΔC2. When the system
is under resonant condition, which means all L1, C1, k and C2 are identical to perfect resonant values, the
input impedance angle always equals zero regardless of the value of RE. However, if the system is not
under perfect resonant condition, no matter which one of L1, C1, k and C2 deviates from its perfect

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resonant value, the input impedance angle changes with RE.

In terms of Fig. 14, the input impedance angle shows a positive correlation with ΔL1/L1-P, ΔC1/C1-P
and Δk/kP whereas it exhibits a negative relationship with ΔC2/C2-P. With the decrease of RE, the variation
of input impedance angle with ΔL1/L1-P and ΔC1/C1-P becomes slower, but the variation of input
impedance angle with Δk/kP and ΔC2/C2-P becomes rapider. By comparing the influence of ΔL1/L1-P,
ΔC1/C1-P, Δk/kP and ΔC2/C2-P on the input impedance angle, it can be concluded that ΔC1/C1-P has the
largest effect on the input impedance angle while ΔC2/C2-P has the smallest impact. As a consequence,
the capacitor with higher accuracy should be employed to C1 to get better system performance. On the
contrast, the capacitor with lower accuracy can be adopted in C2 to reduce the system cost while keep an
acceptable system performance. What needs to be emphasized is that all the conclusions related to Fig.
14 are just applicable to this particular condition. Nevertheless, the analysis methodology proposed here
is always applicable, despite of parameter variations.
Input Impedance Angle(º)

Input Impedance Angle(º)

20 40
10 20
0 0
-10 -20

-20 -40
100 100
90 5 90 5
80 80
70 0 70 0
60 60
RE(Ω) 50 -5 ΔL1/L1-P(percent) RE(Ω) 50 -5 ΔC1/C1-P(percent)
(a) (b)
Input Impedance Angle(º)

Input Impedance Angle(º)

20 6
10 4
2
0
0
-10 -2
-20 -4
100 100
90 20 90 5
80 10 80
70 0 70 0
60 -10 60
RE(Ω) 50 -20 Δk/kP(percent) RE(Ω) 50 -5 ΔC2/C2-P(percent)
(c) (d)

Fig. 14 The input impedance angle profiles versus (a)ΔL1 and RE. (b)ΔC1 and RE. (c)Δk and RE. (d)ΔC2 and RE.

IV LCT DESIGN

Reference [27] presented the design and optimization methodology of a circular magnetic core.
Reference [28] studied the structure and interoperability of DD and unipolar coils, respectively shown in
Fig. 15(a) and (b), for EV wireless charging system. Simulation results suggested that DD coil is better
than unipolar coil from the perspective of coupling coefficient and system efficiency. Reference [30]
conducted a comparative study on DD and unipolar coils. The simulation results indicated that DD coil
is better than unipolar coil in terms of misalignment tolerance, flux path height and charge zone. Based

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on the analysis above, DD coil is finally selected. The principles to determine the distance between two
D coils in the same side, the length and width of inner air lump, marked by D, LI, and WI in Fig. 15(a)
respectively, are not discussed in [28]. Therefore, it is going to be discussed, aimed at designing desirable
LCT more easily. This discussion is conducted with the help of FEA software ANSYS Maxwell while
the criterion for convergence is set as 1%.

WI
LI D

(a) (b)

Fig. 15 Coil topologies of LCT. (a) DD coil. (b) Unipolar coil.

Roughly speaking, higher LCT coupling coefficient leads to smaller component stress and less reactive
power, hence lower power loss and increased system efficiency. Except coupling coefficient, system
transfer factor Q, the geometric average of primary and secondary coil power factors, also has great
impact on system performance. Generally speaking, higher Q results in less power loss and higher system
efficiency[31]. Therefore, a composite variable — figure of merit (FOM), the product of coupling
coefficient and system transfer factor — is proposed to comprehensively reflect the quality of an
LCT[32],[33].
The power factor of a coil (QL) is defined as follow.
L
QL  (31)
ESR cl  ESR hl  ESR ecl
where ω is system operation frequency while L represents coil inductance. L can be obtained by
simulation. ESRcl, ESRhl and ESRecl respectively stand for the equivalent series resistance caused by
copper loss, hysteresis loss and eddy current loss. ESRecl is omitted due to extremely large resistivity of
employed ferrite. ESRhl can also be omitted in this study since the coil current is relatively small and the
equivalent cross-sectional area of ferrite is relatively large. This has been verified by simulation with
ANSYS Maxwell. Detailed verification process is not encompassed in the paper due to space limitation.
ESRcl approximately equals resistivity of employed litz wire multiplied by the length.
TABLE 6 gives some fixed parameters adopted in the simulation. The variation ranges of three
coupling-related parameters (D, LI, WI) are listed in TABLE 7. Only primary parameters are listed in
TABLE 6 and TABLE 7 since the secondary parameters are totally identical to primary ones. It’s best to
optimize the LCT with consideration of all five parameters (length of ferrite bar, width of ferrite bar, D,
LI and WI). However, the five-dimension optimization problem will take much time and it’s unacceptable
for practical application. To obtain time-acceptable and relatively optimal solution, the five-dimension
optimization problem is divided into three three-dimension problems (respectively analyzed in sub-
section A, B and C as follows). The optimization results have verified the feasibility of the division.

TABLE 6 SOME FIXED PARAMETERS ADOPTED IN THE SIMULATION

Primary parameters Values

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Air gap 50mm

Litz wire diameter 3mm
*
Turn of a single D coil 10
Space between wires 0
Thickness of ferrite bars 8mm
*
A single D coil refers to the part circled by blue dashed line in Fig. 15(a).

TABLE 7 VARIATION RANGES OF THE THREE COUPLING-RELATED PARAMETERS

Symbols Values
*
D 0.1 to 60mm
LI 0.1* to 60mm
WI 0.1* to 60mm
*
The minimum distance/length/width is set to be 0.1mm for the consideration of insulation between two D coils in the same side.

A. The distance between two D coils in the same side

The influence of D to coupling coefficient is studied under the condition that both LI and WI are 30mm,
and D varies from 0.1mm to 60mm with an interval of 10mm (the first interval is 9.9mm). With respect
to each scenario, the length and width of the ferrite bar are firstly optimized while the thickness is
constant. The simulation results of ferrite bar size optimization when D equals 0.1mm is shown in Fig.
16. FOM increases first and decreases later with either length or width of the ferrite bar. It achieves
maximum when the dimension of ferrite bar is 150648mm3.

32
31
Figure of merit

30
29
28
27
72 m m
26 56 ar/
eb
rit
25 40 f fer
110 120 130 140 150 160 170 180
ho
Length of ferrite bar/mm idt
W
Fig. 16 Simulation results of ferrite bar size optimization when D equals 0.1mm.

Through similar optimization approach to each scenario, the profiles of coupling coefficient (CCO),
system transfer factor (STF) and figure of merit (FOM) versus D are depicted in Fig. 17. CCO increases
with D whereas STF decreases with D, meaning a failure of obtaining largest CCO and STF
simultaneously. However, FOM increases with D all the time, indicating CCO dominates FOM.
Compared to the increment of system size, the increment of FOM is not so appealing. Besides, the size
constraint of our application is harsh. Therefore, D is set to be 0mm.

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FOM

CCO
STF
35 137 0.27

34.2 135.6 0.26 Coupling coefficient (CCO)

33.4 134.2 0.25

Figure of merit (FOM)

32.6 132.8 0.24

31.8 131.4 0.23 System transfer factor (STF)

31 130 0.22
0 10 20 30 40 50 60
Distance between two coils in the same side/mm

Fig. 17 The profiles of CCO, STF and FOM versus D.

B. The length of inner air lump

Through similar optimization method, the profiles of CCO, STF and FOM versus LI can be derived.
They are displayed in Fig. 18, with preset WI (30mm) and D (0.1mm). Simulation results indicate that all
CCO, STF and FOM increase with LI. To get better system performance, LI should be as large as possible
under the premise of satisfying system size constraint . LI is finally set to be 80mm.
FOM

CCO
STF

44 150 0.32

39 140 0.29 System transfer factor (STF)

34 130 0.26

29 120 0.23 Coupling coefficient (CCO)

24 110 0.20

Figure of merit (FOM)

19 100 0.17
0 10 20 30 40 50 60
The length of inner air lump/mm

Fig. 18 The profiles of CCO, STF and FOM versus LI.

C. The width of inner air lump

Fig. 19 shows the profiles of CCO, STF and FOM versus WI. The profiles are obtained under the
premise that D and LI are 0.1mm and 80mm respectively. Simulation results suggest strong positive
correlations between CCO, STF, FOM against WI. WI is chosen to be 40mm in practical prototype due to
system size constraint.

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FOM

CCO
STF
72 172 0.42

63 160 0.38 System transfer factor (STF)

54 148 0.34

45 136 0.30
Coupling coefficient (CCO)

36 124 0.26
Figure of merit (FOM)
27 112 0.22

18 100 0.18
0 10 20 30 40 50 60
The width of inner air lump/mm

Fig. 19 The profiles of CCO, STF and FOM versus WI.

V SIMULATION VERIFICATION

All simulations in this section are about electric circuit, having nothing to do with magnetic circuit.
The adopted simulation software is Pspice from Cadence Design Systems, Inc.. The simulation circuit is
based on the circuit shown in Fig. 3, but the DC input voltage source and full bridge inverter is substituted
with an 100V square wave voltage source. The filter capacitance CF employed in the simulation is 100μF
while the rectifier diode is ideal. Unless specially claimed, the other parameters are identical to those
given by TABLE 1.

A. Achievement of ZPA
Fig. 20 shows the profiles of the current through the MOSFET (iMOS) and the voltage between the drain
and source (uDS). On the basis of (20), C2-ZPA should be 29.08nF. It can be found that iMOS is nearly in
phase with the first harmonic of uDS, demonstrating the validity of equation (20).

Fig. 20 Profiles of iMOS and uDS when RE and RL are respectively employed.

B. ZVS of the MOSFET

Fig. 21 exhibits the profiles of iL1 and uAB. The MOSFET has realized ZVS, reducing switching losses
and system size. The power density and level can also be improved. Compared with Fig. 20, the system
input impedance angle can be readily altered by changing secondary series compensation capacitance. It
significantly reduces the difficulty of debugging circuit to achieve ZVS and optimum performance.

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Fig. 21 Profiles of iL1 and uAB when C2-ZVS are employed.

C. CCOut characteristic of LC/S compensation topology

According to the analysis in section III-A, the system output current does not change with RL if other
variables keep invariant. Fig. 22 shows the profile of load current when load suddenly decreases. When
RL equals 60Ω, the current through RL is 1.083A. When RL suddenly decreases to 30Ω, the current surges
to 2.148A, and then gradually drops to 1.083A and keeps constant. The transient process continues for
19ms. The transient time is mostly determined by the steady current through RL, the variation range of
the load and the filter capacitance. In terms of equation (11), the current through RL is 1.088A, very close
to 1.083A, verifying the correctness of the formula to calculate load current.

Fig. 22 Profiles of load current when load suddenly decreases.

D. Easily-changed output power

In four conventional compensation topologies, to change the output power, not only the compensation
components, but also the LCT need to be replaced. However, in LC/S compensation topology, the output
power can be altered by solely changing L1 and C1. Fig. 23 shows the output power profiles with different
combinations of L1 and C1 while all other parameters are invariant. The simulation results illustrate the
characteristic of easily-changed output power of LC/S compensation topology. Moreover, on the basis
of equation (10), the theoretical output powers are 170.6W (L1=200μH, C1=32.8nF), 109.2W (L1=250μH,
C1=29.3nF) and 71.0W (L1=310μH, C1=26.6nF). The calculation results are very close to simulation
results, verifying the correctness of previous theoretical analysis. The calculation results are a little larger
than the simulation results due to component parameter error and non-ideal filter.

Fig. 23 System output power profiles corresponding to different combinations of L1 and C1.

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E. Efficiency comparison between LC/S and double-sided LCC compensation topologies

Simulations with LC/S and double-sided LCC compensation topologies are conducted for efficiency
comparison between them. The employed parameters are identical to those given by TABLE 1 and
TABLE 3 except input voltage and RFRC. The input voltage in the simulation is an 100V square wave
while RFRC is replaced by a 48.6Ω equivalent resistor.
The power loss of an inductor can be divided into two parts, iron loss and copper loss. Iron loss
includes hysteresis loss and eddy current loss. Nevertheless, the resistivity of PC47, employed as the iron
core material of the compensation inductor in proposed WPT system, is very large, leading to a very
small eddy current loss, which can be omitted. Therefore, iron loss only refers to hysteresis loss here.
What’s going to be discussed is the method to calculate the equivalent series resistance of hysteresis loss
(ESRhl) of an inductor.
When the ferrite core of an inductor is unsaturated, the inductance (L) is defined as the ratio of flux
linkage (Ψ) to the current (i), described by the following equation:
 NBS
L  (32)
i i
where N, B and S are coil turns, flux density and section area of magnetic circuit respectively. Then the
flux density of an inductor can be obtained through dividing L∙i by N∙S. In fact, the obtained flux density
is the B field in the air, not the B field in the ferrite. However, the air gap is quite small and ETD cores
are employed. The section area of magnetic circuit in the air is approximately equal to that in the ferrite.
As a result, the flux density in the ferrite equals that in the air providing the B field uniformly distributes
in the ferrite. Based on the profiles of relative core losses versus frequency and flux density given by the
manufacturer, the hysteresis loss and original equivalent series resistance of hysteresis loss (ESRhl-o) of
an inductor can be derived. Nevertheless, the hypothesis that B field uniformly distributes in the ferrite
is incorrect. The non-uniform magnetic distribution leads to an obvious increment of hysteresis loss[34].
Therefore, an extra coefficient kNMD is added to roughly reflect the impact, i.e.,
ESR hl  kNMD ESR hl-o (33)
kNMD is obtained in light of practical measurement for each specific B field.
With the parameters listed in TABLE 1, the peak current through L1 (1.23A) can be obtained. In terms
of the data book of EPCOS corporation [35], the calculated hysteresis loss power of L1 is 0.51W, and
corresponding ESRhl-o is 0.674Ω. According to practical measurement and simple calculation, kNMD can
be yielded as 1.91. Based on equation (33), ESRhl can be finally obtained as 1.287Ω. With the same
method, the ESRhl’s of Lf1 and Lf2 are 1.013Ω and 0.493Ω respectively.
The equivalent series resistance of copper loss (ESRcl) of an inductor can be approximately replaced
by its DC resistance because the operation frequency is only 85kHz and appropriate Litz wire is used,
substantially mitigating skin effect and proximity effect [19],[36],[37]. Roughly speaking, the DC
resistance of an inductor (RDC-L) is proportional to coil turns (NL), which can be described as follow.
RDC-L  k1 N L (34)
Wherein, k1 is a coefficient. The inductance of an inductor (LL) is proportional to the square of coil turns.
It can be expressed by the following equation.
LL  k2 N L 2 (35)
On the basis of equation (34), (35) and the parameters of a practical inductor, k1 and k2 can be obtained,
which are 2.2210-3Ω/turn and 1.5310-7H/turn2 respectively. Then the ESRcl’s of L1, Lf1 and Lf2 can be

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derived. They are 0.1Ω, 0.084Ω and 0.056Ω respectively. The total ESR of an inductor can be got by
adding the ESRhl and ESRcl together. The ESRs of L1, Lf1 and Lf2 are 1.387Ω, 1.097Ω and 0.549Ω
respectively.
The equivalent series resistance of a capacitor (ESRc) is negatively associated with its capacitance.
According to the datasheet of the capacitor employed in proposed WPT system, the product of ESRc and
corresponding capacitance is 210-9Ω·F. Therefore, the ESRs of C1 and C2 of LC/S compensated system
are 0.075Ω and 0.093Ω while the ESRs of Cf1, C1, Cf2 and C2 of double-sided LCC compensated system
are 0.077Ω, 0.054Ω, 0.055Ω and 0.076Ω respectively. The simulation results are shown in Fig. 24.
Through simple calculation, the efficiencies of the WPT system with LC/S and double-sided LCC
compensation topologies are 92.0% and 93.7% respectively. Both LC/S and double-sided LCC have
achieved high efficiencies though double-sided LCC shows a little higher.

Fig. 24 System input power, output power and power loss on compensation elements with LC/S and double-sided LCC
compensation topologies respectively.

F. Equivalent resistance of RFRC

The current through secondary coil (iS), as well as system output power (Po), are shown in Fig. 25
when RL and RE (the equivalent resistor of RFRC) are respectively employed. It can be found that iS and
the average system output power vary little when RFRC is replaced by its equivalent resistance.
Therefore, it is valid to replace RFRC with its equivalent resistance when analyzing the circuit.

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Fig. 25 The current through secondary coil and system output current when RL and RE are employed.

VI EXPERIMENT VERIFICATION

A WPT prototype with LC/S compensation network, which is shown in Fig. 26, is built to verify the
analysis above. It’s made up of six parts: DC voltage source, primary PCB board, LCT, secondary PCB
board, resistive load and oscilloscope, which are numbered from 1 to 6 in order. Some critical parameters
of the components employed in the prototype are listed in TABLE 8 while the detailed parameters of the
LCT are given by TABLE 9.

6
1

2
5

3
4

Fig. 26 Constant current output WPT prototype.

TABLE 8 SOME CRITICAL PARAMETERS OF THE COMPONENTS EMPLOYED IN THE PROTOTYPE

Components Parameters
MOSFET FQU10N20CTU
L1 308.9μH
C1 26.7nF
C2 19.4nF
LP 225.11μH
LS 230.8μH
k 0.4503
CF 1000μF
Rectifier diode Sirectifier MBR30200PT

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RL 60.3 Ω

TABLE 9 DETAILED PARAMETERS OF THE LCT

Components Parameters
Litz wire Φ0.1mm*500

Manufacturer: EPCOS(TDK)
Material: PC47
Ferrite strip
Size: 128*25*17.5mm3
Number: 2*4
The distance between two D coils 0mm
Inner air lump size: 40*80mm2
Single D coil of primary
Turns: 21

Inner air lump size: 40*80mm2

Single D coil of secondary
Turns: 21

A. Achievement of ZPA
Fig. 27 shows the profiles of output current and voltage of the inverter. The experiment was carried
out with the parameters listed in TABLE 8 except C2. According to formula (20), to realize ZPA, the
secondary series compensation capacitance should be 29.26nF. However, in practical experiment, C2 is
chose to be 29.09nF due to availability. In terms of Fig. 27, it can be found that the fundamental harmonic
of the voltage and that of the current are almost in phase, validating the correctness of the analysis on
ZPA of LC/S compensation network, which is elaborated in Section III-A in detail.

50V/div

500mA/div

2us/div

Fig. 27 Profiles of output current and voltage of the inverter.

B. ZVS of MOSFETs
With the parameters given in TABLE 8, the ZVS of MOSFETs can be realized, as shown in Fig. 28.
Compared to the parameters employed in last experiment, the only difference is C2, which is changed
from 29.09nF to 19.4nF. It’s very convenient and easy to change the input impedance angle of the WPT
system with LC/S compensation topology. This merit can extremely reduce the difficulty of debugging
the circuit to achieve ZVS. Additionally, the magnitude of the current in Fig. 28 is larger than that in Fig.
27 since more reactive power is involved. A larger current indicates more power loss in primary
compensation components, but a larger current is resulted from a greater leading angle between the
voltage and current, which will be more beneficial to realize ZVS. Hence, the minimum angle that make
all four MOSFETs realize ZVS will be optimum. In our system, the leading angle is set to be around 30
degrees.

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50V/div

500mA/div

2us/div

Fig. 28 Realization of ZVS of MOSFETs.

C. CCOut characteristic of LC/S compensation topology

To verify the CCOut characteristic of LC/S compensation topology, which is analyzed theoretically in
section III-A, an experiment with an transient load step is conducted. The experiment results is shown in
Fig. 29. Firstly, the resistive load is 40.8Ω and then changed to 24.36Ω. On the basis of Fig. 29, the steady
current through 40.8Ω load is about 1.04A, indicating a 42.4V voltage over the filter capacitor CF. When
the load is changed to 24.36Ω, the current surges to 1.7A, and the voltage over CF is 41.4V. The minor
difference between these two voltages is caused by reading error. The load current reverted to 1.04A after
100ms, demonstrating the CCOut characteristic of LC/S compensation topology. In fact, the steady
current through 24.36Ω load is little more than 1.04A since the parameters in practical experiments is
not precise.

400mA/div

20ms/div

Fig. 29 CCOut characteristic of LC/S compensation topology.

D. Easily-changed output power

The output power files against input DC voltage are exhibited in Fig. 30. The dashed red profile
corresponds to the condition that L1 and C1 equal 308.9uH and 26.7nF respectively, which is referred to
as case 1. The solid green profile is gained when L1 and C1 are 201.33uH and 33.35nF respectively, and
it’s referred to as case 2. The output power is readily altered only by changing the values of primary
compensation inductor and capacitor. The specification of the LCT doesn’t need to be changed, making
LC/S compensation topology free from the constraints imposed by the LCT parameters. Moreover,
according to equation (11), the output power of case 2 should be 164.8W. The practical output power is
130.9W. The difference between experimental and theoretical results is mainly caused by the effect of
component power loss, which isn’t taken into consideration in theoretical analysis, and imprecise
parameters. If the two aspects were considered in theory, the experimental results should be highly
consistent with the theoretical values.

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140
120 130.9

Output power/W
100
80
63.8
60
40
20
0
40 50 60 70 80 90 100
Input voltage/V

Fig. 30 Output power against input voltage when different L1 and C1 are adopted.

E. Efficiency comparison between LC/S and double-sided LCC compensation topologies

The loss distribution of LC/S compensated system is shown in Fig. 31 when the parameters listed in
TABLE 8 are employed. The input, output and loss powers are 69.4W, 63.8W and 5.6W, indicating a
system efficiency of 91.9%.

Fig. 31 Loss distribution of LC/S compensated system.

The loss distribution of double-sided LCC compensated system is shown in Fig. 32. The system
operation frequency and compensation parameters of double-sided LCC are shown in TABLE 10. The
other parameters are identical to those of LC/S compensated system. The input, output and loss powers
are 79.6W, 73.7W and 5.9W, indicating a system efficiency of 92.6%. The system efficiency of double-
sided LCC is a little higher than that of LC/S, which is in coincidence with simulation results.

Fig. 32 Loss distributions of double-sided LCC compensated system.

TABLE 10 COMPENSATION COMPONENT PARAMETERS OF DOUBLE-SIDED LCC TOPOLOGY

Parameters f Lf1 Cf1 C1 Lf2 Cf2 C2

Values 85kHz 220.3μH 25.7nF 38.7nF 96.3μH 36.3nF 26.3nF

With respect to LC/S compensated system, most power is dissipated in control circuit (33%), rectifier
diodes (26%) and compensation inductor (18%), as well as inverter MOSFETs (9%). The control circuit
loss accounts for the largest proportion since the system power is low. The ratio of control circuit loss is

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going to drastically decrease when system power increases. The rectifier diode loss also takes up a
remarkable portion because the output voltage is relatively low whereas the conduction voltage drop of
employed diode is relatively high. The compensation inductor loss ranks 3 rd out of 7 loss sources as the
ESR of compensation inductor is large. The loss distribution of double-sided LCC compensated system
is similar to that of LC/S. The major difference is that secondary compensation inductor loss takes a quite
big proportion among the total loss for LC/S.

F. Equivalent resistance of RFRC

The input voltage and current of rectifier (uab and is) is shown in Fig. 33(a). When RFRC was replaced
by its equivalent resistance, the waveforms of uab and is are exhibited in Fig. 33(b). The current waveform
is significantly similar to that in Fig. 33(a), including the magnitude. Moreover, the system input powers
corresponding to these two scenarios are 71.7W and 72.6W respectively, which are very close. Similar
current waveforms and close system input powers illustrate the validity of replacing RFRC with its
equivalent resistance. This replacement will significantly reduce the difficulty of circuit analysis while
keep the analysis accuracy.

1A/div
1A/div

50V/div
50V/div

2us/div 2us/div
(a) (b)

Fig. 33 Waveforms of uab and is when (a) RFRC and (b) its equivalent resistance are employed respectively.

VII CONCLUSION

A new compensation topology for WPT system, which is named as LC/S, is proposed in this paper to
provide excellent CCOut characteristic. The LC/S compensation topology is free from the constraints
imposed by the LCT parameters, which means the system output power can be easily changed without
replacing the LCT. This merit makes LC/S compensation topology much better than four conventional
compensation topologies because it’s time- and cost-consuming to manufacture a new LCT. Additionally,
compared to double-sided LCC compensation topology, which consists of two inductors and four
capacitors, the system efficiency of LC/S compensation topology is about 2.5 percent higher. The
increase of system efficiency is mainly resulted from the reduction of compensation inductor, on which
the power loss is mostly consumed. What’s more, the input impedance angle can be readily changed only
by altering the value of secondary series compensation capacitor. This will obviously reduce the difficulty
of debugging the circuit to obtain ZVS and optimum performance. The method to design the LCT is also
improved on the basis of reference [28]. This will highly reduce the difficulty of designing a high-
performance LCT.

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