1a Develop an expression for the operating point IC and VCE for the voltage divider bias circuit

using approximate analysis. Also Calculate the operation point for the VDB circuit given Vcc=10V,
R1=10KΩ, R2= 2.2KΩ, Rc= 3.6KΩ, RE= 1KΩ

1b For the circuit shown in Fig 1b, determine the voltage gain and ac load voltage if β = 150
2a Design the voltage divider bias circuit to meet the following specifications Vcc=10V, VCE
at mid point, stiff voltage divider, collector current 1mA, βdc = 70 -200

RE=1/1mA=1KΩ
Rc=(4)(1KΩ)=4KΩ

R2<(0.01)(70)( 1KΩ)=700Ω say (680Ω)

R1=(8.3/1.7)680=3.3KΩ

2b For the circuit shown below in Fig 2b, the ac generator has an internal
resistance of 600Ω for a voltage divider circuit. Determine the output voltage if β
= 300
 3a With neat circuit diagrams, explain biasing of MOSFET by fixing the
gate voltage
3b With neat circuit diagram, develop an expression for voltage gain, input impedance
and output impedance for common gate amplifier
4a Develop an expression for drain to source voltage for a MOSFET amplifier using
drain to gate feedback resistor
4b Develop an expression for transconductance in terms of drain current and overdrive
voltage

4c With neat circuit diagram, develop an expression for voltage gain, input impedance
and output impedance for common source amplifier without source resistance
5a With neat circuit diagram, explain the operation of R-2R DAC

R-2R ladder D/A converter

Overcomes the limitations of the binary-weighted D/A converter as only two resistors are used
R and 2R .Figure shown is as a 4-bit D/A converter. The switches D0 – D3 would normally be
some type of active switch. The switches connect the four inputs to either ground (logic 0) or
+Vref (logic 1).
MSB bit is connected to inverting terminal of op-amp and non inverting connected to ground.
The ladder network converts the possible binary input values from 0000 through 1111 to one of
16 unique output voltage levels.
D0 is considered to be the least significant input bit (LSB), while D3 is the most significant bit
(MSB).
To determine the D/A converter’s output voltage, you must first change the binary input
value to its decimal-equivalent value BIN. This can be done by:

where N equals the number of inputs. Vref=reference voltage

Suppose D0=1 D1=0 D2=0 D3=0
BIN = (1X20)+(0X21)+ (0X22)+ (0X23)=1
Vout = - (1/24 X 2 X 5)=0.0625X10= - 0.625

5b For the circuit shown in Fig 5b, the input voltage is a sine wave with peak value of
10V. Determine the trip point. Also plot the input output waveform
Vref=(100K/200K+100K)x 15= + 5V

5c With neat circuit diagram, explain the operation of Schmitt trigger

The standard solution for a noisy input is to use a comparator like the one shown in
Fig.a. The input voltage is applied to the inverting input. Because the feedback voltage
at the noninverting input is aiding the input voltage, the feedback is positive. A
comparator using positive feedback like this is usually called a Schmitt trigger.

When the comparator is positively saturated, a positive voltage is fed back to the
noninverting input. This positive feedback voltage holds the output in the high state.
Similarly, when the output voltage is negatively saturated, a negative voltage is fed
back to the noninverting input, holding the output in the low state.
The feedback fraction is:
When the output is positively saturated, the reference voltage applied to the
noninverting input is: Upper Trip Point UTP= + BVsat
When the output is negatively saturated, the reference voltage is:
Lower Trip Point LTP = - BVsat
The output voltage will remain in a given state until the input voltage exceeds the
reference voltage for that state +BVsat. The input voltage must be increased to slightly
more than +BVsat to switch the output voltage from positive to negative, as shown in
Fig. b.
Once the output is in the negative state, it will remain there indefinitely until the input
voltage becomes more negative than - BVsat. Then, the output switches from negative
to positive

6a With neat circuit diagram, internal diagram of 555 timer and waveforms explain the
operation of astable multivibrator

Astable Operation or Astable Multivibrator

 No external trigger signal is applied.

 When Q is low Q=0, the transistor is cut off and the capacitor is charging through
a total resistance of: R = R1 + R2 Because of this, the charging time constant is
(R1 + R2)C.
 As the capacitor charges, the threshold voltage (pin 6) increases
 When the threshold voltage exceeds +2VCC/3. Then, the upper comparator sets
the flip-flop. Q=1 the transistor saturates and grounds pin 7.
 The capacitor now discharges through R2. Therefore, the discharging time
constant is R2C.
 When the capacitor voltage drops to slightly less than VCC/3, the lower
comparator resets the flip-flop. Q=0
 The process repeats
The timing capacitor has exponentially rising and falling voltages between UTP and
LTP. The output is a rectangular wave that swings between 0 and VCC.
Since the charging time constant is longer than the discharging time constant, the
output is nonsymmetrical.
The pulse width is given by: W=TON
W = 0.693 (R1 + R2) C
TOFF = 0.693 (R2) C
The period of the output equals: T= TON+ TOFF

The reciprocal of the period is the frequency:

Dividing the pulse width by the period gives the duty cycle:

Duty Cycle = W/𝑇

6b With neat circuit diagram, explain the operation of wein bridge oscillator

The Wien-Bridge Oscillator

A Wien-Bridge Oscillator is a type of phase-shift oscillator which is based upon a Wien-
Bridge network comprising of four arms connected in a bridge fashion

The output of the operational amplifier is fed back to both the inputs of the amplifier.
One part of the feedback signal is connected to the inverting input terminal (negative
feedback) via the resistor divider network of Rf and R1 which allows the amplifiers
voltage gain to be adjusted within narrow limits.
The other part, which forms the series and parallel combinations of R and C forms the
feedback network and are fed back to the non-inverting input terminal (positive or
feedback) via the RC Wien Bridge network and it is this positive feedback combination
that gives rise to the oscillation.
The voltage gain of the amplifier circuit must be, Av ≥ 3 for oscillations to start because
the input is 1/3 of the output. .for a non-inverting amplifier this is given as the ratio
Av= 1+(Rf/R1). And feedback factor B=1/3
Frequency of oscillation is given by

Where: ƒr is the Resonant Frequency in Hertz , R is the Resistance in

Ohms ,C is the Capacitance in Farads

7a Classify negative feedback amplifiers and explain each with neat block diagram

Four Types of Negative Feedback

a) Voltage-Controlled Voltage Source
b) Current- Controlled Voltage Source
c) Voltage-Controlled Current Source;
d) Current- Controlled Current Source;
Figure 17-1a shows the VCVS, a voltage amplifier. With practical circuits, the input
impedance is not infinite, but it is very high. Likewise, the output impedance is not zero,
but it is very low. The voltage gain of the VCVS is symbolized Av. Since zout
approaches zero, the output side of a VCVS is a stiff voltage source to any practical
load resistance.

Figure 17-1b shows an ICVS, a transresistance amplifier (current-to voltage converter).

It has a very low input impedance and a very low output impedance. The conversion
factor of the ICVS is called transresistance, symbolized rm and expressed in ohms.
Because zout approaches zero, the output side of an ICVS is a stiff voltage source for
practical load resistances

Figure 17-2 cshows a VCIS, a transconductance amplifier (voltage- to-current

converter). It has a very high input impedance and a very high output impedance. The
conversion factor of the VCIS is called transconductance, symbolized gm and
expressed in siemens (mhos). Because zout approaches infinity, the output side of a
VCIS is a stiff current source for any practical load resistance.

Figure 17-2d shows an ICIS, a current amplifier. It has very low input impedance and
very high output impedance. The current gain of the ICIS is symbolized Ai. Since zout
approaches infinity, the output side of a VCVS is a stiff current source to any practical
load resistance.
7b Calculate the feedback fraction, ideal closed loop gain, percentage error and exact
closed loop voltage gain. Use AOL = 100,000 for 741C

7c With neat circuit diagram and expressions, explain current amplifiers.

An ICIS circuit amplifies the input current. Because of the heavy negative feedback, the
ICIS amplifier tends to act like a perfect current amplifier. It has a very low input
impedance and a very high output impedance.
Figure shows an inverting current amplifier. The closed-loop current gain is stabilized
and given by:

Usually, the second term in the denominator is much larger than the first, and the
equation simplifies to:

The equation for the closed-loop input impedance of an ICIS amplifier is:

where the feedback fraction is given by:

The stabilized output current sees a closed-loop output impedance of:

zout(CL) 5 (1 + AVOLB)R1
A large AVOL produces a very small input impedance and a very large output
impedance. Because of this, the ICIS circuit is an almost perfect current amplifier.

8a Classify the filters and explain the ideal response for each of the filters

1.Low-Pass Filter
It is sometimes called a brick wall response because the right edge of the rectangle
looks like a brick wall. A low-pass fi lter passes all frequencies from zero to the cutoff
frequency and blocks all frequencies above the cutoff frequency. With a low-pass filter,
the frequencies between zero and the cutoff frequency are called the passband. The
frequencies above the cutoff frequency are called the stopband. The roll-off region
between the passband and the stopband is called the transition. An ideal low-pass fi
lter has zero attenuation (signal loss) in the passband, infinite attenuation in the
stopband, and a vertical transition.
2.High-Pass Filter

A high-pass filter blocks all frequencies from zero up to the cutoff frequency and passes
all frequencies above the cutoff frequency. With a high-pass filter, the frequencies
between zero and the cutoff frequency are the stopband. The frequencies above the
cutoff frequency are the passband. An ideal high-pass filter has infinite attenuation in
the stopband, zero in the passband, and a vertical transition

3.Bandpass Filter

This filter blocks all frequencies from zero up to the lower cutoff frequency. Then, it
passes all the frequencies between the lower and upper cutoff frequencies. Finally, it
blocks all frequencies above the upper cutoff frequency. With a bandpass filter, the
passband is all the frequencies between the lower and upper cutoff frequencies. The
frequencies below the lower cutoff frequency and above the upper cutoff frequency are
the stopband. An ideal bandpass filter has zero attenuation in the passband, infinite
attenuation in the stopband, and two vertical transitions.
The bandwidth (BW) of a bandpass filter is the difference between its upper and lower
3-dB cutoff frequencies:
BW= f2 - f1
The center frequency is symbolized by f0 and is given by the geometric average of the
two cutoff frequencies:
The Q of a bandpass filter is defined as the center frequency divided by the bandwidth:

When the Q is greater than 10, the center frequency can be approximated by the
arithmetic average of the cutoff frequencies:

If Q is less than 1, the bandpass filter is called a wideband filter. If Q is greater than 1,
the filter is called a narrowband filter.

4.Bandstop Filter

This type of filter passes all frequencies from zero up to the lower cutoff frequency.
Then, it blocks all the frequencies between the lower and upper cutoff frequencies.
Finally, it passes all frequencies above the upper cutoff frequency.
With a bandstop filter, the stopband is all the frequencies between the lower and upper
cutoff frequencies. The frequencies below the lower cutoff frequency and above the
upper cutoff frequency are the passband. An ideal bandstop filter has infinite
attenuation in the stopband, no attenuation in the passband, and two vertical
transitions. the bandstop filter is sometimes called a notch filter because it notches out
or removes all frequencies in the stopband.

5.All-Pass Filter

It has a passband and no stopband. Because of this, it passes all frequencies between
zero and infinite frequency. The all-pass filter is useful when we want to produce a
certain amount of phase shift for the signal being filtered without changing its
amplitude.
The phase response of a filter is defined as the graph of phase shift versus frequency.
With the all-pass filter, each distinct frequency can be shifted by a certain amount as it
passes through the filter.
8b With neat circuit diagrams, explain the operation of first order low pass filter and
high pass filter

Low-Pass filter
(a) Noninverting unity gain

It is nothing more than an RC lag circuit and a voltage follower. The voltage gain is:
Av = 1
When the frequency increases above the cutoff frequency, the capacitive reactance
decreases and reduces the noninverting input voltage. Since the R1C1 lag circuit is
outside the feedback loop, the output voltage rolls off. As the frequency approaches
infinity, the capacitor becomes a short and there is zero input voltage The 3-dB cutoff
frequency is given by:

(b) Noninverting with voltage gain

Although it has two additional resistors, it has the advantage of voltage gain. The
voltage gain well below the cutoff frequency is given by:

The cutoff frequency is given by:

Above the cutoff frequency, the lag circuit reduces the noninverting input voltage. Since
the R3C1 lag circuit is outside the feedback loop, the output voltage rolls off at a rate of
20 dB per decade

(c) Inverting with voltage gain.

At low frequencies, the capacitor appears to be open and the circuit acts like an
inverting amplifier with a voltage gain of:

As the frequency increases, the capacitive reactance decreases and reduces the
impedance
of the feedback branch. This implies less voltage gain. As the frequency approaches
infinity, the capacitor becomes a short and there is no voltage gain.
the cutoff frequency is given by:

Note: all first-order stages are maximally flat in the passband and monotonic in the
stopband, and they roll off at a rate of 20 dB per decade.

High-Pass filter
(a) Noninverting unity gain

When the frequency decreases below the cutoff frequency, the capacitive reactance
increases and reduces the noninverting input voltage. Since the R1C1 circuit is outside
the feedback loop, the output voltage rolls off. As the frequency approaches zero, the
capacitor becomes an open and there is zero input voltage
The voltage gain is:
Av =1
The 3-dB cutoff frequency is given by:

(b) Noninverting with voltage gain;

The voltage gain well above the cutoff frequency is given by:

The 3-dB cutoff frequency is given by:

Well below the cutoff frequency, the RC circuit reduces the noninverting input voltage.
Since the R3C1 lag circuit is outside the feedback loop, the output voltage rolls off at a
rate of 20 dB per decade.

(c) Inverting with voltage gain.

At high frequencies, the circuit acts like an inverting amplifier with a voltage gain of:

As the frequency decreases, the capacitive reactances increase and eventually reduce
the input signal and the feedback. This implies less voltage gain. As the frequency
approaches zero, the capacitors become open and there is no input signal.,
the 3-dB cutoff frequency is given by:

9a With neat circuit diagram and waveform explain SCR phase control using RC circuit
RC Circuit Controls Phase Angle or RC Firing Circuit

Figure a shows ac line voltage

being applied to an SCR circuit
that controls the current
through a heavy load. In this
circuit, variable resistor R1 and
capacitor C shift the phase
angle of the gate signal. When
R1 is zero, the gate voltage is
in
phase with the line voltage, and
the SCR acts like a half-wave
rectifier.
R2 limits the gate current to a
safe level.
When R1 increases, however,
the ac gate voltage lags the line
voltage by an angle between 0°
and 90°, as shown in Figs. b and c.
Before the trigger point shown in Fig. c, the SCR is off and the load current is zero. At
the trigger point, the capacitor voltage is large enough to trigger the SCR. When this
happens, almost all of the line voltage appears across the load and the load current
becomes high.
Ideally, the SCR remains latched until the line voltage reverses polarity. This is shown
in Figs.c and d.
The angle at which the SCR fires is called the firing angle, shown as θfire in Fig.a. The
angle between the start and end of conduction is called the conduction angle, shown as
θconduction. The RC phase controller of Fig. a can change the firing angle between 0°
and 90°, which means that the conduction angle changes from 180° to 90°.
The shaded portions of Fig. b show when the SCR is conducting. Because R1 is
variable, the phase angle of the gate voltage can be changed. This allows us to control
the shaded portions of the line voltage.
Another way is we can control the average current through the load. This is useful for
changing the speed of a motor, the brightness of a lamp, or the temperature of an
induction furnace.
9b With neat circuit diagram, explain the operation of UJT and hence explain how it is
used as relaxation oscillator.

The unijunction transistor (UJT) has two doped regions, as shown in Fig. a.

When the input voltage is zero, the device is nonconducting. When we increase the
input voltage above the standoff voltage the resistance. between the p region and the
lower n region becomes very small, as shown in Fig. b. Figure c is the schematic
symbol for a UJT.
UJT is an n-type silicon bar in which p-type emitter is embedded. It has three terminals
base1, base2 and emitter ‘E’. Between B1 and B2 UJT behaves like ordinary resistor
and the internal resistances are given as RB1and RB2 with emitter open
RBB= RB1 + RB2 . Usually the p-region is heavily doped and n-region is lightly doped.

UJT relaxation oscillator

The UJT can be used to form a pulse-generating circuit called a UJT relaxation
oscillator, as shown in Fig. . In this circuit, the capacitor charges toward VBB. When the
capacitor voltage reaches a value equal to the standoff voltage, the UJT turns on. The
internal lower base (lower n region) resistance quickly drops in value allowing the
capacitor to discharge.
The capacitor discharge continues until low-current drop-out occurs. When this
happens, the UJT turns off and the capacitor begins to once again charge toward VBB.
The charging RC time constant is normally significantly larger than the discharge time
constant.
The sharp pulse waveform developed across the external resistor at B1 can be used as
a trigger source for controlling the conduction angle of SCR and triac circuits. The
waveform developed across the capacitor can be used in applications where a
sawtooth generator is needed.

10a Make use of break over characteristics to explain the operation of 4 layer diode
Breakover Characteristic

The device has two operating regions: cutoff and saturation. The dashed line is the
transition path between cutoff and saturation. It is dashed to indicate that the device
switches rapidly between the off and on states.
When the device is at cutoff, it has zero current. If the voltage across diode tries to
exceed VB, the device breaks over and moves rapidly along the dashed line to the
saturation region. When the diode is in saturation, it is operating on the upper line. As
long as the current through it is greater than the holding current IH, the diode remains
latched in the on state. If the current becomes less than IH, the device switches into
cutoff.
The ideal approximation of a four-layer diode is an open switch when cut off and a
closed switch when saturated.

10b Write short notes on IGBT

Power MOSFETs and BJTs can both be used in high-power switching applications. The
MOSFET has the advantage of greater switching speed, and the BJT has lower
conduction losses. By combining the low conduction loss of a BJT with the switching
speed of a power MOSFET, we can begin to approach an ideal switch.
This hybrid device exists and is called an insulated-gate bipolar transistor (IGBT).
Figure shows the basic structure of an n-channel IGBT. Its structure resembles an n-
channel power MOSFET constructed on a p-type substrate. As shown, it has gate,
emitter, and collector leads.
Two versions of this device are referred to as punch-through (PT) and nonpunch-
through (NPT) IGBTs. Figure shows the structure of a PT IGBT. The PT IGBT has an
n+ buffer layer between its p+ and n- regions, and the NPT device has no n+ buffer
layer.
NPT versions have higher conduction VCE(on) values than PT versions and a positive
temperature coefficient
PT versions, with the extra n+ layer, have the advantage of higher switching speeds.
They also have a negative temperature coefficient.

Figures a and b show two common schematic symbols for an n-channel IGBT.
Fig. c shows a simplified equivalent circuit for this device. the IGBT is essentially a
power MOSFET on the input side and a BJT on the output side. The input control is a
voltage between the gate and emitter leads. the gate drive circuits for an IGBT must be
able to quickly charge up and discharge the IGBT’s input capacitance for fast switching
speeds. The output is a current between the collector and emitter leads. Because the
output of the IGBT relies on BJT construction, this results in a slower device turn-off
speed than a power FET.

10c Explain bi-directional thyristors in brief.

Bidirectional Thyristors
the four-layer diode and the SCR, are unidirectional because current can fl ow in only
one direction. The diac and triac are bidirectional thyristors. These devices can conduct
in either direction. The diac is sometimes called a silicon bidirectional switch (SBS).
Diac

The diac can latch current in either direction. The equivalent circuit of a diac is two four-
layer diodes in parallel, as shown in Fig. a, ideally the same as the latches in Fig. b.
The diac is nonconducting until the voltage across it exceeds the breakover voltage in
either direction.
For instance, if v has the polarity indicated in Fig.a, the left diode conducts when v
exceeds the breakover voltage. In this case, the left latch closes, as shown in Fig. c.
When v has the opposite polarity, the right latch closes. Figure d shows the schematic
symbol for a diac.

Triac
The triac acts like two SCRs in reverse parallel (Fig. a), equivalent to the two latches of
Fig.b. Because of this, the triac can control current in both directions.
If v has the polarity shown in Fig. a, a positive trigger will close the left latch.
When v has opposite polarity, a negative trigger will close the right latch.
Figure c is the schematic symbol for a triac.