STF16N60M2
N-channel 600 V, 0.28 Ω typ., 12 A MDmesh™ M2
Power MOSFET in a TO-220FP package
Datasheet - production data
Features
Order code VDS RDS(on) max. ID
STF16N60M2 600 V 0.32 Ω 12 A
• Extremely low gate charge
• Excellent output capacitance (COSS) profile
3 • 100% avalanche tested
2
1 • Zener-protected
TO-220FP Applications
• Switching applications
Figure 1: Internal schematic diagram
D(2) Description
This device is an N-channel Power MOSFET
developed using MDmesh™ M2 technology.
Thanks to its strip layout and an improved vertical
structure, the device exhibits low on-resistance
and optimized switching characteristics,
G(1) rendering it suitable for the most demanding high
efficiency converters.
S(3) AM15572v1_no_tab
Table 1: Device summary
Order code Marking Package Packing
STF16N60M2 16N60M2 TO-220FP Tube
March 2015 DocID027170 Rev 1 1/13
This is information on a product in full production. www.st.com
Contents STF16N60M2
Contents
1 Electrical ratings ............................................................................. 3
2 Electrical characteristics ................................................................ 4
2.1 Electrical characteristics (curves) ...................................................... 6
3 Test circuits ..................................................................................... 8
4 Package mechanical data ............................................................... 9
4.1 TO-220FP package information ...................................................... 10
5 Revision history ............................................................................ 12
2/13 DocID027170 Rev 1
STF16N60M2 Electrical ratings
1 Electrical ratings
Table 2: Absolute maximum ratings
Symbol Parameter Value Unit
VGS Gate-source voltage ± 25 V
(1)
ID Drain current (continuous) at TC = 25 °C 12 A
(1)
ID Drain current (continuous) at TC= 100 °C 7.6 A
(2)
IDM Drain current (pulsed) 48 A
PTOT Total dissipation at TC = 25 °C 25 W
(3)
dv/dt Peak diode recovery voltage slope 15 V/ns
(4)
dv/dt MOSFET dv/dt ruggedness 50 V/ns
Insulation withstand voltage (RMS) from all three leads
VISO 2500 V
to external heat sink (t = 1 s, TC = 25 °C)
Tstg Storage temperature - 55 to 150
°C
Tj Max. operating junction temperature 150
Notes:
(1)
Limited only by maximum temperature allowed.
(2)
Pulse width limited by safe operating area.
(3)
ISD ≤ 12 A, di/dt ≤ 400 A/µs; VDS peak < V(BR)DSS, VDD = 80% V(BR)DSS.
(4)
VDS ≤ 480 V.
Table 3: Thermal data
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case max. 5 °C/W
Rthj-amb Thermal resistance junction-ambient max. 62.5 °C/W
Table 4: Avalanche characteristics
Symbol Parameter Value Unit
Avalanche current, repetetive or not repetetive
IAR 2.9 A
(pulse width limited by Tjmax)
Single pulse avalanche energy (starting Tj = 25 °C,
EAS 130 mJ
ID = IAR, VDD = 50 V)
DocID027170 Rev 1 3/13
Electrical characteristics STF16N60M2
2 Electrical characteristics
(TC = 25 °C unless otherwise specified).
Table 5: Static
Symbol Parameter Test conditions Min. Typ. Max. Unit
Drain-source breakdown
V(BR)DSS VGS = 0 V, ID = 1 mA 600 V
voltage
VGS = 0 V, VDS = 600 V 1 µA
Zero gate voltage drain
IDSS VGS = 0 V, VDS = 600 V,
current 100 µA
TC = 125 °C
IGSS Gate-body leakage current VDS = 0 V, VGS = ±25 V ±10 µA
VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 2 3 4 V
Static drain-source on-
RDS(on) VGS = 10 V, ID = 6 A 0.28 0.32 Ω
resistance
Table 6: Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
Ciss Input capacitance - 700 - pF
Coss Output capacitance VDS= 100 V, f = 1 MHz, - 38 - pF
Reverse transfer VGS = 0 V
Crss - 1.2 - pF
capacitance
(1) Equivalent output
Coss eq. VDS = 0 V to 480 V, VGS = 0 V - 140 - pF
capacitance
RG Intrinsic gate resistance f = 1 MHz open drain - 5.3 - Ω
Qg Total gate charge - 19 - nC
VDD = 480 V, ID = 12 A,
Qgs Gate-source charge VGS = 10 V (see Figure 15: - 3.3 - nC
"Gate charge test circuit")
Qgd Gate-drain charge - 9.5 - nC
Notes:
(1)
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS.
Table 7: Switching times
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time VDD = 300 V, ID = 6 A - 10.5 - ns
RG = 4.7 Ω, VGS = 10 V (see
tr Rise time - 9.5 - ns
Figure 14: "Switching times
td(off) Turn-off-delay time test circuit for resistive load" - 58 - ns
and Figure 19: "Switching time
tf Fall time waveform") - 18.5 - ns
4/13 DocID027170 Rev 1
STF16N60M2 Electrical characteristics
Table 8: Source-drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
ISD Source-drain current - 12 A
(1) Source-drain current
ISDM - 48 A
(pulsed)
(2)
VSD Forward on voltage VGS = 0 V, ISD = 12 A - 1.6 V
trr Reverse recovery time ISD = 12 A, di/dt = 100 A/µs, - 316 ns
VDD = 60 V (see Figure 16:
Qrr Reverse recovery charge - 3.25 µC
"Test circuit for inductive load
switching and diode recovery
IRRM Reverse recovery current - 20.5 A
times")
trr Reverse recovery time ISD = 12 A, di/dt = 100 A/µs, - 454 ns
Qrr Reverse recovery charge VDD = 60 V, Tj = 150 °C (see - 4.8 µC
Figure 16: "Test circuit for
inductive load switching and
IRRM Reverse recovery current - 21 A
diode recovery times")
Notes:
(1)
Pulse width is limited by safe operating area.
(2)
Pulse test: pulse duration = 300 µs, duty cycle 1.5%.
DocID027170 Rev 1 5/13
Electrical characteristics STF16N60M2
2.1 Electrical characteristics (curves)
Figure 2: Safe operating area Figure 3: Thermal impedance
Figure 4: Output characteristics Figure 5: Transfer characteristics
Figure 6: Normalized gate threshold voltage Figure 7: Normalized V(BR)DSS vs.
vs. temperature temperature
6/13 DocID027170 Rev 1
STF16N60M2 Electrical characteristics
Figure 9: Normalized on-resistance vs.
Figure 8: Static drain-source on-resistance
temperature
Figure 10: Gate charge vs. gate-source
Figure 11: Capacitance variations
voltage
Figure 13: Source- drain diode forward
Figure 12: Output capacitance stored energy
characteristics
DocID027170 Rev 1 7/13
Test circuits STF16N60M2
3 Test circuits
Figure 14: Switching times test circuit for resistive
Figure 15: Gate charge test circuit
load
VDD
12 V 47 k Ω
1 kΩ
100 nF
I G = CONST
Vi ≤ V GS 100 Ω D.U.T.
2.7 k Ω VG
2200 μ F
47 k Ω
1 kΩ
PW
AM01469v 1
Figure 16: Test circuit for inductive load switching
and diode recovery times Figure 17: Unclamped inductive load test circuit
A A A
D
FAST L=100 µH
G D.U.T. DIODE
S B 3.3 1000
B B µF µF
25 Ω VDD
D
G D.U.T.
RG S
AM01470v1
Figure 18: Unclamped inductive waveform Figure 19: Switching time waveform
t on toff
V(BR)DSS
t d(on) tr t d(off) tf
VD
90% 90%
I DM
10%
10% VDS
0
ID
VDD VDD 90%
VGS
0 10% AM01473v 1
AM01472v 1
8/13 DocID027170 Rev 1
STF16N60M2 Package mechanical data
4 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
® ®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
DocID027170 Rev 1 9/13
Package mechanical data STF16N60M2
4.1 TO-220FP package information
Figure 20: TO-220FP package outline
7012510_Rev_K_B
10/13 DocID027170 Rev 1
STF16N60M2 Package mechanical data
Table 9: TO-220FP mechanical data
mm
Dim.
Min. Typ. Max.
A 4.4 4.6
B 2.5 2.7
D 2.5 2.75
E 0.45 0.7
F 0.75 1
F1 1.15 1.70
F2 1.15 1.70
G 4.95 5.2
G1 2.4 2.7
H 10 10.4
L2 16
L3 28.6 30.6
L4 9.8 10.6
L5 2.9 3.6
L6 15.9 16.4
L7 9 9.3
Dia 3 3.2
DocID027170 Rev 1 11/13
Revision history STF16N60M2
5 Revision history
Table 10: Document revision history
Date Revision Changes
24-Mar-2015 1 Initial release.
12/13 DocID027170 Rev 1
STF16N60M2
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DocID027170 Rev 1 13/13
