001.

A memory in which any location can be accessed in a short and fixed amount of time D
after specifying its address is called_____________
A Read Only Memory B Write only Memory
C Erasable Memory D Random Access Memory
002. Each instruction, number, or character is encoded as a string of binary digits called A
________
A bits B code
C program D command
003. A _____________ is a list of instructions which performs a task B
A Keyword B Program
C Memory D Register
004. _____________ functional unit accepts coded information from human operators A
A input B output
C memory D Arithmetic and logic
005. _______________ is the input device in the following. C
A Monitor B Speakers
C Keyboard D Printer
006. _________ is used for holding data, intermediate results of operations A
A General Purpose Register B Program Counter
C Instruction Register D MDR
007. __________________ Keeps track of the execution of a program B
A General Purpose Register B Program Counter
C Instruction Register D MDR
008. MAR stands for ___________________ B
A Memory Array Register B Memory Address Register
C Main Array Register D Main Address Register
009. MDR stands for ___________________ A
A Memory Data Register B Memory Digital Register
C Main Data Register D Main Digital Register
010. ____________ holds the instruction that is currently being executed C
A General Purpose Register B Program Counter
C Instruction Register D MDR
011. On a synchronous bus, all devices derive timing information from a control line called D
____.
A Device Clock B Line Clock
C Digital Clock D Bus Clock
012. The bus consists of ___________ sets of lines C
A one B Two
C Three D Four
013. A set of instructions/ programs is known as ___________ A
A Software B Hardware
C Processor D Memory
014. A group of lines that serves as a connecting path for several devices is called D
__________
A Bit B Byte
C Word D Bus
015. The main virtue for using single Bus structure is ____________ C
A Fast data transfers B Cost effective connectivity
C Cost effective connectivity and ease D Low Power
of attaching peripheral devices
016. SPEC stands for________________ A
A System Performance Evaluation B Software Performance Evaluation
Corporation Corporation
C System Performance Evaluation D Software Performance Evaluation
 Control Control
017. The _____________ is the time taken by the computer to execute a given bench mark B
A Processor Measure B Performance Measure
C Time Measure D Clock Measure
018. The clock designer the regular time intervals called______________ C
A Processor Cycle B Time Cycle
C Clock Cycle D Design Cycle
019. If a user wants to enter and run an application program, user needs _____________. A
A System Software B Bus Structure
C Memory unit D Register Organization
020. The time needed to execute a instruction is called the ___________ time. A
A Processor B System
C Bus D Memory
021. Which one of the following is Fourth Generation D
A E. 1946-1955 B F. 1956-1965
C G. 1966-1975 D H. 1976-1990
022. Fourth Generation Computers used _______________ D
A Vacuum Tubes B Germanium Transistors
C Integrated Chips D LSI chips
023. Which one of the following is First Generation A
A 1946-1955 B 1956-1965
C 1966-1975 D 1976-1990
024. First Generation Computers used _______________ A
A Vacuum Tubes B Germanium Transistors
C Integrated Chips D LSI chips
025. VLSI stand for________________ B
A Very low Scale Integration B Very large Scale Integration
C Very large Scale Interconnect D Very low Scale Interconnect
026. To add the contents of registers R2 and R3, and places their sum into register R4, then D
Register Transfer Notation is______________
A R4 [R2] , [R3] B R4 [R2+R3]
C R4 [R2] [R3] D R4 [R2] + [R3]
027. If A and B are source operands, C is the destination operand. then to add A,B What is C
the instruction?
A ADD A,B,C B ADD A,C,B
C ADD C,A,B D ADD B,A,C
028. RISC stands for______________ B
A Reduced Instruction Set Compiler B Reduced Instruction Set Computers
C Reduced Instruction Software D Reduced Instruction Software
Computers Compiler
029. Memory Consist of __________ A
A Storage cells B Bus
C I/O Devices D Input Devices
030. The group of 8-bits is called___________ C
A Bit B Word
C Byte D Nibble
031. When using Branching, the usual sequencing of the PC is altered. A new instruction is A
loaded which is called as ______
A Branch target B Loop target
C Forward target D Jump instruction
032. The Instruction fetch phase ends with _________ D
A Placing the data from the address in B Placing the address of the data into
MAR into MDR MAR
C Completing the execution of the data D Decoding the data in MDR and
 and placing its storage address into placing it in IR
MAR
033. The two phases of executing an instruction are __________ B
A Instruction decoding and storage B Instruction fetch and instruction
execution
C Instruction execution and storage D Instruction fetch and Instruction
processing
034. CISC stand for __________________ A
A Complex Instruction Set Computers B Complex Instruction Set Compiler
C Complex Instruction Software D Complex Instruction Software
Computers Complier
035. If the word length of a computer is 32 bits, a single word can store ___________ C
A a 8-bit signed number B a 16-bit signed number
C a 32-bit signed number D a 64-bit signed number
036. If a system is 64 bit machine, then the length of each word will be _______ B
A 4 bytes B 8 bytes
C 16 bytes D 32 bytes
037. Does the Load instruction do the following operation/s? B
A Loads the contents of a disc onto a B Loads the contents of a location onto
memory location the accumulators
C Load the contents of the PCB onto D Load the contents of the PCB onto
the register the disc
038. The instructions like MOV or ADD are called as ______ A
A OP-Code B Operators
C Commands D Registers
039. The condition flag Z is set to 1 to indicate _______ C
A The operation has resulted in an error B The operation requires an interrupt
call
C The result is zero D There is no empty register available
040. __________ converts the programs written in assembly language into machine C
instructions.
A Machine compiler B Interpreter
C Assembler D Converter
041. R3<–[R1]+[R2], Right hand side of RTN-denotes ___________ A
A Value B Location
C Character D String
042. The instruction, Add R1,R2,R3 in RTN is _______ D
A R3=R1+R2+R3 B R3<-[R1]+[R2]+[R3]
C R3=[R1]+[R2] D R3<-[R1]+[R2]
043. The instruction, Add Loc,R1 in RTN is _______ D
A Add SetCC Loc+R1 B R1=Loc+R1
C Not possible to write in RTN D R1<-[Loc]+[R1]
044. During the transfer of data between the processor and memory we use ______ D
A Cache B TLB
C Buffers D Registers
045. RTN stands for ___________ A
A Register Transfer Notation B Register Transmission Notation
C Regular Transmission Notation D Regular Transfer Notation
046. Advantage of Pipelined approach is_________________ A
A To reduce total execution time of a B To increase total execution time of a
program program
C To increase cost D To increase cost and execution time
047. Various operations needed to process a sequence of instructions are performed in B
____________ fashion
 A Sequence B Pipelined
C Alternate D combine
048. Load instructions are of the form __________ C
A destination, source Load B Load source, destination
C Load destination, source D Source , destination Load
049. R2 [LOC], The expression means _______________ A
A The contents of memory location LOC B The contents of memory location R2
are transferred into processor register are transferred into processor register
R2 LOC
C The contents of memory location LOC D The contents of memory location R2
are transferred into processor register are transferred into processor register
LOC R2
050. The Store instruction is of the form______________ B
A Store destination, source B Store source, destination
C Source store, destination D Source, destination Store
051. The addressing mode, where you directly specify the operand value is _______ A
A Immediate B Direct
C Definite D Relative
052. The addressing mode/s, which uses the PC instead of a general purpose register is B
______
A Indexed with offset B Relative
C Direct D Both Indexed with offset and direct
053. In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective D
address is ______
A EA = 5+R1 B EA = R1
C EA = [R1] D EA = 5+[R1]
054. In the case of, Zero-address instruction method the operands are stored in _____ C
A Registers B Accumulators
C Push down stack D Cache
055. The addressing mode which makes use of in-direction pointers is ______ A
A Indirect addressing mode B Index addressing mode
C Relative addressing mode D Offset addressing mode
056. ADD #%01011101,R1 can be written as a ______________ C
A ADD#91,R1 B ADD#92,R1
C ADD#93,R1 D ADD#94,R1
057. A simple way of performing I/O task is to use a method known as _______________ C
A Program B Instruction
C Program Controlled I/O D Varaible
058. Which of the following is Immediate addressing mode? A
A Operand = Value B Effective Address(EA) = Register
C EA=LOC D EA=[LOC]
059. _____ addressing mode is most suitable to change the normal sequence of execution A
of instructions.
A Relative B Indirect
C Index with Offset D Immediate
060. The different ways in which the location of an operand is specified in an instruction are B
referred as _________________
A Programs B Addressing modes
C Instructions D Variables
061. ________________ term is used to describe placing a new item on stack A
A Push B Pop
C Pull D Null
062. A stack is list of ______________ C
A variable B integers
 C data elements D structures
063. In order to organize the control and information linkage between the main program and A
subroutine ___________ data structure is used.
A Stack B Pointer
C String D Character
064. 01011101 equivalent decimal number is_____________ B
A 94 B 93
C 92 D 91
065. In assembly language a hex representation is often identified by ______ sign prefix B
A @ B $
C % D &
066. The compare instruction “ Compare src,dst” performs_____________ D
A [src]-[dst] B [src]-[src]
C [dst]-[dst] D [dst]-[src]
067. Which of the following is pop operation? A
A Move (SP)+, ITEM B Move (SP), ITEM-
C Move (SP)/, ITEM D Move (SP), ITEM/
068. Which of the following is push operation? A
A Move NEWITEM,-(SP) B Move NEWITEM,(SP)
C Move NEWITEM,+(SP) D Move NEWITEM,/(SP)
069. ________________ term is used to describe removing top item from stack B
A Push B Pop
C Pull D Null
070. A processor register is used to keep track of the address of the elements, this register A
is called___________
A Stack Pointer B Status register
C Flag D Over flow
071. Which representation is most efficient to perform arithmetic operations on the C
numbers?
A Sign-magnitude B 1’s complement
C 2’S complement D 9’S complement
072. Which one of the following is logical shifting instruction for shifting left? B
A LShiftL B LShiftR
C LLShift D LRShift
073. Which one of the following is logical shifting instruction for shifting left? A
A LShiftL B LShiftR
C LLShift D LRShift
074. Data are stored in and received from a queue on _____________ basis B
A LIFO B FIFO
C LILO D FILO
075. The instruction “NOT operand” , changes___________ C
A 1 to 0 B 0 to 1
C 1 to 0 and 0 to 1 D 1 to 1 and 0 to 1
076. For the addition of large integers, most of the systems make use of ______ C
A Fast adders B Full adders
C Carry look-ahead adders D Half adders
077. The Flag ‘V’ is set to 1 indicates that _____________ C
A The operation is valid B The operation is validated
C The operation has resulted in an D The operation is not valid
overflow
078. The register used to store the flags is called as _________ B
A Flag register B Status register
C Test register D Log register
079. Which method of representation has two representations for ‘0’? A