3.
2 Units of 8086: Bus interface unit
and execution unit , concept of memory
segmentation and pipelining , physical
address generation
TLO 3.2 :
Calculate physical address to locate the given data from memory segmentation.
Units of 8086
1. Bus Interface Unit (BIU):
The Bus Interface Unit (BIU) in the 8086 microprocessor is responsible for
managing the communication between the CPU and the memory or peripheral
devices. It handles tasks like fetching instructions, reading and writing data, and
controlling the address and data buses. The BIU works alongside the Execution
Unit (EU) to ensure smooth and efficient processing of instructions.
• Function Of BIU:
The Bus Interface Unit (BIU) is crucial for managing the flow of data and
instructions between the microprocessor and external devices like memory and
peripherals. It acts as the bridge between the Execution Unit (EU) and the external bus
system.
• Key Responsibilities of BIU:
1. Instruction Fetching: The BIU fetches instructions from memory and stores them
in queue for the Execution unit.
2. Data transfer: The BIU handles reading and writing data from and to memory and
I/O devices. It coordinates the data flow through the data bus.
3. Address Calculation: The BIU calculates the physical addresses for memory for
memory access using segment registers and offset values. This is crucial for
accessing the correct memory locations.
4. Bus Control: It controls the address and data buses, ensuring that the correct data
is transferred to and from the correct addresses. It also manages the control signals
needed for various operations, like read and write cycles.
• Components:
i. Instruction queue
ii. Segment registers
iii. Address Generation Logic
Units of 8086
2. Execution Unit (EU):
The Execution Unit (EU) in the 8086 microprocessor is responsible for executing
the instructions that have been fetched and queued by the Bus Interface Unit
(BIU). It decodes the instructions, performs the necessary arithmetic and logical
operations using the Arithmetic Logic Unit (ALU), and manages the flow of data
within the CPU.
Functions of Execution Unit (EU):
• EU executes instructions from the instruction system byte queue.
• EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index
register, Flag register.
• The Execution unit is responsible for decoding and executing all
instructions.
• During the execution of the instruction, the EU tests the status and control
flags and updates them based on the results of executing the instruction.
• EU has a 16-bit ALU, which can perform arithmetic and logical operations
on 8-bit as well as 16-bit data
Memory Segmentation in 8086
What is segmentation?
It is the process in which the
main memory of computer is
divided into different segments
and each segment has it’s own
base address.
Memory Segmentation:
Memory segmentation involves dividing the memory into segments, each with a
specific size and purpose.
In the 8086 microprocessor, segments include code, data, stack, and extra
segments.
Each segment is addressed by a segment register, allowing the CPU to access a
larger address space than the physical memory limit.
This segmentation helps in organizing programs, improving memory management,
and providing a more efficient way to handle large data sets and code.
Memory Segmentation in 8086:
Advantages of Segmentation :
It is used to increase the execution speed of computer
system.
Programs and data can be stored separately.
Segmentation allows two processes to share data.
Segmentation allows for efficient memory management,
larger address space, and organized data and code
access.
Concept Of Pipelining
• Fetchingthe next instruction while the current instruction is executing is
called as pipelining.
• Because of this, execution time will be reduced.
• Ultimately it improves the execution speed of the processor.
• In pipelined processor, fetch, decode and execute operations are performed in
parallel.
• In 8086, pipelining is implemented by providing 6 byte instruction queue
where 6 one byte instructions can be stored well in advance and then one by
one instruction goes for decoding and execution.
Pipelining In 8086:
Advantages of Pipelining:
Pipelining enables many instructions to be executed at
the same time.
It allows execution to be done in fewer clock cycles.
The execution speed of the processor is increased.
More efficient use of processor.
Physical Memory Address Generation
***Explain the concept of physical address calculation with suitable
diagram and example.***
• The address associated with any instruction or data byte is only 16-bit, it
is called as Effective Address/Offset/ Displacement/ Logical Address.
• The logical addresses are used to calculate the physical address.
• The address generated by BIU is 20-bit, it is called as Physical address.
Physical Memory address Generation :
Q. Calculate the physical address generated by:
i) 4370 : 561E
4 370 0 - Segment Base Address
+ 561E - Offset Address
4 8 D1 E – Physical Address
Physical Address = 48D1E H
Physical Memory address Generation :-
Q. Calculate the physical address generated by:
ii) CS:7A32 IP: 0028
7 A 3 2 0 - Segment Base Address
+ 0 0 2 8 - Offset Address
7 A3 4 8 – Physical Address
HW
iii. DS:A000H BX:2000H
iv. CS:1000H IP:2000H
v. CS:69FAH IP:834CH
vi. DS:C239H SI:8ABCH
vii. CS:1200H IP:DE00H
viii. DS:1F00H BX:1A00H
Thank You
